intel_blit.c revision fd83289dbf747b4d2e0849f77c796323e5517f0b
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include <stdio.h> 30#include <errno.h> 31 32#include "main/mtypes.h" 33#include "main/context.h" 34#include "main/enums.h" 35 36#include "intel_blit.h" 37#include "intel_buffers.h" 38#include "intel_context.h" 39#include "intel_fbo.h" 40#include "intel_reg.h" 41#include "intel_regions.h" 42#include "intel_batchbuffer.h" 43#include "intel_chipset.h" 44 45#define FILE_DEBUG_FLAG DEBUG_BLIT 46 47/** 48 * Copy the back color buffer to the front color buffer. 49 * Used for SwapBuffers(). 50 */ 51void 52intelCopyBuffer(const __DRIdrawablePrivate * dPriv, 53 const drm_clip_rect_t * rect) 54{ 55 56 struct intel_context *intel; 57 const intelScreenPrivate *intelScreen; 58 59 DBG("%s\n", __FUNCTION__); 60 61 assert(dPriv); 62 63 intel = intelScreenContext(dPriv->driScreenPriv->private); 64 if (!intel) 65 return; 66 67 intelScreen = intel->intelScreen; 68 69 /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets 70 * should work regardless. 71 */ 72 LOCK_HARDWARE(intel); 73 74 if (dPriv && dPriv->numClipRects) { 75 struct intel_framebuffer *intel_fb = dPriv->driverPrivate; 76 struct intel_region *src, *dst; 77 int nbox = dPriv->numClipRects; 78 drm_clip_rect_t *pbox = dPriv->pClipRects; 79 int cpp; 80 int src_pitch, dst_pitch; 81 unsigned short src_x, src_y; 82 int BR13, CMD; 83 int i; 84 dri_bo *aper_array[3]; 85 86 src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); 87 dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); 88 89 src_pitch = src->pitch * src->cpp; 90 dst_pitch = dst->pitch * dst->cpp; 91 92 cpp = src->cpp; 93 94 ASSERT(intel_fb); 95 ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ 96 ASSERT(src); 97 ASSERT(dst); 98 ASSERT(src->cpp == dst->cpp); 99 100 if (cpp == 2) { 101 BR13 = (0xCC << 16) | BR13_565; 102 CMD = XY_SRC_COPY_BLT_CMD; 103 } 104 else { 105 BR13 = (0xCC << 16) | BR13_8888; 106 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 107 } 108 109#ifndef I915 110 if (src->tiling != I915_TILING_NONE) { 111 CMD |= XY_SRC_TILED; 112 src_pitch /= 4; 113 } 114 if (dst->tiling != I915_TILING_NONE) { 115 CMD |= XY_DST_TILED; 116 dst_pitch /= 4; 117 } 118#endif 119 /* do space/cliprects check before going any further */ 120 intel_batchbuffer_require_space(intel->batch, 8 * 4, 121 REFERENCES_CLIPRECTS); 122 again: 123 aper_array[0] = intel->batch->buf; 124 aper_array[1] = dst->buffer; 125 aper_array[2] = src->buffer; 126 127 if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) { 128 intel_batchbuffer_flush(intel->batch); 129 goto again; 130 } 131 132 for (i = 0; i < nbox; i++, pbox++) { 133 drm_clip_rect_t box = *pbox; 134 135 if (rect) { 136 if (!intel_intersect_cliprects(&box, &box, rect)) 137 continue; 138 } 139 140 if (box.x1 >= box.x2 || 141 box.y1 >= box.y2) 142 continue; 143 144 assert(box.x1 < box.x2); 145 assert(box.y1 < box.y2); 146 src_x = box.x1 - dPriv->x + dPriv->backX; 147 src_y = box.y1 - dPriv->y + dPriv->backY; 148 149 BEGIN_BATCH(8, REFERENCES_CLIPRECTS); 150 OUT_BATCH(CMD); 151 OUT_BATCH(BR13 | dst_pitch); 152 OUT_BATCH((box.y1 << 16) | box.x1); 153 OUT_BATCH((box.y2 << 16) | box.x2); 154 155 OUT_RELOC(dst->buffer, 156 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 157 0); 158 OUT_BATCH((src_y << 16) | src_x); 159 OUT_BATCH(src_pitch); 160 OUT_RELOC(src->buffer, 161 I915_GEM_DOMAIN_RENDER, 0, 162 0); 163 ADVANCE_BATCH(); 164 } 165 166 /* Flush the rendering and the batch so that the results all land on the 167 * screen in a timely fashion. 168 */ 169 intel_batchbuffer_emit_mi_flush(intel->batch); 170 intel_batchbuffer_flush(intel->batch); 171 } 172 173 UNLOCK_HARDWARE(intel); 174} 175 176 177 178 179void 180intelEmitFillBlit(struct intel_context *intel, 181 GLuint cpp, 182 GLshort dst_pitch, 183 dri_bo *dst_buffer, 184 GLuint dst_offset, 185 uint32_t dst_tiling, 186 GLshort x, GLshort y, 187 GLshort w, GLshort h, 188 GLuint color) 189{ 190 GLuint BR13, CMD; 191 BATCH_LOCALS; 192 193 dst_pitch *= cpp; 194 195 switch (cpp) { 196 case 1: 197 BR13 = (0xF0 << 16); 198 CMD = XY_COLOR_BLT_CMD; 199 break; 200 case 2: 201 BR13 = (0xF0 << 16) | BR13_565; 202 CMD = XY_COLOR_BLT_CMD; 203 break; 204 case 4: 205 BR13 = (0xF0 << 16) | BR13_8888; 206 CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 207 break; 208 default: 209 return; 210 } 211#ifndef I915 212 if (dst_tiling != I915_TILING_NONE) { 213 CMD |= XY_DST_TILED; 214 dst_pitch /= 4; 215 } 216#endif 217 218 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 219 __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h); 220 221 assert(w > 0); 222 assert(h > 0); 223 224 BEGIN_BATCH(6, NO_LOOP_CLIPRECTS); 225 OUT_BATCH(CMD); 226 OUT_BATCH(BR13 | dst_pitch); 227 OUT_BATCH((y << 16) | x); 228 OUT_BATCH(((y + h) << 16) | (x + w)); 229 OUT_RELOC(dst_buffer, 230 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 231 dst_offset); 232 OUT_BATCH(color); 233 ADVANCE_BATCH(); 234} 235 236static GLuint translate_raster_op(GLenum logicop) 237{ 238 switch(logicop) { 239 case GL_CLEAR: return 0x00; 240 case GL_AND: return 0x88; 241 case GL_AND_REVERSE: return 0x44; 242 case GL_COPY: return 0xCC; 243 case GL_AND_INVERTED: return 0x22; 244 case GL_NOOP: return 0xAA; 245 case GL_XOR: return 0x66; 246 case GL_OR: return 0xEE; 247 case GL_NOR: return 0x11; 248 case GL_EQUIV: return 0x99; 249 case GL_INVERT: return 0x55; 250 case GL_OR_REVERSE: return 0xDD; 251 case GL_COPY_INVERTED: return 0x33; 252 case GL_OR_INVERTED: return 0xBB; 253 case GL_NAND: return 0x77; 254 case GL_SET: return 0xFF; 255 default: return 0; 256 } 257} 258 259 260/* Copy BitBlt 261 */ 262void 263intelEmitCopyBlit(struct intel_context *intel, 264 GLuint cpp, 265 GLshort src_pitch, 266 dri_bo *src_buffer, 267 GLuint src_offset, 268 uint32_t src_tiling, 269 GLshort dst_pitch, 270 dri_bo *dst_buffer, 271 GLuint dst_offset, 272 uint32_t dst_tiling, 273 GLshort src_x, GLshort src_y, 274 GLshort dst_x, GLshort dst_y, 275 GLshort w, GLshort h, 276 GLenum logic_op) 277{ 278 GLuint CMD, BR13, pass = 0; 279 int dst_y2 = dst_y + h; 280 int dst_x2 = dst_x + w; 281 dri_bo *aper_array[3]; 282 BATCH_LOCALS; 283 284 /* do space/cliprects check before going any further */ 285 do { 286 aper_array[0] = intel->batch->buf; 287 aper_array[1] = dst_buffer; 288 aper_array[2] = src_buffer; 289 290 if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) { 291 intel_batchbuffer_flush(intel->batch); 292 pass++; 293 } else 294 break; 295 } while (pass < 2); 296 297 if (pass >= 2) { 298 GLboolean locked = GL_FALSE; 299 if (!intel->locked) { 300 LOCK_HARDWARE(intel); 301 locked = GL_TRUE; 302 } 303 304 dri_bo_map(dst_buffer, GL_TRUE); 305 dri_bo_map(src_buffer, GL_FALSE); 306 _mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset, 307 cpp, 308 dst_pitch, 309 dst_x, dst_y, 310 w, h, 311 (GLubyte *)src_buffer->virtual + src_offset, 312 src_pitch, 313 src_x, src_y); 314 315 dri_bo_unmap(src_buffer); 316 dri_bo_unmap(dst_buffer); 317 318 if (locked) 319 UNLOCK_HARDWARE(intel); 320 321 return; 322 } 323 324 intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS); 325 DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 326 __FUNCTION__, 327 src_buffer, src_pitch, src_offset, src_x, src_y, 328 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); 329 330 src_pitch *= cpp; 331 dst_pitch *= cpp; 332 333 BR13 = translate_raster_op(logic_op) << 16; 334 335 switch (cpp) { 336 case 1: 337 CMD = XY_SRC_COPY_BLT_CMD; 338 break; 339 case 2: 340 BR13 |= BR13_565; 341 CMD = XY_SRC_COPY_BLT_CMD; 342 break; 343 case 4: 344 BR13 |= BR13_8888; 345 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 346 break; 347 default: 348 return; 349 } 350 351#ifndef I915 352 if (dst_tiling != I915_TILING_NONE) { 353 CMD |= XY_DST_TILED; 354 dst_pitch /= 4; 355 } 356 if (src_tiling != I915_TILING_NONE) { 357 CMD |= XY_SRC_TILED; 358 src_pitch /= 4; 359 } 360#endif 361 362 if (dst_y2 <= dst_y || dst_x2 <= dst_x) { 363 return; 364 } 365 366 assert(dst_x < dst_x2); 367 assert(dst_y < dst_y2); 368 369 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 370 OUT_BATCH(CMD); 371 OUT_BATCH(BR13 | (uint16_t)dst_pitch); 372 OUT_BATCH((dst_y << 16) | dst_x); 373 OUT_BATCH((dst_y2 << 16) | dst_x2); 374 OUT_RELOC(dst_buffer, 375 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 376 dst_offset); 377 OUT_BATCH((src_y << 16) | src_x); 378 OUT_BATCH((uint16_t)src_pitch); 379 OUT_RELOC(src_buffer, 380 I915_GEM_DOMAIN_RENDER, 0, 381 src_offset); 382 ADVANCE_BATCH(); 383 384 intel_batchbuffer_emit_mi_flush(intel->batch); 385} 386 387 388/** 389 * Use blitting to clear the renderbuffers named by 'flags'. 390 * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field 391 * since that might include software renderbuffers or renderbuffers 392 * which we're clearing with triangles. 393 * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear 394 */ 395void 396intelClearWithBlit(GLcontext *ctx, GLbitfield mask) 397{ 398 struct intel_context *intel = intel_context(ctx); 399 struct gl_framebuffer *fb = ctx->DrawBuffer; 400 GLuint clear_depth; 401 GLbitfield skipBuffers = 0; 402 unsigned int num_cliprects; 403 struct drm_clip_rect *cliprects; 404 int x_off, y_off; 405 BATCH_LOCALS; 406 407 /* 408 * Compute values for clearing the buffers. 409 */ 410 clear_depth = 0; 411 if (mask & BUFFER_BIT_DEPTH) { 412 clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); 413 } 414 if (mask & BUFFER_BIT_STENCIL) { 415 clear_depth |= (ctx->Stencil.Clear & 0xff) << 24; 416 } 417 418 /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in 419 * the loop below. 420 */ 421 if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) { 422 skipBuffers = BUFFER_BIT_STENCIL; 423 } 424 425 /* XXX Move this flush/lock into the following conditional? */ 426 intelFlush(&intel->ctx); 427 LOCK_HARDWARE(intel); 428 429 intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off); 430 if (num_cliprects) { 431 GLint cx, cy, cw, ch; 432 drm_clip_rect_t clear; 433 int i; 434 435 /* Get clear bounds after locking */ 436 cx = fb->_Xmin; 437 cy = fb->_Ymin; 438 cw = fb->_Xmax - cx; 439 ch = fb->_Ymax - cy; 440 441 if (fb->Name == 0) { 442 /* clearing a window */ 443 444 /* flip top to bottom */ 445 clear.x1 = cx + x_off; 446 clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch; 447 clear.x2 = clear.x1 + cw; 448 clear.y2 = clear.y1 + ch; 449 } 450 else { 451 /* clearing FBO */ 452 assert(num_cliprects == 1); 453 assert(cliprects == &intel->fboRect); 454 clear.x1 = cx; 455 clear.y1 = cy; 456 clear.x2 = clear.x1 + cw; 457 clear.y2 = clear.y1 + ch; 458 /* no change to mask */ 459 } 460 461 for (i = 0; i < num_cliprects; i++) { 462 const drm_clip_rect_t *box = &cliprects[i]; 463 drm_clip_rect_t b; 464 GLuint buf; 465 GLuint clearMask = mask; /* use copy, since we modify it below */ 466 GLboolean all = (cw == fb->Width && ch == fb->Height); 467 468 if (!all) { 469 intel_intersect_cliprects(&b, &clear, box); 470 } 471 else { 472 b = *box; 473 } 474 475 if (b.x1 >= b.x2 || b.y1 >= b.y2) 476 continue; 477 478 if (0) 479 _mesa_printf("clear %d,%d..%d,%d, mask %x\n", 480 b.x1, b.y1, b.x2, b.y2, mask); 481 482 /* Loop over all renderbuffers */ 483 for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) { 484 const GLbitfield bufBit = 1 << buf; 485 if ((clearMask & bufBit) && !(bufBit & skipBuffers)) { 486 /* OK, clear this renderbuffer */ 487 struct intel_region *irb_region = 488 intel_get_rb_region(fb, buf); 489 dri_bo *write_buffer = 490 intel_region_buffer(intel, irb_region, 491 all ? INTEL_WRITE_FULL : 492 INTEL_WRITE_PART); 493 494 GLuint clearVal; 495 GLint pitch, cpp; 496 GLuint BR13, CMD; 497 498 ASSERT(irb_region); 499 500 pitch = irb_region->pitch; 501 cpp = irb_region->cpp; 502 503 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 504 __FUNCTION__, 505 irb_region->buffer, (pitch * cpp), 506 irb_region->draw_offset, 507 b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1); 508 509 BR13 = 0xf0 << 16; 510 CMD = XY_COLOR_BLT_CMD; 511 512 /* Setup the blit command */ 513 if (cpp == 4) { 514 BR13 |= BR13_8888; 515 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 516 if (clearMask & BUFFER_BIT_DEPTH) 517 CMD |= XY_BLT_WRITE_RGB; 518 if (clearMask & BUFFER_BIT_STENCIL) 519 CMD |= XY_BLT_WRITE_ALPHA; 520 } 521 else { 522 /* clearing RGBA */ 523 CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 524 } 525 } 526 else { 527 ASSERT(cpp == 2); 528 BR13 |= BR13_565; 529 } 530 531#ifndef I915 532 if (irb_region->tiling != I915_TILING_NONE) { 533 CMD |= XY_DST_TILED; 534 pitch /= 4; 535 } 536#endif 537 BR13 |= (pitch * cpp); 538 539 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 540 clearVal = clear_depth; 541 } 542 else { 543 clearVal = (cpp == 4) 544 ? intel->ClearColor8888 : intel->ClearColor565; 545 } 546 /* 547 _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", 548 buf, irb->Base.Name); 549 */ 550 551 assert(b.x1 < b.x2); 552 assert(b.y1 < b.y2); 553 554 BEGIN_BATCH(6, REFERENCES_CLIPRECTS); 555 OUT_BATCH(CMD); 556 OUT_BATCH(BR13); 557 OUT_BATCH((b.y1 << 16) | b.x1); 558 OUT_BATCH((b.y2 << 16) | b.x2); 559 OUT_RELOC(write_buffer, 560 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 561 irb_region->draw_offset); 562 OUT_BATCH(clearVal); 563 ADVANCE_BATCH(); 564 clearMask &= ~bufBit; /* turn off bit, for faster loop exit */ 565 } 566 } 567 } 568 } 569 570 UNLOCK_HARDWARE(intel); 571} 572 573void 574intelEmitImmediateColorExpandBlit(struct intel_context *intel, 575 GLuint cpp, 576 GLubyte *src_bits, GLuint src_size, 577 GLuint fg_color, 578 GLshort dst_pitch, 579 dri_bo *dst_buffer, 580 GLuint dst_offset, 581 uint32_t dst_tiling, 582 GLshort x, GLshort y, 583 GLshort w, GLshort h, 584 GLenum logic_op) 585{ 586 int dwords = ALIGN(src_size, 8) / 4; 587 uint32_t opcode, br13, blit_cmd; 588 589 assert( logic_op - GL_CLEAR >= 0 ); 590 assert( logic_op - GL_CLEAR < 0x10 ); 591 592 if (w < 0 || h < 0) 593 return; 594 595 dst_pitch *= cpp; 596 597 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n", 598 __FUNCTION__, 599 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); 600 601 intel_batchbuffer_require_space( intel->batch, 602 (8 * 4) + 603 (3 * 4) + 604 dwords * 4, 605 REFERENCES_CLIPRECTS ); 606 607 opcode = XY_SETUP_BLT_CMD; 608 if (cpp == 4) 609 opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 610#ifndef I915 611 if (dst_tiling != I915_TILING_NONE) { 612 opcode |= XY_DST_TILED; 613 dst_pitch /= 4; 614 } 615#endif 616 617 br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29); 618 if (cpp == 2) 619 br13 |= BR13_565; 620 else 621 br13 |= BR13_8888; 622 623 blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */ 624 if (dst_tiling != I915_TILING_NONE) 625 blit_cmd |= XY_DST_TILED; 626 627 BEGIN_BATCH(8 + 3, REFERENCES_CLIPRECTS); 628 OUT_BATCH(opcode); 629 OUT_BATCH(br13); 630 OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */ 631 OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */ 632 OUT_RELOC(dst_buffer, 633 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 634 dst_offset); 635 OUT_BATCH(0); /* bg */ 636 OUT_BATCH(fg_color); /* fg */ 637 OUT_BATCH(0); /* pattern base addr */ 638 639 OUT_BATCH(blit_cmd | ((3 - 2) + dwords)); 640 OUT_BATCH((y << 16) | x); 641 OUT_BATCH(((y + h) << 16) | (x + w)); 642 ADVANCE_BATCH(); 643 644 intel_batchbuffer_data( intel->batch, 645 src_bits, 646 dwords * 4, 647 REFERENCES_CLIPRECTS ); 648 649 intel_batchbuffer_emit_mi_flush(intel->batch); 650} 651