intel_context.c revision 490e6470a09c3a6049e5e859d72b0b679ef5d070 
1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29#include "main/glheader.h"
30#include "main/context.h"
31#include "main/extensions.h"
32#include "main/fbobject.h"
33#include "main/framebuffer.h"
34#include "main/imports.h"
35#include "main/points.h"
36#include "main/renderbuffer.h"
37
38#include "swrast/swrast.h"
39#include "swrast_setup/swrast_setup.h"
40#include "tnl/tnl.h"
41#include "drivers/common/driverfuncs.h"
42#include "drivers/common/meta.h"
43
44#include "intel_chipset.h"
45#include "intel_buffers.h"
46#include "intel_tex.h"
47#include "intel_batchbuffer.h"
48#include "intel_clear.h"
49#include "intel_extensions.h"
50#include "intel_pixel.h"
51#include "intel_regions.h"
52#include "intel_buffer_objects.h"
53#include "intel_fbo.h"
54#include "intel_bufmgr.h"
55#include "intel_screen.h"
56
57#include "drirenderbuffer.h"
58#include "utils.h"
59#include "../glsl/ralloc.h"
60
61#ifndef INTEL_DEBUG
62int INTEL_DEBUG = (0);
63#endif
64
65
66static const GLubyte *
67intelGetString(struct gl_context * ctx, GLenum name)
68{
69   const struct intel_context *const intel = intel_context(ctx);
70   const char *chipset;
71   static char buffer[128];
72
73   switch (name) {
74   case GL_VENDOR:
75      return (GLubyte *) "Tungsten Graphics, Inc";
76      break;
77
78   case GL_RENDERER:
79      switch (intel->intelScreen->deviceID) {
80      case PCI_CHIP_845_G:
81         chipset = "Intel(R) 845G";
82         break;
83      case PCI_CHIP_I830_M:
84         chipset = "Intel(R) 830M";
85         break;
86      case PCI_CHIP_I855_GM:
87         chipset = "Intel(R) 852GM/855GM";
88         break;
89      case PCI_CHIP_I865_G:
90         chipset = "Intel(R) 865G";
91         break;
92      case PCI_CHIP_I915_G:
93         chipset = "Intel(R) 915G";
94         break;
95      case PCI_CHIP_E7221_G:
96	 chipset = "Intel (R) E7221G (i915)";
97	 break;
98      case PCI_CHIP_I915_GM:
99         chipset = "Intel(R) 915GM";
100         break;
101      case PCI_CHIP_I945_G:
102         chipset = "Intel(R) 945G";
103         break;
104      case PCI_CHIP_I945_GM:
105         chipset = "Intel(R) 945GM";
106         break;
107      case PCI_CHIP_I945_GME:
108         chipset = "Intel(R) 945GME";
109         break;
110      case PCI_CHIP_G33_G:
111	 chipset = "Intel(R) G33";
112	 break;
113      case PCI_CHIP_Q35_G:
114	 chipset = "Intel(R) Q35";
115	 break;
116      case PCI_CHIP_Q33_G:
117	 chipset = "Intel(R) Q33";
118	 break;
119      case PCI_CHIP_IGD_GM:
120      case PCI_CHIP_IGD_G:
121	 chipset = "Intel(R) IGD";
122	 break;
123      case PCI_CHIP_I965_Q:
124	 chipset = "Intel(R) 965Q";
125	 break;
126      case PCI_CHIP_I965_G:
127      case PCI_CHIP_I965_G_1:
128	 chipset = "Intel(R) 965G";
129	 break;
130      case PCI_CHIP_I946_GZ:
131	 chipset = "Intel(R) 946GZ";
132	 break;
133      case PCI_CHIP_I965_GM:
134	 chipset = "Intel(R) 965GM";
135	 break;
136      case PCI_CHIP_I965_GME:
137	 chipset = "Intel(R) 965GME/GLE";
138	 break;
139      case PCI_CHIP_GM45_GM:
140	 chipset = "Mobile Intel® GM45 Express Chipset";
141	 break;
142      case PCI_CHIP_IGD_E_G:
143	 chipset = "Intel(R) Integrated Graphics Device";
144	 break;
145      case PCI_CHIP_G45_G:
146         chipset = "Intel(R) G45/G43";
147         break;
148      case PCI_CHIP_Q45_G:
149         chipset = "Intel(R) Q45/Q43";
150         break;
151      case PCI_CHIP_G41_G:
152         chipset = "Intel(R) G41";
153         break;
154      case PCI_CHIP_B43_G:
155      case PCI_CHIP_B43_G1:
156         chipset = "Intel(R) B43";
157         break;
158      case PCI_CHIP_ILD_G:
159         chipset = "Intel(R) Ironlake Desktop";
160         break;
161      case PCI_CHIP_ILM_G:
162         chipset = "Intel(R) Ironlake Mobile";
163         break;
164      case PCI_CHIP_SANDYBRIDGE_GT1:
165      case PCI_CHIP_SANDYBRIDGE_GT2:
166      case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167	 chipset = "Intel(R) Sandybridge Desktop";
168	 break;
169      case PCI_CHIP_SANDYBRIDGE_M_GT1:
170      case PCI_CHIP_SANDYBRIDGE_M_GT2:
171      case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172	 chipset = "Intel(R) Sandybridge Mobile";
173	 break;
174      case PCI_CHIP_SANDYBRIDGE_S:
175	 chipset = "Intel(R) Sandybridge Server";
176	 break;
177      case PCI_CHIP_IVYBRIDGE_GT1:
178      case PCI_CHIP_IVYBRIDGE_GT2:
179	 chipset = "Intel(R) Ivybridge Desktop";
180	 break;
181      case PCI_CHIP_IVYBRIDGE_M_GT1:
182      case PCI_CHIP_IVYBRIDGE_M_GT2:
183	 chipset = "Intel(R) Ivybridge Mobile";
184	 break;
185      case PCI_CHIP_IVYBRIDGE_S_GT1:
186	 chipset = "Intel(R) Ivybridge Server";
187	 break;
188      default:
189         chipset = "Unknown Intel Chipset";
190         break;
191      }
192
193      (void) driGetRendererString(buffer, chipset, 0);
194      return (GLubyte *) buffer;
195
196   default:
197      return NULL;
198   }
199}
200
201static void
202intel_flush_front(struct gl_context *ctx)
203{
204   struct intel_context *intel = intel_context(ctx);
205    __DRIcontext *driContext = intel->driContext;
206    __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
207
208   if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
209      if (screen->dri2.loader &&
210          (screen->dri2.loader->base.version >= 2)
211	  && (screen->dri2.loader->flushFrontBuffer != NULL) &&
212          driContext->driDrawablePriv &&
213	  driContext->driDrawablePriv->loaderPrivate) {
214	 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
215						  driContext->driDrawablePriv->loaderPrivate);
216
217	 /* We set the dirty bit in intel_prepare_render() if we're
218	  * front buffer rendering once we get there.
219	  */
220	 intel->front_buffer_dirty = GL_FALSE;
221      }
222   }
223}
224
225static unsigned
226intel_bits_per_pixel(const struct intel_renderbuffer *rb)
227{
228   return _mesa_get_format_bytes(rb->Base.Format) * 8;
229}
230
231static void
232intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
233					     __DRIdrawable *drawable,
234					     __DRIbuffer **buffers,
235					     int *count);
236
237static void
238intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
239					      __DRIdrawable *drawable,
240					      __DRIbuffer *buffer,
241					      struct intel_renderbuffer *rb,
242					      const char *buffer_name);
243
244static void
245intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
246					       __DRIdrawable *drawable,
247					       __DRIbuffer **buffers,
248					       unsigned **attachments,
249					       int *count);
250
251static void
252intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
253						__DRIdrawable *drawable,
254						__DRIbuffer *buffer,
255						struct intel_renderbuffer *rb,
256						const char *buffer_name);
257static void
258intel_verify_dri2_has_hiz(struct intel_context *intel,
259			  __DRIdrawable *drawable,
260			  __DRIbuffer **buffers,
261			  unsigned **attachments,
262			  int *count);
263
264void
265intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
266{
267   struct gl_framebuffer *fb = drawable->driverPrivate;
268   struct intel_renderbuffer *rb;
269   struct intel_context *intel = context->driverPrivate;
270   __DRIbuffer *buffers = NULL;
271   unsigned *attachments = NULL;
272   int i, count;
273   const char *region_name;
274
275   bool try_separate_stencil =
276      intel->has_separate_stencil &&
277      intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE &&
278      intel->intelScreen->driScrnPriv->dri2.loader != NULL &&
279      intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 &&
280      intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL;
281
282   assert(!intel->must_use_separate_stencil || try_separate_stencil);
283
284   /* If we're rendering to the fake front buffer, make sure all the
285    * pending drawing has landed on the real front buffer.  Otherwise
286    * when we eventually get to DRI2GetBuffersWithFormat the stale
287    * real front buffer contents will get copied to the new fake front
288    * buffer.
289    */
290   if (intel->is_front_buffer_rendering) {
291      intel_flush(&intel->ctx);
292      intel_flush_front(&intel->ctx);
293   }
294
295   /* Set this up front, so that in case our buffers get invalidated
296    * while we're getting new buffers, we don't clobber the stamp and
297    * thus ignore the invalidate. */
298   drawable->lastStamp = drawable->dri2.stamp;
299
300   if (unlikely(INTEL_DEBUG & DEBUG_DRI))
301      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
302
303   if (try_separate_stencil) {
304      intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers,
305						     &attachments, &count);
306   } else {
307      intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers,
308						   &count);
309   }
310
311   if (buffers == NULL)
312      return;
313
314   drawable->x = 0;
315   drawable->y = 0;
316   drawable->backX = 0;
317   drawable->backY = 0;
318   drawable->numClipRects = 1;
319   drawable->pClipRects[0].x1 = 0;
320   drawable->pClipRects[0].y1 = 0;
321   drawable->pClipRects[0].x2 = drawable->w;
322   drawable->pClipRects[0].y2 = drawable->h;
323   drawable->numBackClipRects = 1;
324   drawable->pBackClipRects[0].x1 = 0;
325   drawable->pBackClipRects[0].y1 = 0;
326   drawable->pBackClipRects[0].x2 = drawable->w;
327   drawable->pBackClipRects[0].y2 = drawable->h;
328
329   for (i = 0; i < count; i++) {
330       switch (buffers[i].attachment) {
331       case __DRI_BUFFER_FRONT_LEFT:
332	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
333	   region_name = "dri2 front buffer";
334	   break;
335
336       case __DRI_BUFFER_FAKE_FRONT_LEFT:
337	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
338	   region_name = "dri2 fake front buffer";
339	   break;
340
341       case __DRI_BUFFER_BACK_LEFT:
342	   rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
343	   region_name = "dri2 back buffer";
344	   break;
345
346       case __DRI_BUFFER_DEPTH:
347	   rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
348	   region_name = "dri2 depth buffer";
349	   break;
350
351       case __DRI_BUFFER_HIZ:
352	   /* The hiz region resides in the depth renderbuffer. */
353	   rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
354	   region_name = "dri2 hiz buffer";
355	   break;
356
357       case __DRI_BUFFER_DEPTH_STENCIL:
358	   rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
359	   region_name = "dri2 depth / stencil buffer";
360	   break;
361
362       case __DRI_BUFFER_STENCIL:
363	   rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
364	   region_name = "dri2 stencil buffer";
365	   break;
366
367       case __DRI_BUFFER_ACCUM:
368       default:
369	   fprintf(stderr,
370		   "unhandled buffer attach event, attachment type %d\n",
371		   buffers[i].attachment);
372	   return;
373       }
374
375       if (try_separate_stencil) {
376	 intel_process_dri2_buffer_with_separate_stencil(intel, drawable,
377						         &buffers[i], rb,
378						         region_name);
379       } else {
380	 intel_process_dri2_buffer_no_separate_stencil(intel, drawable,
381						       &buffers[i], rb,
382						       region_name);
383       }
384   }
385
386   if (try_separate_stencil
387       && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) {
388      intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments,
389				&count);
390   }
391
392   if (attachments)
393      free(attachments);
394
395   driUpdateFramebufferSize(&intel->ctx, drawable);
396}
397
398/**
399 * intel_prepare_render should be called anywhere that curent read/drawbuffer
400 * state is required.
401 */
402void
403intel_prepare_render(struct intel_context *intel)
404{
405   __DRIcontext *driContext = intel->driContext;
406   __DRIdrawable *drawable;
407
408   drawable = driContext->driDrawablePriv;
409   if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
410      if (drawable->lastStamp != drawable->dri2.stamp)
411	 intel_update_renderbuffers(driContext, drawable);
412      intel_draw_buffer(&intel->ctx);
413      driContext->dri2.draw_stamp = drawable->dri2.stamp;
414   }
415
416   drawable = driContext->driReadablePriv;
417   if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
418      if (drawable->lastStamp != drawable->dri2.stamp)
419	 intel_update_renderbuffers(driContext, drawable);
420      driContext->dri2.read_stamp = drawable->dri2.stamp;
421   }
422
423   /* If we're currently rendering to the front buffer, the rendering
424    * that will happen next will probably dirty the front buffer.  So
425    * mark it as dirty here.
426    */
427   if (intel->is_front_buffer_rendering)
428      intel->front_buffer_dirty = GL_TRUE;
429
430   /* Wait for the swapbuffers before the one we just emitted, so we
431    * don't get too many swaps outstanding for apps that are GPU-heavy
432    * but not CPU-heavy.
433    *
434    * We're using intelDRI2Flush (called from the loader before
435    * swapbuffer) and glFlush (for front buffer rendering) as the
436    * indicator that a frame is done and then throttle when we get
437    * here as we prepare to render the next frame.  At this point for
438    * round trips for swap/copy and getting new buffers are done and
439    * we'll spend less time waiting on the GPU.
440    *
441    * Unfortunately, we don't have a handle to the batch containing
442    * the swap, and getting our hands on that doesn't seem worth it,
443    * so we just us the first batch we emitted after the last swap.
444    */
445   if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
446      drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
447      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
448      intel->first_post_swapbuffers_batch = NULL;
449      intel->need_throttle = GL_FALSE;
450   }
451}
452
453static void
454intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
455{
456    struct intel_context *intel = intel_context(ctx);
457    __DRIcontext *driContext = intel->driContext;
458
459    if (intel->saved_viewport)
460	intel->saved_viewport(ctx, x, y, w, h);
461
462    if (ctx->DrawBuffer->Name == 0) {
463       dri2InvalidateDrawable(driContext->driDrawablePriv);
464       dri2InvalidateDrawable(driContext->driReadablePriv);
465    }
466}
467
468static const struct dri_debug_control debug_control[] = {
469   { "tex",   DEBUG_TEXTURE},
470   { "state", DEBUG_STATE},
471   { "ioctl", DEBUG_IOCTL},
472   { "blit",  DEBUG_BLIT},
473   { "mip",   DEBUG_MIPTREE},
474   { "fall",  DEBUG_FALLBACKS},
475   { "verb",  DEBUG_VERBOSE},
476   { "bat",   DEBUG_BATCH},
477   { "pix",   DEBUG_PIXEL},
478   { "buf",   DEBUG_BUFMGR},
479   { "reg",   DEBUG_REGION},
480   { "fbo",   DEBUG_FBO},
481   { "gs",    DEBUG_GS},
482   { "sync",  DEBUG_SYNC},
483   { "prim",  DEBUG_PRIMS },
484   { "vert",  DEBUG_VERTS },
485   { "dri",   DEBUG_DRI },
486   { "sf",    DEBUG_SF },
487   { "san",   DEBUG_SANITY },
488   { "sleep", DEBUG_SLEEP },
489   { "stats", DEBUG_STATS },
490   { "tile",  DEBUG_TILE },
491   { "sing",  DEBUG_SINGLE_THREAD },
492   { "thre",  DEBUG_SINGLE_THREAD },
493   { "wm",    DEBUG_WM },
494   { "urb",   DEBUG_URB },
495   { "vs",    DEBUG_VS },
496   { "clip",  DEBUG_CLIP },
497   { NULL,    0 }
498};
499
500
501static void
502intelInvalidateState(struct gl_context * ctx, GLuint new_state)
503{
504    struct intel_context *intel = intel_context(ctx);
505
506   _swrast_InvalidateState(ctx, new_state);
507   _vbo_InvalidateState(ctx, new_state);
508
509   intel->NewGLState |= new_state;
510
511   if (intel->vtbl.invalidate_state)
512      intel->vtbl.invalidate_state( intel, new_state );
513}
514
515void
516intel_flush(struct gl_context *ctx)
517{
518   struct intel_context *intel = intel_context(ctx);
519
520   if (intel->Fallback)
521      _swrast_flush(ctx);
522
523   if (intel->gen < 4)
524      INTEL_FIREVERTICES(intel);
525
526   if (intel->batch.used)
527      intel_batchbuffer_flush(intel);
528}
529
530static void
531intel_glFlush(struct gl_context *ctx)
532{
533   struct intel_context *intel = intel_context(ctx);
534
535   intel_flush(ctx);
536   intel_flush_front(ctx);
537   if (intel->is_front_buffer_rendering)
538      intel->need_throttle = GL_TRUE;
539}
540
541void
542intelFinish(struct gl_context * ctx)
543{
544   struct intel_context *intel = intel_context(ctx);
545
546   intel_flush(ctx);
547   intel_flush_front(ctx);
548
549   if (intel->batch.last_bo)
550      drm_intel_bo_wait_rendering(intel->batch.last_bo);
551}
552
553void
554intelInitDriverFunctions(struct dd_function_table *functions)
555{
556   _mesa_init_driver_functions(functions);
557
558   functions->Flush = intel_glFlush;
559   functions->Finish = intelFinish;
560   functions->GetString = intelGetString;
561   functions->UpdateState = intelInvalidateState;
562
563   intelInitTextureFuncs(functions);
564   intelInitTextureImageFuncs(functions);
565   intelInitTextureSubImageFuncs(functions);
566   intelInitTextureCopyImageFuncs(functions);
567   intelInitStateFuncs(functions);
568   intelInitClearFuncs(functions);
569   intelInitBufferFuncs(functions);
570   intelInitPixelFuncs(functions);
571   intelInitBufferObjectFuncs(functions);
572   intel_init_syncobj_functions(functions);
573}
574
575GLboolean
576intelInitContext(struct intel_context *intel,
577		 int api,
578                 const struct gl_config * mesaVis,
579                 __DRIcontext * driContextPriv,
580                 void *sharedContextPrivate,
581                 struct dd_function_table *functions)
582{
583   struct gl_context *ctx = &intel->ctx;
584   struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
585   __DRIscreen *sPriv = driContextPriv->driScreenPriv;
586   struct intel_screen *intelScreen = sPriv->private;
587   int bo_reuse_mode;
588   struct gl_config visual;
589
590   /* we can't do anything without a connection to the device */
591   if (intelScreen->bufmgr == NULL)
592      return GL_FALSE;
593
594   /* Can't rely on invalidate events, fall back to glViewport hack */
595   if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
596      intel->saved_viewport = functions->Viewport;
597      functions->Viewport = intel_viewport;
598   }
599
600   if (mesaVis == NULL) {
601      memset(&visual, 0, sizeof visual);
602      mesaVis = &visual;
603   }
604
605   if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
606                                 functions, (void *) intel)) {
607      printf("%s: failed to init mesa context\n", __FUNCTION__);
608      return GL_FALSE;
609   }
610
611   driContextPriv->driverPrivate = intel;
612   intel->intelScreen = intelScreen;
613   intel->driContext = driContextPriv;
614   intel->driFd = sPriv->fd;
615
616   intel->gen = intelScreen->gen;
617
618   const int devID = intelScreen->deviceID;
619
620   if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID))
621      intel->gt = 1;
622   else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID))
623      intel->gt = 2;
624   else
625      intel->gt = 0;
626
627   if (IS_G4X(devID)) {
628      intel->is_g4x = true;
629   } else if (IS_945(devID)) {
630      intel->is_945 = true;
631   }
632
633   if (intel->gen >= 5) {
634      intel->needs_ff_sync = true;
635   }
636
637   intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
638   intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
639   intel->has_hiz = intel->intelScreen->hw_has_hiz;
640
641   memset(&ctx->TextureFormatSupported, 0,
642	  sizeof(ctx->TextureFormatSupported));
643   ctx->TextureFormatSupported[MESA_FORMAT_ARGB8888] = GL_TRUE;
644   if (devID != PCI_CHIP_I830_M && devID != PCI_CHIP_845_G)
645      ctx->TextureFormatSupported[MESA_FORMAT_XRGB8888] = GL_TRUE;
646   ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = GL_TRUE;
647   ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = GL_TRUE;
648   ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = GL_TRUE;
649   ctx->TextureFormatSupported[MESA_FORMAT_L8] = GL_TRUE;
650   ctx->TextureFormatSupported[MESA_FORMAT_A8] = GL_TRUE;
651   ctx->TextureFormatSupported[MESA_FORMAT_I8] = GL_TRUE;
652   ctx->TextureFormatSupported[MESA_FORMAT_AL88] = GL_TRUE;
653   if (intel->gen >= 4)
654      ctx->TextureFormatSupported[MESA_FORMAT_AL1616] = GL_TRUE;
655
656   /* Depth and stencil */
657   ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = GL_TRUE;
658   ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = GL_TRUE;
659   ctx->TextureFormatSupported[MESA_FORMAT_S8] = intel->has_separate_stencil;
660
661   /*
662    * This was disabled in initial FBO enabling to avoid combinations
663    * of depth+stencil that wouldn't work together.  We since decided
664    * that it was OK, since it's up to the app to come up with the
665    * combo that actually works, so this can probably be re-enabled.
666    */
667   /*
668   ctx->TextureFormatSupported[MESA_FORMAT_Z16] = GL_TRUE;
669   ctx->TextureFormatSupported[MESA_FORMAT_Z24] = GL_TRUE;
670   */
671
672   /* ctx->Extensions.MESA_ycbcr_texture */
673   ctx->TextureFormatSupported[MESA_FORMAT_YCBCR] = GL_TRUE;
674   ctx->TextureFormatSupported[MESA_FORMAT_YCBCR_REV] = GL_TRUE;
675
676   /* GL_3DFX_texture_compression_FXT1 */
677   ctx->TextureFormatSupported[MESA_FORMAT_RGB_FXT1] = GL_TRUE;
678   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FXT1] = GL_TRUE;
679
680   /* GL_EXT_texture_compression_s3tc */
681   ctx->TextureFormatSupported[MESA_FORMAT_RGB_DXT1] = GL_TRUE;
682   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT1] = GL_TRUE;
683   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT3] = GL_TRUE;
684   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT5] = GL_TRUE;
685
686#ifndef I915
687   /* GL_ARB_texture_compression_rgtc */
688   ctx->TextureFormatSupported[MESA_FORMAT_RED_RGTC1] = GL_TRUE;
689   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RED_RGTC1] = GL_TRUE;
690   ctx->TextureFormatSupported[MESA_FORMAT_RG_RGTC2] = GL_TRUE;
691   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG_RGTC2] = GL_TRUE;
692
693   /* GL_ARB_texture_rg */
694   ctx->TextureFormatSupported[MESA_FORMAT_R8] = GL_TRUE;
695   ctx->TextureFormatSupported[MESA_FORMAT_R16] = GL_TRUE;
696   ctx->TextureFormatSupported[MESA_FORMAT_RG88] = GL_TRUE;
697   ctx->TextureFormatSupported[MESA_FORMAT_RG1616] = GL_TRUE;
698
699   /* GL_MESA_texture_signed_rgba / GL_EXT_texture_snorm */
700   ctx->TextureFormatSupported[MESA_FORMAT_DUDV8] = GL_TRUE;
701   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RGBA8888_REV] = GL_TRUE;
702   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R8] = GL_TRUE;
703   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG88_REV] = GL_TRUE;
704   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R16] = GL_TRUE;
705   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_GR1616] = GL_TRUE;
706
707   /* GL_EXT_texture_sRGB */
708   ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = GL_TRUE;
709   if (intel->gen >= 5 || intel->is_g4x)
710      ctx->TextureFormatSupported[MESA_FORMAT_SRGB_DXT1] = GL_TRUE;
711   ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT1] = GL_TRUE;
712   ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT3] = GL_TRUE;
713   ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT5] = GL_TRUE;
714   if (intel->gen >= 5 || intel->is_g4x) {
715      ctx->TextureFormatSupported[MESA_FORMAT_SL8] = GL_TRUE;
716      ctx->TextureFormatSupported[MESA_FORMAT_SLA8] = GL_TRUE;
717   }
718
719#ifdef TEXTURE_FLOAT_ENABLED
720   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FLOAT32] = GL_TRUE;
721   ctx->TextureFormatSupported[MESA_FORMAT_RG_FLOAT32] = GL_TRUE;
722   ctx->TextureFormatSupported[MESA_FORMAT_R_FLOAT32] = GL_TRUE;
723   ctx->TextureFormatSupported[MESA_FORMAT_INTENSITY_FLOAT32] = GL_TRUE;
724   ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_FLOAT32] = GL_TRUE;
725   ctx->TextureFormatSupported[MESA_FORMAT_ALPHA_FLOAT32] = GL_TRUE;
726   ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32] = GL_TRUE;
727
728   /* GL_EXT_texture_shared_exponent */
729   ctx->TextureFormatSupported[MESA_FORMAT_RGB9_E5_FLOAT] = GL_TRUE;
730
731   /* GL_EXT_packed_float */
732   ctx->TextureFormatSupported[MESA_FORMAT_R11_G11_B10_FLOAT] = GL_TRUE;
733#endif
734
735#endif /* !I915 */
736
737   driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
738                       sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
739   if (intel->gen < 4)
740      intel->maxBatchSize = 4096;
741   else
742      intel->maxBatchSize = sizeof(intel->batch.map);
743
744   intel->bufmgr = intelScreen->bufmgr;
745
746   bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
747   switch (bo_reuse_mode) {
748   case DRI_CONF_BO_REUSE_DISABLED:
749      break;
750   case DRI_CONF_BO_REUSE_ALL:
751      intel_bufmgr_gem_enable_reuse(intel->bufmgr);
752      break;
753   }
754
755   /* This doesn't yet catch all non-conformant rendering, but it's a
756    * start.
757    */
758   if (getenv("INTEL_STRICT_CONFORMANCE")) {
759      unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
760      if (value > 0) {
761         intel->conformance_mode = value;
762      }
763      else {
764         intel->conformance_mode = 1;
765      }
766   }
767
768   if (intel->conformance_mode > 0) {
769      ctx->Const.MinLineWidth = 1.0;
770      ctx->Const.MinLineWidthAA = 1.0;
771      ctx->Const.MaxLineWidth = 1.0;
772      ctx->Const.MaxLineWidthAA = 1.0;
773      ctx->Const.LineWidthGranularity = 1.0;
774   }
775   else {
776      ctx->Const.MinLineWidth = 1.0;
777      ctx->Const.MinLineWidthAA = 1.0;
778      ctx->Const.MaxLineWidth = 5.0;
779      ctx->Const.MaxLineWidthAA = 5.0;
780      ctx->Const.LineWidthGranularity = 0.5;
781   }
782
783   ctx->Const.MinPointSize = 1.0;
784   ctx->Const.MinPointSizeAA = 1.0;
785   ctx->Const.MaxPointSize = 255.0;
786   ctx->Const.MaxPointSizeAA = 3.0;
787   ctx->Const.PointSizeGranularity = 1.0;
788
789   ctx->Const.MaxSamples = 1.0;
790
791   if (intel->gen >= 6)
792      ctx->Const.MaxClipPlanes = 8;
793
794   /* reinitialize the context point state.
795    * It depend on constants in __struct gl_contextRec::Const
796    */
797   _mesa_init_point(ctx);
798
799   if (intel->gen >= 4) {
800      ctx->Const.sRGBCapable = GL_TRUE;
801      if (MAX_WIDTH > 8192)
802	 ctx->Const.MaxRenderbufferSize = 8192;
803   } else {
804      if (MAX_WIDTH > 2048)
805	 ctx->Const.MaxRenderbufferSize = 2048;
806   }
807
808   /* Initialize the software rasterizer and helper modules. */
809   _swrast_CreateContext(ctx);
810   _vbo_CreateContext(ctx);
811   _tnl_CreateContext(ctx);
812   _swsetup_CreateContext(ctx);
813
814   /* Configure swrast to match hardware characteristics: */
815   _swrast_allow_pixel_fog(ctx, GL_FALSE);
816   _swrast_allow_vertex_fog(ctx, GL_TRUE);
817
818   _mesa_meta_init(ctx);
819
820   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
821   intel->hw_stipple = 1;
822
823   /* XXX FBO: this doesn't seem to be used anywhere */
824   switch (mesaVis->depthBits) {
825   case 0:                     /* what to do in this case? */
826   case 16:
827      intel->polygon_offset_scale = 1.0;
828      break;
829   case 24:
830      intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
831      break;
832   default:
833      assert(0);
834      break;
835   }
836
837   if (intel->gen >= 4)
838      intel->polygon_offset_scale /= 0xffff;
839
840   intel->RenderIndex = ~0;
841
842   switch (ctx->API) {
843   case API_OPENGL:
844      intelInitExtensions(ctx);
845      break;
846   case API_OPENGLES:
847      intelInitExtensionsES1(ctx);
848      break;
849   case API_OPENGLES2:
850      intelInitExtensionsES2(ctx);
851      break;
852   }
853
854   INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
855   if (INTEL_DEBUG & DEBUG_BUFMGR)
856      dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
857
858   intel_batchbuffer_init(intel);
859
860   intel_fbo_init(intel);
861
862   intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
863					       "texture_tiling");
864   intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
865
866   intel->prim.primitive = ~0;
867
868   /* Force all software fallbacks */
869   if (driQueryOptionb(&intel->optionCache, "no_rast")) {
870      fprintf(stderr, "disabling 3D rasterization\n");
871      intel->no_rast = 1;
872   }
873
874   if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
875      fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
876      intel->always_flush_batch = 1;
877   }
878
879   if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
880      fprintf(stderr, "flushing GPU caches before/after each draw call\n");
881      intel->always_flush_cache = 1;
882   }
883
884   return GL_TRUE;
885}
886
887void
888intelDestroyContext(__DRIcontext * driContextPriv)
889{
890   struct intel_context *intel =
891      (struct intel_context *) driContextPriv->driverPrivate;
892
893   assert(intel);               /* should never be null */
894   if (intel) {
895      INTEL_FIREVERTICES(intel);
896
897      _mesa_meta_free(&intel->ctx);
898
899      intel->vtbl.destroy(intel);
900
901      _swsetup_DestroyContext(&intel->ctx);
902      _tnl_DestroyContext(&intel->ctx);
903      _vbo_DestroyContext(&intel->ctx);
904
905      _swrast_DestroyContext(&intel->ctx);
906      intel->Fallback = 0x0;      /* don't call _swrast_Flush later */
907
908      intel_batchbuffer_free(intel);
909
910      free(intel->prim.vb);
911      intel->prim.vb = NULL;
912      drm_intel_bo_unreference(intel->prim.vb_bo);
913      intel->prim.vb_bo = NULL;
914      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
915      intel->first_post_swapbuffers_batch = NULL;
916
917      driDestroyOptionCache(&intel->optionCache);
918
919      /* free the Mesa context */
920      _mesa_free_context_data(&intel->ctx);
921
922      _math_matrix_dtr(&intel->ViewportMatrix);
923
924      ralloc_free(intel);
925      driContextPriv->driverPrivate = NULL;
926   }
927}
928
929GLboolean
930intelUnbindContext(__DRIcontext * driContextPriv)
931{
932   /* Unset current context and dispath table */
933   _mesa_make_current(NULL, NULL, NULL);
934
935   return GL_TRUE;
936}
937
938GLboolean
939intelMakeCurrent(__DRIcontext * driContextPriv,
940                 __DRIdrawable * driDrawPriv,
941                 __DRIdrawable * driReadPriv)
942{
943   struct intel_context *intel;
944   GET_CURRENT_CONTEXT(curCtx);
945
946   if (driContextPriv)
947      intel = (struct intel_context *) driContextPriv->driverPrivate;
948   else
949      intel = NULL;
950
951   /* According to the glXMakeCurrent() man page: "Pending commands to
952    * the previous context, if any, are flushed before it is released."
953    * But only flush if we're actually changing contexts.
954    */
955   if (intel_context(curCtx) && intel_context(curCtx) != intel) {
956      _mesa_flush(curCtx);
957   }
958
959   if (driContextPriv) {
960      struct gl_framebuffer *fb, *readFb;
961
962      if (driDrawPriv == NULL && driReadPriv == NULL) {
963	 fb = _mesa_get_incomplete_framebuffer();
964	 readFb = _mesa_get_incomplete_framebuffer();
965      } else {
966	 fb = driDrawPriv->driverPrivate;
967	 readFb = driReadPriv->driverPrivate;
968	 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
969	 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
970      }
971
972      intel_prepare_render(intel);
973      _mesa_make_current(&intel->ctx, fb, readFb);
974
975      /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
976       * is NULL at that point.  We can't call _mesa_makecurrent()
977       * first, since we need the buffer size for the initial
978       * viewport.  So just call intel_draw_buffer() again here. */
979      intel_draw_buffer(&intel->ctx);
980   }
981   else {
982      _mesa_make_current(NULL, NULL, NULL);
983   }
984
985   return GL_TRUE;
986}
987
988/**
989 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
990 *
991 * To determine which DRI buffers to request, examine the renderbuffers
992 * attached to the drawable's framebuffer. Then request the buffers with
993 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
994 *
995 * This is called from intel_update_renderbuffers(). It is used only if either
996 * the hardware or the X driver lacks separate stencil support.
997 *
998 * \param drawable      Drawable whose buffers are queried.
999 * \param buffers       [out] List of buffers returned by DRI2 query.
1000 * \param buffer_count  [out] Number of buffers returned.
1001 *
1002 * \see intel_update_renderbuffers()
1003 * \see DRI2GetBuffers()
1004 * \see DRI2GetBuffersWithFormat()
1005 */
1006static void
1007intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
1008					     __DRIdrawable *drawable,
1009					     __DRIbuffer **buffers,
1010					     int *buffer_count)
1011{
1012   assert(!intel->must_use_separate_stencil);
1013
1014   __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1015   struct gl_framebuffer *fb = drawable->driverPrivate;
1016
1017   if (screen->dri2.loader
1018       && screen->dri2.loader->base.version > 2
1019       && screen->dri2.loader->getBuffersWithFormat != NULL) {
1020
1021      int i = 0;
1022      const int max_attachments = 4;
1023      unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1024
1025      struct intel_renderbuffer *front_rb;
1026      struct intel_renderbuffer *back_rb;
1027      struct intel_renderbuffer *depth_rb;
1028      struct intel_renderbuffer *stencil_rb;
1029
1030      front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1031      back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1032      depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1033      stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1034
1035      if ((intel->is_front_buffer_rendering ||
1036	   intel->is_front_buffer_reading ||
1037	   !back_rb) && front_rb) {
1038	 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1039	 attachments[i++] = intel_bits_per_pixel(front_rb);
1040      }
1041
1042      if (back_rb) {
1043	 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1044	 attachments[i++] = intel_bits_per_pixel(back_rb);
1045      }
1046
1047      if (depth_rb && stencil_rb) {
1048	 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
1049	 attachments[i++] = intel_bits_per_pixel(depth_rb);
1050      } else if (depth_rb) {
1051	 attachments[i++] = __DRI_BUFFER_DEPTH;
1052	 attachments[i++] = intel_bits_per_pixel(depth_rb);
1053      } else if (stencil_rb) {
1054	 attachments[i++] = __DRI_BUFFER_STENCIL;
1055	 attachments[i++] = intel_bits_per_pixel(stencil_rb);
1056      }
1057
1058      assert(i <= 2 * max_attachments);
1059
1060      *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1061							   &drawable->w,
1062							   &drawable->h,
1063							   attachments, i / 2,
1064							   buffer_count,
1065							   drawable->loaderPrivate);
1066      free(attachments);
1067
1068   } else if (screen->dri2.loader) {
1069
1070      int i = 0;
1071      const int max_attachments = 4;
1072      unsigned *attachments = calloc(max_attachments, sizeof(unsigned));
1073
1074      if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
1075	 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1076      if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
1077	 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1078      if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
1079	 attachments[i++] = __DRI_BUFFER_DEPTH;
1080      if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
1081	 attachments[i++] = __DRI_BUFFER_STENCIL;
1082
1083      assert(i <= max_attachments);
1084
1085      *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1086							   &drawable->w,
1087							   &drawable->h,
1088							   attachments, i,
1089							   buffer_count,
1090							   drawable->loaderPrivate);
1091      free(attachments);
1092
1093   } else {
1094      *buffers = NULL;
1095      *buffer_count = 0;
1096   }
1097}
1098
1099/**
1100 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1101 *
1102 * This is called from intel_update_renderbuffers().  It is used only if
1103 * either the hardware or the X driver lacks separate stencil support.
1104 *
1105 * \par Note:
1106 *    DRI buffers whose attachment point is DRI2BufferStencil or
1107 *    DRI2BufferDepthStencil are handled as special cases.
1108 *
1109 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1110 *        that is passed to intel_region_alloc_for_handle().
1111 *
1112 * \see intel_update_renderbuffers()
1113 * \see intel_region_alloc_for_handle()
1114 */
1115static void
1116intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
1117					      __DRIdrawable *drawable,
1118					      __DRIbuffer *buffer,
1119					      struct intel_renderbuffer *rb,
1120					      const char *buffer_name)
1121{
1122   assert(!intel->must_use_separate_stencil);
1123
1124   struct gl_framebuffer *fb = drawable->driverPrivate;
1125   struct intel_renderbuffer *depth_rb = NULL;
1126
1127   if (!rb)
1128      return;
1129
1130   if (rb->region && rb->region->name == buffer->name)
1131      return;
1132
1133   if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1134      fprintf(stderr,
1135	      "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1136	      buffer->name, buffer->attachment,
1137	      buffer->cpp, buffer->pitch);
1138   }
1139
1140   bool identify_depth_and_stencil = false;
1141   if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1142      struct intel_renderbuffer *depth_rb =
1143	 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1144      identify_depth_and_stencil = depth_rb && depth_rb->region;
1145   }
1146
1147   if (identify_depth_and_stencil) {
1148      if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1149	 fprintf(stderr, "(reusing depth buffer as stencil)\n");
1150      }
1151      intel_region_reference(&rb->region, depth_rb->region);
1152   } else {
1153      intel_region_release(&rb->region);
1154      rb->region = intel_region_alloc_for_handle(intel->intelScreen,
1155						 buffer->cpp,
1156						 drawable->w,
1157						 drawable->h,
1158						 buffer->pitch / buffer->cpp,
1159						 buffer->name,
1160						 buffer_name);
1161   }
1162
1163   if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1164      struct intel_renderbuffer *stencil_rb =
1165	 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1166
1167      if (!stencil_rb)
1168	 return;
1169
1170      /* The rb passed in is the BUFFER_DEPTH attachment, and we need
1171       * to associate this region to BUFFER_STENCIL as well.
1172       */
1173      intel_region_reference(&stencil_rb->region, rb->region);
1174   }
1175}
1176
1177/**
1178 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1179 *
1180 * To determine which DRI buffers to request, examine the renderbuffers
1181 * attached to the drawable's framebuffer. Then request the buffers with
1182 * DRI2GetBuffersWithFormat().
1183 *
1184 * This is called from intel_update_renderbuffers(). It is used when 1) the
1185 * hardware supports separate stencil and 2) the X driver's separate stencil
1186 * support has been verified to work or is still unknown.
1187 *
1188 * \param drawable      Drawable whose buffers are queried.
1189 * \param buffers       [out] List of buffers returned by DRI2 query.
1190 * \param buffer_count  [out] Number of buffers returned.
1191 * \param attachments   [out] List of pairs (attachment_point, bits_per_pixel)
1192 *                      that were submitted in the DRI2 query. Number of pairs
1193 *                      is same as buffer_count.
1194 *
1195 * \see intel_update_renderbuffers()
1196 * \see DRI2GetBuffersWithFormat()
1197 * \see enum intel_dri2_has_hiz
1198 */
1199static void
1200intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
1201					       __DRIdrawable *drawable,
1202					       __DRIbuffer **buffers,
1203					       unsigned **attachments,
1204					       int *count)
1205{
1206   assert(intel->has_separate_stencil);
1207
1208   __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1209   struct gl_framebuffer *fb = drawable->driverPrivate;
1210
1211   const int max_attachments = 5;
1212   int i = 0;
1213
1214   *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1215   if (!*attachments) {
1216      *buffers = NULL;
1217      *count = 0;
1218      return;
1219   }
1220
1221   struct intel_renderbuffer *front_rb;
1222   struct intel_renderbuffer *back_rb;
1223   struct intel_renderbuffer *depth_rb;
1224   struct intel_renderbuffer *stencil_rb;
1225
1226   front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1227   back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1228   depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1229   stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1230
1231   if ((intel->is_front_buffer_rendering ||
1232	intel->is_front_buffer_reading ||
1233	!back_rb) && front_rb) {
1234      (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT;
1235      (*attachments)[i++] = intel_bits_per_pixel(front_rb);
1236   }
1237
1238   if (back_rb) {
1239      (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT;
1240      (*attachments)[i++] = intel_bits_per_pixel(back_rb);
1241   }
1242
1243   /*
1244    * We request a separate stencil buffer, and perhaps a hiz buffer too, even
1245    * if we do not yet know if the X driver supports it. See the comments for
1246    * 'enum intel_dri2_has_hiz'.
1247    */
1248
1249   if (depth_rb) {
1250      (*attachments)[i++] = __DRI_BUFFER_DEPTH;
1251      (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1252
1253      if (intel->vtbl.is_hiz_depth_format(intel, depth_rb->Base.Format)) {
1254	 /* Depth and hiz buffer have same bpp. */
1255	 (*attachments)[i++] = __DRI_BUFFER_HIZ;
1256	 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1257      }
1258   }
1259
1260   if (stencil_rb) {
1261      assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1262      (*attachments)[i++] = __DRI_BUFFER_STENCIL;
1263      (*attachments)[i++] = intel_bits_per_pixel(stencil_rb);
1264   }
1265
1266   assert(i <= 2 * max_attachments);
1267
1268   *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1269							&drawable->w,
1270							&drawable->h,
1271							*attachments, i / 2,
1272							count,
1273							drawable->loaderPrivate);
1274
1275   if (!*buffers) {
1276      free(*attachments);
1277      *attachments = NULL;
1278      *count = 0;
1279   }
1280}
1281
1282/**
1283 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1284 *
1285 * This is called from intel_update_renderbuffers().  It is used when 1) the
1286 * hardware supports separate stencil and 2) the X driver's separate stencil
1287 * support has been verified to work or is still unknown.
1288 *
1289 * \par Note:
1290 *    DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz
1291 *    are handled as special cases.
1292 *
1293 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1294 *        that is passed to intel_region_alloc_for_handle().
1295 *
1296 * \see intel_update_renderbuffers()
1297 * \see intel_region_alloc_for_handle()
1298 * \see enum intel_dri2_has_hiz
1299 */
1300static void
1301intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
1302						__DRIdrawable *drawable,
1303						__DRIbuffer *buffer,
1304						struct intel_renderbuffer *rb,
1305						const char *buffer_name)
1306{
1307   assert(intel->has_separate_stencil);
1308   assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL);
1309
1310   if (!rb)
1311      return;
1312
1313   /* If the renderbuffer's and DRIbuffer's regions match, then continue. */
1314   if ((buffer->attachment != __DRI_BUFFER_HIZ &&
1315	rb->region &&
1316	rb->region->name == buffer->name) ||
1317       (buffer->attachment == __DRI_BUFFER_HIZ &&
1318	rb->hiz_region &&
1319	rb->hiz_region->name == buffer->name)) {
1320      return;
1321   }
1322
1323   if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1324      fprintf(stderr,
1325	      "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1326	      buffer->name, buffer->attachment,
1327	      buffer->cpp, buffer->pitch);
1328   }
1329
1330   /*
1331    * The stencil buffer has quirky pitch requirements.  From Section
1332    * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
1333    *    The pitch must be set to 2x the value computed based on width, as
1334    *    the stencil buffer is stored with two rows interleaved.
1335    * If we neglect to double the pitch, then drm_intel_gem_bo_map_gtt()
1336    * maps the memory incorrectly.
1337    *
1338    * To satisfy the pitch requirement, the X driver hackishly allocated
1339    * the gem buffer with bpp doubled and height halved. So buffer->cpp is
1340    * correct, but drawable->height is not.
1341    */
1342   int buffer_height = drawable->h;
1343   if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1344      buffer_height /= 2;
1345   }
1346
1347   struct intel_region *region =
1348      intel_region_alloc_for_handle(intel->intelScreen,
1349				    buffer->cpp,
1350				    drawable->w,
1351				    buffer_height,
1352				    buffer->pitch / buffer->cpp,
1353				    buffer->name,
1354				    buffer_name);
1355
1356   if (buffer->attachment == __DRI_BUFFER_HIZ) {
1357      intel_region_reference(&rb->hiz_region, region);
1358   } else {
1359      intel_region_reference(&rb->region, region);
1360   }
1361
1362   intel_region_release(&region);
1363}
1364
1365/**
1366 * \brief Verify that the X driver supports hiz and separate stencil.
1367 *
1368 * This implements the cleanup stage of the handshake described in the
1369 * comments for 'enum intel_dri2_has_hiz'.
1370 *
1371 * This should be called from intel_update_renderbuffers() after 1) the
1372 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat()
1373 * and 2) the DRM region of each returned DRIbuffer has been assigned to the
1374 * appropriate intel_renderbuffer. Furthermore, this should be called *only*
1375 * when 1) intel_update_renderbuffers() tried to used the X driver's separate
1376 * stencil functionality and 2) it has not yet been determined if the X driver
1377 * supports separate stencil.
1378 *
1379 * If we determine that the X driver does have support, then we set
1380 * intel_screen.dri2_has_hiz to true and return.
1381 *
1382 * If we determine that the X driver lacks support, and we requested
1383 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by
1384 * taking the following actions:
1385 *    1. Discard the framebuffer's stencil and depth renderbuffers.
1386 *    2. Create a combined depth/stencil renderbuffer and attach
1387 *       it to the framebuffer's depth and stencil attachment points.
1388 *    3. Query the drawable for a new set of buffers, which consists of the
1389 *       originally requested set plus DRI2BufferDepthStencil.
1390 *    4. Assign the DRI2BufferDepthStencil's DRM region to the new
1391 *       depth/stencil renderbuffer.
1392 *
1393 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN
1394 *
1395 * \param drawable      Drawable whose buffers were queried.
1396 *
1397 * \param buffers       [in/out] As input, the buffer list returned by the
1398 *                      original DRI2 query. As output, the current buffer
1399 *                      list, which may have been altered by a new DRI2 query.
1400 *
1401 * \param attachments   [in/out] As input, the attachment list submitted
1402 *                      in the original DRI2 query. As output, the attachment
1403 *                      list that was submitted in the DRI2 query that
1404 *                      obtained the current buffer list, as returned in the
1405 *                      output parameter \c buffers.  (Note: If no new query
1406 *                      was made, then the list remains unaltered).
1407 *
1408 * \param count         [out] Number of buffers in the current buffer list, as
1409 *                      returned in the output parameter \c buffers.
1410 *
1411 * \see enum intel_dri2_has_hiz
1412 * \see struct intel_screen::dri2_has_hiz
1413 * \see intel_update_renderbuffers
1414 */
1415static void
1416intel_verify_dri2_has_hiz(struct intel_context *intel,
1417			  __DRIdrawable *drawable,
1418			  __DRIbuffer **buffers,
1419			  unsigned **attachments,
1420			  int *count)
1421{
1422   assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN);
1423
1424   struct gl_framebuffer *fb = drawable->driverPrivate;
1425   struct intel_renderbuffer *stencil_rb =
1426      intel_get_renderbuffer(fb, BUFFER_STENCIL);
1427
1428   if (stencil_rb) {
1429      /*
1430       * We requested a DRI2BufferStencil without knowing if the X driver
1431       * supports it. Now, check if X handled the request correctly and clean
1432       * up if it did not. (See comments for 'enum intel_dri2_has_hiz').
1433       */
1434      struct intel_renderbuffer *depth_rb =
1435	 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1436      assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1437      assert(depth_rb && depth_rb->Base.Format == MESA_FORMAT_X8_Z24);
1438
1439      if (stencil_rb->region->tiling == I915_TILING_NONE) {
1440	 /*
1441	  * The stencil buffer is actually W tiled. The region's tiling is
1442	  * I915_TILING_NONE, however, because the GTT is incapable of W
1443	  * fencing.
1444	  */
1445	 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE;
1446	 return;
1447      } else {
1448	 /*
1449	  * Oops... the screen doesn't support separate stencil. Discard the
1450	  * separate depth and stencil buffers and replace them with
1451	  * a combined depth/stencil buffer. Discard the hiz buffer too.
1452	  */
1453	 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE;
1454	 if (intel->must_use_separate_stencil) {
1455	    _mesa_problem(&intel->ctx,
1456			  "intel_context requires separate stencil, but the "
1457			  "DRIscreen does not support it. You may need to "
1458			  "upgrade the Intel X driver to 2.16.0");
1459	    abort();
1460	 }
1461
1462	 /* 1. Discard depth and stencil renderbuffers. */
1463	 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH);
1464	 depth_rb = NULL;
1465	 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL);
1466	 stencil_rb = NULL;
1467
1468	 /* 2. Create new depth/stencil renderbuffer. */
1469	 struct intel_renderbuffer *depth_stencil_rb =
1470	    intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
1471	 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base);
1472	 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base);
1473
1474	 /* 3. Append DRI2BufferDepthStencil to attachment list. */
1475	 int old_count = *count;
1476	 unsigned int *old_attachments = *attachments;
1477	 *count = old_count + 1;
1478	 *attachments = malloc(2 * (*count) * sizeof(unsigned));
1479	 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned));
1480	 free(old_attachments);
1481	 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL;
1482	 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb);
1483
1484	 /* 4. Request new set of DRI2 attachments. */
1485	 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1486	 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1487							      &drawable->w,
1488							      &drawable->h,
1489							      *attachments,
1490							      *count,
1491							      count,
1492							      drawable->loaderPrivate);
1493	 if (!*buffers)
1494	    return;
1495
1496	 /*
1497	  * I don't know how to recover from the failure assertion below.
1498	  * Rather than fail gradually and unexpectedly, we should just die
1499	  * now.
1500	  */
1501	 assert(*count == old_count + 1);
1502
1503	 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */
1504	 __DRIbuffer *depth_stencil_buffer = NULL;
1505	 for (int i = 0; i < *count; ++i) {
1506	    if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1507	       depth_stencil_buffer = &(*buffers)[i];
1508	       break;
1509	    }
1510	 }
1511	 struct intel_region *region =
1512	    intel_region_alloc_for_handle(intel->intelScreen,
1513					  depth_stencil_buffer->cpp,
1514					  drawable->w,
1515					  drawable->h,
1516					  depth_stencil_buffer->pitch
1517					     / depth_stencil_buffer->cpp,
1518					  depth_stencil_buffer->name,
1519					  "dri2 depth / stencil buffer");
1520	 intel_region_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->region,
1521				region);
1522	 intel_region_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->region,
1523				region);
1524	 intel_region_release(&region);
1525      }
1526   }
1527
1528   if (intel_framebuffer_has_hiz(fb)) {
1529      /*
1530       * In the future, the driver may advertise a GL config with hiz
1531       * compatible depth bits and 0 stencil bits (for example, when the
1532       * driver gains support for float32 depth buffers). When that day comes,
1533       * here we need to verify that the X driver does in fact support hiz and
1534       * clean up if it doesn't.
1535       *
1536       * Presently, however, no verification or clean up is necessary, and
1537       * execution should not reach here. If the framebuffer still has a hiz
1538       * region, then we have already set dri2_has_hiz to true after
1539       * confirming above that the stencil buffer is W tiled.
1540       */
1541      assert(0);
1542   }
1543}
1544