intel_context.c revision 4b40375c438f9a10231dabedcf72bf6f27bbe327 
1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29#include "main/glheader.h"
30#include "main/context.h"
31#include "main/extensions.h"
32#include "main/fbobject.h"
33#include "main/framebuffer.h"
34#include "main/imports.h"
35#include "main/points.h"
36#include "main/renderbuffer.h"
37
38#include "swrast/swrast.h"
39#include "swrast_setup/swrast_setup.h"
40#include "tnl/tnl.h"
41#include "drivers/common/driverfuncs.h"
42#include "drivers/common/meta.h"
43
44#include "intel_chipset.h"
45#include "intel_buffers.h"
46#include "intel_tex.h"
47#include "intel_batchbuffer.h"
48#include "intel_clear.h"
49#include "intel_extensions.h"
50#include "intel_pixel.h"
51#include "intel_regions.h"
52#include "intel_buffer_objects.h"
53#include "intel_fbo.h"
54#include "intel_bufmgr.h"
55#include "intel_screen.h"
56#include "intel_mipmap_tree.h"
57
58#include "utils.h"
59#include "../glsl/ralloc.h"
60
61#ifndef INTEL_DEBUG
62int INTEL_DEBUG = (0);
63#endif
64
65
66static const GLubyte *
67intelGetString(struct gl_context * ctx, GLenum name)
68{
69   const struct intel_context *const intel = intel_context(ctx);
70   const char *chipset;
71   static char buffer[128];
72
73   switch (name) {
74   case GL_VENDOR:
75      return (GLubyte *) "Intel Open Source Technology Center";
76      break;
77
78   case GL_RENDERER:
79      switch (intel->intelScreen->deviceID) {
80      case PCI_CHIP_845_G:
81         chipset = "Intel(R) 845G";
82         break;
83      case PCI_CHIP_I830_M:
84         chipset = "Intel(R) 830M";
85         break;
86      case PCI_CHIP_I855_GM:
87         chipset = "Intel(R) 852GM/855GM";
88         break;
89      case PCI_CHIP_I865_G:
90         chipset = "Intel(R) 865G";
91         break;
92      case PCI_CHIP_I915_G:
93         chipset = "Intel(R) 915G";
94         break;
95      case PCI_CHIP_E7221_G:
96	 chipset = "Intel (R) E7221G (i915)";
97	 break;
98      case PCI_CHIP_I915_GM:
99         chipset = "Intel(R) 915GM";
100         break;
101      case PCI_CHIP_I945_G:
102         chipset = "Intel(R) 945G";
103         break;
104      case PCI_CHIP_I945_GM:
105         chipset = "Intel(R) 945GM";
106         break;
107      case PCI_CHIP_I945_GME:
108         chipset = "Intel(R) 945GME";
109         break;
110      case PCI_CHIP_G33_G:
111	 chipset = "Intel(R) G33";
112	 break;
113      case PCI_CHIP_Q35_G:
114	 chipset = "Intel(R) Q35";
115	 break;
116      case PCI_CHIP_Q33_G:
117	 chipset = "Intel(R) Q33";
118	 break;
119      case PCI_CHIP_IGD_GM:
120      case PCI_CHIP_IGD_G:
121	 chipset = "Intel(R) IGD";
122	 break;
123      case PCI_CHIP_I965_Q:
124	 chipset = "Intel(R) 965Q";
125	 break;
126      case PCI_CHIP_I965_G:
127      case PCI_CHIP_I965_G_1:
128	 chipset = "Intel(R) 965G";
129	 break;
130      case PCI_CHIP_I946_GZ:
131	 chipset = "Intel(R) 946GZ";
132	 break;
133      case PCI_CHIP_I965_GM:
134	 chipset = "Intel(R) 965GM";
135	 break;
136      case PCI_CHIP_I965_GME:
137	 chipset = "Intel(R) 965GME/GLE";
138	 break;
139      case PCI_CHIP_GM45_GM:
140	 chipset = "Mobile Intel® GM45 Express Chipset";
141	 break;
142      case PCI_CHIP_IGD_E_G:
143	 chipset = "Intel(R) Integrated Graphics Device";
144	 break;
145      case PCI_CHIP_G45_G:
146         chipset = "Intel(R) G45/G43";
147         break;
148      case PCI_CHIP_Q45_G:
149         chipset = "Intel(R) Q45/Q43";
150         break;
151      case PCI_CHIP_G41_G:
152         chipset = "Intel(R) G41";
153         break;
154      case PCI_CHIP_B43_G:
155      case PCI_CHIP_B43_G1:
156         chipset = "Intel(R) B43";
157         break;
158      case PCI_CHIP_ILD_G:
159         chipset = "Intel(R) Ironlake Desktop";
160         break;
161      case PCI_CHIP_ILM_G:
162         chipset = "Intel(R) Ironlake Mobile";
163         break;
164      case PCI_CHIP_SANDYBRIDGE_GT1:
165      case PCI_CHIP_SANDYBRIDGE_GT2:
166      case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167	 chipset = "Intel(R) Sandybridge Desktop";
168	 break;
169      case PCI_CHIP_SANDYBRIDGE_M_GT1:
170      case PCI_CHIP_SANDYBRIDGE_M_GT2:
171      case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172	 chipset = "Intel(R) Sandybridge Mobile";
173	 break;
174      case PCI_CHIP_SANDYBRIDGE_S:
175	 chipset = "Intel(R) Sandybridge Server";
176	 break;
177      case PCI_CHIP_IVYBRIDGE_GT1:
178      case PCI_CHIP_IVYBRIDGE_GT2:
179	 chipset = "Intel(R) Ivybridge Desktop";
180	 break;
181      case PCI_CHIP_IVYBRIDGE_M_GT1:
182      case PCI_CHIP_IVYBRIDGE_M_GT2:
183	 chipset = "Intel(R) Ivybridge Mobile";
184	 break;
185      case PCI_CHIP_IVYBRIDGE_S_GT1:
186      case PCI_CHIP_IVYBRIDGE_S_GT2:
187	 chipset = "Intel(R) Ivybridge Server";
188	 break;
189      case PCI_CHIP_HASWELL_GT1:
190      case PCI_CHIP_HASWELL_GT2:
191      case PCI_CHIP_HASWELL_GT2_PLUS:
192      case PCI_CHIP_HASWELL_SDV_GT1:
193      case PCI_CHIP_HASWELL_SDV_GT2:
194      case PCI_CHIP_HASWELL_SDV_GT2_PLUS:
195      case PCI_CHIP_HASWELL_ULT_GT1:
196      case PCI_CHIP_HASWELL_ULT_GT2:
197      case PCI_CHIP_HASWELL_ULT_GT2_PLUS:
198      case PCI_CHIP_HASWELL_CRW_GT1:
199      case PCI_CHIP_HASWELL_CRW_GT2:
200      case PCI_CHIP_HASWELL_CRW_GT2_PLUS:
201	 chipset = "Intel(R) Haswell Desktop";
202	 break;
203      case PCI_CHIP_HASWELL_M_GT1:
204      case PCI_CHIP_HASWELL_M_GT2:
205      case PCI_CHIP_HASWELL_M_GT2_PLUS:
206      case PCI_CHIP_HASWELL_SDV_M_GT1:
207      case PCI_CHIP_HASWELL_SDV_M_GT2:
208      case PCI_CHIP_HASWELL_SDV_M_GT2_PLUS:
209      case PCI_CHIP_HASWELL_ULT_M_GT1:
210      case PCI_CHIP_HASWELL_ULT_M_GT2:
211      case PCI_CHIP_HASWELL_ULT_M_GT2_PLUS:
212      case PCI_CHIP_HASWELL_CRW_M_GT1:
213      case PCI_CHIP_HASWELL_CRW_M_GT2:
214      case PCI_CHIP_HASWELL_CRW_M_GT2_PLUS:
215	 chipset = "Intel(R) Haswell Mobile";
216	 break;
217      case PCI_CHIP_HASWELL_S_GT1:
218      case PCI_CHIP_HASWELL_S_GT2:
219      case PCI_CHIP_HASWELL_S_GT2_PLUS:
220      case PCI_CHIP_HASWELL_SDV_S_GT1:
221      case PCI_CHIP_HASWELL_SDV_S_GT2:
222      case PCI_CHIP_HASWELL_SDV_S_GT2_PLUS:
223      case PCI_CHIP_HASWELL_ULT_S_GT1:
224      case PCI_CHIP_HASWELL_ULT_S_GT2:
225      case PCI_CHIP_HASWELL_ULT_S_GT2_PLUS:
226      case PCI_CHIP_HASWELL_CRW_S_GT1:
227      case PCI_CHIP_HASWELL_CRW_S_GT2:
228      case PCI_CHIP_HASWELL_CRW_S_GT2_PLUS:
229	 chipset = "Intel(R) Haswell Server";
230	 break;
231      default:
232         chipset = "Unknown Intel Chipset";
233         break;
234      }
235
236      (void) driGetRendererString(buffer, chipset, 0);
237      return (GLubyte *) buffer;
238
239   default:
240      return NULL;
241   }
242}
243
244static void
245intel_flush_front(struct gl_context *ctx)
246{
247   struct intel_context *intel = intel_context(ctx);
248    __DRIcontext *driContext = intel->driContext;
249    __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
250
251    if (_mesa_is_winsys_fbo(ctx->DrawBuffer) && intel->front_buffer_dirty) {
252      if (screen->dri2.loader->flushFrontBuffer != NULL &&
253          driContext->driDrawablePriv &&
254	  driContext->driDrawablePriv->loaderPrivate) {
255	 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
256						  driContext->driDrawablePriv->loaderPrivate);
257
258	 /* We set the dirty bit in intel_prepare_render() if we're
259	  * front buffer rendering once we get there.
260	  */
261	 intel->front_buffer_dirty = false;
262      }
263   }
264}
265
266static unsigned
267intel_bits_per_pixel(const struct intel_renderbuffer *rb)
268{
269   return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
270}
271
272static void
273intel_query_dri2_buffers(struct intel_context *intel,
274			 __DRIdrawable *drawable,
275			 __DRIbuffer **buffers,
276			 int *count);
277
278static void
279intel_process_dri2_buffer(struct intel_context *intel,
280			  __DRIdrawable *drawable,
281			  __DRIbuffer *buffer,
282			  struct intel_renderbuffer *rb,
283			  const char *buffer_name);
284
285void
286intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
287{
288   struct gl_framebuffer *fb = drawable->driverPrivate;
289   struct intel_renderbuffer *rb;
290   struct intel_context *intel = context->driverPrivate;
291   __DRIbuffer *buffers = NULL;
292   int i, count;
293   const char *region_name;
294
295   /* If we're rendering to the fake front buffer, make sure all the
296    * pending drawing has landed on the real front buffer.  Otherwise
297    * when we eventually get to DRI2GetBuffersWithFormat the stale
298    * real front buffer contents will get copied to the new fake front
299    * buffer.
300    */
301   if (intel->is_front_buffer_rendering) {
302      intel_flush(&intel->ctx);
303      intel_flush_front(&intel->ctx);
304   }
305
306   /* Set this up front, so that in case our buffers get invalidated
307    * while we're getting new buffers, we don't clobber the stamp and
308    * thus ignore the invalidate. */
309   drawable->lastStamp = drawable->dri2.stamp;
310
311   if (unlikely(INTEL_DEBUG & DEBUG_DRI))
312      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
313
314   intel_query_dri2_buffers(intel, drawable, &buffers, &count);
315
316   if (buffers == NULL)
317      return;
318
319   for (i = 0; i < count; i++) {
320       switch (buffers[i].attachment) {
321       case __DRI_BUFFER_FRONT_LEFT:
322	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
323	   region_name = "dri2 front buffer";
324	   break;
325
326       case __DRI_BUFFER_FAKE_FRONT_LEFT:
327	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
328	   region_name = "dri2 fake front buffer";
329	   break;
330
331       case __DRI_BUFFER_BACK_LEFT:
332	   rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
333	   region_name = "dri2 back buffer";
334	   break;
335
336       case __DRI_BUFFER_DEPTH:
337       case __DRI_BUFFER_HIZ:
338       case __DRI_BUFFER_DEPTH_STENCIL:
339       case __DRI_BUFFER_STENCIL:
340       case __DRI_BUFFER_ACCUM:
341       default:
342	   fprintf(stderr,
343		   "unhandled buffer attach event, attachment type %d\n",
344		   buffers[i].attachment);
345	   return;
346       }
347
348       intel_process_dri2_buffer(intel, drawable, &buffers[i], rb, region_name);
349   }
350
351   driUpdateFramebufferSize(&intel->ctx, drawable);
352}
353
354/**
355 * intel_prepare_render should be called anywhere that curent read/drawbuffer
356 * state is required.
357 */
358void
359intel_prepare_render(struct intel_context *intel)
360{
361   __DRIcontext *driContext = intel->driContext;
362   __DRIdrawable *drawable;
363
364   drawable = driContext->driDrawablePriv;
365   if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
366      if (drawable->lastStamp != drawable->dri2.stamp)
367	 intel_update_renderbuffers(driContext, drawable);
368      intel_draw_buffer(&intel->ctx);
369      driContext->dri2.draw_stamp = drawable->dri2.stamp;
370   }
371
372   drawable = driContext->driReadablePriv;
373   if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
374      if (drawable->lastStamp != drawable->dri2.stamp)
375	 intel_update_renderbuffers(driContext, drawable);
376      driContext->dri2.read_stamp = drawable->dri2.stamp;
377   }
378
379   /* If we're currently rendering to the front buffer, the rendering
380    * that will happen next will probably dirty the front buffer.  So
381    * mark it as dirty here.
382    */
383   if (intel->is_front_buffer_rendering)
384      intel->front_buffer_dirty = true;
385
386   /* Wait for the swapbuffers before the one we just emitted, so we
387    * don't get too many swaps outstanding for apps that are GPU-heavy
388    * but not CPU-heavy.
389    *
390    * We're using intelDRI2Flush (called from the loader before
391    * swapbuffer) and glFlush (for front buffer rendering) as the
392    * indicator that a frame is done and then throttle when we get
393    * here as we prepare to render the next frame.  At this point for
394    * round trips for swap/copy and getting new buffers are done and
395    * we'll spend less time waiting on the GPU.
396    *
397    * Unfortunately, we don't have a handle to the batch containing
398    * the swap, and getting our hands on that doesn't seem worth it,
399    * so we just us the first batch we emitted after the last swap.
400    */
401   if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
402      drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
403      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
404      intel->first_post_swapbuffers_batch = NULL;
405      intel->need_throttle = false;
406   }
407}
408
409static void
410intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
411{
412    struct intel_context *intel = intel_context(ctx);
413    __DRIcontext *driContext = intel->driContext;
414
415    if (intel->saved_viewport)
416	intel->saved_viewport(ctx, x, y, w, h);
417
418    if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
419       dri2InvalidateDrawable(driContext->driDrawablePriv);
420       dri2InvalidateDrawable(driContext->driReadablePriv);
421    }
422}
423
424static const struct dri_debug_control debug_control[] = {
425   { "tex",   DEBUG_TEXTURE},
426   { "state", DEBUG_STATE},
427   { "ioctl", DEBUG_IOCTL},
428   { "blit",  DEBUG_BLIT},
429   { "mip",   DEBUG_MIPTREE},
430   { "fall",  DEBUG_FALLBACKS},
431   { "verb",  DEBUG_VERBOSE},
432   { "bat",   DEBUG_BATCH},
433   { "pix",   DEBUG_PIXEL},
434   { "buf",   DEBUG_BUFMGR},
435   { "reg",   DEBUG_REGION},
436   { "fbo",   DEBUG_FBO},
437   { "gs",    DEBUG_GS},
438   { "sync",  DEBUG_SYNC},
439   { "prim",  DEBUG_PRIMS },
440   { "vert",  DEBUG_VERTS },
441   { "dri",   DEBUG_DRI },
442   { "sf",    DEBUG_SF },
443   { "san",   DEBUG_SANITY },
444   { "sleep", DEBUG_SLEEP },
445   { "stats", DEBUG_STATS },
446   { "tile",  DEBUG_TILE },
447   { "wm",    DEBUG_WM },
448   { "urb",   DEBUG_URB },
449   { "vs",    DEBUG_VS },
450   { "clip",  DEBUG_CLIP },
451   { "aub",   DEBUG_AUB },
452   { NULL,    0 }
453};
454
455
456static void
457intelInvalidateState(struct gl_context * ctx, GLuint new_state)
458{
459    struct intel_context *intel = intel_context(ctx);
460
461   _swrast_InvalidateState(ctx, new_state);
462   _vbo_InvalidateState(ctx, new_state);
463
464   intel->NewGLState |= new_state;
465
466   if (intel->vtbl.invalidate_state)
467      intel->vtbl.invalidate_state( intel, new_state );
468}
469
470void
471intel_flush_rendering_to_batch(struct gl_context *ctx)
472{
473   struct intel_context *intel = intel_context(ctx);
474
475   if (intel->Fallback)
476      _swrast_flush(ctx);
477
478   if (intel->gen < 4)
479      INTEL_FIREVERTICES(intel);
480}
481
482void
483_intel_flush(struct gl_context *ctx, const char *file, int line)
484{
485   struct intel_context *intel = intel_context(ctx);
486
487   intel_flush_rendering_to_batch(ctx);
488
489   if (intel->batch.used)
490      _intel_batchbuffer_flush(intel, file, line);
491}
492
493static void
494intel_glFlush(struct gl_context *ctx)
495{
496   struct intel_context *intel = intel_context(ctx);
497
498   intel_flush(ctx);
499   intel_flush_front(ctx);
500   if (intel->is_front_buffer_rendering)
501      intel->need_throttle = true;
502}
503
504void
505intelFinish(struct gl_context * ctx)
506{
507   struct intel_context *intel = intel_context(ctx);
508
509   intel_flush(ctx);
510   intel_flush_front(ctx);
511
512   if (intel->batch.last_bo)
513      drm_intel_bo_wait_rendering(intel->batch.last_bo);
514}
515
516void
517intelInitDriverFunctions(struct dd_function_table *functions)
518{
519   _mesa_init_driver_functions(functions);
520
521   functions->Flush = intel_glFlush;
522   functions->Finish = intelFinish;
523   functions->GetString = intelGetString;
524   functions->UpdateState = intelInvalidateState;
525
526   intelInitTextureFuncs(functions);
527   intelInitTextureImageFuncs(functions);
528   intelInitTextureSubImageFuncs(functions);
529   intelInitTextureCopyImageFuncs(functions);
530   intelInitStateFuncs(functions);
531   intelInitClearFuncs(functions);
532   intelInitBufferFuncs(functions);
533   intelInitPixelFuncs(functions);
534   intelInitBufferObjectFuncs(functions);
535   intel_init_syncobj_functions(functions);
536}
537
538bool
539intelInitContext(struct intel_context *intel,
540		 int api,
541                 const struct gl_config * mesaVis,
542                 __DRIcontext * driContextPriv,
543                 void *sharedContextPrivate,
544                 struct dd_function_table *functions)
545{
546   struct gl_context *ctx = &intel->ctx;
547   struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
548   __DRIscreen *sPriv = driContextPriv->driScreenPriv;
549   struct intel_screen *intelScreen = sPriv->driverPrivate;
550   int bo_reuse_mode;
551   struct gl_config visual;
552
553   /* we can't do anything without a connection to the device */
554   if (intelScreen->bufmgr == NULL)
555      return false;
556
557   /* Can't rely on invalidate events, fall back to glViewport hack */
558   if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
559      intel->saved_viewport = functions->Viewport;
560      functions->Viewport = intel_viewport;
561   }
562
563   if (mesaVis == NULL) {
564      memset(&visual, 0, sizeof visual);
565      mesaVis = &visual;
566   }
567
568   if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
569                                 functions, (void *) intel)) {
570      printf("%s: failed to init mesa context\n", __FUNCTION__);
571      return false;
572   }
573
574   driContextPriv->driverPrivate = intel;
575   intel->intelScreen = intelScreen;
576   intel->driContext = driContextPriv;
577   intel->driFd = sPriv->fd;
578
579   intel->gen = intelScreen->gen;
580
581   const int devID = intelScreen->deviceID;
582   if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID) || IS_HSW_GT1(devID))
583      intel->gt = 1;
584   else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID) || IS_HSW_GT2(devID))
585      intel->gt = 2;
586   else
587      intel->gt = 0;
588
589   if (IS_HASWELL(devID)) {
590      intel->is_haswell = true;
591   } else if (IS_G4X(devID)) {
592      intel->is_g4x = true;
593   } else if (IS_945(devID)) {
594      intel->is_945 = true;
595   }
596
597   if (intel->gen >= 5) {
598      intel->needs_ff_sync = true;
599   }
600
601   intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
602   intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
603   intel->has_hiz = intel->gen >= 6 && !intel->is_haswell;
604   intel->has_llc = intel->intelScreen->hw_has_llc;
605   intel->has_swizzling = intel->intelScreen->hw_has_swizzling;
606
607   memset(&ctx->TextureFormatSupported,
608	  0, sizeof(ctx->TextureFormatSupported));
609
610   driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
611                       sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
612   if (intel->gen < 4)
613      intel->maxBatchSize = 4096;
614   else
615      intel->maxBatchSize = sizeof(intel->batch.map);
616
617   intel->bufmgr = intelScreen->bufmgr;
618
619   bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
620   switch (bo_reuse_mode) {
621   case DRI_CONF_BO_REUSE_DISABLED:
622      break;
623   case DRI_CONF_BO_REUSE_ALL:
624      intel_bufmgr_gem_enable_reuse(intel->bufmgr);
625      break;
626   }
627
628   ctx->Const.MinLineWidth = 1.0;
629   ctx->Const.MinLineWidthAA = 1.0;
630   ctx->Const.MaxLineWidth = 5.0;
631   ctx->Const.MaxLineWidthAA = 5.0;
632   ctx->Const.LineWidthGranularity = 0.5;
633
634   ctx->Const.MinPointSize = 1.0;
635   ctx->Const.MinPointSizeAA = 1.0;
636   ctx->Const.MaxPointSize = 255.0;
637   ctx->Const.MaxPointSizeAA = 3.0;
638   ctx->Const.PointSizeGranularity = 1.0;
639
640   ctx->Const.MaxSamples = 1.0;
641
642   if (intel->gen >= 6)
643      ctx->Const.MaxClipPlanes = 8;
644
645   ctx->Const.StripTextureBorder = GL_TRUE;
646
647   /* reinitialize the context point state.
648    * It depend on constants in __struct gl_contextRec::Const
649    */
650   _mesa_init_point(ctx);
651
652   if (intel->gen >= 4) {
653      ctx->Const.MaxRenderbufferSize = 8192;
654   } else {
655      ctx->Const.MaxRenderbufferSize = 2048;
656   }
657
658   /* Initialize the software rasterizer and helper modules. */
659   _swrast_CreateContext(ctx);
660   _vbo_CreateContext(ctx);
661   _tnl_CreateContext(ctx);
662   _swsetup_CreateContext(ctx);
663
664   /* Configure swrast to match hardware characteristics: */
665   _swrast_allow_pixel_fog(ctx, false);
666   _swrast_allow_vertex_fog(ctx, true);
667
668   _mesa_meta_init(ctx);
669
670   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
671   intel->hw_stipple = 1;
672
673   /* XXX FBO: this doesn't seem to be used anywhere */
674   switch (mesaVis->depthBits) {
675   case 0:                     /* what to do in this case? */
676   case 16:
677      intel->polygon_offset_scale = 1.0;
678      break;
679   case 24:
680      intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
681      break;
682   default:
683      assert(0);
684      break;
685   }
686
687   if (intel->gen >= 4)
688      intel->polygon_offset_scale /= 0xffff;
689
690   intel->RenderIndex = ~0;
691
692   intelInitExtensions(ctx);
693
694   INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
695   if (INTEL_DEBUG & DEBUG_BUFMGR)
696      dri_bufmgr_set_debug(intel->bufmgr, true);
697
698   if (INTEL_DEBUG & DEBUG_AUB)
699      drm_intel_bufmgr_gem_set_aub_dump(intel->bufmgr, true);
700
701   intel_batchbuffer_init(intel);
702
703   intel_fbo_init(intel);
704
705   intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
706					       "texture_tiling");
707   intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
708
709   if (!driQueryOptionb(&intel->optionCache, "hiz")) {
710       intel->has_hiz = false;
711       /* On gen6, you can only do separate stencil with HIZ. */
712       if (intel->gen == 6)
713	  intel->has_separate_stencil = false;
714   }
715
716   intel->prim.primitive = ~0;
717
718   /* Force all software fallbacks */
719   if (driQueryOptionb(&intel->optionCache, "no_rast")) {
720      fprintf(stderr, "disabling 3D rasterization\n");
721      intel->no_rast = 1;
722   }
723
724   if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
725      fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
726      intel->always_flush_batch = 1;
727   }
728
729   if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
730      fprintf(stderr, "flushing GPU caches before/after each draw call\n");
731      intel->always_flush_cache = 1;
732   }
733
734   return true;
735}
736
737void
738intelDestroyContext(__DRIcontext * driContextPriv)
739{
740   struct intel_context *intel =
741      (struct intel_context *) driContextPriv->driverPrivate;
742
743   assert(intel);               /* should never be null */
744   if (intel) {
745      INTEL_FIREVERTICES(intel);
746
747      /* Dump a final BMP in case the application doesn't call SwapBuffers */
748      if (INTEL_DEBUG & DEBUG_AUB) {
749         intel_batchbuffer_flush(intel);
750	 aub_dump_bmp(&intel->ctx);
751      }
752
753      _mesa_meta_free(&intel->ctx);
754
755      intel->vtbl.destroy(intel);
756
757      _swsetup_DestroyContext(&intel->ctx);
758      _tnl_DestroyContext(&intel->ctx);
759      _vbo_DestroyContext(&intel->ctx);
760
761      _swrast_DestroyContext(&intel->ctx);
762      intel->Fallback = 0x0;      /* don't call _swrast_Flush later */
763
764      intel_batchbuffer_free(intel);
765
766      free(intel->prim.vb);
767      intel->prim.vb = NULL;
768      drm_intel_bo_unreference(intel->prim.vb_bo);
769      intel->prim.vb_bo = NULL;
770      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
771      intel->first_post_swapbuffers_batch = NULL;
772
773      driDestroyOptionCache(&intel->optionCache);
774
775      /* free the Mesa context */
776      _mesa_free_context_data(&intel->ctx);
777
778      _math_matrix_dtr(&intel->ViewportMatrix);
779
780      ralloc_free(intel);
781      driContextPriv->driverPrivate = NULL;
782   }
783}
784
785GLboolean
786intelUnbindContext(__DRIcontext * driContextPriv)
787{
788   /* Unset current context and dispath table */
789   _mesa_make_current(NULL, NULL, NULL);
790
791   return true;
792}
793
794GLboolean
795intelMakeCurrent(__DRIcontext * driContextPriv,
796                 __DRIdrawable * driDrawPriv,
797                 __DRIdrawable * driReadPriv)
798{
799   struct intel_context *intel;
800   GET_CURRENT_CONTEXT(curCtx);
801
802   if (driContextPriv)
803      intel = (struct intel_context *) driContextPriv->driverPrivate;
804   else
805      intel = NULL;
806
807   /* According to the glXMakeCurrent() man page: "Pending commands to
808    * the previous context, if any, are flushed before it is released."
809    * But only flush if we're actually changing contexts.
810    */
811   if (intel_context(curCtx) && intel_context(curCtx) != intel) {
812      _mesa_flush(curCtx);
813   }
814
815   if (driContextPriv) {
816      struct gl_framebuffer *fb, *readFb;
817
818      if (driDrawPriv == NULL && driReadPriv == NULL) {
819	 fb = _mesa_get_incomplete_framebuffer();
820	 readFb = _mesa_get_incomplete_framebuffer();
821      } else {
822	 fb = driDrawPriv->driverPrivate;
823	 readFb = driReadPriv->driverPrivate;
824	 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
825	 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
826      }
827
828      intel_prepare_render(intel);
829      _mesa_make_current(&intel->ctx, fb, readFb);
830
831      /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
832       * is NULL at that point.  We can't call _mesa_makecurrent()
833       * first, since we need the buffer size for the initial
834       * viewport.  So just call intel_draw_buffer() again here. */
835      intel_draw_buffer(&intel->ctx);
836   }
837   else {
838      _mesa_make_current(NULL, NULL, NULL);
839   }
840
841   return true;
842}
843
844/**
845 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
846 *
847 * To determine which DRI buffers to request, examine the renderbuffers
848 * attached to the drawable's framebuffer. Then request the buffers with
849 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
850 *
851 * This is called from intel_update_renderbuffers().
852 *
853 * \param drawable      Drawable whose buffers are queried.
854 * \param buffers       [out] List of buffers returned by DRI2 query.
855 * \param buffer_count  [out] Number of buffers returned.
856 *
857 * \see intel_update_renderbuffers()
858 * \see DRI2GetBuffers()
859 * \see DRI2GetBuffersWithFormat()
860 */
861static void
862intel_query_dri2_buffers(struct intel_context *intel,
863			 __DRIdrawable *drawable,
864			 __DRIbuffer **buffers,
865			 int *buffer_count)
866{
867   __DRIscreen *screen = intel->intelScreen->driScrnPriv;
868   struct gl_framebuffer *fb = drawable->driverPrivate;
869   int i = 0;
870   const int max_attachments = 4;
871   unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
872
873   struct intel_renderbuffer *front_rb;
874   struct intel_renderbuffer *back_rb;
875
876   front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
877   back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
878
879   if ((intel->is_front_buffer_rendering ||
880	intel->is_front_buffer_reading ||
881	!back_rb) && front_rb) {
882      attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
883      attachments[i++] = intel_bits_per_pixel(front_rb);
884   }
885
886   if (back_rb) {
887      attachments[i++] = __DRI_BUFFER_BACK_LEFT;
888      attachments[i++] = intel_bits_per_pixel(back_rb);
889   }
890
891   assert(i <= 2 * max_attachments);
892
893   *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
894							&drawable->w,
895							&drawable->h,
896							attachments, i / 2,
897							buffer_count,
898							drawable->loaderPrivate);
899   free(attachments);
900}
901
902/**
903 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
904 *
905 * This is called from intel_update_renderbuffers().
906 *
907 * \par Note:
908 *    DRI buffers whose attachment point is DRI2BufferStencil or
909 *    DRI2BufferDepthStencil are handled as special cases.
910 *
911 * \param buffer_name is a human readable name, such as "dri2 front buffer",
912 *        that is passed to intel_region_alloc_for_handle().
913 *
914 * \see intel_update_renderbuffers()
915 * \see intel_region_alloc_for_handle()
916 */
917static void
918intel_process_dri2_buffer(struct intel_context *intel,
919			  __DRIdrawable *drawable,
920			  __DRIbuffer *buffer,
921			  struct intel_renderbuffer *rb,
922			  const char *buffer_name)
923{
924   struct intel_region *region = NULL;
925
926   if (!rb)
927      return;
928
929   /* We try to avoid closing and reopening the same BO name, because the first
930    * use of a mapping of the buffer involves a bunch of page faulting which is
931    * moderately expensive.
932    */
933   if (rb->mt &&
934       rb->mt->region &&
935       rb->mt->region->name == buffer->name)
936      return;
937
938   if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
939      fprintf(stderr,
940	      "attaching buffer %d, at %d, cpp %d, pitch %d\n",
941	      buffer->name, buffer->attachment,
942	      buffer->cpp, buffer->pitch);
943   }
944
945   intel_miptree_release(&rb->mt);
946   region = intel_region_alloc_for_handle(intel->intelScreen,
947                                          buffer->cpp,
948                                          drawable->w,
949                                          drawable->h,
950                                          buffer->pitch / buffer->cpp,
951                                          buffer->name,
952                                          buffer_name);
953   if (!region)
954      return;
955
956   rb->mt = intel_miptree_create_for_region(intel,
957                                            GL_TEXTURE_2D,
958                                            intel_rb_format(rb),
959                                            region);
960   intel_region_release(&region);
961}
962