intel_context.c revision 6b9e4b6ca7bec9dbafe4f4368f2f33bbeda6cb5c
1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29#include "main/glheader.h"
30#include "main/context.h"
31#include "main/extensions.h"
32#include "main/fbobject.h"
33#include "main/framebuffer.h"
34#include "main/imports.h"
35#include "main/points.h"
36#include "main/renderbuffer.h"
37
38#include "swrast/swrast.h"
39#include "swrast_setup/swrast_setup.h"
40#include "tnl/tnl.h"
41#include "drivers/common/driverfuncs.h"
42#include "drivers/common/meta.h"
43
44#include "intel_chipset.h"
45#include "intel_buffers.h"
46#include "intel_tex.h"
47#include "intel_batchbuffer.h"
48#include "intel_clear.h"
49#include "intel_extensions.h"
50#include "intel_pixel.h"
51#include "intel_regions.h"
52#include "intel_buffer_objects.h"
53#include "intel_fbo.h"
54#include "intel_bufmgr.h"
55#include "intel_screen.h"
56
57#include "drirenderbuffer.h"
58#include "utils.h"
59#include "../glsl/ralloc.h"
60
61#ifndef INTEL_DEBUG
62int INTEL_DEBUG = (0);
63#endif
64
65
66static const GLubyte *
67intelGetString(struct gl_context * ctx, GLenum name)
68{
69   const struct intel_context *const intel = intel_context(ctx);
70   const char *chipset;
71   static char buffer[128];
72
73   switch (name) {
74   case GL_VENDOR:
75      return (GLubyte *) "Tungsten Graphics, Inc";
76      break;
77
78   case GL_RENDERER:
79      switch (intel->intelScreen->deviceID) {
80      case PCI_CHIP_845_G:
81         chipset = "Intel(R) 845G";
82         break;
83      case PCI_CHIP_I830_M:
84         chipset = "Intel(R) 830M";
85         break;
86      case PCI_CHIP_I855_GM:
87         chipset = "Intel(R) 852GM/855GM";
88         break;
89      case PCI_CHIP_I865_G:
90         chipset = "Intel(R) 865G";
91         break;
92      case PCI_CHIP_I915_G:
93         chipset = "Intel(R) 915G";
94         break;
95      case PCI_CHIP_E7221_G:
96	 chipset = "Intel (R) E7221G (i915)";
97	 break;
98      case PCI_CHIP_I915_GM:
99         chipset = "Intel(R) 915GM";
100         break;
101      case PCI_CHIP_I945_G:
102         chipset = "Intel(R) 945G";
103         break;
104      case PCI_CHIP_I945_GM:
105         chipset = "Intel(R) 945GM";
106         break;
107      case PCI_CHIP_I945_GME:
108         chipset = "Intel(R) 945GME";
109         break;
110      case PCI_CHIP_G33_G:
111	 chipset = "Intel(R) G33";
112	 break;
113      case PCI_CHIP_Q35_G:
114	 chipset = "Intel(R) Q35";
115	 break;
116      case PCI_CHIP_Q33_G:
117	 chipset = "Intel(R) Q33";
118	 break;
119      case PCI_CHIP_IGD_GM:
120      case PCI_CHIP_IGD_G:
121	 chipset = "Intel(R) IGD";
122	 break;
123      case PCI_CHIP_I965_Q:
124	 chipset = "Intel(R) 965Q";
125	 break;
126      case PCI_CHIP_I965_G:
127      case PCI_CHIP_I965_G_1:
128	 chipset = "Intel(R) 965G";
129	 break;
130      case PCI_CHIP_I946_GZ:
131	 chipset = "Intel(R) 946GZ";
132	 break;
133      case PCI_CHIP_I965_GM:
134	 chipset = "Intel(R) 965GM";
135	 break;
136      case PCI_CHIP_I965_GME:
137	 chipset = "Intel(R) 965GME/GLE";
138	 break;
139      case PCI_CHIP_GM45_GM:
140	 chipset = "Mobile Intel® GM45 Express Chipset";
141	 break;
142      case PCI_CHIP_IGD_E_G:
143	 chipset = "Intel(R) Integrated Graphics Device";
144	 break;
145      case PCI_CHIP_G45_G:
146         chipset = "Intel(R) G45/G43";
147         break;
148      case PCI_CHIP_Q45_G:
149         chipset = "Intel(R) Q45/Q43";
150         break;
151      case PCI_CHIP_G41_G:
152         chipset = "Intel(R) G41";
153         break;
154      case PCI_CHIP_B43_G:
155      case PCI_CHIP_B43_G1:
156         chipset = "Intel(R) B43";
157         break;
158      case PCI_CHIP_ILD_G:
159         chipset = "Intel(R) Ironlake Desktop";
160         break;
161      case PCI_CHIP_ILM_G:
162         chipset = "Intel(R) Ironlake Mobile";
163         break;
164      case PCI_CHIP_SANDYBRIDGE_GT1:
165      case PCI_CHIP_SANDYBRIDGE_GT2:
166      case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167	 chipset = "Intel(R) Sandybridge Desktop";
168	 break;
169      case PCI_CHIP_SANDYBRIDGE_M_GT1:
170      case PCI_CHIP_SANDYBRIDGE_M_GT2:
171      case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172	 chipset = "Intel(R) Sandybridge Mobile";
173	 break;
174      case PCI_CHIP_SANDYBRIDGE_S:
175	 chipset = "Intel(R) Sandybridge Server";
176	 break;
177      case PCI_CHIP_IVYBRIDGE_GT1:
178      case PCI_CHIP_IVYBRIDGE_GT2:
179	 chipset = "Intel(R) Ivybridge Desktop";
180	 break;
181      case PCI_CHIP_IVYBRIDGE_M_GT1:
182      case PCI_CHIP_IVYBRIDGE_M_GT2:
183	 chipset = "Intel(R) Ivybridge Mobile";
184	 break;
185      case PCI_CHIP_IVYBRIDGE_S_GT1:
186	 chipset = "Intel(R) Ivybridge Server";
187	 break;
188      default:
189         chipset = "Unknown Intel Chipset";
190         break;
191      }
192
193      (void) driGetRendererString(buffer, chipset, 0);
194      return (GLubyte *) buffer;
195
196   default:
197      return NULL;
198   }
199}
200
201static void
202intel_flush_front(struct gl_context *ctx)
203{
204   struct intel_context *intel = intel_context(ctx);
205    __DRIcontext *driContext = intel->driContext;
206    __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
207
208   if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
209      if (screen->dri2.loader &&
210          (screen->dri2.loader->base.version >= 2)
211	  && (screen->dri2.loader->flushFrontBuffer != NULL) &&
212          driContext->driDrawablePriv &&
213	  driContext->driDrawablePriv->loaderPrivate) {
214	 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
215						  driContext->driDrawablePriv->loaderPrivate);
216
217	 /* We set the dirty bit in intel_prepare_render() if we're
218	  * front buffer rendering once we get there.
219	  */
220	 intel->front_buffer_dirty = GL_FALSE;
221      }
222   }
223}
224
225static unsigned
226intel_bits_per_pixel(const struct intel_renderbuffer *rb)
227{
228   return _mesa_get_format_bytes(rb->Base.Format) * 8;
229}
230
231static void
232intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
233					     __DRIdrawable *drawable,
234					     __DRIbuffer **buffers,
235					     int *count);
236
237static void
238intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
239					      __DRIdrawable *drawable,
240					      __DRIbuffer *buffer,
241					      struct intel_renderbuffer *rb,
242					      const char *buffer_name);
243
244static void
245intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
246					       __DRIdrawable *drawable,
247					       __DRIbuffer **buffers,
248					       unsigned **attachments,
249					       int *count);
250
251static void
252intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
253						__DRIdrawable *drawable,
254						__DRIbuffer *buffer,
255						struct intel_renderbuffer *rb,
256						const char *buffer_name);
257static void
258intel_verify_dri2_has_hiz(struct intel_context *intel,
259			  __DRIdrawable *drawable,
260			  __DRIbuffer **buffers,
261			  unsigned **attachments,
262			  int *count);
263
264void
265intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
266{
267   struct gl_framebuffer *fb = drawable->driverPrivate;
268   struct intel_renderbuffer *rb;
269   struct intel_context *intel = context->driverPrivate;
270   __DRIbuffer *buffers = NULL;
271   unsigned *attachments = NULL;
272   int i, count;
273   const char *region_name;
274
275   bool try_separate_stencil =
276      intel->has_separate_stencil &&
277      intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE &&
278      intel->intelScreen->driScrnPriv->dri2.loader != NULL &&
279      intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 &&
280      intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL;
281
282   assert(!intel->must_use_separate_stencil || try_separate_stencil);
283
284   /* If we're rendering to the fake front buffer, make sure all the
285    * pending drawing has landed on the real front buffer.  Otherwise
286    * when we eventually get to DRI2GetBuffersWithFormat the stale
287    * real front buffer contents will get copied to the new fake front
288    * buffer.
289    */
290   if (intel->is_front_buffer_rendering) {
291      intel_flush(&intel->ctx);
292      intel_flush_front(&intel->ctx);
293   }
294
295   /* Set this up front, so that in case our buffers get invalidated
296    * while we're getting new buffers, we don't clobber the stamp and
297    * thus ignore the invalidate. */
298   drawable->lastStamp = drawable->dri2.stamp;
299
300   if (unlikely(INTEL_DEBUG & DEBUG_DRI))
301      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
302
303   if (try_separate_stencil) {
304      intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers,
305						     &attachments, &count);
306   } else {
307      intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers,
308						   &count);
309   }
310
311   if (buffers == NULL)
312      return;
313
314   drawable->x = 0;
315   drawable->y = 0;
316   drawable->backX = 0;
317   drawable->backY = 0;
318   drawable->numClipRects = 1;
319   drawable->pClipRects[0].x1 = 0;
320   drawable->pClipRects[0].y1 = 0;
321   drawable->pClipRects[0].x2 = drawable->w;
322   drawable->pClipRects[0].y2 = drawable->h;
323   drawable->numBackClipRects = 1;
324   drawable->pBackClipRects[0].x1 = 0;
325   drawable->pBackClipRects[0].y1 = 0;
326   drawable->pBackClipRects[0].x2 = drawable->w;
327   drawable->pBackClipRects[0].y2 = drawable->h;
328
329   for (i = 0; i < count; i++) {
330       switch (buffers[i].attachment) {
331       case __DRI_BUFFER_FRONT_LEFT:
332	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
333	   region_name = "dri2 front buffer";
334	   break;
335
336       case __DRI_BUFFER_FAKE_FRONT_LEFT:
337	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
338	   region_name = "dri2 fake front buffer";
339	   break;
340
341       case __DRI_BUFFER_BACK_LEFT:
342	   rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
343	   region_name = "dri2 back buffer";
344	   break;
345
346       case __DRI_BUFFER_DEPTH:
347	   rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
348	   region_name = "dri2 depth buffer";
349	   break;
350
351       case __DRI_BUFFER_HIZ:
352	   /* The hiz region resides in the depth renderbuffer. */
353	   rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
354	   region_name = "dri2 hiz buffer";
355	   break;
356
357       case __DRI_BUFFER_DEPTH_STENCIL:
358	   rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
359	   region_name = "dri2 depth / stencil buffer";
360	   break;
361
362       case __DRI_BUFFER_STENCIL:
363	   rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
364	   region_name = "dri2 stencil buffer";
365	   break;
366
367       case __DRI_BUFFER_ACCUM:
368       default:
369	   fprintf(stderr,
370		   "unhandled buffer attach event, attachment type %d\n",
371		   buffers[i].attachment);
372	   return;
373       }
374
375       if (try_separate_stencil) {
376	 intel_process_dri2_buffer_with_separate_stencil(intel, drawable,
377						         &buffers[i], rb,
378						         region_name);
379       } else {
380	 intel_process_dri2_buffer_no_separate_stencil(intel, drawable,
381						       &buffers[i], rb,
382						       region_name);
383       }
384   }
385
386   if (try_separate_stencil
387       && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) {
388      intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments,
389				&count);
390   }
391
392   if (attachments)
393      free(attachments);
394
395   driUpdateFramebufferSize(&intel->ctx, drawable);
396}
397
398/**
399 * intel_prepare_render should be called anywhere that curent read/drawbuffer
400 * state is required.
401 */
402void
403intel_prepare_render(struct intel_context *intel)
404{
405   __DRIcontext *driContext = intel->driContext;
406   __DRIdrawable *drawable;
407
408   drawable = driContext->driDrawablePriv;
409   if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
410      if (drawable->lastStamp != drawable->dri2.stamp)
411	 intel_update_renderbuffers(driContext, drawable);
412      intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
413      driContext->dri2.draw_stamp = drawable->dri2.stamp;
414   }
415
416   drawable = driContext->driReadablePriv;
417   if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
418      if (drawable->lastStamp != drawable->dri2.stamp)
419	 intel_update_renderbuffers(driContext, drawable);
420      driContext->dri2.read_stamp = drawable->dri2.stamp;
421   }
422
423   /* If we're currently rendering to the front buffer, the rendering
424    * that will happen next will probably dirty the front buffer.  So
425    * mark it as dirty here.
426    */
427   if (intel->is_front_buffer_rendering)
428      intel->front_buffer_dirty = GL_TRUE;
429
430   /* Wait for the swapbuffers before the one we just emitted, so we
431    * don't get too many swaps outstanding for apps that are GPU-heavy
432    * but not CPU-heavy.
433    *
434    * We're using intelDRI2Flush (called from the loader before
435    * swapbuffer) and glFlush (for front buffer rendering) as the
436    * indicator that a frame is done and then throttle when we get
437    * here as we prepare to render the next frame.  At this point for
438    * round trips for swap/copy and getting new buffers are done and
439    * we'll spend less time waiting on the GPU.
440    *
441    * Unfortunately, we don't have a handle to the batch containing
442    * the swap, and getting our hands on that doesn't seem worth it,
443    * so we just us the first batch we emitted after the last swap.
444    */
445   if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
446      drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
447      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
448      intel->first_post_swapbuffers_batch = NULL;
449      intel->need_throttle = GL_FALSE;
450   }
451}
452
453static void
454intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
455{
456    struct intel_context *intel = intel_context(ctx);
457    __DRIcontext *driContext = intel->driContext;
458
459    if (intel->saved_viewport)
460	intel->saved_viewport(ctx, x, y, w, h);
461
462    if (ctx->DrawBuffer->Name == 0) {
463       dri2InvalidateDrawable(driContext->driDrawablePriv);
464       dri2InvalidateDrawable(driContext->driReadablePriv);
465    }
466}
467
468static const struct dri_debug_control debug_control[] = {
469   { "tex",   DEBUG_TEXTURE},
470   { "state", DEBUG_STATE},
471   { "ioctl", DEBUG_IOCTL},
472   { "blit",  DEBUG_BLIT},
473   { "mip",   DEBUG_MIPTREE},
474   { "fall",  DEBUG_FALLBACKS},
475   { "verb",  DEBUG_VERBOSE},
476   { "bat",   DEBUG_BATCH},
477   { "pix",   DEBUG_PIXEL},
478   { "buf",   DEBUG_BUFMGR},
479   { "reg",   DEBUG_REGION},
480   { "fbo",   DEBUG_FBO},
481   { "gs",    DEBUG_GS},
482   { "sync",  DEBUG_SYNC},
483   { "prim",  DEBUG_PRIMS },
484   { "vert",  DEBUG_VERTS },
485   { "dri",   DEBUG_DRI },
486   { "sf",    DEBUG_SF },
487   { "san",   DEBUG_SANITY },
488   { "sleep", DEBUG_SLEEP },
489   { "stats", DEBUG_STATS },
490   { "tile",  DEBUG_TILE },
491   { "sing",  DEBUG_SINGLE_THREAD },
492   { "thre",  DEBUG_SINGLE_THREAD },
493   { "wm",    DEBUG_WM },
494   { "urb",   DEBUG_URB },
495   { "vs",    DEBUG_VS },
496   { "clip",  DEBUG_CLIP },
497   { NULL,    0 }
498};
499
500
501static void
502intelInvalidateState(struct gl_context * ctx, GLuint new_state)
503{
504    struct intel_context *intel = intel_context(ctx);
505
506   _swrast_InvalidateState(ctx, new_state);
507   _vbo_InvalidateState(ctx, new_state);
508
509   intel->NewGLState |= new_state;
510
511   if (intel->vtbl.invalidate_state)
512      intel->vtbl.invalidate_state( intel, new_state );
513}
514
515void
516intel_flush(struct gl_context *ctx)
517{
518   struct intel_context *intel = intel_context(ctx);
519
520   if (intel->Fallback)
521      _swrast_flush(ctx);
522
523   if (intel->gen < 4)
524      INTEL_FIREVERTICES(intel);
525
526   if (intel->batch.used)
527      intel_batchbuffer_flush(intel);
528}
529
530static void
531intel_glFlush(struct gl_context *ctx)
532{
533   struct intel_context *intel = intel_context(ctx);
534
535   intel_flush(ctx);
536   intel_flush_front(ctx);
537   if (intel->is_front_buffer_rendering)
538      intel->need_throttle = GL_TRUE;
539}
540
541void
542intelFinish(struct gl_context * ctx)
543{
544   struct intel_context *intel = intel_context(ctx);
545
546   intel_flush(ctx);
547   intel_flush_front(ctx);
548
549   if (intel->batch.last_bo)
550      drm_intel_bo_wait_rendering(intel->batch.last_bo);
551}
552
553void
554intelInitDriverFunctions(struct dd_function_table *functions)
555{
556   _mesa_init_driver_functions(functions);
557
558   functions->Flush = intel_glFlush;
559   functions->Finish = intelFinish;
560   functions->GetString = intelGetString;
561   functions->UpdateState = intelInvalidateState;
562
563   intelInitTextureFuncs(functions);
564   intelInitTextureImageFuncs(functions);
565   intelInitTextureSubImageFuncs(functions);
566   intelInitTextureCopyImageFuncs(functions);
567   intelInitStateFuncs(functions);
568   intelInitClearFuncs(functions);
569   intelInitBufferFuncs(functions);
570   intelInitPixelFuncs(functions);
571   intelInitBufferObjectFuncs(functions);
572   intel_init_syncobj_functions(functions);
573}
574
575GLboolean
576intelInitContext(struct intel_context *intel,
577		 int api,
578                 const struct gl_config * mesaVis,
579                 __DRIcontext * driContextPriv,
580                 void *sharedContextPrivate,
581                 struct dd_function_table *functions)
582{
583   struct gl_context *ctx = &intel->ctx;
584   struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
585   __DRIscreen *sPriv = driContextPriv->driScreenPriv;
586   struct intel_screen *intelScreen = sPriv->private;
587   int bo_reuse_mode;
588   struct gl_config visual;
589
590   /* we can't do anything without a connection to the device */
591   if (intelScreen->bufmgr == NULL)
592      return GL_FALSE;
593
594   /* Can't rely on invalidate events, fall back to glViewport hack */
595   if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
596      intel->saved_viewport = functions->Viewport;
597      functions->Viewport = intel_viewport;
598   }
599
600   if (mesaVis == NULL) {
601      memset(&visual, 0, sizeof visual);
602      mesaVis = &visual;
603   }
604
605   if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
606                                 functions, (void *) intel)) {
607      printf("%s: failed to init mesa context\n", __FUNCTION__);
608      return GL_FALSE;
609   }
610
611   driContextPriv->driverPrivate = intel;
612   intel->intelScreen = intelScreen;
613   intel->driContext = driContextPriv;
614   intel->driFd = sPriv->fd;
615
616   intel->has_xrgb_textures = GL_TRUE;
617   intel->gen = intelScreen->gen;
618   if (IS_GEN7(intel->intelScreen->deviceID)) {
619      intel->needs_ff_sync = GL_TRUE;
620      intel->has_luminance_srgb = GL_TRUE;
621   } else if (IS_GEN6(intel->intelScreen->deviceID)) {
622      intel->needs_ff_sync = GL_TRUE;
623      intel->has_luminance_srgb = GL_TRUE;
624   } else if (IS_GEN5(intel->intelScreen->deviceID)) {
625      intel->needs_ff_sync = GL_TRUE;
626      intel->has_luminance_srgb = GL_TRUE;
627   } else if (IS_965(intel->intelScreen->deviceID)) {
628      if (IS_G4X(intel->intelScreen->deviceID)) {
629	  intel->has_luminance_srgb = GL_TRUE;
630	  intel->is_g4x = GL_TRUE;
631      }
632   } else if (IS_9XX(intel->intelScreen->deviceID)) {
633      if (IS_945(intel->intelScreen->deviceID)) {
634	 intel->is_945 = GL_TRUE;
635      }
636   } else {
637      if (intel->intelScreen->deviceID == PCI_CHIP_I830_M ||
638	  intel->intelScreen->deviceID == PCI_CHIP_845_G) {
639	 intel->has_xrgb_textures = GL_FALSE;
640      }
641   }
642
643   intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
644   intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
645   intel->has_hiz = intel->intelScreen->hw_has_hiz;
646
647   memset(&ctx->TextureFormatSupported, 0,
648	  sizeof(ctx->TextureFormatSupported));
649   ctx->TextureFormatSupported[MESA_FORMAT_ARGB8888] = GL_TRUE;
650   if (intel->has_xrgb_textures)
651      ctx->TextureFormatSupported[MESA_FORMAT_XRGB8888] = GL_TRUE;
652   ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = GL_TRUE;
653   ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = GL_TRUE;
654   ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = GL_TRUE;
655   ctx->TextureFormatSupported[MESA_FORMAT_L8] = GL_TRUE;
656   ctx->TextureFormatSupported[MESA_FORMAT_A8] = GL_TRUE;
657   ctx->TextureFormatSupported[MESA_FORMAT_I8] = GL_TRUE;
658   ctx->TextureFormatSupported[MESA_FORMAT_AL88] = GL_TRUE;
659   if (intel->gen >= 4)
660      ctx->TextureFormatSupported[MESA_FORMAT_AL1616] = GL_TRUE;
661
662   /* Depth and stencil */
663   ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = GL_TRUE;
664   ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = GL_TRUE;
665   ctx->TextureFormatSupported[MESA_FORMAT_S8] = intel->has_separate_stencil;
666
667   /*
668    * This was disabled in initial FBO enabling to avoid combinations
669    * of depth+stencil that wouldn't work together.  We since decided
670    * that it was OK, since it's up to the app to come up with the
671    * combo that actually works, so this can probably be re-enabled.
672    */
673   /*
674   ctx->TextureFormatSupported[MESA_FORMAT_Z16] = GL_TRUE;
675   ctx->TextureFormatSupported[MESA_FORMAT_Z24] = GL_TRUE;
676   */
677
678   /* ctx->Extensions.MESA_ycbcr_texture */
679   ctx->TextureFormatSupported[MESA_FORMAT_YCBCR] = GL_TRUE;
680   ctx->TextureFormatSupported[MESA_FORMAT_YCBCR_REV] = GL_TRUE;
681
682   /* GL_3DFX_texture_compression_FXT1 */
683   ctx->TextureFormatSupported[MESA_FORMAT_RGB_FXT1] = GL_TRUE;
684   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FXT1] = GL_TRUE;
685
686   /* GL_EXT_texture_compression_s3tc */
687   ctx->TextureFormatSupported[MESA_FORMAT_RGB_DXT1] = GL_TRUE;
688   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT1] = GL_TRUE;
689   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT3] = GL_TRUE;
690   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT5] = GL_TRUE;
691
692#ifndef I915
693   /* GL_ARB_texture_compression_rgtc */
694   ctx->TextureFormatSupported[MESA_FORMAT_RED_RGTC1] = GL_TRUE;
695   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RED_RGTC1] = GL_TRUE;
696   ctx->TextureFormatSupported[MESA_FORMAT_RG_RGTC2] = GL_TRUE;
697   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG_RGTC2] = GL_TRUE;
698
699   /* GL_ARB_texture_rg */
700   ctx->TextureFormatSupported[MESA_FORMAT_R8] = GL_TRUE;
701   ctx->TextureFormatSupported[MESA_FORMAT_R16] = GL_TRUE;
702   ctx->TextureFormatSupported[MESA_FORMAT_RG88] = GL_TRUE;
703   ctx->TextureFormatSupported[MESA_FORMAT_RG1616] = GL_TRUE;
704
705   /* GL_MESA_texture_signed_rgba / GL_EXT_texture_snorm */
706   ctx->TextureFormatSupported[MESA_FORMAT_DUDV8] = GL_TRUE;
707   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RGBA8888_REV] = GL_TRUE;
708   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R8] = GL_TRUE;
709   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG88_REV] = GL_TRUE;
710   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R16] = GL_TRUE;
711   ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_GR1616] = GL_TRUE;
712
713   /* GL_EXT_texture_sRGB */
714   ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = GL_TRUE;
715   if (intel->gen >= 5 || intel->is_g4x)
716      ctx->TextureFormatSupported[MESA_FORMAT_SRGB_DXT1] = GL_TRUE;
717   ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT1] = GL_TRUE;
718   ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT3] = GL_TRUE;
719   ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT5] = GL_TRUE;
720   if (intel->has_luminance_srgb) {
721      ctx->TextureFormatSupported[MESA_FORMAT_SL8] = GL_TRUE;
722      ctx->TextureFormatSupported[MESA_FORMAT_SLA8] = GL_TRUE;
723   }
724
725#ifdef TEXTURE_FLOAT_ENABLED
726   ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FLOAT32] = GL_TRUE;
727   ctx->TextureFormatSupported[MESA_FORMAT_RG_FLOAT32] = GL_TRUE;
728   ctx->TextureFormatSupported[MESA_FORMAT_R_FLOAT32] = GL_TRUE;
729   ctx->TextureFormatSupported[MESA_FORMAT_INTENSITY_FLOAT32] = GL_TRUE;
730   ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_FLOAT32] = GL_TRUE;
731   ctx->TextureFormatSupported[MESA_FORMAT_ALPHA_FLOAT32] = GL_TRUE;
732   ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32] = GL_TRUE;
733#endif
734
735#endif /* !I915 */
736
737   driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
738                       sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
739   if (intel->gen < 4)
740      intel->maxBatchSize = 4096;
741   else
742      intel->maxBatchSize = sizeof(intel->batch.map);
743
744   intel->bufmgr = intelScreen->bufmgr;
745
746   bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
747   switch (bo_reuse_mode) {
748   case DRI_CONF_BO_REUSE_DISABLED:
749      break;
750   case DRI_CONF_BO_REUSE_ALL:
751      intel_bufmgr_gem_enable_reuse(intel->bufmgr);
752      break;
753   }
754
755   /* This doesn't yet catch all non-conformant rendering, but it's a
756    * start.
757    */
758   if (getenv("INTEL_STRICT_CONFORMANCE")) {
759      unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
760      if (value > 0) {
761         intel->conformance_mode = value;
762      }
763      else {
764         intel->conformance_mode = 1;
765      }
766   }
767
768   if (intel->conformance_mode > 0) {
769      ctx->Const.MinLineWidth = 1.0;
770      ctx->Const.MinLineWidthAA = 1.0;
771      ctx->Const.MaxLineWidth = 1.0;
772      ctx->Const.MaxLineWidthAA = 1.0;
773      ctx->Const.LineWidthGranularity = 1.0;
774   }
775   else {
776      ctx->Const.MinLineWidth = 1.0;
777      ctx->Const.MinLineWidthAA = 1.0;
778      ctx->Const.MaxLineWidth = 5.0;
779      ctx->Const.MaxLineWidthAA = 5.0;
780      ctx->Const.LineWidthGranularity = 0.5;
781   }
782
783   ctx->Const.MinPointSize = 1.0;
784   ctx->Const.MinPointSizeAA = 1.0;
785   ctx->Const.MaxPointSize = 255.0;
786   ctx->Const.MaxPointSizeAA = 3.0;
787   ctx->Const.PointSizeGranularity = 1.0;
788
789   ctx->Const.MaxSamples = 1.0;
790
791   /* reinitialize the context point state.
792    * It depend on constants in __struct gl_contextRec::Const
793    */
794   _mesa_init_point(ctx);
795
796   if (intel->gen >= 4) {
797      ctx->Const.sRGBCapable = GL_TRUE;
798      if (MAX_WIDTH > 8192)
799	 ctx->Const.MaxRenderbufferSize = 8192;
800   } else {
801      if (MAX_WIDTH > 2048)
802	 ctx->Const.MaxRenderbufferSize = 2048;
803   }
804
805   /* Initialize the software rasterizer and helper modules. */
806   _swrast_CreateContext(ctx);
807   _vbo_CreateContext(ctx);
808   _tnl_CreateContext(ctx);
809   _swsetup_CreateContext(ctx);
810
811   /* Configure swrast to match hardware characteristics: */
812   _swrast_allow_pixel_fog(ctx, GL_FALSE);
813   _swrast_allow_vertex_fog(ctx, GL_TRUE);
814
815   _mesa_meta_init(ctx);
816
817   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
818   intel->hw_stipple = 1;
819
820   /* XXX FBO: this doesn't seem to be used anywhere */
821   switch (mesaVis->depthBits) {
822   case 0:                     /* what to do in this case? */
823   case 16:
824      intel->polygon_offset_scale = 1.0;
825      break;
826   case 24:
827      intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
828      break;
829   default:
830      assert(0);
831      break;
832   }
833
834   if (intel->gen >= 4)
835      intel->polygon_offset_scale /= 0xffff;
836
837   intel->RenderIndex = ~0;
838
839   switch (ctx->API) {
840   case API_OPENGL:
841      intelInitExtensions(ctx);
842      break;
843   case API_OPENGLES:
844      intelInitExtensionsES1(ctx);
845      break;
846   case API_OPENGLES2:
847      intelInitExtensionsES2(ctx);
848      break;
849   }
850
851   INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
852   if (INTEL_DEBUG & DEBUG_BUFMGR)
853      dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
854
855   intel_batchbuffer_init(intel);
856
857   intel_fbo_init(intel);
858
859   if (intel->ctx.Mesa_DXTn) {
860      _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
861      _mesa_enable_extension(ctx, "GL_S3_s3tc");
862   }
863   else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
864      _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
865   }
866   intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
867					       "texture_tiling");
868   intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
869
870   intel->prim.primitive = ~0;
871
872   /* Force all software fallbacks */
873   if (driQueryOptionb(&intel->optionCache, "no_rast")) {
874      fprintf(stderr, "disabling 3D rasterization\n");
875      intel->no_rast = 1;
876   }
877
878   if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
879      fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
880      intel->always_flush_batch = 1;
881   }
882
883   if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
884      fprintf(stderr, "flushing GPU caches before/after each draw call\n");
885      intel->always_flush_cache = 1;
886   }
887
888   return GL_TRUE;
889}
890
891void
892intelDestroyContext(__DRIcontext * driContextPriv)
893{
894   struct intel_context *intel =
895      (struct intel_context *) driContextPriv->driverPrivate;
896
897   assert(intel);               /* should never be null */
898   if (intel) {
899      INTEL_FIREVERTICES(intel);
900
901      _mesa_meta_free(&intel->ctx);
902
903      intel->vtbl.destroy(intel);
904
905      _swsetup_DestroyContext(&intel->ctx);
906      _tnl_DestroyContext(&intel->ctx);
907      _vbo_DestroyContext(&intel->ctx);
908
909      _swrast_DestroyContext(&intel->ctx);
910      intel->Fallback = 0x0;      /* don't call _swrast_Flush later */
911
912      intel_batchbuffer_free(intel);
913
914      free(intel->prim.vb);
915      intel->prim.vb = NULL;
916      drm_intel_bo_unreference(intel->prim.vb_bo);
917      intel->prim.vb_bo = NULL;
918      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
919      intel->first_post_swapbuffers_batch = NULL;
920
921      driDestroyOptionCache(&intel->optionCache);
922
923      /* free the Mesa context */
924      _mesa_free_context_data(&intel->ctx);
925
926      _math_matrix_dtr(&intel->ViewportMatrix);
927
928      ralloc_free(intel);
929      driContextPriv->driverPrivate = NULL;
930   }
931}
932
933GLboolean
934intelUnbindContext(__DRIcontext * driContextPriv)
935{
936   /* Unset current context and dispath table */
937   _mesa_make_current(NULL, NULL, NULL);
938
939   return GL_TRUE;
940}
941
942GLboolean
943intelMakeCurrent(__DRIcontext * driContextPriv,
944                 __DRIdrawable * driDrawPriv,
945                 __DRIdrawable * driReadPriv)
946{
947   struct intel_context *intel;
948   GET_CURRENT_CONTEXT(curCtx);
949
950   if (driContextPriv)
951      intel = (struct intel_context *) driContextPriv->driverPrivate;
952   else
953      intel = NULL;
954
955   /* According to the glXMakeCurrent() man page: "Pending commands to
956    * the previous context, if any, are flushed before it is released."
957    * But only flush if we're actually changing contexts.
958    */
959   if (intel_context(curCtx) && intel_context(curCtx) != intel) {
960      _mesa_flush(curCtx);
961   }
962
963   if (driContextPriv) {
964      struct gl_framebuffer *fb, *readFb;
965
966      if (driDrawPriv == NULL && driReadPriv == NULL) {
967	 fb = _mesa_get_incomplete_framebuffer();
968	 readFb = _mesa_get_incomplete_framebuffer();
969      } else {
970	 fb = driDrawPriv->driverPrivate;
971	 readFb = driReadPriv->driverPrivate;
972	 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
973	 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
974      }
975
976      intel_prepare_render(intel);
977      _mesa_make_current(&intel->ctx, fb, readFb);
978
979      /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
980       * is NULL at that point.  We can't call _mesa_makecurrent()
981       * first, since we need the buffer size for the initial
982       * viewport.  So just call intel_draw_buffer() again here. */
983      intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
984   }
985   else {
986      _mesa_make_current(NULL, NULL, NULL);
987   }
988
989   return GL_TRUE;
990}
991
992/**
993 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
994 *
995 * To determine which DRI buffers to request, examine the renderbuffers
996 * attached to the drawable's framebuffer. Then request the buffers with
997 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
998 *
999 * This is called from intel_update_renderbuffers(). It is used only if either
1000 * the hardware or the X driver lacks separate stencil support.
1001 *
1002 * \param drawable      Drawable whose buffers are queried.
1003 * \param buffers       [out] List of buffers returned by DRI2 query.
1004 * \param buffer_count  [out] Number of buffers returned.
1005 *
1006 * \see intel_update_renderbuffers()
1007 * \see DRI2GetBuffers()
1008 * \see DRI2GetBuffersWithFormat()
1009 */
1010static void
1011intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
1012					     __DRIdrawable *drawable,
1013					     __DRIbuffer **buffers,
1014					     int *buffer_count)
1015{
1016   assert(!intel->must_use_separate_stencil);
1017
1018   __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1019   struct gl_framebuffer *fb = drawable->driverPrivate;
1020
1021   if (screen->dri2.loader
1022       && screen->dri2.loader->base.version > 2
1023       && screen->dri2.loader->getBuffersWithFormat != NULL) {
1024
1025      int i = 0;
1026      const int max_attachments = 4;
1027      unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1028
1029      struct intel_renderbuffer *front_rb;
1030      struct intel_renderbuffer *back_rb;
1031      struct intel_renderbuffer *depth_rb;
1032      struct intel_renderbuffer *stencil_rb;
1033
1034      front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1035      back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1036      depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1037      stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1038
1039      if ((intel->is_front_buffer_rendering ||
1040	   intel->is_front_buffer_reading ||
1041	   !back_rb) && front_rb) {
1042	 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1043	 attachments[i++] = intel_bits_per_pixel(front_rb);
1044      }
1045
1046      if (back_rb) {
1047	 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1048	 attachments[i++] = intel_bits_per_pixel(back_rb);
1049      }
1050
1051      if (depth_rb && stencil_rb) {
1052	 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
1053	 attachments[i++] = intel_bits_per_pixel(depth_rb);
1054      } else if (depth_rb) {
1055	 attachments[i++] = __DRI_BUFFER_DEPTH;
1056	 attachments[i++] = intel_bits_per_pixel(depth_rb);
1057      } else if (stencil_rb) {
1058	 attachments[i++] = __DRI_BUFFER_STENCIL;
1059	 attachments[i++] = intel_bits_per_pixel(stencil_rb);
1060      }
1061
1062      assert(i <= 2 * max_attachments);
1063
1064      *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1065							   &drawable->w,
1066							   &drawable->h,
1067							   attachments, i / 2,
1068							   buffer_count,
1069							   drawable->loaderPrivate);
1070      free(attachments);
1071
1072   } else if (screen->dri2.loader) {
1073
1074      int i = 0;
1075      const int max_attachments = 4;
1076      unsigned *attachments = calloc(max_attachments, sizeof(unsigned));
1077
1078      if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
1079	 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1080      if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
1081	 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1082      if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
1083	 attachments[i++] = __DRI_BUFFER_DEPTH;
1084      if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
1085	 attachments[i++] = __DRI_BUFFER_STENCIL;
1086
1087      assert(i <= max_attachments);
1088
1089      *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1090							   &drawable->w,
1091							   &drawable->h,
1092							   attachments, i,
1093							   buffer_count,
1094							   drawable->loaderPrivate);
1095      free(attachments);
1096
1097   } else {
1098      *buffers = NULL;
1099      *buffer_count = 0;
1100   }
1101}
1102
1103/**
1104 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1105 *
1106 * This is called from intel_update_renderbuffers().  It is used only if
1107 * either the hardware or the X driver lacks separate stencil support.
1108 *
1109 * \par Note:
1110 *    DRI buffers whose attachment point is DRI2BufferStencil or
1111 *    DRI2BufferDepthStencil are handled as special cases.
1112 *
1113 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1114 *        that is passed to intel_region_alloc_for_handle().
1115 *
1116 * \see intel_update_renderbuffers()
1117 * \see intel_region_alloc_for_handle()
1118 */
1119static void
1120intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
1121					      __DRIdrawable *drawable,
1122					      __DRIbuffer *buffer,
1123					      struct intel_renderbuffer *rb,
1124					      const char *buffer_name)
1125{
1126   assert(!intel->must_use_separate_stencil);
1127
1128   struct gl_framebuffer *fb = drawable->driverPrivate;
1129   struct intel_renderbuffer *depth_rb = NULL;
1130
1131   if (!rb)
1132      return;
1133
1134   if (rb->region && rb->region->name == buffer->name)
1135      return;
1136
1137   if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1138      fprintf(stderr,
1139	      "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1140	      buffer->name, buffer->attachment,
1141	      buffer->cpp, buffer->pitch);
1142   }
1143
1144   bool identify_depth_and_stencil = false;
1145   if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1146      struct intel_renderbuffer *depth_rb =
1147	 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1148      identify_depth_and_stencil = depth_rb && depth_rb->region;
1149   }
1150
1151   if (identify_depth_and_stencil) {
1152      if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1153	 fprintf(stderr, "(reusing depth buffer as stencil)\n");
1154      }
1155      intel_region_reference(&rb->region, depth_rb->region);
1156   } else {
1157      intel_region_release(&rb->region);
1158      rb->region = intel_region_alloc_for_handle(intel->intelScreen,
1159						 buffer->cpp,
1160						 drawable->w,
1161						 drawable->h,
1162						 buffer->pitch / buffer->cpp,
1163						 buffer->name,
1164						 buffer_name);
1165   }
1166
1167   if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1168      struct intel_renderbuffer *stencil_rb =
1169	 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1170
1171      if (!stencil_rb)
1172	 return;
1173
1174      /* The rb passed in is the BUFFER_DEPTH attachment, and we need
1175       * to associate this region to BUFFER_STENCIL as well.
1176       */
1177      intel_region_reference(&stencil_rb->region, rb->region);
1178   }
1179}
1180
1181/**
1182 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1183 *
1184 * To determine which DRI buffers to request, examine the renderbuffers
1185 * attached to the drawable's framebuffer. Then request the buffers with
1186 * DRI2GetBuffersWithFormat().
1187 *
1188 * This is called from intel_update_renderbuffers(). It is used when 1) the
1189 * hardware supports separate stencil and 2) the X driver's separate stencil
1190 * support has been verified to work or is still unknown.
1191 *
1192 * \param drawable      Drawable whose buffers are queried.
1193 * \param buffers       [out] List of buffers returned by DRI2 query.
1194 * \param buffer_count  [out] Number of buffers returned.
1195 * \param attachments   [out] List of pairs (attachment_point, bits_per_pixel)
1196 *                      that were submitted in the DRI2 query. Number of pairs
1197 *                      is same as buffer_count.
1198 *
1199 * \see intel_update_renderbuffers()
1200 * \see DRI2GetBuffersWithFormat()
1201 * \see enum intel_dri2_has_hiz
1202 */
1203static void
1204intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
1205					       __DRIdrawable *drawable,
1206					       __DRIbuffer **buffers,
1207					       unsigned **attachments,
1208					       int *count)
1209{
1210   assert(intel->has_separate_stencil);
1211
1212   __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1213   struct gl_framebuffer *fb = drawable->driverPrivate;
1214
1215   const int max_attachments = 5;
1216   int i = 0;
1217
1218   *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1219   if (!*attachments) {
1220      *buffers = NULL;
1221      *count = 0;
1222      return;
1223   }
1224
1225   struct intel_renderbuffer *front_rb;
1226   struct intel_renderbuffer *back_rb;
1227   struct intel_renderbuffer *depth_rb;
1228   struct intel_renderbuffer *stencil_rb;
1229
1230   front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1231   back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1232   depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1233   stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1234
1235   if ((intel->is_front_buffer_rendering ||
1236	intel->is_front_buffer_reading ||
1237	!back_rb) && front_rb) {
1238      (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT;
1239      (*attachments)[i++] = intel_bits_per_pixel(front_rb);
1240   }
1241
1242   if (back_rb) {
1243      (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT;
1244      (*attachments)[i++] = intel_bits_per_pixel(back_rb);
1245   }
1246
1247   /*
1248    * We request a separate stencil buffer, and perhaps a hiz buffer too, even
1249    * if we do not yet know if the X driver supports it. See the comments for
1250    * 'enum intel_dri2_has_hiz'.
1251    */
1252
1253   if (depth_rb) {
1254      (*attachments)[i++] = __DRI_BUFFER_DEPTH;
1255      (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1256
1257      if (intel->vtbl.is_hiz_depth_format(intel, depth_rb->Base.Format)) {
1258	 /* Depth and hiz buffer have same bpp. */
1259	 (*attachments)[i++] = __DRI_BUFFER_HIZ;
1260	 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1261      }
1262   }
1263
1264   if (stencil_rb) {
1265      assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1266      (*attachments)[i++] = __DRI_BUFFER_STENCIL;
1267      (*attachments)[i++] = intel_bits_per_pixel(stencil_rb);
1268   }
1269
1270   assert(i <= 2 * max_attachments);
1271
1272   *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1273							&drawable->w,
1274							&drawable->h,
1275							*attachments, i / 2,
1276							count,
1277							drawable->loaderPrivate);
1278
1279   if (!*buffers) {
1280      free(*attachments);
1281      *attachments = NULL;
1282      *count = 0;
1283   }
1284}
1285
1286/**
1287 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1288 *
1289 * This is called from intel_update_renderbuffers().  It is used when 1) the
1290 * hardware supports separate stencil and 2) the X driver's separate stencil
1291 * support has been verified to work or is still unknown.
1292 *
1293 * \par Note:
1294 *    DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz
1295 *    are handled as special cases.
1296 *
1297 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1298 *        that is passed to intel_region_alloc_for_handle().
1299 *
1300 * \see intel_update_renderbuffers()
1301 * \see intel_region_alloc_for_handle()
1302 * \see enum intel_dri2_has_hiz
1303 */
1304static void
1305intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
1306						__DRIdrawable *drawable,
1307						__DRIbuffer *buffer,
1308						struct intel_renderbuffer *rb,
1309						const char *buffer_name)
1310{
1311   assert(intel->has_separate_stencil);
1312   assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL);
1313
1314   if (!rb)
1315      return;
1316
1317   /* If the renderbuffer's and DRIbuffer's regions match, then continue. */
1318   if ((buffer->attachment != __DRI_BUFFER_HIZ &&
1319	rb->region &&
1320	rb->region->name == buffer->name) ||
1321       (buffer->attachment == __DRI_BUFFER_HIZ &&
1322	rb->hiz_region &&
1323	rb->hiz_region->name == buffer->name)) {
1324      return;
1325   }
1326
1327   if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1328      fprintf(stderr,
1329	      "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1330	      buffer->name, buffer->attachment,
1331	      buffer->cpp, buffer->pitch);
1332   }
1333
1334   /*
1335    * The stencil buffer has quirky pitch requirements.  From Section
1336    * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
1337    *    The pitch must be set to 2x the value computed based on width, as
1338    *    the stencil buffer is stored with two rows interleaved.
1339    * If we neglect to double the pitch, then drm_intel_gem_bo_map_gtt()
1340    * maps the memory incorrectly.
1341    *
1342    * To satisfy the pitch requirement, the X driver hackishly allocated
1343    * the gem buffer with bpp doubled and height halved. So buffer->cpp is
1344    * correct, but drawable->height is not.
1345    */
1346   int buffer_height = drawable->h;
1347   if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1348      buffer_height /= 2;
1349   }
1350
1351   struct intel_region *region =
1352      intel_region_alloc_for_handle(intel->intelScreen,
1353				    buffer->cpp,
1354				    drawable->w,
1355				    buffer_height,
1356				    buffer->pitch / buffer->cpp,
1357				    buffer->name,
1358				    buffer_name);
1359
1360   if (buffer->attachment == __DRI_BUFFER_HIZ) {
1361      intel_region_reference(&rb->hiz_region, region);
1362   } else {
1363      intel_region_reference(&rb->region, region);
1364   }
1365
1366   intel_region_release(&region);
1367}
1368
1369/**
1370 * \brief Verify that the X driver supports hiz and separate stencil.
1371 *
1372 * This implements the cleanup stage of the handshake described in the
1373 * comments for 'enum intel_dri2_has_hiz'.
1374 *
1375 * This should be called from intel_update_renderbuffers() after 1) the
1376 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat()
1377 * and 2) the DRM region of each returned DRIbuffer has been assigned to the
1378 * appropriate intel_renderbuffer. Furthermore, this should be called *only*
1379 * when 1) intel_update_renderbuffers() tried to used the X driver's separate
1380 * stencil functionality and 2) it has not yet been determined if the X driver
1381 * supports separate stencil.
1382 *
1383 * If we determine that the X driver does have support, then we set
1384 * intel_screen.dri2_has_hiz to true and return.
1385 *
1386 * If we determine that the X driver lacks support, and we requested
1387 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by
1388 * taking the following actions:
1389 *    1. Discard the framebuffer's stencil and depth renderbuffers.
1390 *    2. Create a combined depth/stencil renderbuffer and attach
1391 *       it to the framebuffer's depth and stencil attachment points.
1392 *    3. Query the drawable for a new set of buffers, which consists of the
1393 *       originally requested set plus DRI2BufferDepthStencil.
1394 *    4. Assign the DRI2BufferDepthStencil's DRM region to the new
1395 *       depth/stencil renderbuffer.
1396 *
1397 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN
1398 *
1399 * \param drawable      Drawable whose buffers were queried.
1400 *
1401 * \param buffers       [in/out] As input, the buffer list returned by the
1402 *                      original DRI2 query. As output, the current buffer
1403 *                      list, which may have been altered by a new DRI2 query.
1404 *
1405 * \param attachments   [in/out] As input, the attachment list submitted
1406 *                      in the original DRI2 query. As output, the attachment
1407 *                      list that was submitted in the DRI2 query that
1408 *                      obtained the current buffer list, as returned in the
1409 *                      output parameter \c buffers.  (Note: If no new query
1410 *                      was made, then the list remains unaltered).
1411 *
1412 * \param count         [out] Number of buffers in the current buffer list, as
1413 *                      returned in the output parameter \c buffers.
1414 *
1415 * \see enum intel_dri2_has_hiz
1416 * \see struct intel_screen::dri2_has_hiz
1417 * \see intel_update_renderbuffers
1418 */
1419static void
1420intel_verify_dri2_has_hiz(struct intel_context *intel,
1421			  __DRIdrawable *drawable,
1422			  __DRIbuffer **buffers,
1423			  unsigned **attachments,
1424			  int *count)
1425{
1426   assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN);
1427
1428   struct gl_framebuffer *fb = drawable->driverPrivate;
1429   struct intel_renderbuffer *stencil_rb =
1430      intel_get_renderbuffer(fb, BUFFER_STENCIL);
1431
1432   if (stencil_rb) {
1433      /*
1434       * We requested a DRI2BufferStencil without knowing if the X driver
1435       * supports it. Now, check if X handled the request correctly and clean
1436       * up if it did not. (See comments for 'enum intel_dri2_has_hiz').
1437       */
1438      struct intel_renderbuffer *depth_rb =
1439	 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1440      assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1441      assert(depth_rb && depth_rb->Base.Format == MESA_FORMAT_X8_Z24);
1442
1443      if (stencil_rb->region->tiling == I915_TILING_NONE) {
1444	 /*
1445	  * The stencil buffer is actually W tiled. The region's tiling is
1446	  * I915_TILING_NONE, however, because the GTT is incapable of W
1447	  * fencing.
1448	  */
1449	 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE;
1450	 return;
1451      } else {
1452	 /*
1453	  * Oops... the screen doesn't support separate stencil. Discard the
1454	  * separate depth and stencil buffers and replace them with
1455	  * a combined depth/stencil buffer. Discard the hiz buffer too.
1456	  */
1457	 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE;
1458	 if (intel->must_use_separate_stencil) {
1459	    _mesa_problem(&intel->ctx,
1460			  "intel_context requires separate stencil, but the "
1461			  "DRIscreen does not support it. You may need to "
1462			  "upgrade the Intel X driver to 2.16.0");
1463	    abort();
1464	 }
1465
1466	 /* 1. Discard depth and stencil renderbuffers. */
1467	 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH);
1468	 depth_rb = NULL;
1469	 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL);
1470	 stencil_rb = NULL;
1471
1472	 /* 2. Create new depth/stencil renderbuffer. */
1473	 struct intel_renderbuffer *depth_stencil_rb =
1474	    intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
1475	 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base);
1476	 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base);
1477
1478	 /* 3. Append DRI2BufferDepthStencil to attachment list. */
1479	 int old_count = *count;
1480	 unsigned int *old_attachments = *attachments;
1481	 *count = old_count + 1;
1482	 *attachments = malloc(2 * (*count) * sizeof(unsigned));
1483	 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned));
1484	 free(old_attachments);
1485	 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL;
1486	 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb);
1487
1488	 /* 4. Request new set of DRI2 attachments. */
1489	 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1490	 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1491							      &drawable->w,
1492							      &drawable->h,
1493							      *attachments,
1494							      *count,
1495							      count,
1496							      drawable->loaderPrivate);
1497	 if (!*buffers)
1498	    return;
1499
1500	 /*
1501	  * I don't know how to recover from the failure assertion below.
1502	  * Rather than fail gradually and unexpectedly, we should just die
1503	  * now.
1504	  */
1505	 assert(*count == old_count + 1);
1506
1507	 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */
1508	 __DRIbuffer *depth_stencil_buffer = NULL;
1509	 for (int i = 0; i < *count; ++i) {
1510	    if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1511	       depth_stencil_buffer = &(*buffers)[i];
1512	       break;
1513	    }
1514	 }
1515	 struct intel_region *region =
1516	    intel_region_alloc_for_handle(intel->intelScreen,
1517					  depth_stencil_buffer->cpp,
1518					  drawable->w,
1519					  drawable->h,
1520					  depth_stencil_buffer->pitch
1521					     / depth_stencil_buffer->cpp,
1522					  depth_stencil_buffer->name,
1523					  "dri2 depth / stencil buffer");
1524	 intel_region_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->region,
1525				region);
1526	 intel_region_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->region,
1527				region);
1528	 intel_region_release(&region);
1529      }
1530   }
1531
1532   if (intel_framebuffer_has_hiz(fb)) {
1533      /*
1534       * In the future, the driver may advertise a GL config with hiz
1535       * compatible depth bits and 0 stencil bits (for example, when the
1536       * driver gains support for float32 depth buffers). When that day comes,
1537       * here we need to verify that the X driver does in fact support hiz and
1538       * clean up if it doesn't.
1539       *
1540       * Presently, however, no verification or clean up is necessary, and
1541       * execution should not reach here. If the framebuffer still has a hiz
1542       * region, then we have already set dri2_has_hiz to true after
1543       * confirming above that the stencil buffer is W tiled.
1544       */
1545      assert(0);
1546   }
1547}
1548