intel_context.c revision 79198063b8adb23536b291081f8df8571926950e 
1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29#include "main/glheader.h"
30#include "main/context.h"
31#include "main/extensions.h"
32#include "main/fbobject.h"
33#include "main/framebuffer.h"
34#include "main/imports.h"
35#include "main/points.h"
36#include "main/renderbuffer.h"
37
38#include "swrast/swrast.h"
39#include "swrast_setup/swrast_setup.h"
40#include "tnl/tnl.h"
41#include "drivers/common/driverfuncs.h"
42#include "drivers/common/meta.h"
43
44#include "intel_chipset.h"
45#include "intel_buffers.h"
46#include "intel_tex.h"
47#include "intel_batchbuffer.h"
48#include "intel_clear.h"
49#include "intel_extensions.h"
50#include "intel_pixel.h"
51#include "intel_regions.h"
52#include "intel_buffer_objects.h"
53#include "intel_fbo.h"
54#include "intel_bufmgr.h"
55#include "intel_screen.h"
56#include "intel_mipmap_tree.h"
57
58#include "utils.h"
59#include "../glsl/ralloc.h"
60
61#ifndef INTEL_DEBUG
62int INTEL_DEBUG = (0);
63#endif
64
65
66static const GLubyte *
67intelGetString(struct gl_context * ctx, GLenum name)
68{
69   const struct intel_context *const intel = intel_context(ctx);
70   const char *chipset;
71   static char buffer[128];
72
73   switch (name) {
74   case GL_VENDOR:
75      return (GLubyte *) "Intel Open Source Technology Center";
76      break;
77
78   case GL_RENDERER:
79      switch (intel->intelScreen->deviceID) {
80      case PCI_CHIP_845_G:
81         chipset = "Intel(R) 845G";
82         break;
83      case PCI_CHIP_I830_M:
84         chipset = "Intel(R) 830M";
85         break;
86      case PCI_CHIP_I855_GM:
87         chipset = "Intel(R) 852GM/855GM";
88         break;
89      case PCI_CHIP_I865_G:
90         chipset = "Intel(R) 865G";
91         break;
92      case PCI_CHIP_I915_G:
93         chipset = "Intel(R) 915G";
94         break;
95      case PCI_CHIP_E7221_G:
96	 chipset = "Intel (R) E7221G (i915)";
97	 break;
98      case PCI_CHIP_I915_GM:
99         chipset = "Intel(R) 915GM";
100         break;
101      case PCI_CHIP_I945_G:
102         chipset = "Intel(R) 945G";
103         break;
104      case PCI_CHIP_I945_GM:
105         chipset = "Intel(R) 945GM";
106         break;
107      case PCI_CHIP_I945_GME:
108         chipset = "Intel(R) 945GME";
109         break;
110      case PCI_CHIP_G33_G:
111	 chipset = "Intel(R) G33";
112	 break;
113      case PCI_CHIP_Q35_G:
114	 chipset = "Intel(R) Q35";
115	 break;
116      case PCI_CHIP_Q33_G:
117	 chipset = "Intel(R) Q33";
118	 break;
119      case PCI_CHIP_IGD_GM:
120      case PCI_CHIP_IGD_G:
121	 chipset = "Intel(R) IGD";
122	 break;
123      case PCI_CHIP_I965_Q:
124	 chipset = "Intel(R) 965Q";
125	 break;
126      case PCI_CHIP_I965_G:
127      case PCI_CHIP_I965_G_1:
128	 chipset = "Intel(R) 965G";
129	 break;
130      case PCI_CHIP_I946_GZ:
131	 chipset = "Intel(R) 946GZ";
132	 break;
133      case PCI_CHIP_I965_GM:
134	 chipset = "Intel(R) 965GM";
135	 break;
136      case PCI_CHIP_I965_GME:
137	 chipset = "Intel(R) 965GME/GLE";
138	 break;
139      case PCI_CHIP_GM45_GM:
140	 chipset = "Mobile Intel® GM45 Express Chipset";
141	 break;
142      case PCI_CHIP_IGD_E_G:
143	 chipset = "Intel(R) Integrated Graphics Device";
144	 break;
145      case PCI_CHIP_G45_G:
146         chipset = "Intel(R) G45/G43";
147         break;
148      case PCI_CHIP_Q45_G:
149         chipset = "Intel(R) Q45/Q43";
150         break;
151      case PCI_CHIP_G41_G:
152         chipset = "Intel(R) G41";
153         break;
154      case PCI_CHIP_B43_G:
155      case PCI_CHIP_B43_G1:
156         chipset = "Intel(R) B43";
157         break;
158      case PCI_CHIP_ILD_G:
159         chipset = "Intel(R) Ironlake Desktop";
160         break;
161      case PCI_CHIP_ILM_G:
162         chipset = "Intel(R) Ironlake Mobile";
163         break;
164      case PCI_CHIP_SANDYBRIDGE_GT1:
165      case PCI_CHIP_SANDYBRIDGE_GT2:
166      case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167	 chipset = "Intel(R) Sandybridge Desktop";
168	 break;
169      case PCI_CHIP_SANDYBRIDGE_M_GT1:
170      case PCI_CHIP_SANDYBRIDGE_M_GT2:
171      case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172	 chipset = "Intel(R) Sandybridge Mobile";
173	 break;
174      case PCI_CHIP_SANDYBRIDGE_S:
175	 chipset = "Intel(R) Sandybridge Server";
176	 break;
177      case PCI_CHIP_IVYBRIDGE_GT1:
178      case PCI_CHIP_IVYBRIDGE_GT2:
179	 chipset = "Intel(R) Ivybridge Desktop";
180	 break;
181      case PCI_CHIP_IVYBRIDGE_M_GT1:
182      case PCI_CHIP_IVYBRIDGE_M_GT2:
183	 chipset = "Intel(R) Ivybridge Mobile";
184	 break;
185      case PCI_CHIP_IVYBRIDGE_S_GT1:
186      case PCI_CHIP_IVYBRIDGE_S_GT2:
187	 chipset = "Intel(R) Ivybridge Server";
188	 break;
189      case PCI_CHIP_HASWELL_GT1:
190      case PCI_CHIP_HASWELL_GT2:
191      case PCI_CHIP_HASWELL_GT2_PLUS:
192      case PCI_CHIP_HASWELL_SDV_GT1:
193      case PCI_CHIP_HASWELL_SDV_GT2:
194      case PCI_CHIP_HASWELL_SDV_GT2_PLUS:
195      case PCI_CHIP_HASWELL_ULT_GT1:
196      case PCI_CHIP_HASWELL_ULT_GT2:
197      case PCI_CHIP_HASWELL_ULT_GT2_PLUS:
198      case PCI_CHIP_HASWELL_CRW_GT1:
199      case PCI_CHIP_HASWELL_CRW_GT2:
200      case PCI_CHIP_HASWELL_CRW_GT2_PLUS:
201	 chipset = "Intel(R) Haswell Desktop";
202	 break;
203      case PCI_CHIP_HASWELL_M_GT1:
204      case PCI_CHIP_HASWELL_M_GT2:
205      case PCI_CHIP_HASWELL_M_GT2_PLUS:
206      case PCI_CHIP_HASWELL_SDV_M_GT1:
207      case PCI_CHIP_HASWELL_SDV_M_GT2:
208      case PCI_CHIP_HASWELL_SDV_M_GT2_PLUS:
209      case PCI_CHIP_HASWELL_ULT_M_GT1:
210      case PCI_CHIP_HASWELL_ULT_M_GT2:
211      case PCI_CHIP_HASWELL_ULT_M_GT2_PLUS:
212      case PCI_CHIP_HASWELL_CRW_M_GT1:
213      case PCI_CHIP_HASWELL_CRW_M_GT2:
214      case PCI_CHIP_HASWELL_CRW_M_GT2_PLUS:
215	 chipset = "Intel(R) Haswell Mobile";
216	 break;
217      case PCI_CHIP_HASWELL_S_GT1:
218      case PCI_CHIP_HASWELL_S_GT2:
219      case PCI_CHIP_HASWELL_S_GT2_PLUS:
220      case PCI_CHIP_HASWELL_SDV_S_GT1:
221      case PCI_CHIP_HASWELL_SDV_S_GT2:
222      case PCI_CHIP_HASWELL_SDV_S_GT2_PLUS:
223      case PCI_CHIP_HASWELL_ULT_S_GT1:
224      case PCI_CHIP_HASWELL_ULT_S_GT2:
225      case PCI_CHIP_HASWELL_ULT_S_GT2_PLUS:
226      case PCI_CHIP_HASWELL_CRW_S_GT1:
227      case PCI_CHIP_HASWELL_CRW_S_GT2:
228      case PCI_CHIP_HASWELL_CRW_S_GT2_PLUS:
229	 chipset = "Intel(R) Haswell Server";
230	 break;
231      default:
232         chipset = "Unknown Intel Chipset";
233         break;
234      }
235
236      (void) driGetRendererString(buffer, chipset, 0);
237      return (GLubyte *) buffer;
238
239   default:
240      return NULL;
241   }
242}
243
244static void
245intel_flush_front(struct gl_context *ctx)
246{
247   struct intel_context *intel = intel_context(ctx);
248    __DRIcontext *driContext = intel->driContext;
249    __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
250
251    if (_mesa_is_winsys_fbo(ctx->DrawBuffer) && intel->front_buffer_dirty) {
252      if (screen->dri2.loader->flushFrontBuffer != NULL &&
253          driContext->driDrawablePriv &&
254	  driContext->driDrawablePriv->loaderPrivate) {
255	 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
256						  driContext->driDrawablePriv->loaderPrivate);
257
258	 /* We set the dirty bit in intel_prepare_render() if we're
259	  * front buffer rendering once we get there.
260	  */
261	 intel->front_buffer_dirty = false;
262      }
263   }
264}
265
266static unsigned
267intel_bits_per_pixel(const struct intel_renderbuffer *rb)
268{
269   return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
270}
271
272static void
273intel_query_dri2_buffers(struct intel_context *intel,
274			 __DRIdrawable *drawable,
275			 __DRIbuffer **buffers,
276			 int *count);
277
278static void
279intel_process_dri2_buffer(struct intel_context *intel,
280			  __DRIdrawable *drawable,
281			  __DRIbuffer *buffer,
282			  struct intel_renderbuffer *rb,
283			  const char *buffer_name);
284
285void
286intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
287{
288   struct gl_framebuffer *fb = drawable->driverPrivate;
289   struct intel_renderbuffer *rb;
290   struct intel_context *intel = context->driverPrivate;
291   __DRIbuffer *buffers = NULL;
292   int i, count;
293   const char *region_name;
294
295   /* If we're rendering to the fake front buffer, make sure all the
296    * pending drawing has landed on the real front buffer.  Otherwise
297    * when we eventually get to DRI2GetBuffersWithFormat the stale
298    * real front buffer contents will get copied to the new fake front
299    * buffer.
300    */
301   if (intel->is_front_buffer_rendering) {
302      intel_flush(&intel->ctx);
303      intel_flush_front(&intel->ctx);
304   }
305
306   /* Set this up front, so that in case our buffers get invalidated
307    * while we're getting new buffers, we don't clobber the stamp and
308    * thus ignore the invalidate. */
309   drawable->lastStamp = drawable->dri2.stamp;
310
311   if (unlikely(INTEL_DEBUG & DEBUG_DRI))
312      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
313
314   intel_query_dri2_buffers(intel, drawable, &buffers, &count);
315
316   if (buffers == NULL)
317      return;
318
319   for (i = 0; i < count; i++) {
320       switch (buffers[i].attachment) {
321       case __DRI_BUFFER_FRONT_LEFT:
322	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
323	   region_name = "dri2 front buffer";
324	   break;
325
326       case __DRI_BUFFER_FAKE_FRONT_LEFT:
327	   rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
328	   region_name = "dri2 fake front buffer";
329	   break;
330
331       case __DRI_BUFFER_BACK_LEFT:
332	   rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
333	   region_name = "dri2 back buffer";
334	   break;
335
336       case __DRI_BUFFER_DEPTH:
337       case __DRI_BUFFER_HIZ:
338       case __DRI_BUFFER_DEPTH_STENCIL:
339       case __DRI_BUFFER_STENCIL:
340       case __DRI_BUFFER_ACCUM:
341       default:
342	   fprintf(stderr,
343		   "unhandled buffer attach event, attachment type %d\n",
344		   buffers[i].attachment);
345	   return;
346       }
347
348       intel_process_dri2_buffer(intel, drawable, &buffers[i], rb, region_name);
349   }
350
351   driUpdateFramebufferSize(&intel->ctx, drawable);
352}
353
354/**
355 * intel_prepare_render should be called anywhere that curent read/drawbuffer
356 * state is required.
357 */
358void
359intel_prepare_render(struct intel_context *intel)
360{
361   __DRIcontext *driContext = intel->driContext;
362   __DRIdrawable *drawable;
363
364   drawable = driContext->driDrawablePriv;
365   if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
366      if (drawable->lastStamp != drawable->dri2.stamp)
367	 intel_update_renderbuffers(driContext, drawable);
368      intel_draw_buffer(&intel->ctx);
369      driContext->dri2.draw_stamp = drawable->dri2.stamp;
370   }
371
372   drawable = driContext->driReadablePriv;
373   if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
374      if (drawable->lastStamp != drawable->dri2.stamp)
375	 intel_update_renderbuffers(driContext, drawable);
376      driContext->dri2.read_stamp = drawable->dri2.stamp;
377   }
378
379   /* If we're currently rendering to the front buffer, the rendering
380    * that will happen next will probably dirty the front buffer.  So
381    * mark it as dirty here.
382    */
383   if (intel->is_front_buffer_rendering)
384      intel->front_buffer_dirty = true;
385
386   /* Wait for the swapbuffers before the one we just emitted, so we
387    * don't get too many swaps outstanding for apps that are GPU-heavy
388    * but not CPU-heavy.
389    *
390    * We're using intelDRI2Flush (called from the loader before
391    * swapbuffer) and glFlush (for front buffer rendering) as the
392    * indicator that a frame is done and then throttle when we get
393    * here as we prepare to render the next frame.  At this point for
394    * round trips for swap/copy and getting new buffers are done and
395    * we'll spend less time waiting on the GPU.
396    *
397    * Unfortunately, we don't have a handle to the batch containing
398    * the swap, and getting our hands on that doesn't seem worth it,
399    * so we just us the first batch we emitted after the last swap.
400    */
401   if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
402      drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
403      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
404      intel->first_post_swapbuffers_batch = NULL;
405      intel->need_throttle = false;
406   }
407}
408
409static void
410intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
411{
412    struct intel_context *intel = intel_context(ctx);
413    __DRIcontext *driContext = intel->driContext;
414
415    if (intel->saved_viewport)
416	intel->saved_viewport(ctx, x, y, w, h);
417
418    if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
419       dri2InvalidateDrawable(driContext->driDrawablePriv);
420       dri2InvalidateDrawable(driContext->driReadablePriv);
421    }
422}
423
424static const struct dri_debug_control debug_control[] = {
425   { "tex",   DEBUG_TEXTURE},
426   { "state", DEBUG_STATE},
427   { "ioctl", DEBUG_IOCTL},
428   { "blit",  DEBUG_BLIT},
429   { "mip",   DEBUG_MIPTREE},
430   { "fall",  DEBUG_PERF},
431   { "perf",  DEBUG_PERF},
432   { "verb",  DEBUG_VERBOSE},
433   { "bat",   DEBUG_BATCH},
434   { "pix",   DEBUG_PIXEL},
435   { "buf",   DEBUG_BUFMGR},
436   { "reg",   DEBUG_REGION},
437   { "fbo",   DEBUG_FBO},
438   { "gs",    DEBUG_GS},
439   { "sync",  DEBUG_SYNC},
440   { "prim",  DEBUG_PRIMS },
441   { "vert",  DEBUG_VERTS },
442   { "dri",   DEBUG_DRI },
443   { "sf",    DEBUG_SF },
444   { "san",   DEBUG_SANITY },
445   { "sleep", DEBUG_SLEEP },
446   { "stats", DEBUG_STATS },
447   { "tile",  DEBUG_TILE },
448   { "wm",    DEBUG_WM },
449   { "urb",   DEBUG_URB },
450   { "vs",    DEBUG_VS },
451   { "clip",  DEBUG_CLIP },
452   { "aub",   DEBUG_AUB },
453   { NULL,    0 }
454};
455
456
457static void
458intelInvalidateState(struct gl_context * ctx, GLuint new_state)
459{
460    struct intel_context *intel = intel_context(ctx);
461
462   _swrast_InvalidateState(ctx, new_state);
463   _vbo_InvalidateState(ctx, new_state);
464
465   intel->NewGLState |= new_state;
466
467   if (intel->vtbl.invalidate_state)
468      intel->vtbl.invalidate_state( intel, new_state );
469}
470
471void
472intel_flush_rendering_to_batch(struct gl_context *ctx)
473{
474   struct intel_context *intel = intel_context(ctx);
475
476   if (intel->Fallback)
477      _swrast_flush(ctx);
478
479   if (intel->gen < 4)
480      INTEL_FIREVERTICES(intel);
481}
482
483void
484_intel_flush(struct gl_context *ctx, const char *file, int line)
485{
486   struct intel_context *intel = intel_context(ctx);
487
488   intel_flush_rendering_to_batch(ctx);
489
490   if (intel->batch.used)
491      _intel_batchbuffer_flush(intel, file, line);
492}
493
494static void
495intel_glFlush(struct gl_context *ctx)
496{
497   struct intel_context *intel = intel_context(ctx);
498
499   intel_flush(ctx);
500   intel_flush_front(ctx);
501   if (intel->is_front_buffer_rendering)
502      intel->need_throttle = true;
503}
504
505void
506intelFinish(struct gl_context * ctx)
507{
508   struct intel_context *intel = intel_context(ctx);
509
510   intel_flush(ctx);
511   intel_flush_front(ctx);
512
513   if (intel->batch.last_bo)
514      drm_intel_bo_wait_rendering(intel->batch.last_bo);
515}
516
517void
518intelInitDriverFunctions(struct dd_function_table *functions)
519{
520   _mesa_init_driver_functions(functions);
521
522   functions->Flush = intel_glFlush;
523   functions->Finish = intelFinish;
524   functions->GetString = intelGetString;
525   functions->UpdateState = intelInvalidateState;
526
527   intelInitTextureFuncs(functions);
528   intelInitTextureImageFuncs(functions);
529   intelInitTextureSubImageFuncs(functions);
530   intelInitTextureCopyImageFuncs(functions);
531   intelInitStateFuncs(functions);
532   intelInitClearFuncs(functions);
533   intelInitBufferFuncs(functions);
534   intelInitPixelFuncs(functions);
535   intelInitBufferObjectFuncs(functions);
536   intel_init_syncobj_functions(functions);
537}
538
539bool
540intelInitContext(struct intel_context *intel,
541		 int api,
542                 const struct gl_config * mesaVis,
543                 __DRIcontext * driContextPriv,
544                 void *sharedContextPrivate,
545                 struct dd_function_table *functions)
546{
547   struct gl_context *ctx = &intel->ctx;
548   struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
549   __DRIscreen *sPriv = driContextPriv->driScreenPriv;
550   struct intel_screen *intelScreen = sPriv->driverPrivate;
551   int bo_reuse_mode;
552   struct gl_config visual;
553
554   /* we can't do anything without a connection to the device */
555   if (intelScreen->bufmgr == NULL)
556      return false;
557
558   /* Can't rely on invalidate events, fall back to glViewport hack */
559   if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
560      intel->saved_viewport = functions->Viewport;
561      functions->Viewport = intel_viewport;
562   }
563
564   if (mesaVis == NULL) {
565      memset(&visual, 0, sizeof visual);
566      mesaVis = &visual;
567   }
568
569   if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
570                                 functions, (void *) intel)) {
571      printf("%s: failed to init mesa context\n", __FUNCTION__);
572      return false;
573   }
574
575   driContextPriv->driverPrivate = intel;
576   intel->intelScreen = intelScreen;
577   intel->driContext = driContextPriv;
578   intel->driFd = sPriv->fd;
579
580   intel->gen = intelScreen->gen;
581
582   const int devID = intelScreen->deviceID;
583   if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID) || IS_HSW_GT1(devID))
584      intel->gt = 1;
585   else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID) || IS_HSW_GT2(devID))
586      intel->gt = 2;
587   else
588      intel->gt = 0;
589
590   if (IS_HASWELL(devID)) {
591      intel->is_haswell = true;
592   } else if (IS_G4X(devID)) {
593      intel->is_g4x = true;
594   } else if (IS_945(devID)) {
595      intel->is_945 = true;
596   }
597
598   if (intel->gen >= 5) {
599      intel->needs_ff_sync = true;
600   }
601
602   intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
603   intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
604   intel->has_hiz = intel->gen >= 6 && !intel->is_haswell;
605   intel->has_llc = intel->intelScreen->hw_has_llc;
606   intel->has_swizzling = intel->intelScreen->hw_has_swizzling;
607
608   memset(&ctx->TextureFormatSupported,
609	  0, sizeof(ctx->TextureFormatSupported));
610
611   driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
612                       sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
613   if (intel->gen < 4)
614      intel->maxBatchSize = 4096;
615   else
616      intel->maxBatchSize = sizeof(intel->batch.map);
617
618   intel->bufmgr = intelScreen->bufmgr;
619
620   bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
621   switch (bo_reuse_mode) {
622   case DRI_CONF_BO_REUSE_DISABLED:
623      break;
624   case DRI_CONF_BO_REUSE_ALL:
625      intel_bufmgr_gem_enable_reuse(intel->bufmgr);
626      break;
627   }
628
629   ctx->Const.MinLineWidth = 1.0;
630   ctx->Const.MinLineWidthAA = 1.0;
631   ctx->Const.MaxLineWidth = 5.0;
632   ctx->Const.MaxLineWidthAA = 5.0;
633   ctx->Const.LineWidthGranularity = 0.5;
634
635   ctx->Const.MinPointSize = 1.0;
636   ctx->Const.MinPointSizeAA = 1.0;
637   ctx->Const.MaxPointSize = 255.0;
638   ctx->Const.MaxPointSizeAA = 3.0;
639   ctx->Const.PointSizeGranularity = 1.0;
640
641   ctx->Const.MaxSamples = 1.0;
642
643   if (intel->gen >= 6)
644      ctx->Const.MaxClipPlanes = 8;
645
646   ctx->Const.StripTextureBorder = GL_TRUE;
647
648   /* reinitialize the context point state.
649    * It depend on constants in __struct gl_contextRec::Const
650    */
651   _mesa_init_point(ctx);
652
653   if (intel->gen >= 4) {
654      ctx->Const.MaxRenderbufferSize = 8192;
655   } else {
656      ctx->Const.MaxRenderbufferSize = 2048;
657   }
658
659   /* Initialize the software rasterizer and helper modules. */
660   _swrast_CreateContext(ctx);
661   _vbo_CreateContext(ctx);
662   _tnl_CreateContext(ctx);
663   _swsetup_CreateContext(ctx);
664
665   /* Configure swrast to match hardware characteristics: */
666   _swrast_allow_pixel_fog(ctx, false);
667   _swrast_allow_vertex_fog(ctx, true);
668
669   _mesa_meta_init(ctx);
670
671   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
672   intel->hw_stipple = 1;
673
674   /* XXX FBO: this doesn't seem to be used anywhere */
675   switch (mesaVis->depthBits) {
676   case 0:                     /* what to do in this case? */
677   case 16:
678      intel->polygon_offset_scale = 1.0;
679      break;
680   case 24:
681      intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
682      break;
683   default:
684      assert(0);
685      break;
686   }
687
688   if (intel->gen >= 4)
689      intel->polygon_offset_scale /= 0xffff;
690
691   intel->RenderIndex = ~0;
692
693   intelInitExtensions(ctx);
694
695   INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
696   if (INTEL_DEBUG & DEBUG_BUFMGR)
697      dri_bufmgr_set_debug(intel->bufmgr, true);
698
699   if (INTEL_DEBUG & DEBUG_AUB)
700      drm_intel_bufmgr_gem_set_aub_dump(intel->bufmgr, true);
701
702   intel_batchbuffer_init(intel);
703
704   intel_fbo_init(intel);
705
706   intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
707					       "texture_tiling");
708   intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
709
710   if (!driQueryOptionb(&intel->optionCache, "hiz")) {
711       intel->has_hiz = false;
712       /* On gen6, you can only do separate stencil with HIZ. */
713       if (intel->gen == 6)
714	  intel->has_separate_stencil = false;
715   }
716
717   intel->prim.primitive = ~0;
718
719   /* Force all software fallbacks */
720   if (driQueryOptionb(&intel->optionCache, "no_rast")) {
721      fprintf(stderr, "disabling 3D rasterization\n");
722      intel->no_rast = 1;
723   }
724
725   if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
726      fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
727      intel->always_flush_batch = 1;
728   }
729
730   if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
731      fprintf(stderr, "flushing GPU caches before/after each draw call\n");
732      intel->always_flush_cache = 1;
733   }
734
735   return true;
736}
737
738void
739intelDestroyContext(__DRIcontext * driContextPriv)
740{
741   struct intel_context *intel =
742      (struct intel_context *) driContextPriv->driverPrivate;
743
744   assert(intel);               /* should never be null */
745   if (intel) {
746      INTEL_FIREVERTICES(intel);
747
748      /* Dump a final BMP in case the application doesn't call SwapBuffers */
749      if (INTEL_DEBUG & DEBUG_AUB) {
750         intel_batchbuffer_flush(intel);
751	 aub_dump_bmp(&intel->ctx);
752      }
753
754      _mesa_meta_free(&intel->ctx);
755
756      intel->vtbl.destroy(intel);
757
758      _swsetup_DestroyContext(&intel->ctx);
759      _tnl_DestroyContext(&intel->ctx);
760      _vbo_DestroyContext(&intel->ctx);
761
762      _swrast_DestroyContext(&intel->ctx);
763      intel->Fallback = 0x0;      /* don't call _swrast_Flush later */
764
765      intel_batchbuffer_free(intel);
766
767      free(intel->prim.vb);
768      intel->prim.vb = NULL;
769      drm_intel_bo_unreference(intel->prim.vb_bo);
770      intel->prim.vb_bo = NULL;
771      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
772      intel->first_post_swapbuffers_batch = NULL;
773
774      driDestroyOptionCache(&intel->optionCache);
775
776      /* free the Mesa context */
777      _mesa_free_context_data(&intel->ctx);
778
779      _math_matrix_dtr(&intel->ViewportMatrix);
780
781      ralloc_free(intel);
782      driContextPriv->driverPrivate = NULL;
783   }
784}
785
786GLboolean
787intelUnbindContext(__DRIcontext * driContextPriv)
788{
789   /* Unset current context and dispath table */
790   _mesa_make_current(NULL, NULL, NULL);
791
792   return true;
793}
794
795GLboolean
796intelMakeCurrent(__DRIcontext * driContextPriv,
797                 __DRIdrawable * driDrawPriv,
798                 __DRIdrawable * driReadPriv)
799{
800   struct intel_context *intel;
801   GET_CURRENT_CONTEXT(curCtx);
802
803   if (driContextPriv)
804      intel = (struct intel_context *) driContextPriv->driverPrivate;
805   else
806      intel = NULL;
807
808   /* According to the glXMakeCurrent() man page: "Pending commands to
809    * the previous context, if any, are flushed before it is released."
810    * But only flush if we're actually changing contexts.
811    */
812   if (intel_context(curCtx) && intel_context(curCtx) != intel) {
813      _mesa_flush(curCtx);
814   }
815
816   if (driContextPriv) {
817      struct gl_framebuffer *fb, *readFb;
818
819      if (driDrawPriv == NULL && driReadPriv == NULL) {
820	 fb = _mesa_get_incomplete_framebuffer();
821	 readFb = _mesa_get_incomplete_framebuffer();
822      } else {
823	 fb = driDrawPriv->driverPrivate;
824	 readFb = driReadPriv->driverPrivate;
825	 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
826	 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
827      }
828
829      intel_prepare_render(intel);
830      _mesa_make_current(&intel->ctx, fb, readFb);
831
832      /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
833       * is NULL at that point.  We can't call _mesa_makecurrent()
834       * first, since we need the buffer size for the initial
835       * viewport.  So just call intel_draw_buffer() again here. */
836      intel_draw_buffer(&intel->ctx);
837   }
838   else {
839      _mesa_make_current(NULL, NULL, NULL);
840   }
841
842   return true;
843}
844
845/**
846 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
847 *
848 * To determine which DRI buffers to request, examine the renderbuffers
849 * attached to the drawable's framebuffer. Then request the buffers with
850 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
851 *
852 * This is called from intel_update_renderbuffers().
853 *
854 * \param drawable      Drawable whose buffers are queried.
855 * \param buffers       [out] List of buffers returned by DRI2 query.
856 * \param buffer_count  [out] Number of buffers returned.
857 *
858 * \see intel_update_renderbuffers()
859 * \see DRI2GetBuffers()
860 * \see DRI2GetBuffersWithFormat()
861 */
862static void
863intel_query_dri2_buffers(struct intel_context *intel,
864			 __DRIdrawable *drawable,
865			 __DRIbuffer **buffers,
866			 int *buffer_count)
867{
868   __DRIscreen *screen = intel->intelScreen->driScrnPriv;
869   struct gl_framebuffer *fb = drawable->driverPrivate;
870   int i = 0;
871   const int max_attachments = 4;
872   unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
873
874   struct intel_renderbuffer *front_rb;
875   struct intel_renderbuffer *back_rb;
876
877   front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
878   back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
879
880   if ((intel->is_front_buffer_rendering ||
881	intel->is_front_buffer_reading ||
882	!back_rb) && front_rb) {
883      attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
884      attachments[i++] = intel_bits_per_pixel(front_rb);
885   }
886
887   if (back_rb) {
888      attachments[i++] = __DRI_BUFFER_BACK_LEFT;
889      attachments[i++] = intel_bits_per_pixel(back_rb);
890   }
891
892   assert(i <= 2 * max_attachments);
893
894   *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
895							&drawable->w,
896							&drawable->h,
897							attachments, i / 2,
898							buffer_count,
899							drawable->loaderPrivate);
900   free(attachments);
901}
902
903/**
904 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
905 *
906 * This is called from intel_update_renderbuffers().
907 *
908 * \par Note:
909 *    DRI buffers whose attachment point is DRI2BufferStencil or
910 *    DRI2BufferDepthStencil are handled as special cases.
911 *
912 * \param buffer_name is a human readable name, such as "dri2 front buffer",
913 *        that is passed to intel_region_alloc_for_handle().
914 *
915 * \see intel_update_renderbuffers()
916 * \see intel_region_alloc_for_handle()
917 */
918static void
919intel_process_dri2_buffer(struct intel_context *intel,
920			  __DRIdrawable *drawable,
921			  __DRIbuffer *buffer,
922			  struct intel_renderbuffer *rb,
923			  const char *buffer_name)
924{
925   struct intel_region *region = NULL;
926
927   if (!rb)
928      return;
929
930   unsigned num_samples = rb->Base.Base.NumSamples;
931
932   /* We try to avoid closing and reopening the same BO name, because the first
933    * use of a mapping of the buffer involves a bunch of page faulting which is
934    * moderately expensive.
935    */
936   if (num_samples == 0) {
937       if (rb->mt &&
938           rb->mt->region &&
939           rb->mt->region->name == buffer->name)
940          return;
941   } else {
942       if (rb->mt &&
943           rb->mt->singlesample_mt &&
944           rb->mt->singlesample_mt->region &&
945           rb->mt->singlesample_mt->region->name == buffer->name)
946          return;
947   }
948
949   if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
950      fprintf(stderr,
951	      "attaching buffer %d, at %d, cpp %d, pitch %d\n",
952	      buffer->name, buffer->attachment,
953	      buffer->cpp, buffer->pitch);
954   }
955
956   intel_miptree_release(&rb->mt);
957   region = intel_region_alloc_for_handle(intel->intelScreen,
958                                          buffer->cpp,
959                                          drawable->w,
960                                          drawable->h,
961                                          buffer->pitch / buffer->cpp,
962                                          buffer->name,
963                                          buffer_name);
964   if (!region)
965      return;
966
967   rb->mt = intel_miptree_create_for_dri2_buffer(intel,
968                                                 buffer->attachment,
969                                                 intel_rb_format(rb),
970                                                 num_samples,
971                                                 region);
972   intel_region_release(&region);
973}
974