intel_context.c revision 88128516d43be5d25288ff5b64db63cda83c04b3
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include "main/glheader.h" 30#include "main/context.h" 31#include "main/extensions.h" 32#include "main/fbobject.h" 33#include "main/framebuffer.h" 34#include "main/imports.h" 35#include "main/points.h" 36#include "main/renderbuffer.h" 37 38#include "swrast/swrast.h" 39#include "swrast_setup/swrast_setup.h" 40#include "tnl/tnl.h" 41#include "drivers/common/driverfuncs.h" 42#include "drivers/common/meta.h" 43 44#include "intel_chipset.h" 45#include "intel_buffers.h" 46#include "intel_tex.h" 47#include "intel_batchbuffer.h" 48#include "intel_clear.h" 49#include "intel_extensions.h" 50#include "intel_pixel.h" 51#include "intel_regions.h" 52#include "intel_buffer_objects.h" 53#include "intel_fbo.h" 54#include "intel_bufmgr.h" 55#include "intel_screen.h" 56#include "intel_mipmap_tree.h" 57 58#include "utils.h" 59#include "../glsl/ralloc.h" 60 61#ifndef INTEL_DEBUG 62int INTEL_DEBUG = (0); 63#endif 64 65 66static const GLubyte * 67intelGetString(struct gl_context * ctx, GLenum name) 68{ 69 const struct intel_context *const intel = intel_context(ctx); 70 const char *chipset; 71 static char buffer[128]; 72 73 switch (name) { 74 case GL_VENDOR: 75 return (GLubyte *) "Tungsten Graphics, Inc"; 76 break; 77 78 case GL_RENDERER: 79 switch (intel->intelScreen->deviceID) { 80 case PCI_CHIP_845_G: 81 chipset = "Intel(R) 845G"; 82 break; 83 case PCI_CHIP_I830_M: 84 chipset = "Intel(R) 830M"; 85 break; 86 case PCI_CHIP_I855_GM: 87 chipset = "Intel(R) 852GM/855GM"; 88 break; 89 case PCI_CHIP_I865_G: 90 chipset = "Intel(R) 865G"; 91 break; 92 case PCI_CHIP_I915_G: 93 chipset = "Intel(R) 915G"; 94 break; 95 case PCI_CHIP_E7221_G: 96 chipset = "Intel (R) E7221G (i915)"; 97 break; 98 case PCI_CHIP_I915_GM: 99 chipset = "Intel(R) 915GM"; 100 break; 101 case PCI_CHIP_I945_G: 102 chipset = "Intel(R) 945G"; 103 break; 104 case PCI_CHIP_I945_GM: 105 chipset = "Intel(R) 945GM"; 106 break; 107 case PCI_CHIP_I945_GME: 108 chipset = "Intel(R) 945GME"; 109 break; 110 case PCI_CHIP_G33_G: 111 chipset = "Intel(R) G33"; 112 break; 113 case PCI_CHIP_Q35_G: 114 chipset = "Intel(R) Q35"; 115 break; 116 case PCI_CHIP_Q33_G: 117 chipset = "Intel(R) Q33"; 118 break; 119 case PCI_CHIP_IGD_GM: 120 case PCI_CHIP_IGD_G: 121 chipset = "Intel(R) IGD"; 122 break; 123 case PCI_CHIP_I965_Q: 124 chipset = "Intel(R) 965Q"; 125 break; 126 case PCI_CHIP_I965_G: 127 case PCI_CHIP_I965_G_1: 128 chipset = "Intel(R) 965G"; 129 break; 130 case PCI_CHIP_I946_GZ: 131 chipset = "Intel(R) 946GZ"; 132 break; 133 case PCI_CHIP_I965_GM: 134 chipset = "Intel(R) 965GM"; 135 break; 136 case PCI_CHIP_I965_GME: 137 chipset = "Intel(R) 965GME/GLE"; 138 break; 139 case PCI_CHIP_GM45_GM: 140 chipset = "Mobile Intel® GM45 Express Chipset"; 141 break; 142 case PCI_CHIP_IGD_E_G: 143 chipset = "Intel(R) Integrated Graphics Device"; 144 break; 145 case PCI_CHIP_G45_G: 146 chipset = "Intel(R) G45/G43"; 147 break; 148 case PCI_CHIP_Q45_G: 149 chipset = "Intel(R) Q45/Q43"; 150 break; 151 case PCI_CHIP_G41_G: 152 chipset = "Intel(R) G41"; 153 break; 154 case PCI_CHIP_B43_G: 155 case PCI_CHIP_B43_G1: 156 chipset = "Intel(R) B43"; 157 break; 158 case PCI_CHIP_ILD_G: 159 chipset = "Intel(R) Ironlake Desktop"; 160 break; 161 case PCI_CHIP_ILM_G: 162 chipset = "Intel(R) Ironlake Mobile"; 163 break; 164 case PCI_CHIP_SANDYBRIDGE_GT1: 165 case PCI_CHIP_SANDYBRIDGE_GT2: 166 case PCI_CHIP_SANDYBRIDGE_GT2_PLUS: 167 chipset = "Intel(R) Sandybridge Desktop"; 168 break; 169 case PCI_CHIP_SANDYBRIDGE_M_GT1: 170 case PCI_CHIP_SANDYBRIDGE_M_GT2: 171 case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS: 172 chipset = "Intel(R) Sandybridge Mobile"; 173 break; 174 case PCI_CHIP_SANDYBRIDGE_S: 175 chipset = "Intel(R) Sandybridge Server"; 176 break; 177 case PCI_CHIP_IVYBRIDGE_GT1: 178 case PCI_CHIP_IVYBRIDGE_GT2: 179 chipset = "Intel(R) Ivybridge Desktop"; 180 break; 181 case PCI_CHIP_IVYBRIDGE_M_GT1: 182 case PCI_CHIP_IVYBRIDGE_M_GT2: 183 chipset = "Intel(R) Ivybridge Mobile"; 184 break; 185 case PCI_CHIP_IVYBRIDGE_S_GT1: 186 case PCI_CHIP_IVYBRIDGE_S_GT2: 187 chipset = "Intel(R) Ivybridge Server"; 188 break; 189 case PCI_CHIP_HASWELL_GT1: 190 case PCI_CHIP_HASWELL_GT2: 191 chipset = "Intel(R) Haswell Desktop"; 192 break; 193 case PCI_CHIP_HASWELL_M_GT1: 194 case PCI_CHIP_HASWELL_M_GT2: 195 case PCI_CHIP_HASWELL_M_ULT_GT2: 196 chipset = "Intel(R) Haswell Mobile"; 197 break; 198 default: 199 chipset = "Unknown Intel Chipset"; 200 break; 201 } 202 203 (void) driGetRendererString(buffer, chipset, 0); 204 return (GLubyte *) buffer; 205 206 default: 207 return NULL; 208 } 209} 210 211static void 212intel_flush_front(struct gl_context *ctx) 213{ 214 struct intel_context *intel = intel_context(ctx); 215 __DRIcontext *driContext = intel->driContext; 216 __DRIscreen *const screen = intel->intelScreen->driScrnPriv; 217 218 if (_mesa_is_winsys_fbo(ctx->DrawBuffer) && intel->front_buffer_dirty) { 219 if (screen->dri2.loader && 220 (screen->dri2.loader->base.version >= 2) 221 && (screen->dri2.loader->flushFrontBuffer != NULL) && 222 driContext->driDrawablePriv && 223 driContext->driDrawablePriv->loaderPrivate) { 224 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv, 225 driContext->driDrawablePriv->loaderPrivate); 226 227 /* We set the dirty bit in intel_prepare_render() if we're 228 * front buffer rendering once we get there. 229 */ 230 intel->front_buffer_dirty = false; 231 } 232 } 233} 234 235static unsigned 236intel_bits_per_pixel(const struct intel_renderbuffer *rb) 237{ 238 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; 239} 240 241static void 242intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel, 243 __DRIdrawable *drawable, 244 __DRIbuffer **buffers, 245 int *count); 246 247static void 248intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel, 249 __DRIdrawable *drawable, 250 __DRIbuffer *buffer, 251 struct intel_renderbuffer *rb, 252 const char *buffer_name); 253 254static void 255intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel, 256 __DRIdrawable *drawable, 257 __DRIbuffer **buffers, 258 unsigned **attachments, 259 int *count); 260 261static void 262intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel, 263 __DRIdrawable *drawable, 264 __DRIbuffer *buffer, 265 struct intel_renderbuffer *rb, 266 const char *buffer_name); 267static void 268intel_verify_dri2_has_hiz(struct intel_context *intel, 269 __DRIdrawable *drawable, 270 __DRIbuffer **buffers, 271 unsigned **attachments, 272 int *count); 273 274void 275intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) 276{ 277 struct gl_framebuffer *fb = drawable->driverPrivate; 278 struct intel_renderbuffer *rb; 279 struct intel_context *intel = context->driverPrivate; 280 __DRIbuffer *buffers = NULL; 281 unsigned *attachments = NULL; 282 int i, count; 283 const char *region_name; 284 285 bool try_separate_stencil = 286 intel->has_separate_stencil && 287 intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE && 288 intel->intelScreen->driScrnPriv->dri2.loader != NULL && 289 intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 && 290 intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL; 291 292 assert(!intel->must_use_separate_stencil || try_separate_stencil); 293 294 /* If we're rendering to the fake front buffer, make sure all the 295 * pending drawing has landed on the real front buffer. Otherwise 296 * when we eventually get to DRI2GetBuffersWithFormat the stale 297 * real front buffer contents will get copied to the new fake front 298 * buffer. 299 */ 300 if (intel->is_front_buffer_rendering) { 301 intel_flush(&intel->ctx); 302 intel_flush_front(&intel->ctx); 303 } 304 305 /* Set this up front, so that in case our buffers get invalidated 306 * while we're getting new buffers, we don't clobber the stamp and 307 * thus ignore the invalidate. */ 308 drawable->lastStamp = drawable->dri2.stamp; 309 310 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) 311 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 312 313 if (try_separate_stencil) { 314 intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers, 315 &attachments, &count); 316 } else { 317 intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers, 318 &count); 319 } 320 321 if (buffers == NULL) 322 return; 323 324 for (i = 0; i < count; i++) { 325 switch (buffers[i].attachment) { 326 case __DRI_BUFFER_FRONT_LEFT: 327 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 328 region_name = "dri2 front buffer"; 329 break; 330 331 case __DRI_BUFFER_FAKE_FRONT_LEFT: 332 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 333 region_name = "dri2 fake front buffer"; 334 break; 335 336 case __DRI_BUFFER_BACK_LEFT: 337 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 338 region_name = "dri2 back buffer"; 339 break; 340 341 case __DRI_BUFFER_DEPTH: 342 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 343 region_name = "dri2 depth buffer"; 344 break; 345 346 case __DRI_BUFFER_HIZ: 347 /* The hiz region resides in the depth renderbuffer. */ 348 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 349 region_name = "dri2 hiz buffer"; 350 break; 351 352 case __DRI_BUFFER_DEPTH_STENCIL: 353 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 354 region_name = "dri2 depth / stencil buffer"; 355 break; 356 357 case __DRI_BUFFER_STENCIL: 358 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 359 region_name = "dri2 stencil buffer"; 360 break; 361 362 case __DRI_BUFFER_ACCUM: 363 default: 364 fprintf(stderr, 365 "unhandled buffer attach event, attachment type %d\n", 366 buffers[i].attachment); 367 return; 368 } 369 370 if (try_separate_stencil) { 371 intel_process_dri2_buffer_with_separate_stencil(intel, drawable, 372 &buffers[i], rb, 373 region_name); 374 } else { 375 intel_process_dri2_buffer_no_separate_stencil(intel, drawable, 376 &buffers[i], rb, 377 region_name); 378 } 379 } 380 381 if (try_separate_stencil 382 && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) { 383 intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments, 384 &count); 385 } 386 387 if (attachments) 388 free(attachments); 389 390 driUpdateFramebufferSize(&intel->ctx, drawable); 391} 392 393/** 394 * intel_prepare_render should be called anywhere that curent read/drawbuffer 395 * state is required. 396 */ 397void 398intel_prepare_render(struct intel_context *intel) 399{ 400 __DRIcontext *driContext = intel->driContext; 401 __DRIdrawable *drawable; 402 403 drawable = driContext->driDrawablePriv; 404 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) { 405 if (drawable->lastStamp != drawable->dri2.stamp) 406 intel_update_renderbuffers(driContext, drawable); 407 intel_draw_buffer(&intel->ctx); 408 driContext->dri2.draw_stamp = drawable->dri2.stamp; 409 } 410 411 drawable = driContext->driReadablePriv; 412 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) { 413 if (drawable->lastStamp != drawable->dri2.stamp) 414 intel_update_renderbuffers(driContext, drawable); 415 driContext->dri2.read_stamp = drawable->dri2.stamp; 416 } 417 418 /* If we're currently rendering to the front buffer, the rendering 419 * that will happen next will probably dirty the front buffer. So 420 * mark it as dirty here. 421 */ 422 if (intel->is_front_buffer_rendering) 423 intel->front_buffer_dirty = true; 424 425 /* Wait for the swapbuffers before the one we just emitted, so we 426 * don't get too many swaps outstanding for apps that are GPU-heavy 427 * but not CPU-heavy. 428 * 429 * We're using intelDRI2Flush (called from the loader before 430 * swapbuffer) and glFlush (for front buffer rendering) as the 431 * indicator that a frame is done and then throttle when we get 432 * here as we prepare to render the next frame. At this point for 433 * round trips for swap/copy and getting new buffers are done and 434 * we'll spend less time waiting on the GPU. 435 * 436 * Unfortunately, we don't have a handle to the batch containing 437 * the swap, and getting our hands on that doesn't seem worth it, 438 * so we just us the first batch we emitted after the last swap. 439 */ 440 if (intel->need_throttle && intel->first_post_swapbuffers_batch) { 441 drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch); 442 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch); 443 intel->first_post_swapbuffers_batch = NULL; 444 intel->need_throttle = false; 445 } 446} 447 448static void 449intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h) 450{ 451 struct intel_context *intel = intel_context(ctx); 452 __DRIcontext *driContext = intel->driContext; 453 454 if (intel->saved_viewport) 455 intel->saved_viewport(ctx, x, y, w, h); 456 457 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) { 458 dri2InvalidateDrawable(driContext->driDrawablePriv); 459 dri2InvalidateDrawable(driContext->driReadablePriv); 460 } 461} 462 463static const struct dri_debug_control debug_control[] = { 464 { "tex", DEBUG_TEXTURE}, 465 { "state", DEBUG_STATE}, 466 { "ioctl", DEBUG_IOCTL}, 467 { "blit", DEBUG_BLIT}, 468 { "mip", DEBUG_MIPTREE}, 469 { "fall", DEBUG_FALLBACKS}, 470 { "verb", DEBUG_VERBOSE}, 471 { "bat", DEBUG_BATCH}, 472 { "pix", DEBUG_PIXEL}, 473 { "buf", DEBUG_BUFMGR}, 474 { "reg", DEBUG_REGION}, 475 { "fbo", DEBUG_FBO}, 476 { "gs", DEBUG_GS}, 477 { "sync", DEBUG_SYNC}, 478 { "prim", DEBUG_PRIMS }, 479 { "vert", DEBUG_VERTS }, 480 { "dri", DEBUG_DRI }, 481 { "sf", DEBUG_SF }, 482 { "san", DEBUG_SANITY }, 483 { "sleep", DEBUG_SLEEP }, 484 { "stats", DEBUG_STATS }, 485 { "tile", DEBUG_TILE }, 486 { "wm", DEBUG_WM }, 487 { "urb", DEBUG_URB }, 488 { "vs", DEBUG_VS }, 489 { "clip", DEBUG_CLIP }, 490 { "aub", DEBUG_AUB }, 491 { NULL, 0 } 492}; 493 494 495static void 496intelInvalidateState(struct gl_context * ctx, GLuint new_state) 497{ 498 struct intel_context *intel = intel_context(ctx); 499 500 _swrast_InvalidateState(ctx, new_state); 501 _vbo_InvalidateState(ctx, new_state); 502 503 intel->NewGLState |= new_state; 504 505 if (intel->vtbl.invalidate_state) 506 intel->vtbl.invalidate_state( intel, new_state ); 507} 508 509void 510intel_flush_rendering_to_batch(struct gl_context *ctx) 511{ 512 struct intel_context *intel = intel_context(ctx); 513 514 if (intel->Fallback) 515 _swrast_flush(ctx); 516 517 if (intel->gen < 4) 518 INTEL_FIREVERTICES(intel); 519} 520 521void 522_intel_flush(struct gl_context *ctx, const char *file, int line) 523{ 524 struct intel_context *intel = intel_context(ctx); 525 526 intel_flush_rendering_to_batch(ctx); 527 528 if (intel->batch.used) 529 _intel_batchbuffer_flush(intel, file, line); 530} 531 532static void 533intel_glFlush(struct gl_context *ctx) 534{ 535 struct intel_context *intel = intel_context(ctx); 536 537 intel_flush(ctx); 538 intel_flush_front(ctx); 539 if (intel->is_front_buffer_rendering) 540 intel->need_throttle = true; 541} 542 543void 544intelFinish(struct gl_context * ctx) 545{ 546 struct intel_context *intel = intel_context(ctx); 547 548 intel_flush(ctx); 549 intel_flush_front(ctx); 550 551 if (intel->batch.last_bo) 552 drm_intel_bo_wait_rendering(intel->batch.last_bo); 553} 554 555void 556intelInitDriverFunctions(struct dd_function_table *functions) 557{ 558 _mesa_init_driver_functions(functions); 559 560 functions->Flush = intel_glFlush; 561 functions->Finish = intelFinish; 562 functions->GetString = intelGetString; 563 functions->UpdateState = intelInvalidateState; 564 565 intelInitTextureFuncs(functions); 566 intelInitTextureImageFuncs(functions); 567 intelInitTextureSubImageFuncs(functions); 568 intelInitTextureCopyImageFuncs(functions); 569 intelInitStateFuncs(functions); 570 intelInitClearFuncs(functions); 571 intelInitBufferFuncs(functions); 572 intelInitPixelFuncs(functions); 573 intelInitBufferObjectFuncs(functions); 574 intel_init_syncobj_functions(functions); 575} 576 577bool 578intelInitContext(struct intel_context *intel, 579 int api, 580 const struct gl_config * mesaVis, 581 __DRIcontext * driContextPriv, 582 void *sharedContextPrivate, 583 struct dd_function_table *functions) 584{ 585 struct gl_context *ctx = &intel->ctx; 586 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; 587 __DRIscreen *sPriv = driContextPriv->driScreenPriv; 588 struct intel_screen *intelScreen = sPriv->driverPrivate; 589 int bo_reuse_mode; 590 struct gl_config visual; 591 592 /* we can't do anything without a connection to the device */ 593 if (intelScreen->bufmgr == NULL) 594 return false; 595 596 /* Can't rely on invalidate events, fall back to glViewport hack */ 597 if (!driContextPriv->driScreenPriv->dri2.useInvalidate) { 598 intel->saved_viewport = functions->Viewport; 599 functions->Viewport = intel_viewport; 600 } 601 602 if (mesaVis == NULL) { 603 memset(&visual, 0, sizeof visual); 604 mesaVis = &visual; 605 } 606 607 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx, 608 functions, (void *) intel)) { 609 printf("%s: failed to init mesa context\n", __FUNCTION__); 610 return false; 611 } 612 613 driContextPriv->driverPrivate = intel; 614 intel->intelScreen = intelScreen; 615 intel->driContext = driContextPriv; 616 intel->driFd = sPriv->fd; 617 618 intel->gen = intelScreen->gen; 619 620 const int devID = intelScreen->deviceID; 621 if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID) || IS_HSW_GT1(devID)) 622 intel->gt = 1; 623 else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID) || IS_HSW_GT2(devID)) 624 intel->gt = 2; 625 else 626 intel->gt = 0; 627 628 if (IS_HASWELL(devID)) { 629 intel->is_haswell = true; 630 } else if (IS_G4X(devID)) { 631 intel->is_g4x = true; 632 } else if (IS_945(devID)) { 633 intel->is_945 = true; 634 } 635 636 if (intel->gen >= 5) { 637 intel->needs_ff_sync = true; 638 } 639 640 intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil; 641 intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil; 642 intel->has_hiz = intel->gen >= 6 && !intel->is_haswell; 643 intel->has_llc = intel->intelScreen->hw_has_llc; 644 intel->has_swizzling = intel->intelScreen->hw_has_swizzling; 645 646 memset(&ctx->TextureFormatSupported, 647 0, sizeof(ctx->TextureFormatSupported)); 648 649 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache, 650 sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915"); 651 if (intel->gen < 4) 652 intel->maxBatchSize = 4096; 653 else 654 intel->maxBatchSize = sizeof(intel->batch.map); 655 656 intel->bufmgr = intelScreen->bufmgr; 657 658 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); 659 switch (bo_reuse_mode) { 660 case DRI_CONF_BO_REUSE_DISABLED: 661 break; 662 case DRI_CONF_BO_REUSE_ALL: 663 intel_bufmgr_gem_enable_reuse(intel->bufmgr); 664 break; 665 } 666 667 ctx->Const.MinLineWidth = 1.0; 668 ctx->Const.MinLineWidthAA = 1.0; 669 ctx->Const.MaxLineWidth = 5.0; 670 ctx->Const.MaxLineWidthAA = 5.0; 671 ctx->Const.LineWidthGranularity = 0.5; 672 673 ctx->Const.MinPointSize = 1.0; 674 ctx->Const.MinPointSizeAA = 1.0; 675 ctx->Const.MaxPointSize = 255.0; 676 ctx->Const.MaxPointSizeAA = 3.0; 677 ctx->Const.PointSizeGranularity = 1.0; 678 679 ctx->Const.MaxSamples = 1.0; 680 681 if (intel->gen >= 6) 682 ctx->Const.MaxClipPlanes = 8; 683 684 ctx->Const.StripTextureBorder = GL_TRUE; 685 686 /* reinitialize the context point state. 687 * It depend on constants in __struct gl_contextRec::Const 688 */ 689 _mesa_init_point(ctx); 690 691 if (intel->gen >= 4) { 692 ctx->Const.MaxRenderbufferSize = 8192; 693 } else { 694 ctx->Const.MaxRenderbufferSize = 2048; 695 } 696 697 /* Initialize the software rasterizer and helper modules. */ 698 _swrast_CreateContext(ctx); 699 _vbo_CreateContext(ctx); 700 _tnl_CreateContext(ctx); 701 _swsetup_CreateContext(ctx); 702 703 /* Configure swrast to match hardware characteristics: */ 704 _swrast_allow_pixel_fog(ctx, false); 705 _swrast_allow_vertex_fog(ctx, true); 706 707 _mesa_meta_init(ctx); 708 709 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24; 710 intel->hw_stipple = 1; 711 712 /* XXX FBO: this doesn't seem to be used anywhere */ 713 switch (mesaVis->depthBits) { 714 case 0: /* what to do in this case? */ 715 case 16: 716 intel->polygon_offset_scale = 1.0; 717 break; 718 case 24: 719 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */ 720 break; 721 default: 722 assert(0); 723 break; 724 } 725 726 if (intel->gen >= 4) 727 intel->polygon_offset_scale /= 0xffff; 728 729 intel->RenderIndex = ~0; 730 731 intelInitExtensions(ctx); 732 733 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control); 734 if (INTEL_DEBUG & DEBUG_BUFMGR) 735 dri_bufmgr_set_debug(intel->bufmgr, true); 736 737 if (INTEL_DEBUG & DEBUG_AUB) 738 drm_intel_bufmgr_gem_set_aub_dump(intel->bufmgr, true); 739 740 intel_batchbuffer_init(intel); 741 742 intel_fbo_init(intel); 743 744 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache, 745 "texture_tiling"); 746 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z"); 747 748 if (!driQueryOptionb(&intel->optionCache, "hiz")) { 749 intel->has_hiz = false; 750 /* On gen6, you can only do separate stencil with HIZ. */ 751 if (intel->gen == 6) 752 intel->has_separate_stencil = false; 753 } 754 755 intel->prim.primitive = ~0; 756 757 /* Force all software fallbacks */ 758 if (driQueryOptionb(&intel->optionCache, "no_rast")) { 759 fprintf(stderr, "disabling 3D rasterization\n"); 760 intel->no_rast = 1; 761 } 762 763 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) { 764 fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); 765 intel->always_flush_batch = 1; 766 } 767 768 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) { 769 fprintf(stderr, "flushing GPU caches before/after each draw call\n"); 770 intel->always_flush_cache = 1; 771 } 772 773 return true; 774} 775 776void 777intelDestroyContext(__DRIcontext * driContextPriv) 778{ 779 struct intel_context *intel = 780 (struct intel_context *) driContextPriv->driverPrivate; 781 782 assert(intel); /* should never be null */ 783 if (intel) { 784 INTEL_FIREVERTICES(intel); 785 786 /* Dump a final BMP in case the application doesn't call SwapBuffers */ 787 if (INTEL_DEBUG & DEBUG_AUB) { 788 intel_batchbuffer_flush(intel); 789 aub_dump_bmp(&intel->ctx); 790 } 791 792 _mesa_meta_free(&intel->ctx); 793 794 intel->vtbl.destroy(intel); 795 796 _swsetup_DestroyContext(&intel->ctx); 797 _tnl_DestroyContext(&intel->ctx); 798 _vbo_DestroyContext(&intel->ctx); 799 800 _swrast_DestroyContext(&intel->ctx); 801 intel->Fallback = 0x0; /* don't call _swrast_Flush later */ 802 803 intel_batchbuffer_free(intel); 804 805 free(intel->prim.vb); 806 intel->prim.vb = NULL; 807 drm_intel_bo_unreference(intel->prim.vb_bo); 808 intel->prim.vb_bo = NULL; 809 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch); 810 intel->first_post_swapbuffers_batch = NULL; 811 812 driDestroyOptionCache(&intel->optionCache); 813 814 /* free the Mesa context */ 815 _mesa_free_context_data(&intel->ctx); 816 817 _math_matrix_dtr(&intel->ViewportMatrix); 818 819 ralloc_free(intel); 820 driContextPriv->driverPrivate = NULL; 821 } 822} 823 824GLboolean 825intelUnbindContext(__DRIcontext * driContextPriv) 826{ 827 /* Unset current context and dispath table */ 828 _mesa_make_current(NULL, NULL, NULL); 829 830 return true; 831} 832 833GLboolean 834intelMakeCurrent(__DRIcontext * driContextPriv, 835 __DRIdrawable * driDrawPriv, 836 __DRIdrawable * driReadPriv) 837{ 838 struct intel_context *intel; 839 GET_CURRENT_CONTEXT(curCtx); 840 841 if (driContextPriv) 842 intel = (struct intel_context *) driContextPriv->driverPrivate; 843 else 844 intel = NULL; 845 846 /* According to the glXMakeCurrent() man page: "Pending commands to 847 * the previous context, if any, are flushed before it is released." 848 * But only flush if we're actually changing contexts. 849 */ 850 if (intel_context(curCtx) && intel_context(curCtx) != intel) { 851 _mesa_flush(curCtx); 852 } 853 854 if (driContextPriv) { 855 struct gl_framebuffer *fb, *readFb; 856 857 if (driDrawPriv == NULL && driReadPriv == NULL) { 858 fb = _mesa_get_incomplete_framebuffer(); 859 readFb = _mesa_get_incomplete_framebuffer(); 860 } else { 861 fb = driDrawPriv->driverPrivate; 862 readFb = driReadPriv->driverPrivate; 863 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1; 864 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1; 865 } 866 867 intel_prepare_render(intel); 868 _mesa_make_current(&intel->ctx, fb, readFb); 869 870 /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer 871 * is NULL at that point. We can't call _mesa_makecurrent() 872 * first, since we need the buffer size for the initial 873 * viewport. So just call intel_draw_buffer() again here. */ 874 intel_draw_buffer(&intel->ctx); 875 } 876 else { 877 _mesa_make_current(NULL, NULL, NULL); 878 } 879 880 return true; 881} 882 883/** 884 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 885 * 886 * To determine which DRI buffers to request, examine the renderbuffers 887 * attached to the drawable's framebuffer. Then request the buffers with 888 * DRI2GetBuffers() or DRI2GetBuffersWithFormat(). 889 * 890 * This is called from intel_update_renderbuffers(). It is used only if either 891 * the hardware or the X driver lacks separate stencil support. 892 * 893 * \param drawable Drawable whose buffers are queried. 894 * \param buffers [out] List of buffers returned by DRI2 query. 895 * \param buffer_count [out] Number of buffers returned. 896 * 897 * \see intel_update_renderbuffers() 898 * \see DRI2GetBuffers() 899 * \see DRI2GetBuffersWithFormat() 900 */ 901static void 902intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel, 903 __DRIdrawable *drawable, 904 __DRIbuffer **buffers, 905 int *buffer_count) 906{ 907 assert(!intel->must_use_separate_stencil); 908 909 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 910 struct gl_framebuffer *fb = drawable->driverPrivate; 911 912 if (screen->dri2.loader 913 && screen->dri2.loader->base.version > 2 914 && screen->dri2.loader->getBuffersWithFormat != NULL) { 915 916 int i = 0; 917 const int max_attachments = 4; 918 unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned)); 919 920 struct intel_renderbuffer *front_rb; 921 struct intel_renderbuffer *back_rb; 922 struct intel_renderbuffer *depth_rb; 923 struct intel_renderbuffer *stencil_rb; 924 925 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 926 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 927 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 928 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 929 930 if ((intel->is_front_buffer_rendering || 931 intel->is_front_buffer_reading || 932 !back_rb) && front_rb) { 933 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 934 attachments[i++] = intel_bits_per_pixel(front_rb); 935 } 936 937 if (back_rb) { 938 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 939 attachments[i++] = intel_bits_per_pixel(back_rb); 940 } 941 942 if (depth_rb && stencil_rb) { 943 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL; 944 attachments[i++] = intel_bits_per_pixel(depth_rb); 945 } else if (depth_rb) { 946 attachments[i++] = __DRI_BUFFER_DEPTH; 947 attachments[i++] = intel_bits_per_pixel(depth_rb); 948 } else if (stencil_rb) { 949 attachments[i++] = __DRI_BUFFER_STENCIL; 950 attachments[i++] = intel_bits_per_pixel(stencil_rb); 951 } 952 953 assert(i <= 2 * max_attachments); 954 955 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 956 &drawable->w, 957 &drawable->h, 958 attachments, i / 2, 959 buffer_count, 960 drawable->loaderPrivate); 961 free(attachments); 962 963 } else if (screen->dri2.loader) { 964 965 int i = 0; 966 const int max_attachments = 4; 967 unsigned *attachments = calloc(max_attachments, sizeof(unsigned)); 968 969 if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT)) 970 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 971 if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT)) 972 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 973 if (intel_get_renderbuffer(fb, BUFFER_DEPTH)) 974 attachments[i++] = __DRI_BUFFER_DEPTH; 975 if (intel_get_renderbuffer(fb, BUFFER_STENCIL)) 976 attachments[i++] = __DRI_BUFFER_STENCIL; 977 978 assert(i <= max_attachments); 979 980 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 981 &drawable->w, 982 &drawable->h, 983 attachments, i, 984 buffer_count, 985 drawable->loaderPrivate); 986 free(attachments); 987 988 } else { 989 *buffers = NULL; 990 *buffer_count = 0; 991 } 992} 993 994/** 995 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 996 * 997 * This is called from intel_update_renderbuffers(). It is used only if 998 * either the hardware or the X driver lacks separate stencil support. 999 * 1000 * \par Note: 1001 * DRI buffers whose attachment point is DRI2BufferStencil or 1002 * DRI2BufferDepthStencil are handled as special cases. 1003 * 1004 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1005 * that is passed to intel_region_alloc_for_handle(). 1006 * 1007 * \see intel_update_renderbuffers() 1008 * \see intel_region_alloc_for_handle() 1009 */ 1010static void 1011intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel, 1012 __DRIdrawable *drawable, 1013 __DRIbuffer *buffer, 1014 struct intel_renderbuffer *rb, 1015 const char *buffer_name) 1016{ 1017 assert(!intel->must_use_separate_stencil); 1018 1019 struct gl_framebuffer *fb = drawable->driverPrivate; 1020 struct intel_renderbuffer *depth_rb = NULL; 1021 1022 if (!rb) 1023 return; 1024 1025 if (rb->mt && 1026 rb->mt->region && 1027 rb->mt->region->name == buffer->name) 1028 return; 1029 1030 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1031 fprintf(stderr, 1032 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1033 buffer->name, buffer->attachment, 1034 buffer->cpp, buffer->pitch); 1035 } 1036 1037 bool identify_depth_and_stencil = false; 1038 if (buffer->attachment == __DRI_BUFFER_STENCIL) { 1039 struct intel_renderbuffer *depth_rb = 1040 intel_get_renderbuffer(fb, BUFFER_DEPTH); 1041 identify_depth_and_stencil = depth_rb && depth_rb->mt; 1042 } 1043 1044 if (identify_depth_and_stencil) { 1045 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1046 fprintf(stderr, "(reusing depth buffer as stencil)\n"); 1047 } 1048 intel_miptree_reference(&rb->mt, depth_rb->mt); 1049 } else { 1050 intel_miptree_release(&rb->mt); 1051 struct intel_region *region = 1052 intel_region_alloc_for_handle(intel->intelScreen, 1053 buffer->cpp, 1054 drawable->w, 1055 drawable->h, 1056 buffer->pitch / buffer->cpp, 1057 buffer->name, 1058 buffer_name); 1059 if (!region) 1060 return; 1061 1062 rb->mt = intel_miptree_create_for_region(intel, 1063 GL_TEXTURE_2D, 1064 intel_rb_format(rb), 1065 region); 1066 intel_region_release(®ion); 1067 if (!rb->mt) 1068 return; 1069 } 1070 1071 if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) { 1072 struct intel_renderbuffer *stencil_rb = 1073 intel_get_renderbuffer(fb, BUFFER_STENCIL); 1074 1075 if (!stencil_rb) 1076 return; 1077 1078 /* The rb passed in is the BUFFER_DEPTH attachment, and we need 1079 * to associate this region to BUFFER_STENCIL as well. 1080 */ 1081 intel_miptree_reference(&stencil_rb->mt, rb->mt); 1082 } 1083} 1084 1085/** 1086 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 1087 * 1088 * To determine which DRI buffers to request, examine the renderbuffers 1089 * attached to the drawable's framebuffer. Then request the buffers with 1090 * DRI2GetBuffersWithFormat(). 1091 * 1092 * This is called from intel_update_renderbuffers(). It is used when 1) the 1093 * hardware supports separate stencil and 2) the X driver's separate stencil 1094 * support has been verified to work or is still unknown. 1095 * 1096 * \param drawable Drawable whose buffers are queried. 1097 * \param buffers [out] List of buffers returned by DRI2 query. 1098 * \param buffer_count [out] Number of buffers returned. 1099 * \param attachments [out] List of pairs (attachment_point, bits_per_pixel) 1100 * that were submitted in the DRI2 query. Number of pairs 1101 * is same as buffer_count. 1102 * 1103 * \see intel_update_renderbuffers() 1104 * \see DRI2GetBuffersWithFormat() 1105 * \see enum intel_dri2_has_hiz 1106 */ 1107static void 1108intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel, 1109 __DRIdrawable *drawable, 1110 __DRIbuffer **buffers, 1111 unsigned **attachments, 1112 int *count) 1113{ 1114 assert(intel->has_separate_stencil); 1115 1116 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 1117 struct gl_framebuffer *fb = drawable->driverPrivate; 1118 1119 const int max_attachments = 5; 1120 int i = 0; 1121 1122 *attachments = calloc(2 * max_attachments, sizeof(unsigned)); 1123 if (!*attachments) { 1124 *buffers = NULL; 1125 *count = 0; 1126 return; 1127 } 1128 1129 struct intel_renderbuffer *front_rb; 1130 struct intel_renderbuffer *back_rb; 1131 struct intel_renderbuffer *depth_rb; 1132 struct intel_renderbuffer *stencil_rb; 1133 1134 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1135 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1136 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 1137 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 1138 1139 if ((intel->is_front_buffer_rendering || 1140 intel->is_front_buffer_reading || 1141 !back_rb) && front_rb) { 1142 (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT; 1143 (*attachments)[i++] = intel_bits_per_pixel(front_rb); 1144 } 1145 1146 if (back_rb) { 1147 (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT; 1148 (*attachments)[i++] = intel_bits_per_pixel(back_rb); 1149 } 1150 1151 /* 1152 * We request a separate stencil buffer, and perhaps a hiz buffer too, even 1153 * if we do not yet know if the X driver supports it. See the comments for 1154 * 'enum intel_dri2_has_hiz'. 1155 */ 1156 1157 if (depth_rb) { 1158 (*attachments)[i++] = __DRI_BUFFER_DEPTH; 1159 (*attachments)[i++] = intel_bits_per_pixel(depth_rb); 1160 1161 if (intel->vtbl.is_hiz_depth_format(intel, intel_rb_format(depth_rb))) { 1162 /* Depth and hiz buffer have same bpp. */ 1163 (*attachments)[i++] = __DRI_BUFFER_HIZ; 1164 (*attachments)[i++] = intel_bits_per_pixel(depth_rb); 1165 } 1166 } 1167 1168 if (stencil_rb) { 1169 assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8); 1170 (*attachments)[i++] = __DRI_BUFFER_STENCIL; 1171 (*attachments)[i++] = intel_bits_per_pixel(stencil_rb); 1172 } 1173 1174 assert(i <= 2 * max_attachments); 1175 1176 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 1177 &drawable->w, 1178 &drawable->h, 1179 *attachments, i / 2, 1180 count, 1181 drawable->loaderPrivate); 1182 1183 if (!*buffers) { 1184 free(*attachments); 1185 *attachments = NULL; 1186 *count = 0; 1187 } 1188} 1189 1190/** 1191 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 1192 * 1193 * This is called from intel_update_renderbuffers(). It is used when 1) the 1194 * hardware supports separate stencil and 2) the X driver's separate stencil 1195 * support has been verified to work or is still unknown. 1196 * 1197 * \par Note: 1198 * DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz 1199 * are handled as special cases. 1200 * 1201 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1202 * that is passed to intel_region_alloc_for_handle(). 1203 * 1204 * \see intel_update_renderbuffers() 1205 * \see intel_region_alloc_for_handle() 1206 * \see enum intel_dri2_has_hiz 1207 */ 1208static void 1209intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel, 1210 __DRIdrawable *drawable, 1211 __DRIbuffer *buffer, 1212 struct intel_renderbuffer *rb, 1213 const char *buffer_name) 1214{ 1215 assert(intel->has_separate_stencil); 1216 assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL); 1217 1218 if (!rb) 1219 return; 1220 1221 /* Check if we failed to allocate the depth miptree earlier. */ 1222 if (buffer->attachment == __DRI_BUFFER_HIZ && rb->mt == NULL) 1223 return; 1224 1225 /* If the renderbuffer's and DRIbuffer's regions match, then continue. */ 1226 if ((buffer->attachment != __DRI_BUFFER_HIZ && 1227 rb->mt && 1228 rb->mt->region && 1229 rb->mt->region->name == buffer->name) || 1230 (buffer->attachment == __DRI_BUFFER_HIZ && 1231 rb->mt && 1232 rb->mt->hiz_mt && 1233 rb->mt->hiz_mt->region->name == buffer->name)) { 1234 return; 1235 } 1236 1237 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1238 fprintf(stderr, 1239 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1240 buffer->name, buffer->attachment, 1241 buffer->cpp, buffer->pitch); 1242 } 1243 1244 int buffer_width; 1245 int buffer_height; 1246 int buffer_cpp = buffer->cpp; 1247 int buffer_pitch = buffer->pitch; 1248 if (buffer->attachment == __DRI_BUFFER_STENCIL) { 1249 /* Stencil buffers use W tiling, a tiling format that the DRM functions 1250 * don't properly account for. Therefore, when we allocate a stencil 1251 * buffer that is private to Mesa (see intel_miptree_create), we round 1252 * the height and width up to the next multiple of the tile size (64x64) 1253 * and then ask DRM to allocate an untiled buffer. Consequently, the 1254 * height and the width stored in the stencil buffer's region structure 1255 * are always multiples of 64, even if the stencil buffer itself is 1256 * smaller. 1257 * 1258 * To avoid inconsistencies between how we represent private buffers and 1259 * buffers shared with the window system, round up the height and width 1260 * for window system buffers too. 1261 */ 1262 buffer_width = ALIGN(drawable->w, 64); 1263 buffer_height = ALIGN(drawable->h, 64); 1264 1265 /* Versions 2.17.0 and earlier of xf86-video-intel (a.k.a. the DDX) lie 1266 * and send cpp and pitch values that are two times too large for 1267 * stencil buffers. Hopefully this will be fixed in a future version 1268 * of xf86-video-intel, but for now detect the bug by checking if cpp 1269 * is 2, and fixing cpp and pitch if it is. 1270 */ 1271 if (buffer_cpp == 2) { 1272 buffer_cpp = 1; 1273 buffer_pitch /= 2; 1274 } 1275 } else { 1276 buffer_width = drawable->w; 1277 buffer_height = drawable->h; 1278 } 1279 1280 /* Release the buffer storage now in case we have to return early 1281 * due to failure to allocate new storage. 1282 */ 1283 if (buffer->attachment == __DRI_BUFFER_HIZ) { 1284 assert(rb->mt); 1285 intel_miptree_release(&rb->mt->hiz_mt); 1286 } else { 1287 intel_miptree_release(&rb->mt); 1288 } 1289 1290 struct intel_region *region = 1291 intel_region_alloc_for_handle(intel->intelScreen, 1292 buffer_cpp, 1293 buffer_width, 1294 buffer_height, 1295 buffer_pitch / buffer_cpp, 1296 buffer->name, 1297 buffer_name); 1298 if (!region) 1299 return; 1300 1301 struct intel_mipmap_tree *mt = 1302 intel_miptree_create_for_region(intel, 1303 GL_TEXTURE_2D, 1304 intel_rb_format(rb), 1305 region); 1306 intel_region_release(®ion); 1307 1308 /* Associate buffer with new storage. */ 1309 if (buffer->attachment == __DRI_BUFFER_HIZ) { 1310 assert(rb->mt); 1311 rb->mt->hiz_mt = mt; 1312 } else { 1313 rb->mt = mt; 1314 } 1315} 1316 1317/** 1318 * \brief Verify that the X driver supports hiz and separate stencil. 1319 * 1320 * This implements the cleanup stage of the handshake described in the 1321 * comments for 'enum intel_dri2_has_hiz'. 1322 * 1323 * This should be called from intel_update_renderbuffers() after 1) the 1324 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat() 1325 * and 2) the DRM region of each returned DRIbuffer has been assigned to the 1326 * appropriate intel_renderbuffer. Furthermore, this should be called *only* 1327 * when 1) intel_update_renderbuffers() tried to used the X driver's separate 1328 * stencil functionality and 2) it has not yet been determined if the X driver 1329 * supports separate stencil. 1330 * 1331 * If we determine that the X driver does have support, then we set 1332 * intel_screen.dri2_has_hiz to true and return. 1333 * 1334 * If we determine that the X driver lacks support, and we requested 1335 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by 1336 * taking the following actions: 1337 * 1. Discard the framebuffer's stencil and depth renderbuffers. 1338 * 2. Create a combined depth/stencil renderbuffer and attach 1339 * it to the framebuffer's depth and stencil attachment points. 1340 * 3. Query the drawable for a new set of buffers, which consists of the 1341 * originally requested set plus DRI2BufferDepthStencil. 1342 * 4. Assign the DRI2BufferDepthStencil's DRM region to the new 1343 * depth/stencil renderbuffer. 1344 * 1345 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN 1346 * 1347 * \param drawable Drawable whose buffers were queried. 1348 * 1349 * \param buffers [in/out] As input, the buffer list returned by the 1350 * original DRI2 query. As output, the current buffer 1351 * list, which may have been altered by a new DRI2 query. 1352 * 1353 * \param attachments [in/out] As input, the attachment list submitted 1354 * in the original DRI2 query. As output, the attachment 1355 * list that was submitted in the DRI2 query that 1356 * obtained the current buffer list, as returned in the 1357 * output parameter \c buffers. (Note: If no new query 1358 * was made, then the list remains unaltered). 1359 * 1360 * \param count [out] Number of buffers in the current buffer list, as 1361 * returned in the output parameter \c buffers. 1362 * 1363 * \see enum intel_dri2_has_hiz 1364 * \see struct intel_screen::dri2_has_hiz 1365 * \see intel_update_renderbuffers 1366 */ 1367static void 1368intel_verify_dri2_has_hiz(struct intel_context *intel, 1369 __DRIdrawable *drawable, 1370 __DRIbuffer **buffers, 1371 unsigned **attachments, 1372 int *count) 1373{ 1374 assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN); 1375 1376 struct gl_framebuffer *fb = drawable->driverPrivate; 1377 struct intel_renderbuffer *stencil_rb = 1378 intel_get_renderbuffer(fb, BUFFER_STENCIL); 1379 1380 if (stencil_rb) { 1381 /* 1382 * We requested a DRI2BufferStencil without knowing if the X driver 1383 * supports it. Now, check if X handled the request correctly and clean 1384 * up if it did not. (See comments for 'enum intel_dri2_has_hiz'). 1385 */ 1386 struct intel_renderbuffer *depth_rb = 1387 intel_get_renderbuffer(fb, BUFFER_DEPTH); 1388 assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8); 1389 assert(depth_rb && intel_rb_format(depth_rb) == MESA_FORMAT_X8_Z24); 1390 1391 if (stencil_rb->mt->region->tiling == I915_TILING_NONE) { 1392 /* 1393 * The stencil buffer is actually W tiled. The region's tiling is 1394 * I915_TILING_NONE, however, because the GTT is incapable of W 1395 * fencing. 1396 */ 1397 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE; 1398 return; 1399 } else { 1400 /* 1401 * Oops... the screen doesn't support separate stencil. Discard the 1402 * separate depth and stencil buffers and replace them with 1403 * a combined depth/stencil buffer. Discard the hiz buffer too. 1404 */ 1405 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE; 1406 if (intel->must_use_separate_stencil) { 1407 _mesa_problem(&intel->ctx, 1408 "intel_context requires separate stencil, but the " 1409 "DRIscreen does not support it. You may need to " 1410 "upgrade the Intel X driver to 2.16.0"); 1411 abort(); 1412 } 1413 1414 /* 1. Discard depth and stencil renderbuffers. */ 1415 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH); 1416 depth_rb = NULL; 1417 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL); 1418 stencil_rb = NULL; 1419 1420 /* 2. Create new depth/stencil renderbuffer. */ 1421 struct intel_renderbuffer *depth_stencil_rb = 1422 intel_create_renderbuffer(MESA_FORMAT_S8_Z24); 1423 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base.Base); 1424 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base.Base); 1425 1426 /* 3. Append DRI2BufferDepthStencil to attachment list. */ 1427 int old_count = *count; 1428 unsigned int *old_attachments = *attachments; 1429 *count = old_count + 1; 1430 *attachments = malloc(2 * (*count) * sizeof(unsigned)); 1431 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned)); 1432 free(old_attachments); 1433 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL; 1434 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb); 1435 1436 /* 4. Request new set of DRI2 attachments. */ 1437 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 1438 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 1439 &drawable->w, 1440 &drawable->h, 1441 *attachments, 1442 *count, 1443 count, 1444 drawable->loaderPrivate); 1445 if (!*buffers) 1446 return; 1447 1448 /* 1449 * I don't know how to recover from the failure assertion below. 1450 * Rather than fail gradually and unexpectedly, we should just die 1451 * now. 1452 */ 1453 assert(*count == old_count + 1); 1454 1455 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */ 1456 __DRIbuffer *depth_stencil_buffer = NULL; 1457 for (int i = 0; i < *count; ++i) { 1458 if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) { 1459 depth_stencil_buffer = &(*buffers)[i]; 1460 break; 1461 } 1462 } 1463 struct intel_region *region = 1464 intel_region_alloc_for_handle(intel->intelScreen, 1465 depth_stencil_buffer->cpp, 1466 drawable->w, 1467 drawable->h, 1468 depth_stencil_buffer->pitch 1469 / depth_stencil_buffer->cpp, 1470 depth_stencil_buffer->name, 1471 "dri2 depth / stencil buffer"); 1472 if (!region) 1473 return; 1474 1475 struct intel_mipmap_tree *mt = 1476 intel_miptree_create_for_region(intel, 1477 GL_TEXTURE_2D, 1478 intel_rb_format(depth_stencil_rb), 1479 region); 1480 intel_region_release(®ion); 1481 if (!mt) 1482 return; 1483 1484 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->mt, mt); 1485 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->mt, mt); 1486 intel_miptree_release(&mt); 1487 } 1488 } 1489 1490 if (intel_framebuffer_has_hiz(fb)) { 1491 /* 1492 * In the future, the driver may advertise a GL config with hiz 1493 * compatible depth bits and 0 stencil bits (for example, when the 1494 * driver gains support for float32 depth buffers). When that day comes, 1495 * here we need to verify that the X driver does in fact support hiz and 1496 * clean up if it doesn't. 1497 * 1498 * Presently, however, no verification or clean up is necessary, and 1499 * execution should not reach here. If the framebuffer still has a hiz 1500 * region, then we have already set dri2_has_hiz to true after 1501 * confirming above that the stencil buffer is W tiled. 1502 */ 1503 assert(0); 1504 } 1505} 1506