intel_context.c revision a9b03aaebf7ada116d0c63a0f00b50e7b5b2f1eb
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include "main/glheader.h" 30#include "main/context.h" 31#include "main/arrayobj.h" 32#include "main/extensions.h" 33#include "main/framebuffer.h" 34#include "main/imports.h" 35#include "main/points.h" 36 37#include "swrast/swrast.h" 38#include "swrast_setup/swrast_setup.h" 39#include "tnl/tnl.h" 40#include "drivers/common/driverfuncs.h" 41 42#include "i830_dri.h" 43 44#include "intel_chipset.h" 45#include "intel_buffers.h" 46#include "intel_tex.h" 47#include "intel_batchbuffer.h" 48#include "intel_clear.h" 49#include "intel_extensions.h" 50#include "intel_pixel.h" 51#include "intel_regions.h" 52#include "intel_buffer_objects.h" 53#include "intel_fbo.h" 54#include "intel_decode.h" 55#include "intel_bufmgr.h" 56#include "intel_screen.h" 57#include "intel_swapbuffers.h" 58 59#include "drirenderbuffer.h" 60#include "vblank.h" 61#include "utils.h" 62#include "xmlpool.h" /* for symbolic values of enum-type options */ 63 64 65#ifndef INTEL_DEBUG 66int INTEL_DEBUG = (0); 67#endif 68 69 70#define DRIVER_DATE "20090114" 71#define DRIVER_DATE_GEM "GEM " DRIVER_DATE 72 73 74static const GLubyte * 75intelGetString(GLcontext * ctx, GLenum name) 76{ 77 const struct intel_context *const intel = intel_context(ctx); 78 const char *chipset; 79 static char buffer[128]; 80 81 switch (name) { 82 case GL_VENDOR: 83 return (GLubyte *) "Tungsten Graphics, Inc"; 84 break; 85 86 case GL_RENDERER: 87 switch (intel->intelScreen->deviceID) { 88 case PCI_CHIP_845_G: 89 chipset = "Intel(R) 845G"; 90 break; 91 case PCI_CHIP_I830_M: 92 chipset = "Intel(R) 830M"; 93 break; 94 case PCI_CHIP_I855_GM: 95 chipset = "Intel(R) 852GM/855GM"; 96 break; 97 case PCI_CHIP_I865_G: 98 chipset = "Intel(R) 865G"; 99 break; 100 case PCI_CHIP_I915_G: 101 chipset = "Intel(R) 915G"; 102 break; 103 case PCI_CHIP_E7221_G: 104 chipset = "Intel (R) E7221G (i915)"; 105 break; 106 case PCI_CHIP_I915_GM: 107 chipset = "Intel(R) 915GM"; 108 break; 109 case PCI_CHIP_I945_G: 110 chipset = "Intel(R) 945G"; 111 break; 112 case PCI_CHIP_I945_GM: 113 chipset = "Intel(R) 945GM"; 114 break; 115 case PCI_CHIP_I945_GME: 116 chipset = "Intel(R) 945GME"; 117 break; 118 case PCI_CHIP_G33_G: 119 chipset = "Intel(R) G33"; 120 break; 121 case PCI_CHIP_Q35_G: 122 chipset = "Intel(R) Q35"; 123 break; 124 case PCI_CHIP_Q33_G: 125 chipset = "Intel(R) Q33"; 126 break; 127 case PCI_CHIP_IGD_GM: 128 case PCI_CHIP_IGD_G: 129 chipset = "Intel(R) IGD"; 130 break; 131 case PCI_CHIP_I965_Q: 132 chipset = "Intel(R) 965Q"; 133 break; 134 case PCI_CHIP_I965_G: 135 case PCI_CHIP_I965_G_1: 136 chipset = "Intel(R) 965G"; 137 break; 138 case PCI_CHIP_I946_GZ: 139 chipset = "Intel(R) 946GZ"; 140 break; 141 case PCI_CHIP_I965_GM: 142 chipset = "Intel(R) 965GM"; 143 break; 144 case PCI_CHIP_I965_GME: 145 chipset = "Intel(R) 965GME/GLE"; 146 break; 147 case PCI_CHIP_GM45_GM: 148 chipset = "Mobile Intel® GM45 Express Chipset"; 149 break; 150 case PCI_CHIP_IGD_E_G: 151 chipset = "Intel(R) Integrated Graphics Device"; 152 break; 153 case PCI_CHIP_G45_G: 154 chipset = "Intel(R) G45/G43"; 155 break; 156 case PCI_CHIP_Q45_G: 157 chipset = "Intel(R) Q45/Q43"; 158 break; 159 case PCI_CHIP_G41_G: 160 chipset = "Intel(R) G41"; 161 break; 162 default: 163 chipset = "Unknown Intel Chipset"; 164 break; 165 } 166 167 (void) driGetRendererString(buffer, chipset, 168 (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE, 169 0); 170 return (GLubyte *) buffer; 171 172 default: 173 return NULL; 174 } 175} 176 177static unsigned 178intel_bits_per_pixel(const struct intel_renderbuffer *rb) 179{ 180 switch (rb->Base._ActualFormat) { 181 case GL_RGB5: 182 case GL_DEPTH_COMPONENT16: 183 return 16; 184 case GL_RGB8: 185 case GL_RGBA8: 186 case GL_DEPTH_COMPONENT24: 187 case GL_DEPTH24_STENCIL8_EXT: 188 case GL_STENCIL_INDEX8_EXT: 189 return 32; 190 default: 191 return 0; 192 } 193} 194 195void 196intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) 197{ 198 struct intel_framebuffer *intel_fb = drawable->driverPrivate; 199 struct intel_renderbuffer *rb; 200 struct intel_region *region, *depth_region; 201 struct intel_context *intel = context->driverPrivate; 202 __DRIbuffer *buffers = NULL; 203 __DRIscreen *screen; 204 int i, count; 205 unsigned int attachments[10]; 206 uint32_t name; 207 const char *region_name; 208 209 if (INTEL_DEBUG & DEBUG_DRI) 210 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 211 212 screen = intel->intelScreen->driScrnPriv; 213 214 if (screen->dri2.loader 215 && (screen->dri2.loader->base.version > 2) 216 && (screen->dri2.loader->getBuffersWithFormat != NULL)) { 217 struct intel_renderbuffer *depth_rb; 218 struct intel_renderbuffer *stencil_rb; 219 220 i = 0; 221 if ((intel->is_front_buffer_rendering || 222 intel->is_front_buffer_reading || 223 !intel_fb->color_rb[1]) 224 && intel_fb->color_rb[0]) { 225 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 226 attachments[i++] = intel_bits_per_pixel(intel_fb->color_rb[0]); 227 } 228 229 if (intel_fb->color_rb[1]) { 230 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 231 attachments[i++] = intel_bits_per_pixel(intel_fb->color_rb[1]); 232 } 233 234 depth_rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH); 235 stencil_rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL); 236 237 if ((depth_rb != NULL) && (stencil_rb != NULL)) { 238 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL; 239 attachments[i++] = intel_bits_per_pixel(depth_rb); 240 } else if (depth_rb != NULL) { 241 attachments[i++] = __DRI_BUFFER_DEPTH; 242 attachments[i++] = intel_bits_per_pixel(depth_rb); 243 } else if (stencil_rb != NULL) { 244 attachments[i++] = __DRI_BUFFER_STENCIL; 245 attachments[i++] = intel_bits_per_pixel(stencil_rb); 246 } 247 248 buffers = 249 (*screen->dri2.loader->getBuffersWithFormat)(drawable, 250 &drawable->w, 251 &drawable->h, 252 attachments, i / 2, 253 &count, 254 drawable->loaderPrivate); 255 } else if (screen->dri2.loader) { 256 i = 0; 257 if (intel_fb->color_rb[0]) 258 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 259 if (intel_fb->color_rb[1]) 260 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 261 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH)) 262 attachments[i++] = __DRI_BUFFER_DEPTH; 263 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL)) 264 attachments[i++] = __DRI_BUFFER_STENCIL; 265 266 buffers = (*screen->dri2.loader->getBuffers)(drawable, 267 &drawable->w, 268 &drawable->h, 269 attachments, i, 270 &count, 271 drawable->loaderPrivate); 272 } 273 274 if (buffers == NULL) 275 return; 276 277 drawable->x = 0; 278 drawable->y = 0; 279 drawable->backX = 0; 280 drawable->backY = 0; 281 drawable->numClipRects = 1; 282 drawable->pClipRects[0].x1 = 0; 283 drawable->pClipRects[0].y1 = 0; 284 drawable->pClipRects[0].x2 = drawable->w; 285 drawable->pClipRects[0].y2 = drawable->h; 286 drawable->numBackClipRects = 1; 287 drawable->pBackClipRects[0].x1 = 0; 288 drawable->pBackClipRects[0].y1 = 0; 289 drawable->pBackClipRects[0].x2 = drawable->w; 290 drawable->pBackClipRects[0].y2 = drawable->h; 291 292 depth_region = NULL; 293 for (i = 0; i < count; i++) { 294 switch (buffers[i].attachment) { 295 case __DRI_BUFFER_FRONT_LEFT: 296 rb = intel_fb->color_rb[0]; 297 region_name = "dri2 front buffer"; 298 break; 299 300 case __DRI_BUFFER_FAKE_FRONT_LEFT: 301 rb = intel_fb->color_rb[0]; 302 region_name = "dri2 fake front buffer"; 303 break; 304 305 case __DRI_BUFFER_BACK_LEFT: 306 rb = intel_fb->color_rb[1]; 307 region_name = "dri2 back buffer"; 308 break; 309 310 case __DRI_BUFFER_DEPTH: 311 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH); 312 region_name = "dri2 depth buffer"; 313 break; 314 315 case __DRI_BUFFER_DEPTH_STENCIL: 316 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH); 317 region_name = "dri2 depth / stencil buffer"; 318 break; 319 320 case __DRI_BUFFER_STENCIL: 321 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL); 322 region_name = "dri2 stencil buffer"; 323 break; 324 325 case __DRI_BUFFER_ACCUM: 326 default: 327 fprintf(stderr, 328 "unhandled buffer attach event, attacment type %d\n", 329 buffers[i].attachment); 330 return; 331 } 332 333 if (rb == NULL) 334 continue; 335 336 if (rb->region) { 337 dri_bo_flink(rb->region->buffer, &name); 338 if (name == buffers[i].name) 339 continue; 340 } 341 342 if (INTEL_DEBUG & DEBUG_DRI) 343 fprintf(stderr, 344 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 345 buffers[i].name, buffers[i].attachment, 346 buffers[i].cpp, buffers[i].pitch); 347 348 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) { 349 if (INTEL_DEBUG & DEBUG_DRI) 350 fprintf(stderr, "(reusing depth buffer as stencil)\n"); 351 intel_region_reference(®ion, depth_region); 352 } 353 else 354 region = intel_region_alloc_for_handle(intel, buffers[i].cpp, 355 drawable->w, 356 drawable->h, 357 buffers[i].pitch / buffers[i].cpp, 358 buffers[i].name, 359 region_name); 360 361 if (buffers[i].attachment == __DRI_BUFFER_DEPTH) 362 depth_region = region; 363 364 intel_renderbuffer_set_region(rb, region); 365 intel_region_release(®ion); 366 367 if (buffers[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) { 368 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL); 369 if (rb != NULL) { 370 struct intel_region *stencil_region = NULL; 371 372 if (rb->region) { 373 dri_bo_flink(rb->region->buffer, &name); 374 if (name == buffers[i].name) 375 continue; 376 } 377 378 intel_region_reference(&stencil_region, region); 379 intel_renderbuffer_set_region(rb, stencil_region); 380 intel_region_release(&stencil_region); 381 } 382 } 383 } 384 385 driUpdateFramebufferSize(&intel->ctx, drawable); 386} 387 388void 389intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h) 390{ 391 struct intel_context *intel = intel_context(ctx); 392 __DRIcontext *driContext = intel->driContext; 393 void (*old_viewport)(GLcontext *ctx, GLint x, GLint y, 394 GLsizei w, GLsizei h); 395 396 if (!driContext->driScreenPriv->dri2.enabled) 397 return; 398 399 if (!intel->internal_viewport_call && ctx->DrawBuffer->Name == 0) { 400 intel_update_renderbuffers(driContext, driContext->driDrawablePriv); 401 if (driContext->driDrawablePriv != driContext->driReadablePriv) 402 intel_update_renderbuffers(driContext, driContext->driReadablePriv); 403 } 404 405 old_viewport = ctx->Driver.Viewport; 406 ctx->Driver.Viewport = NULL; 407 intel->driDrawable = driContext->driDrawablePriv; 408 intelWindowMoved(intel); 409 intel_draw_buffer(ctx, intel->ctx.DrawBuffer); 410 ctx->Driver.Viewport = old_viewport; 411} 412 413 414static const struct dri_debug_control debug_control[] = { 415 { "tex", DEBUG_TEXTURE}, 416 { "state", DEBUG_STATE}, 417 { "ioctl", DEBUG_IOCTL}, 418 { "blit", DEBUG_BLIT}, 419 { "mip", DEBUG_MIPTREE}, 420 { "fall", DEBUG_FALLBACKS}, 421 { "verb", DEBUG_VERBOSE}, 422 { "bat", DEBUG_BATCH}, 423 { "pix", DEBUG_PIXEL}, 424 { "buf", DEBUG_BUFMGR}, 425 { "reg", DEBUG_REGION}, 426 { "fbo", DEBUG_FBO}, 427 { "lock", DEBUG_LOCK}, 428 { "sync", DEBUG_SYNC}, 429 { "prim", DEBUG_PRIMS }, 430 { "vert", DEBUG_VERTS }, 431 { "dri", DEBUG_DRI }, 432 { "dma", DEBUG_DMA }, 433 { "san", DEBUG_SANITY }, 434 { "sleep", DEBUG_SLEEP }, 435 { "stats", DEBUG_STATS }, 436 { "tile", DEBUG_TILE }, 437 { "sing", DEBUG_SINGLE_THREAD }, 438 { "thre", DEBUG_SINGLE_THREAD }, 439 { "wm", DEBUG_WM }, 440 { "urb", DEBUG_URB }, 441 { "vs", DEBUG_VS }, 442 { NULL, 0 } 443}; 444 445 446static void 447intelInvalidateState(GLcontext * ctx, GLuint new_state) 448{ 449 struct intel_context *intel = intel_context(ctx); 450 451 _swrast_InvalidateState(ctx, new_state); 452 _swsetup_InvalidateState(ctx, new_state); 453 _vbo_InvalidateState(ctx, new_state); 454 _tnl_InvalidateState(ctx, new_state); 455 _tnl_invalidate_vertex_state(ctx, new_state); 456 457 intel->NewGLState |= new_state; 458 459 if (intel->vtbl.invalidate_state) 460 intel->vtbl.invalidate_state( intel, new_state ); 461} 462 463static void 464intel_flush(GLcontext *ctx, GLboolean needs_mi_flush) 465{ 466 struct intel_context *intel = intel_context(ctx); 467 468 if (intel->Fallback) 469 _swrast_flush(ctx); 470 471 if (!IS_965(intel->intelScreen->deviceID)) 472 INTEL_FIREVERTICES(intel); 473 474 /* Emit a flush so that any frontbuffer rendering that might have occurred 475 * lands onscreen in a timely manner, even if the X Server doesn't trigger 476 * a flush for us. 477 */ 478 if (needs_mi_flush) 479 intel_batchbuffer_emit_mi_flush(intel->batch); 480 481 if (intel->batch->map != intel->batch->ptr) 482 intel_batchbuffer_flush(intel->batch); 483 484 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) { 485 __DRIscreen *const screen = intel->intelScreen->driScrnPriv; 486 487 if (screen->dri2.loader && 488 (screen->dri2.loader->base.version >= 2) 489 && (screen->dri2.loader->flushFrontBuffer != NULL)) { 490 (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable, 491 intel->driDrawable->loaderPrivate); 492 493 /* Only clear the dirty bit if front-buffer rendering is no longer 494 * enabled. This is done so that the dirty bit can only be set in 495 * glDrawBuffer. Otherwise the dirty bit would have to be set at 496 * each of N places that do rendering. This has worse performances, 497 * but it is much easier to get correct. 498 */ 499 if (intel->is_front_buffer_rendering) { 500 intel->front_buffer_dirty = GL_FALSE; 501 } 502 } 503 } 504} 505 506void 507intelFlush(GLcontext * ctx) 508{ 509 intel_flush(ctx, GL_FALSE); 510} 511 512static void 513intel_glFlush(GLcontext *ctx) 514{ 515 intel_flush(ctx, GL_TRUE); 516} 517 518void 519intelFinish(GLcontext * ctx) 520{ 521 struct gl_framebuffer *fb = ctx->DrawBuffer; 522 int i; 523 524 intelFlush(ctx); 525 526 for (i = 0; i < fb->_NumColorDrawBuffers; i++) { 527 struct intel_renderbuffer *irb; 528 529 irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); 530 531 if (irb->region) 532 dri_bo_wait_rendering(irb->region->buffer); 533 } 534 if (fb->_DepthBuffer) { 535 /* XXX: Wait on buffer idle */ 536 } 537} 538 539void 540intelInitDriverFunctions(struct dd_function_table *functions) 541{ 542 _mesa_init_driver_functions(functions); 543 544 functions->Flush = intel_glFlush; 545 functions->Finish = intelFinish; 546 functions->GetString = intelGetString; 547 functions->UpdateState = intelInvalidateState; 548 549 functions->CopyColorTable = _swrast_CopyColorTable; 550 functions->CopyColorSubTable = _swrast_CopyColorSubTable; 551 functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D; 552 functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D; 553 554 intelInitTextureFuncs(functions); 555 intelInitTextureImageFuncs(functions); 556 intelInitTextureSubImageFuncs(functions); 557 intelInitTextureCopyImageFuncs(functions); 558 intelInitStateFuncs(functions); 559 intelInitClearFuncs(functions); 560 intelInitBufferFuncs(functions); 561 intelInitPixelFuncs(functions); 562 intelInitBufferObjectFuncs(functions); 563} 564 565 566GLboolean 567intelInitContext(struct intel_context *intel, 568 const __GLcontextModes * mesaVis, 569 __DRIcontextPrivate * driContextPriv, 570 void *sharedContextPrivate, 571 struct dd_function_table *functions) 572{ 573 GLcontext *ctx = &intel->ctx; 574 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate; 575 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv; 576 intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private; 577 int fthrottle_mode; 578 579 if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx, 580 functions, (void *) intel)) { 581 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__); 582 return GL_FALSE; 583 } 584 585 driContextPriv->driverPrivate = intel; 586 intel->intelScreen = intelScreen; 587 intel->driScreen = sPriv; 588 intel->sarea = intelScreen->sarea; 589 intel->driContext = driContextPriv; 590 591 /* Dri stuff */ 592 intel->hHWContext = driContextPriv->hHWContext; 593 intel->driFd = sPriv->fd; 594 intel->driHwLock = sPriv->lock; 595 596 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache, 597 intel->driScreen->myNum, 598 IS_965(intelScreen->deviceID) ? "i965" : "i915"); 599 if (intelScreen->deviceID == PCI_CHIP_I865_G) 600 intel->maxBatchSize = 4096; 601 else 602 intel->maxBatchSize = BATCH_SZ; 603 604 intel->bufmgr = intelScreen->bufmgr; 605 intel->ttm = intelScreen->ttm; 606 if (intel->ttm) { 607 int bo_reuse_mode; 608 609 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); 610 switch (bo_reuse_mode) { 611 case DRI_CONF_BO_REUSE_DISABLED: 612 break; 613 case DRI_CONF_BO_REUSE_ALL: 614 intel_bufmgr_gem_enable_reuse(intel->bufmgr); 615 break; 616 } 617 } 618 619 /* This doesn't yet catch all non-conformant rendering, but it's a 620 * start. 621 */ 622 if (getenv("INTEL_STRICT_CONFORMANCE")) { 623 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE")); 624 if (value > 0) { 625 intel->conformance_mode = value; 626 } 627 else { 628 intel->conformance_mode = 1; 629 } 630 } 631 632 if (intel->conformance_mode > 0) { 633 ctx->Const.MinLineWidth = 1.0; 634 ctx->Const.MinLineWidthAA = 1.0; 635 ctx->Const.MaxLineWidth = 1.0; 636 ctx->Const.MaxLineWidthAA = 1.0; 637 ctx->Const.LineWidthGranularity = 1.0; 638 } 639 else { 640 ctx->Const.MinLineWidth = 1.0; 641 ctx->Const.MinLineWidthAA = 1.0; 642 ctx->Const.MaxLineWidth = 5.0; 643 ctx->Const.MaxLineWidthAA = 5.0; 644 ctx->Const.LineWidthGranularity = 0.5; 645 } 646 647 ctx->Const.MinPointSize = 1.0; 648 ctx->Const.MinPointSizeAA = 1.0; 649 ctx->Const.MaxPointSize = 255.0; 650 ctx->Const.MaxPointSizeAA = 3.0; 651 ctx->Const.PointSizeGranularity = 1.0; 652 653 /* reinitialize the context point state. 654 * It depend on constants in __GLcontextRec::Const 655 */ 656 _mesa_init_point(ctx); 657 658 ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */ 659 if (IS_965(intelScreen->deviceID)) { 660 if (MAX_WIDTH > 8192) 661 ctx->Const.MaxRenderbufferSize = 8192; 662 } else { 663 if (MAX_WIDTH > 2048) 664 ctx->Const.MaxRenderbufferSize = 2048; 665 } 666 667 /* Initialize the software rasterizer and helper modules. */ 668 _swrast_CreateContext(ctx); 669 _vbo_CreateContext(ctx); 670 _tnl_CreateContext(ctx); 671 _swsetup_CreateContext(ctx); 672 673 /* Configure swrast to match hardware characteristics: */ 674 _swrast_allow_pixel_fog(ctx, GL_FALSE); 675 _swrast_allow_vertex_fog(ctx, GL_TRUE); 676 677 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24; 678 intel->hw_stipple = 1; 679 680 /* XXX FBO: this doesn't seem to be used anywhere */ 681 switch (mesaVis->depthBits) { 682 case 0: /* what to do in this case? */ 683 case 16: 684 intel->polygon_offset_scale = 1.0; 685 break; 686 case 24: 687 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */ 688 break; 689 default: 690 assert(0); 691 break; 692 } 693 694 if (IS_965(intelScreen->deviceID)) 695 intel->polygon_offset_scale /= 0xffff; 696 697 intel->RenderIndex = ~0; 698 699 fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode"); 700 intel->irqsEmitted = 0; 701 702 intel->do_irqs = (intel->intelScreen->irq_active && 703 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS); 704 705 intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); 706 707 if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) { 708 _mesa_printf("IRQs not active. Exiting\n"); 709 exit(1); 710 } 711 712 intelInitExtensions(ctx, GL_FALSE); 713 714 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control); 715 if (INTEL_DEBUG & DEBUG_BUFMGR) 716 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE); 717 718 if (!sPriv->dri2.enabled) 719 intel_recreate_static_regions(intel); 720 721 intel->batch = intel_batchbuffer_alloc(intel); 722 723 intel_fbo_init(intel); 724 725 if (intel->ctx.Mesa_DXTn) { 726 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); 727 _mesa_enable_extension(ctx, "GL_S3_s3tc"); 728 } 729 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) { 730 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); 731 } 732 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache, 733 "texture_tiling"); 734 if (intel->use_texture_tiling && 735 !intel->intelScreen->kernel_exec_fencing) { 736 fprintf(stderr, "No kernel support for execution fencing, " 737 "disabling texture tiling"); 738 intel->use_texture_tiling = GL_FALSE; 739 } 740 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z"); 741 742 intel->prim.primitive = ~0; 743 744 /* Force all software fallbacks */ 745 if (driQueryOptionb(&intel->optionCache, "no_rast")) { 746 fprintf(stderr, "disabling 3D rasterization\n"); 747 intel->no_rast = 1; 748 } 749 750 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) { 751 fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); 752 intel->always_flush_batch = 1; 753 } 754 755 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) { 756 fprintf(stderr, "flushing GPU caches before/after each draw call\n"); 757 intel->always_flush_cache = 1; 758 } 759 760 /* Disable all hardware rendering (skip emitting batches and fences/waits 761 * to the kernel) 762 */ 763 intel->no_hw = getenv("INTEL_NO_HW") != NULL; 764 765 return GL_TRUE; 766} 767 768void 769intelDestroyContext(__DRIcontextPrivate * driContextPriv) 770{ 771 struct intel_context *intel = 772 (struct intel_context *) driContextPriv->driverPrivate; 773 774 assert(intel); /* should never be null */ 775 if (intel) { 776 GLboolean release_texture_heaps; 777 778 INTEL_FIREVERTICES(intel); 779 780 if (intel->clear.arrayObj) 781 _mesa_delete_array_object(&intel->ctx, intel->clear.arrayObj); 782 783 intel->vtbl.destroy(intel); 784 785 release_texture_heaps = (intel->ctx.Shared->RefCount == 1); 786 _swsetup_DestroyContext(&intel->ctx); 787 _tnl_DestroyContext(&intel->ctx); 788 _vbo_DestroyContext(&intel->ctx); 789 790 _swrast_DestroyContext(&intel->ctx); 791 intel->Fallback = 0; /* don't call _swrast_Flush later */ 792 793 intel_batchbuffer_free(intel->batch); 794 intel->batch = NULL; 795 796 free(intel->prim.vb); 797 intel->prim.vb = NULL; 798 dri_bo_unreference(intel->prim.vb_bo); 799 intel->prim.vb_bo = NULL; 800 801 if (release_texture_heaps) { 802 /* Nothing is currently done here to free texture heaps; 803 * but we're not using the texture heap utilities, so I 804 * rather think we shouldn't. I've taken a look, and can't 805 * find any private texture data hanging around anywhere, but 806 * I'm not yet certain there isn't any at all... 807 */ 808 /* if (INTEL_DEBUG & DEBUG_TEXTURE) 809 fprintf(stderr, "do something to free texture heaps\n"); 810 */ 811 } 812 813 /* XXX In intelMakeCurrent() below, the context's static regions are 814 * referenced inside the frame buffer; it's listed as a hack, 815 * with a comment of "XXX FBO temporary fix-ups!", but 816 * as long as it's there, we should release the regions here. 817 * The do/while loop around the block is used to allow the 818 * "continue" statements inside the block to exit the block, 819 * to avoid many layers of "if" constructs. 820 */ 821 do { 822 __DRIdrawablePrivate * driDrawPriv = intel->driDrawable; 823 struct intel_framebuffer *intel_fb; 824 struct intel_renderbuffer *irbDepth, *irbStencil; 825 if (!driDrawPriv) { 826 /* We're already detached from the drawable; exit this block. */ 827 continue; 828 } 829 intel_fb = (struct intel_framebuffer *) driDrawPriv->driverPrivate; 830 if (!intel_fb) { 831 /* The frame buffer is already gone; exit this block. */ 832 continue; 833 } 834 irbDepth = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH); 835 irbStencil = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL); 836 837 /* If the regions of the frame buffer still match the regions 838 * of the context, release them. If they've changed somehow, 839 * leave them alone. 840 */ 841 if (intel_fb->color_rb[0] && intel_fb->color_rb[0]->region == intel->front_region) { 842 intel_renderbuffer_set_region(intel_fb->color_rb[0], NULL); 843 } 844 if (intel_fb->color_rb[1] && intel_fb->color_rb[1]->region == intel->back_region) { 845 intel_renderbuffer_set_region(intel_fb->color_rb[1], NULL); 846 } 847 848 if (irbDepth && irbDepth->region == intel->depth_region) { 849 intel_renderbuffer_set_region(irbDepth, NULL); 850 } 851 /* Usually, the stencil buffer is the same as the depth buffer; 852 * but they're handled separately in MakeCurrent, so we'll 853 * handle them separately here. 854 */ 855 if (irbStencil && irbStencil->region == intel->depth_region) { 856 intel_renderbuffer_set_region(irbStencil, NULL); 857 } 858 } while (0); 859 860 intel_region_release(&intel->front_region); 861 intel_region_release(&intel->back_region); 862 intel_region_release(&intel->depth_region); 863 864 driDestroyOptionCache(&intel->optionCache); 865 866 /* free the Mesa context */ 867 _mesa_free_context_data(&intel->ctx); 868 869 870 } 871} 872 873GLboolean 874intelUnbindContext(__DRIcontextPrivate * driContextPriv) 875{ 876 return GL_TRUE; 877} 878 879GLboolean 880intelMakeCurrent(__DRIcontextPrivate * driContextPriv, 881 __DRIdrawablePrivate * driDrawPriv, 882 __DRIdrawablePrivate * driReadPriv) 883{ 884 __DRIscreenPrivate *psp = driDrawPriv->driScreenPriv; 885 886 if (driContextPriv) { 887 struct intel_context *intel = 888 (struct intel_context *) driContextPriv->driverPrivate; 889 struct intel_framebuffer *intel_fb = 890 (struct intel_framebuffer *) driDrawPriv->driverPrivate; 891 GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate; 892 893 if (driContextPriv->driScreenPriv->dri2.enabled) { 894 intel_update_renderbuffers(driContextPriv, driDrawPriv); 895 if (driDrawPriv != driReadPriv) 896 intel_update_renderbuffers(driContextPriv, driReadPriv); 897 } else { 898 /* XXX FBO temporary fix-ups! These are released in 899 * intelDextroyContext(), above. Changes here should be 900 * reflected there. 901 */ 902 /* if the renderbuffers don't have regions, init them from the context */ 903 struct intel_renderbuffer *irbDepth 904 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH); 905 struct intel_renderbuffer *irbStencil 906 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL); 907 908 if (intel_fb->color_rb[0]) { 909 intel_renderbuffer_set_region(intel_fb->color_rb[0], 910 intel->front_region); 911 } 912 if (intel_fb->color_rb[1]) { 913 intel_renderbuffer_set_region(intel_fb->color_rb[1], 914 intel->back_region); 915 } 916 917 if (irbDepth) { 918 intel_renderbuffer_set_region(irbDepth, intel->depth_region); 919 } 920 if (irbStencil) { 921 intel_renderbuffer_set_region(irbStencil, intel->depth_region); 922 } 923 } 924 925 /* set GLframebuffer size to match window, if needed */ 926 driUpdateFramebufferSize(&intel->ctx, driDrawPriv); 927 928 if (driReadPriv != driDrawPriv) { 929 driUpdateFramebufferSize(&intel->ctx, driReadPriv); 930 } 931 932 _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb); 933 934 /* The drawbuffer won't always be updated by _mesa_make_current: 935 */ 936 if (intel->ctx.DrawBuffer == &intel_fb->Base) { 937 938 if (intel->driReadDrawable != driReadPriv) 939 intel->driReadDrawable = driReadPriv; 940 941 if (intel->driDrawable != driDrawPriv) { 942 if (driDrawPriv->swap_interval == (unsigned)-1) { 943 int i; 944 945 driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0) 946 ? driGetDefaultVBlankFlags(&intel->optionCache) 947 : VBLANK_FLAG_NO_IRQ; 948 949 /* Prevent error printf if one crtc is disabled, this will 950 * be properly calculated in intelWindowMoved() next. 951 */ 952 driDrawPriv->vblFlags = intelFixupVblank(intel, driDrawPriv); 953 954 (*psp->systemTime->getUST) (&intel_fb->swap_ust); 955 driDrawableInitVBlank(driDrawPriv); 956 intel_fb->vbl_waited = driDrawPriv->vblSeq; 957 958 for (i = 0; i < 2; i++) { 959 if (intel_fb->color_rb[i]) 960 intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq; 961 } 962 } 963 intel->driDrawable = driDrawPriv; 964 intelWindowMoved(intel); 965 } 966 967 intel_draw_buffer(&intel->ctx, &intel_fb->Base); 968 } 969 } 970 else { 971 _mesa_make_current(NULL, NULL, NULL); 972 } 973 974 return GL_TRUE; 975} 976 977static void 978intelContendedLock(struct intel_context *intel, GLuint flags) 979{ 980 __DRIdrawablePrivate *dPriv = intel->driDrawable; 981 __DRIscreenPrivate *sPriv = intel->driScreen; 982 volatile drm_i915_sarea_t *sarea = intel->sarea; 983 int me = intel->hHWContext; 984 985 drmGetLock(intel->driFd, intel->hHWContext, flags); 986 intel->locked = 1; 987 988 if (INTEL_DEBUG & DEBUG_LOCK) 989 _mesa_printf("%s - got contended lock\n", __progname); 990 991 /* If the window moved, may need to set a new cliprect now. 992 * 993 * NOTE: This releases and regains the hw lock, so all state 994 * checking must be done *after* this call: 995 */ 996 if (dPriv) 997 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv); 998 999 if (sarea && sarea->ctxOwner != me) { 1000 if (INTEL_DEBUG & DEBUG_BUFMGR) { 1001 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n", 1002 sarea->ctxOwner, me); 1003 } 1004 sarea->ctxOwner = me; 1005 } 1006 1007 /* If the last consumer of the texture memory wasn't us, notify the fake 1008 * bufmgr and record the new owner. We should have the memory shared 1009 * between contexts of a single fake bufmgr, but this will at least make 1010 * things correct for now. 1011 */ 1012 if (!intel->ttm && sarea->texAge != intel->hHWContext) { 1013 sarea->texAge = intel->hHWContext; 1014 intel_bufmgr_fake_contended_lock_take(intel->bufmgr); 1015 if (INTEL_DEBUG & DEBUG_BATCH) 1016 intel_decode_context_reset(); 1017 if (INTEL_DEBUG & DEBUG_BUFMGR) 1018 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n", 1019 sarea->ctxOwner, intel->hHWContext); 1020 } 1021 1022 /* Drawable changed? 1023 */ 1024 if (dPriv && intel->lastStamp != dPriv->lastStamp) { 1025 intelWindowMoved(intel); 1026 intel->lastStamp = dPriv->lastStamp; 1027 } 1028} 1029 1030 1031_glthread_DECLARE_STATIC_MUTEX(lockMutex); 1032 1033/* Lock the hardware and validate our state. 1034 */ 1035void LOCK_HARDWARE( struct intel_context *intel ) 1036{ 1037 __DRIdrawable *dPriv = intel->driDrawable; 1038 __DRIscreen *sPriv = intel->driScreen; 1039 char __ret = 0; 1040 struct intel_framebuffer *intel_fb = NULL; 1041 struct intel_renderbuffer *intel_rb = NULL; 1042 1043 _glthread_LOCK_MUTEX(lockMutex); 1044 assert(!intel->locked); 1045 intel->locked = 1; 1046 1047 if (intel->driDrawable) { 1048 intel_fb = intel->driDrawable->driverPrivate; 1049 1050 if (intel_fb) 1051 intel_rb = 1052 intel_get_renderbuffer(&intel_fb->Base, 1053 intel_fb->Base._ColorDrawBufferIndexes[0]); 1054 } 1055 1056 if (intel_rb && dPriv->vblFlags && 1057 !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) && 1058 (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) { 1059 drmVBlank vbl; 1060 1061 vbl.request.type = DRM_VBLANK_ABSOLUTE; 1062 1063 if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) { 1064 vbl.request.type |= DRM_VBLANK_SECONDARY; 1065 } 1066 1067 vbl.request.sequence = intel_rb->vbl_pending; 1068 drmWaitVBlank(intel->driFd, &vbl); 1069 intel_fb->vbl_waited = vbl.reply.sequence; 1070 } 1071 1072 if (!sPriv->dri2.enabled) { 1073 DRM_CAS(intel->driHwLock, intel->hHWContext, 1074 (DRM_LOCK_HELD|intel->hHWContext), __ret); 1075 1076 if (__ret) 1077 intelContendedLock( intel, 0 ); 1078 } 1079 1080 1081 if (INTEL_DEBUG & DEBUG_LOCK) 1082 _mesa_printf("%s - locked\n", __progname); 1083} 1084 1085 1086/* Unlock the hardware using the global current context 1087 */ 1088void UNLOCK_HARDWARE( struct intel_context *intel ) 1089{ 1090 __DRIscreen *sPriv = intel->driScreen; 1091 1092 intel->vtbl.note_unlock( intel ); 1093 intel->locked = 0; 1094 1095 if (!sPriv->dri2.enabled) 1096 DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext); 1097 1098 _glthread_UNLOCK_MUTEX(lockMutex); 1099 1100 if (INTEL_DEBUG & DEBUG_LOCK) 1101 _mesa_printf("%s - unlocked\n", __progname); 1102 1103 /** 1104 * Nothing should be left in batch outside of LOCK/UNLOCK which references 1105 * cliprects. 1106 */ 1107 if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS) 1108 intel_batchbuffer_flush(intel->batch); 1109} 1110 1111