intel_context.c revision cf820a045f0626718ec147ebb26e31f82ec0b4fb
1effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch/**************************************************************************
2effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch *
3effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * All Rights Reserved.
5effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch *
6effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * Permission is hereby granted, free of charge, to any person obtaining a
7effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * copy of this software and associated documentation files (the
8effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * "Software"), to deal in the Software without restriction, including
9effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * without limitation the rights to use, copy, modify, merge, publish,
10effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * distribute, sub license, and/or sell copies of the Software, and to
11effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * permit persons to whom the Software is furnished to do so, subject to
12effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * the following conditions:
13effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch *
14effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * The above copyright notice and this permission notice (including the
15effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * next paragraph) shall be included in all copies or substantial portions
16effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * of the Software.
17effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch *
18effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch *
26effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch **************************************************************************/
27effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
28effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
29effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "main/glheader.h"
30effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "main/context.h"
31effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "main/arrayobj.h"
32effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "main/extensions.h"
33effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "main/framebuffer.h"
34effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "main/imports.h"
35effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "main/points.h"
36effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
37effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "swrast/swrast.h"
38effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "swrast_setup/swrast_setup.h"
39effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "tnl/tnl.h"
40effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "drivers/common/driverfuncs.h"
41effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
42effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "i830_dri.h"
43effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
44effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_chipset.h"
45effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_buffers.h"
46effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_tex.h"
47effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_batchbuffer.h"
48effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_clear.h"
49effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_extensions.h"
50effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_pixel.h"
51effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_regions.h"
52effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_buffer_objects.h"
53effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_fbo.h"
54effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_decode.h"
55effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_bufmgr.h"
56effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_screen.h"
57effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "intel_swapbuffers.h"
58effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
59effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "drirenderbuffer.h"
60effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "vblank.h"
61effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "utils.h"
62effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#include "xmlpool.h"            /* for symbolic values of enum-type options */
63effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
64effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
65effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#ifndef INTEL_DEBUG
66effb81e5f8246d0db0270817048dc992db66e9fbBen Murdochint INTEL_DEBUG = (0);
67effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#endif
68effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
69effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
70effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#define DRIVER_DATE                     "20090712 2009Q2 RC3"
71effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch#define DRIVER_DATE_GEM                 "GEM " DRIVER_DATE
72effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
73effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
74effb81e5f8246d0db0270817048dc992db66e9fbBen Murdochstatic void intel_flush(GLcontext *ctx, GLboolean needs_mi_flush);
75effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
76effb81e5f8246d0db0270817048dc992db66e9fbBen Murdochstatic const GLubyte *
77effb81e5f8246d0db0270817048dc992db66e9fbBen MurdochintelGetString(GLcontext * ctx, GLenum name)
78effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch{
79effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   const struct intel_context *const intel = intel_context(ctx);
80effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   const char *chipset;
81effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   static char buffer[128];
82effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
83effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   switch (name) {
84effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_VENDOR:
85effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      return (GLubyte *) "Tungsten Graphics, Inc";
86effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      break;
87effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
88effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_RENDERER:
89effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      switch (intel->intelScreen->deviceID) {
90effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_845_G:
91effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 845G";
92effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
93effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I830_M:
94effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 830M";
95effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
96effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I855_GM:
97effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 852GM/855GM";
98effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
99effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I865_G:
100effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 865G";
101effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
102effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I915_G:
103effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 915G";
104effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
105effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_E7221_G:
106effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel (R) E7221G (i915)";
107effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
108effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I915_GM:
109effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 915GM";
110effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
111effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I945_G:
112effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 945G";
113effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
114effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I945_GM:
115effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 945GM";
116effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
117effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I945_GME:
118effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) 945GME";
119effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
120effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_G33_G:
121effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) G33";
122effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
123effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_Q35_G:
124effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) Q35";
125effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
126effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_Q33_G:
127effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) Q33";
128effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
129effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_IGD_GM:
130effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_IGD_G:
131effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) IGD";
132effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
133effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I965_Q:
134effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) 965Q";
135effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
136effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I965_G:
137effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I965_G_1:
138effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) 965G";
139effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
140effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I946_GZ:
141effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) 946GZ";
142effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
143effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I965_GM:
144effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) 965GM";
145effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
146effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_I965_GME:
147effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) 965GME/GLE";
148effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
149effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_GM45_GM:
150effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Mobile Intel® GM45 Express Chipset";
151effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
152effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_IGD_E_G:
153effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 chipset = "Intel(R) Integrated Graphics Device";
154effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 break;
155effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_G45_G:
156effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) G45/G43";
157effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
158effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_Q45_G:
159effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) Q45/Q43";
160effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
161effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      case PCI_CHIP_G41_G:
162effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Intel(R) G41";
163effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
164effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      default:
165effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         chipset = "Unknown Intel Chipset";
166effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch         break;
167effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      }
168effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
169effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      (void) driGetRendererString(buffer, chipset,
170effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch				  (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
171effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch				  0);
172effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      return (GLubyte *) buffer;
173effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
174effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   default:
175effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      return NULL;
176effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   }
177effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch}
178effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
179effb81e5f8246d0db0270817048dc992db66e9fbBen Murdochstatic unsigned
180effb81e5f8246d0db0270817048dc992db66e9fbBen Murdochintel_bits_per_pixel(const struct intel_renderbuffer *rb)
181effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch{
182effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   switch (rb->Base._ActualFormat) {
183effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_RGB5:
184effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_DEPTH_COMPONENT16:
185effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      return 16;
186effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_RGB8:
187effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_RGBA8:
188effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_DEPTH_COMPONENT24:
189effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_DEPTH24_STENCIL8_EXT:
190effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   case GL_STENCIL_INDEX8_EXT:
191effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      return 32;
192effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   default:
193effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      return 0;
194effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   }
195effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch}
196effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
197effb81e5f8246d0db0270817048dc992db66e9fbBen Murdochvoid
198effb81e5f8246d0db0270817048dc992db66e9fbBen Murdochintel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
199effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch{
200effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   struct intel_framebuffer *intel_fb = drawable->driverPrivate;
201effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   struct intel_renderbuffer *rb;
202effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   struct intel_region *region, *depth_region;
203effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   struct intel_context *intel = context->driverPrivate;
204effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   __DRIbuffer *buffers = NULL;
205effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   __DRIscreen *screen;
206effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   int i, count;
207effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   unsigned int attachments[10];
208effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   uint32_t name;
209effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   const char *region_name;
210effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
211effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   if (INTEL_DEBUG & DEBUG_DRI)
212effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
213effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
214effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   screen = intel->intelScreen->driScrnPriv;
215effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
216effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   if (screen->dri2.loader
217effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch       && (screen->dri2.loader->base.version > 2)
218effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch       && (screen->dri2.loader->getBuffersWithFormat != NULL)) {
219effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      struct intel_renderbuffer *depth_rb;
220effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      struct intel_renderbuffer *stencil_rb;
221effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
222effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      i = 0;
223effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      if ((intel->is_front_buffer_rendering ||
224effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	   intel->is_front_buffer_reading ||
225effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	   !intel_fb->color_rb[1])
226effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	   && intel_fb->color_rb[0]) {
227effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
228effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = intel_bits_per_pixel(intel_fb->color_rb[0]);
229effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      }
230effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
231effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      if (intel_fb->color_rb[1]) {
232effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
233effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = intel_bits_per_pixel(intel_fb->color_rb[1]);
234effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      }
235effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
236effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      depth_rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
237effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      stencil_rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
238effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
239effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      if ((depth_rb != NULL) && (stencil_rb != NULL)) {
240effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
241effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = intel_bits_per_pixel(depth_rb);
242effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      } else if (depth_rb != NULL) {
243effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_DEPTH;
244effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = intel_bits_per_pixel(depth_rb);
245effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      } else if (stencil_rb != NULL) {
246effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_STENCIL;
247effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = intel_bits_per_pixel(stencil_rb);
248effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      }
249effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
250effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      buffers =
251effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 (*screen->dri2.loader->getBuffersWithFormat)(drawable,
252effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						      &drawable->w,
253effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						      &drawable->h,
254effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						      attachments, i / 2,
255effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						      &count,
256effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						      drawable->loaderPrivate);
257effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch   } else if (screen->dri2.loader) {
258effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      i = 0;
259effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      if (intel_fb->color_rb[0])
260effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
261effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      if (intel_fb->color_rb[1])
262effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
263effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH))
264effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_DEPTH;
265effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL))
266effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch	 attachments[i++] = __DRI_BUFFER_STENCIL;
267effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch
268effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch      buffers = (*screen->dri2.loader->getBuffers)(drawable,
269effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						   &drawable->w,
270effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						   &drawable->h,
271effb81e5f8246d0db0270817048dc992db66e9fbBen Murdoch						   attachments, i,
272						   &count,
273						   drawable->loaderPrivate);
274   }
275
276   if (buffers == NULL)
277      return;
278
279   drawable->x = 0;
280   drawable->y = 0;
281   drawable->backX = 0;
282   drawable->backY = 0;
283   drawable->numClipRects = 1;
284   drawable->pClipRects[0].x1 = 0;
285   drawable->pClipRects[0].y1 = 0;
286   drawable->pClipRects[0].x2 = drawable->w;
287   drawable->pClipRects[0].y2 = drawable->h;
288   drawable->numBackClipRects = 1;
289   drawable->pBackClipRects[0].x1 = 0;
290   drawable->pBackClipRects[0].y1 = 0;
291   drawable->pBackClipRects[0].x2 = drawable->w;
292   drawable->pBackClipRects[0].y2 = drawable->h;
293
294   depth_region = NULL;
295   for (i = 0; i < count; i++) {
296       switch (buffers[i].attachment) {
297       case __DRI_BUFFER_FRONT_LEFT:
298	   rb = intel_fb->color_rb[0];
299	   region_name = "dri2 front buffer";
300	   break;
301
302       case __DRI_BUFFER_FAKE_FRONT_LEFT:
303	   rb = intel_fb->color_rb[0];
304	   region_name = "dri2 fake front buffer";
305	   break;
306
307       case __DRI_BUFFER_BACK_LEFT:
308	   rb = intel_fb->color_rb[1];
309	   region_name = "dri2 back buffer";
310	   break;
311
312       case __DRI_BUFFER_DEPTH:
313	   rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
314	   region_name = "dri2 depth buffer";
315	   break;
316
317       case __DRI_BUFFER_DEPTH_STENCIL:
318	   rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
319	   region_name = "dri2 depth / stencil buffer";
320	   break;
321
322       case __DRI_BUFFER_STENCIL:
323	   rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
324	   region_name = "dri2 stencil buffer";
325	   break;
326
327       case __DRI_BUFFER_ACCUM:
328       default:
329	   fprintf(stderr,
330		   "unhandled buffer attach event, attacment type %d\n",
331		   buffers[i].attachment);
332	   return;
333       }
334
335       if (rb == NULL)
336	  continue;
337
338       if (rb->region) {
339	  dri_bo_flink(rb->region->buffer, &name);
340	  if (name == buffers[i].name)
341	     continue;
342       }
343
344       if (INTEL_DEBUG & DEBUG_DRI)
345	  fprintf(stderr,
346		  "attaching buffer %d, at %d, cpp %d, pitch %d\n",
347		  buffers[i].name, buffers[i].attachment,
348		  buffers[i].cpp, buffers[i].pitch);
349
350       if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) {
351	  if (INTEL_DEBUG & DEBUG_DRI)
352	     fprintf(stderr, "(reusing depth buffer as stencil)\n");
353	  intel_region_reference(&region, depth_region);
354       }
355       else
356          region = intel_region_alloc_for_handle(intel, buffers[i].cpp,
357						 drawable->w,
358						 drawable->h,
359						 buffers[i].pitch / buffers[i].cpp,
360						 buffers[i].name,
361						 region_name);
362
363       if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
364	  depth_region = region;
365
366       intel_renderbuffer_set_region(rb, region);
367       intel_region_release(&region);
368
369       if (buffers[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
370	  rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
371	  if (rb != NULL) {
372	     struct intel_region *stencil_region = NULL;
373
374	     if (rb->region) {
375		dri_bo_flink(rb->region->buffer, &name);
376		if (name == buffers[i].name)
377		   continue;
378	     }
379
380	     intel_region_reference(&stencil_region, region);
381	     intel_renderbuffer_set_region(rb, stencil_region);
382	     intel_region_release(&stencil_region);
383	  }
384       }
385   }
386
387   driUpdateFramebufferSize(&intel->ctx, drawable);
388}
389
390void
391intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
392{
393    struct intel_context *intel = intel_context(ctx);
394    __DRIcontext *driContext = intel->driContext;
395    void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
396			 GLsizei w, GLsizei h);
397
398    if (!driContext->driScreenPriv->dri2.enabled)
399	return;
400
401    if (!intel->internal_viewport_call && ctx->DrawBuffer->Name == 0) {
402       /* If we're rendering to the fake front buffer, make sure all the pending
403	* drawing has landed on the real front buffer.  Otherwise when we
404	* eventually get to DRI2GetBuffersWithFormat the stale real front
405	* buffer contents will get copied to the new fake front buffer.
406	*/
407       if (intel->is_front_buffer_rendering) {
408	  intel_flush(ctx, GL_FALSE);
409       }
410
411       intel_update_renderbuffers(driContext, driContext->driDrawablePriv);
412       if (driContext->driDrawablePriv != driContext->driReadablePriv)
413	  intel_update_renderbuffers(driContext, driContext->driReadablePriv);
414    }
415
416    old_viewport = ctx->Driver.Viewport;
417    ctx->Driver.Viewport = NULL;
418    intel->driDrawable = driContext->driDrawablePriv;
419    intelWindowMoved(intel);
420    intel_draw_buffer(ctx, intel->ctx.DrawBuffer);
421    ctx->Driver.Viewport = old_viewport;
422}
423
424
425static const struct dri_debug_control debug_control[] = {
426   { "tex",   DEBUG_TEXTURE},
427   { "state", DEBUG_STATE},
428   { "ioctl", DEBUG_IOCTL},
429   { "blit",  DEBUG_BLIT},
430   { "mip",   DEBUG_MIPTREE},
431   { "fall",  DEBUG_FALLBACKS},
432   { "verb",  DEBUG_VERBOSE},
433   { "bat",   DEBUG_BATCH},
434   { "pix",   DEBUG_PIXEL},
435   { "buf",   DEBUG_BUFMGR},
436   { "reg",   DEBUG_REGION},
437   { "fbo",   DEBUG_FBO},
438   { "lock",  DEBUG_LOCK},
439   { "sync",  DEBUG_SYNC},
440   { "prim",  DEBUG_PRIMS },
441   { "vert",  DEBUG_VERTS },
442   { "dri",   DEBUG_DRI },
443   { "dma",   DEBUG_DMA },
444   { "san",   DEBUG_SANITY },
445   { "sleep", DEBUG_SLEEP },
446   { "stats", DEBUG_STATS },
447   { "tile",  DEBUG_TILE },
448   { "sing",  DEBUG_SINGLE_THREAD },
449   { "thre",  DEBUG_SINGLE_THREAD },
450   { "wm",    DEBUG_WM },
451   { "urb",   DEBUG_URB },
452   { "vs",    DEBUG_VS },
453   { NULL,    0 }
454};
455
456
457static void
458intelInvalidateState(GLcontext * ctx, GLuint new_state)
459{
460    struct intel_context *intel = intel_context(ctx);
461
462   _swrast_InvalidateState(ctx, new_state);
463   _swsetup_InvalidateState(ctx, new_state);
464   _vbo_InvalidateState(ctx, new_state);
465   _tnl_InvalidateState(ctx, new_state);
466   _tnl_invalidate_vertex_state(ctx, new_state);
467
468   intel->NewGLState |= new_state;
469
470   if (intel->vtbl.invalidate_state)
471      intel->vtbl.invalidate_state( intel, new_state );
472}
473
474static void
475intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
476{
477   struct intel_context *intel = intel_context(ctx);
478
479   if (intel->Fallback)
480      _swrast_flush(ctx);
481
482   if (!IS_965(intel->intelScreen->deviceID))
483      INTEL_FIREVERTICES(intel);
484
485   /* Emit a flush so that any frontbuffer rendering that might have occurred
486    * lands onscreen in a timely manner, even if the X Server doesn't trigger
487    * a flush for us.
488    */
489   if (needs_mi_flush)
490      intel_batchbuffer_emit_mi_flush(intel->batch);
491
492   if (intel->batch->map != intel->batch->ptr)
493      intel_batchbuffer_flush(intel->batch);
494
495   if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
496      __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
497
498      if (screen->dri2.loader &&
499          (screen->dri2.loader->base.version >= 2)
500	  && (screen->dri2.loader->flushFrontBuffer != NULL)) {
501	 (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable,
502						  intel->driDrawable->loaderPrivate);
503
504	 /* Only clear the dirty bit if front-buffer rendering is no longer
505	  * enabled.  This is done so that the dirty bit can only be set in
506	  * glDrawBuffer.  Otherwise the dirty bit would have to be set at
507	  * each of N places that do rendering.  This has worse performances,
508	  * but it is much easier to get correct.
509	  */
510	 if (!intel->is_front_buffer_rendering) {
511	    intel->front_buffer_dirty = GL_FALSE;
512	 }
513      }
514   }
515}
516
517void
518intelFlush(GLcontext * ctx)
519{
520   intel_flush(ctx, GL_FALSE);
521}
522
523static void
524intel_glFlush(GLcontext *ctx)
525{
526   struct intel_context *intel = intel_context(ctx);
527
528   intel_flush(ctx, GL_TRUE);
529
530   /* We're using glFlush as an indicator that a frame is done, which is
531    * what DRI2 does before calling SwapBuffers (and means we should catch
532    * people doing front-buffer rendering, as well)..
533    *
534    * Wait for the swapbuffers before the one we just emitted, so we don't
535    * get too many swaps outstanding for apps that are GPU-heavy but not
536    * CPU-heavy.
537    *
538    * Unfortunately, we don't have a handle to the batch containing the swap,
539    * and getting our hands on that doesn't seem worth it, so we just us the
540    * first batch we emitted after the last swap.
541    */
542   if (intel->first_post_swapbuffers_batch != NULL) {
543      drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
544      drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
545      intel->first_post_swapbuffers_batch = NULL;
546   }
547}
548
549void
550intelFinish(GLcontext * ctx)
551{
552   struct gl_framebuffer *fb = ctx->DrawBuffer;
553   int i;
554
555   intelFlush(ctx);
556
557   for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
558       struct intel_renderbuffer *irb;
559
560       irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
561
562       if (irb && irb->region)
563	  dri_bo_wait_rendering(irb->region->buffer);
564   }
565   if (fb->_DepthBuffer) {
566      /* XXX: Wait on buffer idle */
567   }
568}
569
570void
571intelInitDriverFunctions(struct dd_function_table *functions)
572{
573   _mesa_init_driver_functions(functions);
574
575   functions->Flush = intel_glFlush;
576   functions->Finish = intelFinish;
577   functions->GetString = intelGetString;
578   functions->UpdateState = intelInvalidateState;
579
580   functions->CopyColorTable = _swrast_CopyColorTable;
581   functions->CopyColorSubTable = _swrast_CopyColorSubTable;
582   functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;
583   functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;
584
585   intelInitTextureFuncs(functions);
586   intelInitStateFuncs(functions);
587   intelInitClearFuncs(functions);
588   intelInitBufferFuncs(functions);
589   intelInitPixelFuncs(functions);
590}
591
592
593GLboolean
594intelInitContext(struct intel_context *intel,
595                 const __GLcontextModes * mesaVis,
596                 __DRIcontextPrivate * driContextPriv,
597                 void *sharedContextPrivate,
598                 struct dd_function_table *functions)
599{
600   GLcontext *ctx = &intel->ctx;
601   GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
602   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
603   intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
604   int fthrottle_mode;
605
606   if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
607                                 functions, (void *) intel)) {
608      _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
609      return GL_FALSE;
610   }
611
612   driContextPriv->driverPrivate = intel;
613   intel->intelScreen = intelScreen;
614   intel->driScreen = sPriv;
615   intel->sarea = intelScreen->sarea;
616   intel->driContext = driContextPriv;
617
618   /* Dri stuff */
619   intel->hHWContext = driContextPriv->hHWContext;
620   intel->driFd = sPriv->fd;
621   intel->driHwLock = sPriv->lock;
622
623   driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
624                       intel->driScreen->myNum,
625		       IS_965(intelScreen->deviceID) ? "i965" : "i915");
626   if (intelScreen->deviceID == PCI_CHIP_I865_G)
627      intel->maxBatchSize = 4096;
628   else
629      intel->maxBatchSize = BATCH_SZ;
630
631   intel->bufmgr = intelScreen->bufmgr;
632   intel->ttm = intelScreen->ttm;
633   if (intel->ttm) {
634      int bo_reuse_mode;
635
636      bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
637      switch (bo_reuse_mode) {
638      case DRI_CONF_BO_REUSE_DISABLED:
639	 break;
640      case DRI_CONF_BO_REUSE_ALL:
641	 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
642	 break;
643      }
644   }
645
646   /* This doesn't yet catch all non-conformant rendering, but it's a
647    * start.
648    */
649   if (getenv("INTEL_STRICT_CONFORMANCE")) {
650      unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
651      if (value > 0) {
652         intel->conformance_mode = value;
653      }
654      else {
655         intel->conformance_mode = 1;
656      }
657   }
658
659   if (intel->conformance_mode > 0) {
660      ctx->Const.MinLineWidth = 1.0;
661      ctx->Const.MinLineWidthAA = 1.0;
662      ctx->Const.MaxLineWidth = 1.0;
663      ctx->Const.MaxLineWidthAA = 1.0;
664      ctx->Const.LineWidthGranularity = 1.0;
665   }
666   else {
667      ctx->Const.MinLineWidth = 1.0;
668      ctx->Const.MinLineWidthAA = 1.0;
669      ctx->Const.MaxLineWidth = 5.0;
670      ctx->Const.MaxLineWidthAA = 5.0;
671      ctx->Const.LineWidthGranularity = 0.5;
672   }
673
674   ctx->Const.MinPointSize = 1.0;
675   ctx->Const.MinPointSizeAA = 1.0;
676   ctx->Const.MaxPointSize = 255.0;
677   ctx->Const.MaxPointSizeAA = 3.0;
678   ctx->Const.PointSizeGranularity = 1.0;
679
680   /* reinitialize the context point state.
681    * It depend on constants in __GLcontextRec::Const
682    */
683   _mesa_init_point(ctx);
684
685   ctx->Const.MaxColorAttachments = 4;  /* XXX FBO: review this */
686
687   /* Initialize the software rasterizer and helper modules. */
688   _swrast_CreateContext(ctx);
689   _vbo_CreateContext(ctx);
690   _tnl_CreateContext(ctx);
691   _swsetup_CreateContext(ctx);
692
693   /* Configure swrast to match hardware characteristics: */
694   _swrast_allow_pixel_fog(ctx, GL_FALSE);
695   _swrast_allow_vertex_fog(ctx, GL_TRUE);
696
697   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
698   intel->hw_stipple = 1;
699
700   /* XXX FBO: this doesn't seem to be used anywhere */
701   switch (mesaVis->depthBits) {
702   case 0:                     /* what to do in this case? */
703   case 16:
704      intel->polygon_offset_scale = 1.0;
705      break;
706   case 24:
707      intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
708      break;
709   default:
710      assert(0);
711      break;
712   }
713
714   if (IS_965(intelScreen->deviceID))
715      intel->polygon_offset_scale /= 0xffff;
716
717   intel->RenderIndex = ~0;
718
719   fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
720   intel->irqsEmitted = 0;
721
722   intel->do_irqs = (intel->intelScreen->irq_active &&
723                     fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
724
725   intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
726
727   if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {
728      _mesa_printf("IRQs not active.  Exiting\n");
729      exit(1);
730   }
731
732   intelInitExtensions(ctx, GL_FALSE);
733
734   INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
735   if (INTEL_DEBUG & DEBUG_BUFMGR)
736      dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
737
738   if (!sPriv->dri2.enabled)
739      intel_recreate_static_regions(intel);
740
741   intel->batch = intel_batchbuffer_alloc(intel);
742
743   intel_bufferobj_init(intel);
744   intel_fbo_init(intel);
745
746   if (intel->ctx.Mesa_DXTn) {
747      _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
748      _mesa_enable_extension(ctx, "GL_S3_s3tc");
749   }
750   else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
751      _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
752   }
753
754   intel->prim.primitive = ~0;
755
756   /* Force all software fallbacks */
757   if (driQueryOptionb(&intel->optionCache, "no_rast")) {
758      fprintf(stderr, "disabling 3D rasterization\n");
759      intel->no_rast = 1;
760   }
761
762   if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
763      fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
764      intel->always_flush_batch = 1;
765   }
766
767   if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
768      fprintf(stderr, "flushing GPU caches before/after each draw call\n");
769      intel->always_flush_cache = 1;
770   }
771
772   /* Disable all hardware rendering (skip emitting batches and fences/waits
773    * to the kernel)
774    */
775   intel->no_hw = getenv("INTEL_NO_HW") != NULL;
776
777   return GL_TRUE;
778}
779
780void
781intelDestroyContext(__DRIcontextPrivate * driContextPriv)
782{
783   struct intel_context *intel =
784      (struct intel_context *) driContextPriv->driverPrivate;
785
786   assert(intel);               /* should never be null */
787   if (intel) {
788      GLboolean release_texture_heaps;
789
790      INTEL_FIREVERTICES(intel);
791
792      if (intel->clear.arrayObj)
793         _mesa_delete_array_object(&intel->ctx, intel->clear.arrayObj);
794
795      intel->vtbl.destroy(intel);
796
797      release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
798      _swsetup_DestroyContext(&intel->ctx);
799      _tnl_DestroyContext(&intel->ctx);
800      _vbo_DestroyContext(&intel->ctx);
801
802      _swrast_DestroyContext(&intel->ctx);
803      intel->Fallback = 0;      /* don't call _swrast_Flush later */
804
805      intel_batchbuffer_free(intel->batch);
806      intel->batch = NULL;
807
808      free(intel->prim.vb);
809      intel->prim.vb = NULL;
810      dri_bo_unreference(intel->prim.vb_bo);
811      intel->prim.vb_bo = NULL;
812      dri_bo_unreference(intel->first_post_swapbuffers_batch);
813      intel->first_post_swapbuffers_batch = NULL;
814
815      if (release_texture_heaps) {
816         /* This share group is about to go away, free our private
817          * texture object data.
818          */
819         if (INTEL_DEBUG & DEBUG_TEXTURE)
820            fprintf(stderr, "do something to free texture heaps\n");
821      }
822
823      intel_region_release(&intel->front_region);
824      intel_region_release(&intel->back_region);
825      intel_region_release(&intel->depth_region);
826
827      driDestroyOptionCache(&intel->optionCache);
828
829      /* free the Mesa context */
830      _mesa_free_context_data(&intel->ctx);
831
832      FREE(intel);
833      driContextPriv->driverPrivate = NULL;
834   }
835}
836
837GLboolean
838intelUnbindContext(__DRIcontextPrivate * driContextPriv)
839{
840   return GL_TRUE;
841}
842
843GLboolean
844intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
845                 __DRIdrawablePrivate * driDrawPriv,
846                 __DRIdrawablePrivate * driReadPriv)
847{
848   __DRIscreenPrivate *psp = driDrawPriv->driScreenPriv;
849
850   if (driContextPriv) {
851      struct intel_context *intel =
852         (struct intel_context *) driContextPriv->driverPrivate;
853      struct intel_framebuffer *intel_fb =
854	 (struct intel_framebuffer *) driDrawPriv->driverPrivate;
855      GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;
856
857      if (driContextPriv->driScreenPriv->dri2.enabled) {
858          intel_update_renderbuffers(driContextPriv, driDrawPriv);
859          if (driDrawPriv != driReadPriv)
860              intel_update_renderbuffers(driContextPriv, driReadPriv);
861      } else {
862          /* XXX FBO temporary fix-ups! */
863          /* if the renderbuffers don't have regions, init them from the context */
864         struct intel_renderbuffer *irbDepth
865            = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
866         struct intel_renderbuffer *irbStencil
867            = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
868
869         if (intel_fb->color_rb[0]) {
870	    intel_renderbuffer_set_region(intel_fb->color_rb[0],
871					  intel->front_region);
872         }
873         if (intel_fb->color_rb[1]) {
874	    intel_renderbuffer_set_region(intel_fb->color_rb[1],
875					  intel->back_region);
876         }
877
878         if (irbDepth) {
879	    intel_renderbuffer_set_region(irbDepth, intel->depth_region);
880         }
881         if (irbStencil) {
882	    intel_renderbuffer_set_region(irbStencil, intel->depth_region);
883         }
884      }
885
886      /* set GLframebuffer size to match window, if needed */
887      driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
888
889      if (driReadPriv != driDrawPriv) {
890	 driUpdateFramebufferSize(&intel->ctx, driReadPriv);
891      }
892
893      _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);
894
895      /* The drawbuffer won't always be updated by _mesa_make_current:
896       */
897      if (intel->ctx.DrawBuffer == &intel_fb->Base) {
898
899	 if (intel->driReadDrawable != driReadPriv)
900	    intel->driReadDrawable = driReadPriv;
901
902	 if (intel->driDrawable != driDrawPriv) {
903	    if (driDrawPriv->swap_interval == (unsigned)-1) {
904	       int i;
905
906	       driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
907		  ? driGetDefaultVBlankFlags(&intel->optionCache)
908		 : VBLANK_FLAG_NO_IRQ;
909
910	       /* Prevent error printf if one crtc is disabled, this will
911		* be properly calculated in intelWindowMoved() next.
912		*/
913		driDrawPriv->vblFlags = intelFixupVblank(intel, driDrawPriv);
914
915	       (*psp->systemTime->getUST) (&intel_fb->swap_ust);
916	       driDrawableInitVBlank(driDrawPriv);
917	       intel_fb->vbl_waited = driDrawPriv->vblSeq;
918
919	       for (i = 0; i < 2; i++) {
920		  if (intel_fb->color_rb[i])
921		     intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
922	       }
923	    }
924	    intel->driDrawable = driDrawPriv;
925	    intelWindowMoved(intel);
926	 }
927
928	 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
929      }
930   }
931   else {
932      _mesa_make_current(NULL, NULL, NULL);
933   }
934
935   return GL_TRUE;
936}
937
938static void
939intelContendedLock(struct intel_context *intel, GLuint flags)
940{
941   __DRIdrawablePrivate *dPriv = intel->driDrawable;
942   __DRIscreenPrivate *sPriv = intel->driScreen;
943   volatile drm_i915_sarea_t *sarea = intel->sarea;
944   int me = intel->hHWContext;
945
946   drmGetLock(intel->driFd, intel->hHWContext, flags);
947   intel->locked = 1;
948
949   if (INTEL_DEBUG & DEBUG_LOCK)
950      _mesa_printf("%s - got contended lock\n", __progname);
951
952   /* If the window moved, may need to set a new cliprect now.
953    *
954    * NOTE: This releases and regains the hw lock, so all state
955    * checking must be done *after* this call:
956    */
957   if (dPriv)
958       DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
959
960   if (sarea && sarea->ctxOwner != me) {
961      if (INTEL_DEBUG & DEBUG_BUFMGR) {
962	 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n",
963		 sarea->ctxOwner, me);
964      }
965      sarea->ctxOwner = me;
966   }
967
968   /* If the last consumer of the texture memory wasn't us, notify the fake
969    * bufmgr and record the new owner.  We should have the memory shared
970    * between contexts of a single fake bufmgr, but this will at least make
971    * things correct for now.
972    */
973   if (!intel->ttm && sarea->texAge != intel->hHWContext) {
974      sarea->texAge = intel->hHWContext;
975      intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
976      if (INTEL_DEBUG & DEBUG_BATCH)
977	 intel_decode_context_reset();
978      if (INTEL_DEBUG & DEBUG_BUFMGR)
979	 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
980		 sarea->ctxOwner, intel->hHWContext);
981   }
982
983   /* Drawable changed?
984    */
985   if (dPriv && intel->lastStamp != dPriv->lastStamp) {
986       intelWindowMoved(intel);
987       intel->lastStamp = dPriv->lastStamp;
988   }
989}
990
991
992_glthread_DECLARE_STATIC_MUTEX(lockMutex);
993
994/* Lock the hardware and validate our state.
995 */
996void LOCK_HARDWARE( struct intel_context *intel )
997{
998    __DRIdrawable *dPriv = intel->driDrawable;
999    __DRIscreen *sPriv = intel->driScreen;
1000    char __ret = 0;
1001    struct intel_framebuffer *intel_fb = NULL;
1002    struct intel_renderbuffer *intel_rb = NULL;
1003
1004    _glthread_LOCK_MUTEX(lockMutex);
1005    assert(!intel->locked);
1006    intel->locked = 1;
1007
1008    if (intel->driDrawable) {
1009       intel_fb = intel->driDrawable->driverPrivate;
1010
1011       if (intel_fb)
1012	  intel_rb =
1013	     intel_get_renderbuffer(&intel_fb->Base,
1014				    intel_fb->Base._ColorDrawBufferIndexes[0]);
1015    }
1016
1017    if (intel_rb && dPriv->vblFlags &&
1018	!(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&
1019	(intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
1020	drmVBlank vbl;
1021
1022	vbl.request.type = DRM_VBLANK_ABSOLUTE;
1023
1024	if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
1025	    vbl.request.type |= DRM_VBLANK_SECONDARY;
1026	}
1027
1028	vbl.request.sequence = intel_rb->vbl_pending;
1029	drmWaitVBlank(intel->driFd, &vbl);
1030	intel_fb->vbl_waited = vbl.reply.sequence;
1031    }
1032
1033    if (!sPriv->dri2.enabled) {
1034	DRM_CAS(intel->driHwLock, intel->hHWContext,
1035		(DRM_LOCK_HELD|intel->hHWContext), __ret);
1036
1037	if (__ret)
1038	    intelContendedLock( intel, 0 );
1039    }
1040
1041
1042    if (INTEL_DEBUG & DEBUG_LOCK)
1043      _mesa_printf("%s - locked\n", __progname);
1044}
1045
1046
1047/* Unlock the hardware using the global current context
1048 */
1049void UNLOCK_HARDWARE( struct intel_context *intel )
1050{
1051    __DRIscreen *sPriv = intel->driScreen;
1052
1053   intel->vtbl.note_unlock( intel );
1054   intel->locked = 0;
1055
1056   if (!sPriv->dri2.enabled)
1057      DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
1058
1059   _glthread_UNLOCK_MUTEX(lockMutex);
1060
1061   if (INTEL_DEBUG & DEBUG_LOCK)
1062      _mesa_printf("%s - unlocked\n", __progname);
1063
1064   /**
1065    * Nothing should be left in batch outside of LOCK/UNLOCK which references
1066    * cliprects.
1067    */
1068   if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS)
1069      intel_batchbuffer_flush(intel->batch);
1070}
1071
1072