intel_context.h revision 79198063b8adb23536b291081f8df8571926950e 
1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef INTELCONTEXT_INC
29#define INTELCONTEXT_INC
30
31
32#include <stdbool.h>
33#include <string.h>
34#include "main/mtypes.h"
35#include "main/mm.h"
36
37#ifdef __cplusplus
38extern "C" {
39	/* Evil hack for using libdrm in a c++ compiler. */
40	#define virtual virt
41#endif
42
43#include "drm.h"
44#include "intel_bufmgr.h"
45
46#include "intel_screen.h"
47#include "intel_tex_obj.h"
48#include "i915_drm.h"
49
50#ifdef __cplusplus
51	#undef virtual
52#endif
53
54#include "tnl/t_vertex.h"
55
56#define TAG(x) intel##x
57#include "tnl_dd/t_dd_vertex.h"
58#undef TAG
59
60#define DV_PF_555  (1<<8)
61#define DV_PF_565  (2<<8)
62#define DV_PF_8888 (3<<8)
63#define DV_PF_4444 (8<<8)
64#define DV_PF_1555 (9<<8)
65
66struct intel_region;
67struct intel_context;
68
69typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
70                                intelVertex *, intelVertex *);
71typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
72                                 intelVertex *);
73typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
74
75/**
76 * Bits for intel->Fallback field
77 */
78/*@{*/
79#define INTEL_FALLBACK_DRAW_BUFFER	 0x1
80#define INTEL_FALLBACK_READ_BUFFER	 0x2
81#define INTEL_FALLBACK_DEPTH_BUFFER      0x4
82#define INTEL_FALLBACK_STENCIL_BUFFER    0x8
83#define INTEL_FALLBACK_USER		 0x10
84#define INTEL_FALLBACK_RENDERMODE	 0x20
85#define INTEL_FALLBACK_TEXTURE   	 0x40
86#define INTEL_FALLBACK_DRIVER            0x1000  /**< first for drivers */
87/*@}*/
88
89extern void intelFallback(struct intel_context *intel, GLbitfield bit,
90                          bool mode);
91#define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
92
93
94#define INTEL_WRITE_PART  0x1
95#define INTEL_WRITE_FULL  0x2
96#define INTEL_READ        0x4
97
98#define INTEL_MAX_FIXUP 64
99
100#ifndef likely
101#ifdef __GNUC__
102#define likely(expr) (__builtin_expect(expr, 1))
103#define unlikely(expr) (__builtin_expect(expr, 0))
104#else
105#define likely(expr) (expr)
106#define unlikely(expr) (expr)
107#endif
108#endif
109
110struct intel_sync_object {
111   struct gl_sync_object Base;
112
113   /** Batch associated with this sync object */
114   drm_intel_bo *bo;
115};
116
117struct brw_context;
118
119struct intel_batchbuffer {
120   /** Current batchbuffer being queued up. */
121   drm_intel_bo *bo;
122   /** Last BO submitted to the hardware.  Used for glFinish(). */
123   drm_intel_bo *last_bo;
124   /** BO for post-sync nonzero writes for gen6 workaround. */
125   drm_intel_bo *workaround_bo;
126   bool need_workaround_flush;
127
128   struct cached_batch_item *cached_items;
129
130   uint16_t emit, total;
131   uint16_t used, reserved_space;
132   uint32_t map[8192];
133#define BATCH_SZ (8192*sizeof(uint32_t))
134
135   uint32_t state_batch_offset;
136   bool is_blit;
137   bool needs_sol_reset;
138
139   struct {
140      uint16_t used;
141      int reloc_count;
142   } saved;
143};
144
145/**
146 * intel_context is derived from Mesa's context class: struct gl_context.
147 */
148struct intel_context
149{
150   struct gl_context ctx;  /**< base class, must be first field */
151
152   struct
153   {
154      void (*destroy) (struct intel_context * intel);
155      void (*emit_state) (struct intel_context * intel);
156      void (*finish_batch) (struct intel_context * intel);
157      void (*new_batch) (struct intel_context * intel);
158      void (*emit_invarient_state) (struct intel_context * intel);
159      void (*update_texture_state) (struct intel_context * intel);
160
161      void (*render_start) (struct intel_context * intel);
162      void (*render_prevalidate) (struct intel_context * intel);
163      void (*set_draw_region) (struct intel_context * intel,
164                               struct intel_region * draw_regions[],
165                               struct intel_region * depth_region,
166			       GLuint num_regions);
167      void (*update_draw_buffer)(struct intel_context *intel);
168
169      void (*reduced_primitive_state) (struct intel_context * intel,
170                                       GLenum rprim);
171
172      bool (*check_vertex_size) (struct intel_context * intel,
173				      GLuint expected);
174      void (*invalidate_state) (struct intel_context *intel,
175				GLuint new_state);
176
177      void (*assert_not_dirty) (struct intel_context *intel);
178
179      void (*debug_batch)(struct intel_context *intel);
180      void (*annotate_aub)(struct intel_context *intel);
181      bool (*render_target_supported)(struct intel_context *intel,
182				      struct gl_renderbuffer *rb);
183
184      /** Can HiZ be enabled on a depthbuffer of the given format? */
185      bool (*is_hiz_depth_format)(struct intel_context *intel,
186	                          gl_format format);
187
188      /**
189       * Surface state operations (i965+ only)
190       * \{
191       */
192      void (*update_texture_surface)(struct gl_context *ctx, unsigned unit);
193      void (*update_renderbuffer_surface)(struct brw_context *brw,
194					  struct gl_renderbuffer *rb,
195					  unsigned unit);
196      void (*update_null_renderbuffer_surface)(struct brw_context *brw,
197					       unsigned unit);
198      void (*create_constant_surface)(struct brw_context *brw,
199				      drm_intel_bo *bo,
200				      uint32_t offset,
201				      int width,
202				      uint32_t *out_offset);
203      /** \} */
204   } vtbl;
205
206   GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */
207   GLuint NewGLState;
208
209   dri_bufmgr *bufmgr;
210   unsigned int maxBatchSize;
211
212   /**
213    * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
214    */
215   int gen;
216   int gt;
217   bool needs_ff_sync;
218   bool is_haswell;
219   bool is_g4x;
220   bool is_945;
221   bool has_separate_stencil;
222   bool must_use_separate_stencil;
223   bool has_hiz;
224   bool has_llc;
225   bool has_swizzling;
226
227   int urb_size;
228
229   drm_intel_context *hw_ctx;
230
231   struct intel_batchbuffer batch;
232
233   drm_intel_bo *first_post_swapbuffers_batch;
234   bool need_throttle;
235   bool no_batch_wrap;
236   bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
237
238   struct
239   {
240      GLuint id;
241      uint32_t start_ptr; /**< for i8xx */
242      uint32_t primitive;	/**< Current hardware primitive type */
243      void (*flush) (struct intel_context *);
244      drm_intel_bo *vb_bo;
245      uint8_t *vb;
246      unsigned int start_offset; /**< Byte offset of primitive sequence */
247      unsigned int current_offset; /**< Byte offset of next vertex */
248      unsigned int count;	/**< Number of vertices in current primitive */
249   } prim;
250
251   struct {
252      drm_intel_bo *bo;
253      GLuint offset;
254      uint32_t buffer_len;
255      uint32_t buffer_offset;
256      char buffer[4096];
257   } upload;
258
259   GLuint stats_wm;
260
261   /* Offsets of fields within the current vertex:
262    */
263   GLuint coloroffset;
264   GLuint specoffset;
265   GLuint wpos_offset;
266
267   struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
268   GLuint vertex_attr_count;
269
270   GLfloat polygon_offset_scale;        /* dependent on depth_scale, bpp */
271
272   bool hw_stencil;
273   bool hw_stipple;
274   bool no_rast;
275   bool always_flush_batch;
276   bool always_flush_cache;
277
278   /* State for intelvb.c and inteltris.c.
279    */
280   GLuint RenderIndex;
281   GLmatrix ViewportMatrix;
282   GLenum render_primitive;
283   GLenum reduced_primitive; /*< Only gen < 6 */
284   GLuint vertex_size;
285   GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
286
287   /* Fallback rasterization functions
288    */
289   intel_point_func draw_point;
290   intel_line_func draw_line;
291   intel_tri_func draw_tri;
292
293   /**
294    * Set if rendering has occured to the drawable's front buffer.
295    *
296    * This is used in the DRI2 case to detect that glFlush should also copy
297    * the contents of the fake front buffer to the real front buffer.
298    */
299   bool front_buffer_dirty;
300
301   /**
302    * Track whether front-buffer rendering is currently enabled
303    *
304    * A separate flag is used to track this in order to support MRT more
305    * easily.
306    */
307   bool is_front_buffer_rendering;
308   /**
309    * Track whether front-buffer is the current read target.
310    *
311    * This is closely associated with is_front_buffer_rendering, but may
312    * be set separately.  The DRI2 fake front buffer must be referenced
313    * either way.
314    */
315   bool is_front_buffer_reading;
316
317   /**
318    * Count of intel_regions that are mapped.
319    *
320    * This allows us to assert that no batch buffer is emitted if a
321    * region is mapped.
322    */
323   int num_mapped_regions;
324
325   bool use_texture_tiling;
326   bool use_early_z;
327
328   int driFd;
329
330   __DRIcontext *driContext;
331   struct intel_screen *intelScreen;
332   void (*saved_viewport)(struct gl_context * ctx,
333			  GLint x, GLint y, GLsizei width, GLsizei height);
334
335   /**
336    * Configuration cache
337    */
338   driOptionCache optionCache;
339};
340
341extern char *__progname;
342
343
344#define SUBPIXEL_X 0.125
345#define SUBPIXEL_Y 0.125
346
347#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
348
349/**
350 * Align a value up to an alignment value
351 *
352 * If \c value is not already aligned to the requested alignment value, it
353 * will be rounded up.
354 *
355 * \param value  Value to be rounded
356 * \param alignment  Alignment value to be used.  This must be a power of two.
357 *
358 * \sa ROUND_DOWN_TO()
359 */
360#define ALIGN(value, alignment)  (((value) + alignment - 1) & ~(alignment - 1))
361
362/**
363 * Align a value down to an alignment value
364 *
365 * If \c value is not already aligned to the requested alignment value, it
366 * will be rounded down.
367 *
368 * \param value  Value to be rounded
369 * \param alignment  Alignment value to be used.  This must be a power of two.
370 *
371 * \sa ALIGN()
372 */
373#define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
374
375#define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
376
377static INLINE uint32_t
378U_FIXED(float value, uint32_t frac_bits)
379{
380   value *= (1 << frac_bits);
381   return value < 0 ? 0 : value;
382}
383
384static INLINE uint32_t
385S_FIXED(float value, uint32_t frac_bits)
386{
387   return value * (1 << frac_bits);
388}
389
390#define INTEL_FIREVERTICES(intel)		\
391do {						\
392   if ((intel)->prim.flush)			\
393      (intel)->prim.flush(intel);		\
394} while (0)
395
396/* ================================================================
397 * From linux kernel i386 header files, copes with odd sizes better
398 * than COPY_DWORDS would:
399 * XXX Put this in src/mesa/main/imports.h ???
400 */
401#if defined(i386) || defined(__i386__)
402static INLINE void * __memcpy(void * to, const void * from, size_t n)
403{
404   int d0, d1, d2;
405   __asm__ __volatile__(
406      "rep ; movsl\n\t"
407      "testb $2,%b4\n\t"
408      "je 1f\n\t"
409      "movsw\n"
410      "1:\ttestb $1,%b4\n\t"
411      "je 2f\n\t"
412      "movsb\n"
413      "2:"
414      : "=&c" (d0), "=&D" (d1), "=&S" (d2)
415      :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
416      : "memory");
417   return (to);
418}
419#else
420#define __memcpy(a,b,c) memcpy(a,b,c)
421#endif
422
423
424/* ================================================================
425 * Debugging:
426 */
427extern int INTEL_DEBUG;
428
429#define DEBUG_TEXTURE	0x1
430#define DEBUG_STATE	0x2
431#define DEBUG_IOCTL	0x4
432#define DEBUG_BLIT	0x8
433#define DEBUG_MIPTREE   0x10
434#define DEBUG_PERF	0x20
435#define DEBUG_VERBOSE	0x40
436#define DEBUG_BATCH     0x80
437#define DEBUG_PIXEL     0x100
438#define DEBUG_BUFMGR    0x200
439#define DEBUG_REGION    0x400
440#define DEBUG_FBO       0x800
441#define DEBUG_GS        0x1000
442#define DEBUG_SYNC	0x2000
443#define DEBUG_PRIMS	0x4000
444#define DEBUG_VERTS	0x8000
445#define DEBUG_DRI       0x10000
446#define DEBUG_SF        0x20000
447#define DEBUG_SANITY    0x40000
448#define DEBUG_SLEEP     0x80000
449#define DEBUG_STATS     0x100000
450#define DEBUG_TILE      0x200000
451#define DEBUG_WM        0x400000
452#define DEBUG_URB       0x800000
453#define DEBUG_VS        0x1000000
454#define DEBUG_CLIP      0x2000000
455#define DEBUG_AUB       0x4000000
456
457#define DBG(...) do {						\
458	if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))		\
459		printf(__VA_ARGS__);			\
460} while(0)
461
462#define fallback_debug(...) do {				\
463	if (unlikely(INTEL_DEBUG & DEBUG_PERF))			\
464		printf(__VA_ARGS__);				\
465} while(0)
466
467#define PCI_CHIP_845_G			0x2562
468#define PCI_CHIP_I830_M			0x3577
469#define PCI_CHIP_I855_GM		0x3582
470#define PCI_CHIP_I865_G			0x2572
471#define PCI_CHIP_I915_G			0x2582
472#define PCI_CHIP_I915_GM		0x2592
473#define PCI_CHIP_I945_G			0x2772
474#define PCI_CHIP_I945_GM		0x27A2
475#define PCI_CHIP_I945_GME		0x27AE
476#define PCI_CHIP_G33_G			0x29C2
477#define PCI_CHIP_Q35_G			0x29B2
478#define PCI_CHIP_Q33_G			0x29D2
479
480
481/* ================================================================
482 * intel_context.c:
483 */
484
485extern bool intelInitContext(struct intel_context *intel,
486				  int api,
487                                  const struct gl_config * mesaVis,
488                                  __DRIcontext * driContextPriv,
489                                  void *sharedContextPrivate,
490                                  struct dd_function_table *functions);
491
492extern void intelFinish(struct gl_context * ctx);
493extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
494extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
495
496#define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
497
498extern void intelInitDriverFunctions(struct dd_function_table *functions);
499
500void intel_init_syncobj_functions(struct dd_function_table *functions);
501
502
503/* ================================================================
504 * intel_state.c:
505 */
506extern void intelInitStateFuncs(struct dd_function_table *functions);
507
508#define COMPAREFUNC_ALWAYS		0
509#define COMPAREFUNC_NEVER		0x1
510#define COMPAREFUNC_LESS		0x2
511#define COMPAREFUNC_EQUAL		0x3
512#define COMPAREFUNC_LEQUAL		0x4
513#define COMPAREFUNC_GREATER		0x5
514#define COMPAREFUNC_NOTEQUAL		0x6
515#define COMPAREFUNC_GEQUAL		0x7
516
517#define STENCILOP_KEEP			0
518#define STENCILOP_ZERO			0x1
519#define STENCILOP_REPLACE		0x2
520#define STENCILOP_INCRSAT		0x3
521#define STENCILOP_DECRSAT		0x4
522#define STENCILOP_INCR			0x5
523#define STENCILOP_DECR			0x6
524#define STENCILOP_INVERT		0x7
525
526#define LOGICOP_CLEAR			0
527#define LOGICOP_NOR			0x1
528#define LOGICOP_AND_INV 		0x2
529#define LOGICOP_COPY_INV		0x3
530#define LOGICOP_AND_RVRSE		0x4
531#define LOGICOP_INV			0x5
532#define LOGICOP_XOR			0x6
533#define LOGICOP_NAND			0x7
534#define LOGICOP_AND			0x8
535#define LOGICOP_EQUIV			0x9
536#define LOGICOP_NOOP			0xa
537#define LOGICOP_OR_INV			0xb
538#define LOGICOP_COPY			0xc
539#define LOGICOP_OR_RVRSE		0xd
540#define LOGICOP_OR			0xe
541#define LOGICOP_SET			0xf
542
543#define BLENDFACT_ZERO			0x01
544#define BLENDFACT_ONE			0x02
545#define BLENDFACT_SRC_COLR		0x03
546#define BLENDFACT_INV_SRC_COLR 		0x04
547#define BLENDFACT_SRC_ALPHA		0x05
548#define BLENDFACT_INV_SRC_ALPHA 	0x06
549#define BLENDFACT_DST_ALPHA		0x07
550#define BLENDFACT_INV_DST_ALPHA 	0x08
551#define BLENDFACT_DST_COLR		0x09
552#define BLENDFACT_INV_DST_COLR		0x0a
553#define BLENDFACT_SRC_ALPHA_SATURATE	0x0b
554#define BLENDFACT_CONST_COLOR		0x0c
555#define BLENDFACT_INV_CONST_COLOR	0x0d
556#define BLENDFACT_CONST_ALPHA		0x0e
557#define BLENDFACT_INV_CONST_ALPHA	0x0f
558#define BLENDFACT_MASK          	0x0f
559
560enum {
561   DRI_CONF_BO_REUSE_DISABLED,
562   DRI_CONF_BO_REUSE_ALL
563};
564
565extern int intel_translate_shadow_compare_func(GLenum func);
566extern int intel_translate_compare_func(GLenum func);
567extern int intel_translate_stencil_op(GLenum op);
568extern int intel_translate_blend_factor(GLenum factor);
569extern int intel_translate_logic_op(GLenum opcode);
570
571void intel_update_renderbuffers(__DRIcontext *context,
572				__DRIdrawable *drawable);
573void intel_prepare_render(struct intel_context *intel);
574
575void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
576				  uint32_t buffer_id);
577void intel_init_texture_formats(struct gl_context *ctx);
578
579/*======================================================================
580 * Inline conversion functions.
581 * These are better-typed than the macros used previously:
582 */
583static INLINE struct intel_context *
584intel_context(struct gl_context * ctx)
585{
586   return (struct intel_context *) ctx;
587}
588
589static INLINE bool
590is_power_of_two(uint32_t value)
591{
592   return (value & (value - 1)) == 0;
593}
594
595#ifdef __cplusplus
596}
597#endif
598
599#endif
600