intel_mipmap_tree.h revision 7a2e40ed283b70e1da8ea762959ca7462b0f2fc3
1/************************************************************************** 2 * 3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28#ifndef INTEL_MIPMAP_TREE_H 29#define INTEL_MIPMAP_TREE_H 30 31#include <assert.h> 32 33#include "intel_regions.h" 34#include "intel_resolve_map.h" 35 36#ifdef __cplusplus 37extern "C" { 38#endif 39 40/* A layer on top of the intel_regions code which adds: 41 * 42 * - Code to size and layout a region to hold a set of mipmaps. 43 * - Query to determine if a new image fits in an existing tree. 44 * - More refcounting 45 * - maybe able to remove refcounting from intel_region? 46 * - ? 47 * 48 * The fixed mipmap layout of intel hardware where one offset 49 * specifies the position of all images in a mipmap hierachy 50 * complicates the implementation of GL texture image commands, 51 * compared to hardware where each image is specified with an 52 * independent offset. 53 * 54 * In an ideal world, each texture object would be associated with a 55 * single bufmgr buffer or 2d intel_region, and all the images within 56 * the texture object would slot into the tree as they arrive. The 57 * reality can be a little messier, as images can arrive from the user 58 * with sizes that don't fit in the existing tree, or in an order 59 * where the tree layout cannot be guessed immediately. 60 * 61 * This structure encodes an idealized mipmap tree. The GL image 62 * commands build these where possible, otherwise store the images in 63 * temporary system buffers. 64 */ 65 66struct intel_resolve_map; 67struct intel_texture_image; 68 69struct intel_miptree_map { 70 /** Bitfield of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT, GL_MAP_INVALIDATE_BIT */ 71 GLbitfield mode; 72 /** Region of interest for the map. */ 73 int x, y, w, h; 74 /** Possibly malloced temporary buffer for the mapping. */ 75 void *buffer; 76 /** Possible pointer to a BO temporary for the mapping. */ 77 drm_intel_bo *bo; 78 /** Pointer to the start of (map_x, map_y) returned by the mapping. */ 79 void *ptr; 80 /** Stride of the mapping. */ 81 int stride; 82}; 83 84/** 85 * Describes the location of each texture image within a texture region. 86 */ 87struct intel_mipmap_level 88{ 89 /** Offset to this miptree level, used in computing x_offset. */ 90 GLuint level_x; 91 /** Offset to this miptree level, used in computing y_offset. */ 92 GLuint level_y; 93 GLuint width; 94 GLuint height; 95 96 /** 97 * \brief Number of 2D slices in this miplevel. 98 * 99 * The exact semantics of depth varies according to the texture target: 100 * - For GL_TEXTURE_CUBE_MAP, depth is 6. 101 * - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is 102 * identical for all miplevels in the texture. 103 * - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. Its 104 * value, like width and height, varies with miplevel. 105 * - For other texture types, depth is 1. 106 */ 107 GLuint depth; 108 109 /** 110 * \brief List of 2D images in this mipmap level. 111 * 112 * This may be a list of cube faces, array slices in 2D array texture, or 113 * layers in a 3D texture. The list's length is \c depth. 114 */ 115 struct intel_mipmap_slice { 116 /** 117 * \name Offset to slice 118 * \{ 119 * 120 * Hardware formats are so diverse that that there is no unified way to 121 * compute the slice offsets, so we store them in this table. 122 * 123 * The (x, y) offset to slice \c s at level \c l relative the miptrees 124 * base address is 125 * \code 126 * x = mt->level[l].slice[s].x_offset 127 * y = mt->level[l].slice[s].y_offset 128 */ 129 GLuint x_offset; 130 GLuint y_offset; 131 /** \} */ 132 133 /** 134 * Mapping information. Persistent for the duration of 135 * intel_miptree_map/unmap on this slice. 136 */ 137 struct intel_miptree_map *map; 138 } *slice; 139}; 140 141/** 142 * Enum for keeping track of the different MSAA layouts supported by Gen7. 143 */ 144enum intel_msaa_layout 145{ 146 /** 147 * Ordinary surface with no MSAA. 148 */ 149 INTEL_MSAA_LAYOUT_NONE, 150 151 /** 152 * Interleaved Multisample Surface. The additional samples are 153 * accommodated by scaling up the width and the height of the surface so 154 * that all the samples corresponding to a pixel are located at nearby 155 * memory locations. 156 */ 157 INTEL_MSAA_LAYOUT_IMS, 158 159 /** 160 * Uncompressed Multisample Surface. The surface is stored as a 2D array, 161 * with array slice n containing all pixel data for sample n. 162 */ 163 INTEL_MSAA_LAYOUT_UMS, 164 165 /** 166 * Compressed Multisample Surface. The surface is stored as in 167 * INTEL_MSAA_LAYOUT_UMS, but there is an additional buffer called the MCS 168 * (Multisample Control Surface) buffer. Each pixel in the MCS buffer 169 * indicates the mapping from sample number to array slice. This allows 170 * the common case (where all samples constituting a pixel have the same 171 * color value) to be stored efficiently by just using a single array 172 * slice. 173 */ 174 INTEL_MSAA_LAYOUT_CMS, 175}; 176 177struct intel_mipmap_tree 178{ 179 /* Effectively the key: 180 */ 181 GLenum target; 182 183 /** 184 * Generally, this is just the same as the gl_texture_image->TexFormat or 185 * gl_renderbuffer->Format. 186 * 187 * However, for textures and renderbuffers with packed depth/stencil formats 188 * on hardware where we want or need to use separate stencil, there will be 189 * two miptrees for storing the data. If the depthstencil texture or rb is 190 * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be 191 * MESA_FORMAT_Z32_FLOAT, otherwise for MESA_FORMAT_S8_Z24 objects it will be 192 * MESA_FORMAT_X8_Z24. 193 * 194 * For ETC1 textures, this is MESA_FORMAT_RGBX8888_REV if the hardware 195 * lacks support for ETC1. See @ref wraps_etc1. 196 */ 197 gl_format format; 198 199 /** 200 * The X offset of each image in the miptree must be aligned to this. See 201 * the "Alignment Unit Size" section of the BSpec. 202 */ 203 unsigned int align_w; 204 unsigned int align_h; /**< \see align_w */ 205 206 GLuint first_level; 207 GLuint last_level; 208 209 GLuint width0, height0, depth0; /**< Level zero image dimensions */ 210 GLuint cpp; 211 GLuint num_samples; 212 bool compressed; 213 214 /** 215 * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true 216 * if the surface only contains LOD 0, and hence no space is for LOD's 217 * other than 0 in between array slices. 218 * 219 * Corresponds to the surface_array_spacing bit in gen7_surface_state. 220 */ 221 bool array_spacing_lod0; 222 223 /** 224 * MSAA layout used by this buffer. 225 */ 226 enum intel_msaa_layout msaa_layout; 227 228 /* Derived from the above: 229 */ 230 GLuint total_width; 231 GLuint total_height; 232 233 /* The 3DSTATE_CLEAR_PARAMS value associated with the last depth clear to 234 * this depth mipmap tree, if any. 235 */ 236 uint32_t depth_clear_value; 237 238 /* Includes image offset tables: 239 */ 240 struct intel_mipmap_level level[MAX_TEXTURE_LEVELS]; 241 242 /* The data is held here: 243 */ 244 struct intel_region *region; 245 246 /* Offset into region bo where miptree starts: 247 */ 248 uint32_t offset; 249 250 /** 251 * \brief HiZ miptree 252 * 253 * This is non-null only if HiZ is enabled for this miptree. 254 * 255 * \see intel_miptree_alloc_hiz() 256 */ 257 struct intel_mipmap_tree *hiz_mt; 258 259 /** 260 * \brief Map of miptree slices to needed resolves. 261 * 262 * This is used only when the miptree has a child HiZ miptree. 263 * 264 * Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is 265 * \c mt->hiz_map. The resolve map of the child HiZ miptree, \c 266 * mt->hiz_mt->hiz_map, is unused. 267 */ 268 struct intel_resolve_map hiz_map; 269 270 /** 271 * \brief Stencil miptree for depthstencil textures. 272 * 273 * This miptree is used for depthstencil textures and renderbuffers that 274 * require separate stencil. It always has the true copy of the stencil 275 * bits, regardless of mt->format. 276 * 277 * \see intel_miptree_map_depthstencil() 278 * \see intel_miptree_unmap_depthstencil() 279 */ 280 struct intel_mipmap_tree *stencil_mt; 281 282 /** 283 * \brief MCS miptree for multisampled textures. 284 * 285 * This miptree contains the "multisample control surface", which stores 286 * the necessary information to implement compressed MSAA on Gen7+ 287 * (INTEL_MSAA_FORMAT_CMS). 288 */ 289 struct intel_mipmap_tree *mcs_mt; 290 291 /** 292 * \brief The miptree contains RGBX data that was originally ETC1 data. 293 * 294 * On hardware that lacks support for ETC1 textures, we do the 295 * following on calls to glCompressedTexImage2D(GL_ETC1_RGB8_OES): 296 * 1. Create a miptree whose format is MESA_FORMAT_RGBX8888_REV with 297 * the wraps_etc1 flag set. 298 * 2. Translate the ETC1 data into RGBX. 299 * 3. Store the RGBX data into the miptree and discard the ETC1 data. 300 */ 301 bool wraps_etc1; 302 303 /* These are also refcounted: 304 */ 305 GLuint refcount; 306}; 307 308 309 310struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel, 311 GLenum target, 312 gl_format format, 313 GLuint first_level, 314 GLuint last_level, 315 GLuint width0, 316 GLuint height0, 317 GLuint depth0, 318 bool expect_accelerated_upload, 319 GLuint num_samples, 320 enum intel_msaa_layout msaa_layout); 321 322struct intel_mipmap_tree * 323intel_miptree_create_for_region(struct intel_context *intel, 324 GLenum target, 325 gl_format format, 326 struct intel_region *region); 327 328/** 329 * Create a miptree appropriate as the storage for a non-texture renderbuffer. 330 * The miptree has the following properties: 331 * - The target is GL_TEXTURE_2D. 332 * - There are no levels other than the base level 0. 333 * - Depth is 1. 334 */ 335struct intel_mipmap_tree* 336intel_miptree_create_for_renderbuffer(struct intel_context *intel, 337 gl_format format, 338 uint32_t width, 339 uint32_t height, 340 uint32_t num_samples); 341 342/** \brief Assert that the level and layer are valid for the miptree. */ 343static inline void 344intel_miptree_check_level_layer(struct intel_mipmap_tree *mt, 345 uint32_t level, 346 uint32_t layer) 347{ 348 assert(level >= mt->first_level); 349 assert(level <= mt->last_level); 350 assert(layer < mt->level[level].depth); 351} 352 353int intel_miptree_pitch_align (struct intel_context *intel, 354 struct intel_mipmap_tree *mt, 355 uint32_t tiling, 356 int pitch); 357 358void intel_miptree_reference(struct intel_mipmap_tree **dst, 359 struct intel_mipmap_tree *src); 360 361void intel_miptree_release(struct intel_mipmap_tree **mt); 362 363/* Check if an image fits an existing mipmap tree layout 364 */ 365bool intel_miptree_match_image(struct intel_mipmap_tree *mt, 366 struct gl_texture_image *image); 367 368void 369intel_miptree_get_image_offset(struct intel_mipmap_tree *mt, 370 GLuint level, GLuint face, GLuint depth, 371 GLuint *x, GLuint *y); 372 373void 374intel_miptree_get_dimensions_for_image(struct gl_texture_image *image, 375 int *width, int *height, int *depth); 376 377void intel_miptree_set_level_info(struct intel_mipmap_tree *mt, 378 GLuint level, 379 GLuint x, GLuint y, 380 GLuint w, GLuint h, GLuint d); 381 382void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt, 383 GLuint level, 384 GLuint img, GLuint x, GLuint y); 385 386void 387intel_miptree_copy_teximage(struct intel_context *intel, 388 struct intel_texture_image *intelImage, 389 struct intel_mipmap_tree *dst_mt); 390 391/** 392 * Copy the stencil data from \c mt->stencil_mt->region to \c mt->region for 393 * the given miptree slice. 394 * 395 * \see intel_mipmap_tree::stencil_mt 396 */ 397void 398intel_miptree_s8z24_scatter(struct intel_context *intel, 399 struct intel_mipmap_tree *mt, 400 uint32_t level, 401 uint32_t slice); 402 403/** 404 * Copy the stencil data in \c mt->stencil_mt->region to \c mt->region for the 405 * given miptree slice. 406 * 407 * \see intel_mipmap_tree::stencil_mt 408 */ 409void 410intel_miptree_s8z24_gather(struct intel_context *intel, 411 struct intel_mipmap_tree *mt, 412 uint32_t level, 413 uint32_t layer); 414 415bool 416intel_miptree_alloc_mcs(struct intel_context *intel, 417 struct intel_mipmap_tree *mt, 418 GLuint num_samples); 419 420/** 421 * \name Miptree HiZ functions 422 * \{ 423 * 424 * It is safe to call the "slice_set_need_resolve" and "slice_resolve" 425 * functions on a miptree without HiZ. In that case, each function is a no-op. 426 */ 427 428/** 429 * \brief Allocate the miptree's embedded HiZ miptree. 430 * \see intel_mipmap_tree:hiz_mt 431 * \return false if allocation failed 432 */ 433 434bool 435intel_miptree_alloc_hiz(struct intel_context *intel, 436 struct intel_mipmap_tree *mt, 437 GLuint num_samples); 438 439void 440intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt, 441 uint32_t level, 442 uint32_t depth); 443void 444intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt, 445 uint32_t level, 446 uint32_t depth); 447void 448intel_miptree_all_slices_set_need_hiz_resolve(struct intel_mipmap_tree *mt); 449 450void 451intel_miptree_all_slices_set_need_depth_resolve(struct intel_mipmap_tree *mt); 452 453/** 454 * \return false if no resolve was needed 455 */ 456bool 457intel_miptree_slice_resolve_hiz(struct intel_context *intel, 458 struct intel_mipmap_tree *mt, 459 unsigned int level, 460 unsigned int depth); 461 462/** 463 * \return false if no resolve was needed 464 */ 465bool 466intel_miptree_slice_resolve_depth(struct intel_context *intel, 467 struct intel_mipmap_tree *mt, 468 unsigned int level, 469 unsigned int depth); 470 471/** 472 * \return false if no resolve was needed 473 */ 474bool 475intel_miptree_all_slices_resolve_hiz(struct intel_context *intel, 476 struct intel_mipmap_tree *mt); 477 478/** 479 * \return false if no resolve was needed 480 */ 481bool 482intel_miptree_all_slices_resolve_depth(struct intel_context *intel, 483 struct intel_mipmap_tree *mt); 484 485/**\}*/ 486 487/* i915_mipmap_tree.c: 488 */ 489void i915_miptree_layout(struct intel_mipmap_tree *mt); 490void i945_miptree_layout(struct intel_mipmap_tree *mt); 491void brw_miptree_layout(struct intel_context *intel, 492 struct intel_mipmap_tree *mt); 493 494void 495intel_miptree_map(struct intel_context *intel, 496 struct intel_mipmap_tree *mt, 497 unsigned int level, 498 unsigned int slice, 499 unsigned int x, 500 unsigned int y, 501 unsigned int w, 502 unsigned int h, 503 GLbitfield mode, 504 void **out_ptr, 505 int *out_stride); 506 507void 508intel_miptree_unmap(struct intel_context *intel, 509 struct intel_mipmap_tree *mt, 510 unsigned int level, 511 unsigned int slice); 512 513#ifdef I915 514static inline void 515intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt, 516 unsigned int level, unsigned int layer, enum gen6_hiz_op op) 517{ 518 /* Stub on i915. It would be nice if we didn't execute resolve code at all 519 * there. 520 */ 521} 522#else 523void 524intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt, 525 unsigned int level, unsigned int layer, enum gen6_hiz_op op); 526#endif 527 528#ifdef __cplusplus 529} 530#endif 531 532#endif 533