r200_context.c revision 9c1b41879aab2ff7386c547a2ccce7686c018cf5
1/*
2Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
3
4The Weather Channel (TM) funded Tungsten Graphics to develop the
5initial release of the Radeon 8500 driver under the XFree86 license.
6This notice must be preserved.
7
8Permission is hereby granted, free of charge, to any person obtaining
9a copy of this software and associated documentation files (the
10"Software"), to deal in the Software without restriction, including
11without limitation the rights to use, copy, modify, merge, publish,
12distribute, sublicense, and/or sell copies of the Software, and to
13permit persons to whom the Software is furnished to do so, subject to
14the following conditions:
15
16The above copyright notice and this permission notice (including the
17next paragraph) shall be included in all copies or substantial
18portions of the Software.
19
20THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28**************************************************************************/
29
30/*
31 * Authors:
32 *   Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35#include <stdbool.h>
36#include "main/glheader.h"
37#include "main/api_arrayelt.h"
38#include "main/context.h"
39#include "main/simple_list.h"
40#include "main/imports.h"
41#include "main/extensions.h"
42#include "main/mfeatures.h"
43#include "main/version.h"
44
45#include "swrast/swrast.h"
46#include "swrast_setup/swrast_setup.h"
47#include "vbo/vbo.h"
48
49#include "tnl/tnl.h"
50#include "tnl/t_pipeline.h"
51
52#include "drivers/common/driverfuncs.h"
53
54#include "r200_context.h"
55#include "r200_ioctl.h"
56#include "r200_state.h"
57#include "r200_tex.h"
58#include "r200_swtcl.h"
59#include "r200_tcl.h"
60#include "r200_vertprog.h"
61#include "radeon_queryobj.h"
62#include "r200_blit.h"
63#include "radeon_fog.h"
64
65#include "radeon_span.h"
66
67#include "utils.h"
68#include "xmlpool.h" /* for symbolic values of enum-type options */
69
70/* Return various strings for glGetString().
71 */
72static const GLubyte *r200GetString( struct gl_context *ctx, GLenum name )
73{
74   r200ContextPtr rmesa = R200_CONTEXT(ctx);
75   static char buffer[128];
76   unsigned   offset;
77   GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
78      rmesa->radeon.radeonScreen->AGPMode;
79
80   switch ( name ) {
81   case GL_VENDOR:
82      return (GLubyte *)"Tungsten Graphics, Inc.";
83
84   case GL_RENDERER:
85      offset = driGetRendererString( buffer, "R200", agp_mode );
86
87      sprintf( & buffer[ offset ], " %sTCL",
88	       !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
89	       ? "" : "NO-" );
90
91      return (GLubyte *)buffer;
92
93   default:
94      return NULL;
95   }
96}
97
98
99extern const struct tnl_pipeline_stage _r200_render_stage;
100extern const struct tnl_pipeline_stage _r200_tcl_stage;
101
102static const struct tnl_pipeline_stage *r200_pipeline[] = {
103
104   /* Try and go straight to t&l
105    */
106   &_r200_tcl_stage,
107
108   /* Catch any t&l fallbacks
109    */
110   &_tnl_vertex_transform_stage,
111   &_tnl_normal_transform_stage,
112   &_tnl_lighting_stage,
113   &_tnl_fog_coordinate_stage,
114   &_tnl_texgen_stage,
115   &_tnl_texture_transform_stage,
116   &_tnl_point_attenuation_stage,
117   &_tnl_vertex_program_stage,
118   /* Try again to go to tcl?
119    *     - no good for asymmetric-twoside (do with multipass)
120    *     - no good for asymmetric-unfilled (do with multipass)
121    *     - good for material
122    *     - good for texgen
123    *     - need to manipulate a bit of state
124    *
125    * - worth it/not worth it?
126    */
127
128   /* Else do them here.
129    */
130/*    &_r200_render_stage,  */ /* FIXME: bugs with ut2003 */
131   &_tnl_render_stage,		/* FALLBACK:  */
132   NULL,
133};
134
135
136
137/* Initialize the driver's misc functions.
138 */
139static void r200InitDriverFuncs( struct dd_function_table *functions )
140{
141    functions->GetBufferSize		= NULL; /* OBSOLETE */
142    functions->GetString		= r200GetString;
143}
144
145
146static void r200_get_lock(radeonContextPtr radeon)
147{
148   r200ContextPtr rmesa = (r200ContextPtr)radeon;
149   drm_radeon_sarea_t *sarea = radeon->sarea;
150
151   R200_STATECHANGE( rmesa, ctx );
152   if (rmesa->radeon.sarea->tiling_enabled) {
153      rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
154   }
155   else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
156
157   if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
158      sarea->ctx_owner = rmesa->radeon.dri.hwContext;
159   }
160
161}
162
163static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
164{
165}
166
167static void r200_emit_query_finish(radeonContextPtr radeon)
168{
169   BATCH_LOCALS(radeon);
170   struct radeon_query_object *query = radeon->query.current;
171
172   BEGIN_BATCH_NO_AUTOSTATE(4);
173   OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
174   OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
175   END_BATCH();
176   query->curr_offset += sizeof(uint32_t);
177   assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
178   query->emitted_begin = GL_FALSE;
179}
180
181static void r200_init_vtbl(radeonContextPtr radeon)
182{
183   radeon->vtbl.get_lock = r200_get_lock;
184   radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
185   radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
186   radeon->vtbl.swtcl_flush = r200_swtcl_flush;
187   radeon->vtbl.fallback = r200Fallback;
188   radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
189   radeon->vtbl.emit_query_finish = r200_emit_query_finish;
190   radeon->vtbl.check_blit = r200_check_blit;
191   radeon->vtbl.blit = r200_blit;
192   radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
193}
194
195
196/* Create the device specific rendering context.
197 */
198GLboolean r200CreateContext( gl_api api,
199			     const struct gl_config *glVisual,
200			     __DRIcontext *driContextPriv,
201			     unsigned major_version,
202			     unsigned minor_version,
203			     uint32_t flags,
204			     unsigned *error,
205			     void *sharedContextPrivate)
206{
207   __DRIscreen *sPriv = driContextPriv->driScreenPriv;
208   radeonScreenPtr screen = (radeonScreenPtr)(sPriv->driverPrivate);
209   struct dd_function_table functions;
210   r200ContextPtr rmesa;
211   struct gl_context *ctx;
212   int i;
213   int tcl_mode;
214
215   /* API and flag filtering is handled in dri2CreateContextAttribs.
216    */
217   (void) api;
218   (void) flags;
219
220   assert(glVisual);
221   assert(driContextPriv);
222   assert(screen);
223
224   /* Allocate the R200 context */
225   rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
226   if ( !rmesa ) {
227      *error = __DRI_CTX_ERROR_NO_MEMORY;
228      return GL_FALSE;
229   }
230
231   rmesa->radeon.radeonScreen = screen;
232   r200_init_vtbl(&rmesa->radeon);
233   /* init exp fog table data */
234   radeonInitStaticFogData();
235
236   /* Parse configuration files.
237    * Do this here so that initialMaxAnisotropy is set before we create
238    * the default textures.
239    */
240   driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
241			screen->driScreen->myNum, "r200");
242   rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
243							"def_max_anisotropy");
244
245   if ( sPriv->drm_version.major == 1
246       && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
247      if ( sPriv->drm_version.minor < 13 )
248	 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
249			  "disabling.\n", sPriv->drm_version.minor );
250      else
251	 rmesa->using_hyperz = GL_TRUE;
252   }
253
254   if ( sPriv->drm_version.minor >= 15 )
255      rmesa->texmicrotile = GL_TRUE;
256
257   /* Init default driver functions then plug in our R200-specific functions
258    * (the texture functions are especially important)
259    */
260   _mesa_init_driver_functions(&functions);
261   r200InitDriverFuncs(&functions);
262   r200InitIoctlFuncs(&functions);
263   r200InitStateFuncs(&rmesa->radeon, &functions);
264   r200InitTextureFuncs(&rmesa->radeon, &functions);
265   r200InitShaderFuncs(&functions);
266   radeonInitQueryObjFunctions(&functions);
267
268   if (!radeonInitContext(&rmesa->radeon, &functions,
269			  glVisual, driContextPriv,
270			  sharedContextPrivate)) {
271     FREE(rmesa);
272     *error = __DRI_CTX_ERROR_NO_MEMORY;
273     return GL_FALSE;
274   }
275
276   rmesa->radeon.swtcl.RenderIndex = ~0;
277   rmesa->radeon.hw.all_dirty = 1;
278
279   /* Set the maximum texture size small enough that we can guarentee that
280    * all texture units can bind a maximal texture and have all of them in
281    * texturable memory at once. Depending on the allow_large_textures driconf
282    * setting allow larger textures.
283    */
284
285   ctx = rmesa->radeon.glCtx;
286   ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
287						 "texture_units");
288   ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
289   ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
290
291   ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
292
293   ctx->Const.StripTextureBorder = GL_TRUE;
294
295   i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
296
297   /* FIXME: When no memory manager is available we should set this
298    * to some reasonable value based on texture memory pool size */
299   ctx->Const.MaxTextureLevels = 12;
300   ctx->Const.Max3DTextureLevels = 9;
301   ctx->Const.MaxCubeTextureLevels = 12;
302   ctx->Const.MaxTextureRectSize = 2048;
303   ctx->Const.MaxRenderbufferSize = 2048;
304
305   ctx->Const.MaxTextureMaxAnisotropy = 16.0;
306
307   /* No wide AA points.
308    */
309   ctx->Const.MinPointSize = 1.0;
310   ctx->Const.MinPointSizeAA = 1.0;
311   ctx->Const.MaxPointSizeAA = 1.0;
312   ctx->Const.PointSizeGranularity = 0.0625;
313   ctx->Const.MaxPointSize = 2047.0;
314
315   /* mesa initialization problem - _mesa_init_point was already called */
316   ctx->Point.MaxSize = ctx->Const.MaxPointSize;
317
318   ctx->Const.MinLineWidth = 1.0;
319   ctx->Const.MinLineWidthAA = 1.0;
320   ctx->Const.MaxLineWidth = 10.0;
321   ctx->Const.MaxLineWidthAA = 10.0;
322   ctx->Const.LineWidthGranularity = 0.0625;
323
324   ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
325   ctx->Const.VertexProgram.MaxNativeAttribs = 12;
326   ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
327   ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
328   ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
329
330   ctx->Const.MaxDrawBuffers = 1;
331   ctx->Const.MaxColorAttachments = 1;
332
333   _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
334
335   /* Initialize the software rasterizer and helper modules.
336    */
337   _swrast_CreateContext( ctx );
338   _vbo_CreateContext( ctx );
339   _tnl_CreateContext( ctx );
340   _swsetup_CreateContext( ctx );
341   _ae_create_context( ctx );
342
343   /* Install the customized pipeline:
344    */
345   _tnl_destroy_pipeline( ctx );
346   _tnl_install_pipeline( ctx, r200_pipeline );
347
348   /* Try and keep materials and vertices separate:
349    */
350/*    _tnl_isolate_materials( ctx, GL_TRUE ); */
351
352
353   /* Configure swrast and TNL to match hardware characteristics:
354    */
355   _swrast_allow_pixel_fog( ctx, GL_FALSE );
356   _swrast_allow_vertex_fog( ctx, GL_TRUE );
357   _tnl_allow_pixel_fog( ctx, GL_FALSE );
358   _tnl_allow_vertex_fog( ctx, GL_TRUE );
359
360
361   for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
362      _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
363      _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
364   }
365   _math_matrix_ctr( &rmesa->tmpmat );
366   _math_matrix_set_identity( &rmesa->tmpmat );
367
368   ctx->Extensions.ARB_half_float_pixel = true;
369   ctx->Extensions.ARB_occlusion_query = true;
370   ctx->Extensions.ARB_texture_border_clamp = true;
371   ctx->Extensions.ARB_texture_env_combine = true;
372   ctx->Extensions.ARB_texture_env_dot3 = true;
373   ctx->Extensions.ARB_texture_env_crossbar = true;
374   ctx->Extensions.ARB_vertex_array_object = true;
375   ctx->Extensions.EXT_blend_color = true;
376   ctx->Extensions.EXT_blend_minmax = true;
377   ctx->Extensions.EXT_fog_coord = true;
378   ctx->Extensions.EXT_packed_depth_stencil = true;
379   ctx->Extensions.EXT_secondary_color = true;
380   ctx->Extensions.EXT_texture_env_dot3 = true;
381   ctx->Extensions.EXT_texture_filter_anisotropic = true;
382   ctx->Extensions.EXT_texture_mirror_clamp = true;
383   ctx->Extensions.APPLE_vertex_array_object = true;
384   ctx->Extensions.ATI_texture_env_combine3 = true;
385   ctx->Extensions.ATI_texture_mirror_once = true;
386   ctx->Extensions.MESA_pack_invert = true;
387   ctx->Extensions.NV_blend_square = true;
388   ctx->Extensions.NV_texture_rectangle = true;
389#if FEATURE_OES_EGL_image
390   ctx->Extensions.OES_EGL_image = true;
391#endif
392
393   ctx->Extensions.EXT_framebuffer_object = true;
394   ctx->Extensions.ARB_occlusion_query = true;
395
396   if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
397     /* yuv textures don't work with some chips - R200 / rv280 okay so far
398	others get the bit ordering right but don't actually do YUV-RGB conversion */
399      ctx->Extensions.MESA_ycbcr_texture = true;
400   }
401   if (rmesa->radeon.glCtx->Mesa_DXTn) {
402      ctx->Extensions.EXT_texture_compression_s3tc = true;
403      ctx->Extensions.S3_s3tc = true;
404   }
405   else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
406      ctx->Extensions.EXT_texture_compression_s3tc = true;
407   }
408
409   ctx->Extensions.ARB_texture_cube_map = true;
410
411   ctx->Extensions.EXT_blend_equation_separate = true;
412   ctx->Extensions.EXT_blend_func_separate = true;
413
414   ctx->Extensions.ARB_vertex_program = true;
415   ctx->Extensions.EXT_gpu_program_parameters = true;
416
417   ctx->Extensions.NV_vertex_program =
418      driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program");
419
420   ctx->Extensions.ATI_fragment_shader = (ctx->Const.MaxTextureUnits == 6);
421
422   ctx->Extensions.ARB_point_sprite = true;
423   ctx->Extensions.EXT_point_parameters = true;
424
425#if 0
426   r200InitDriverFuncs( ctx );
427   r200InitIoctlFuncs( ctx );
428   r200InitStateFuncs( ctx );
429   r200InitTextureFuncs( ctx );
430#endif
431   /* plug in a few more device driver functions */
432   /* XXX these should really go right after _mesa_init_driver_functions() */
433   radeon_fbo_init(&rmesa->radeon);
434   radeonInitSpanFuncs( ctx );
435   r200InitTnlFuncs( ctx );
436   r200InitState( rmesa );
437   r200InitSwtcl( ctx );
438
439   rmesa->prefer_gart_client_texturing =
440      (getenv("R200_GART_CLIENT_TEXTURES") != 0);
441
442   tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
443   if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
444      fprintf(stderr, "disabling 3D acceleration\n");
445      FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
446   }
447   else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
448	    !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
449      if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
450	 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
451	 fprintf(stderr, "Disabling HW TCL support\n");
452      }
453      TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
454   }
455
456   _mesa_compute_version(ctx);
457   if (ctx->Version < major_version * 10 + minor_version) {
458      r200DestroyContext(driContextPriv);
459      *error = __DRI_CTX_ERROR_BAD_VERSION;
460      return GL_FALSE;
461   }
462
463   *error = __DRI_CTX_ERROR_SUCCESS;
464   return GL_TRUE;
465}
466
467
468void r200DestroyContext( __DRIcontext *driContextPriv )
469{
470	int i;
471	r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
472	if (rmesa)
473	{
474		for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
475			_math_matrix_dtr( &rmesa->TexGenMatrix[i] );
476		}
477	}
478	radeonDestroyContext(driContextPriv);
479}
480