r200_context.h revision a7a9a91d7b28e5b5faed509d00f0f951e3136b1b
1bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl/* 2adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellCopyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 3adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 4adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe Weather Channel (TM) funded Tungsten Graphics to develop the 5adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellinitial release of the Radeon 8500 driver under the XFree86 license. 6adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThis notice must be preserved. 7adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 8adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellPermission is hereby granted, free of charge, to any person obtaining 9adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwella copy of this software and associated documentation files (the 10adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell"Software"), to deal in the Software without restriction, including 11adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellwithout limitation the rights to use, copy, modify, merge, publish, 12adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwelldistribute, sublicense, and/or sell copies of the Software, and to 13adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellpermit persons to whom the Software is furnished to do so, subject to 14adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellthe following conditions: 15adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 16adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe above copyright notice and this permission notice (including the 17adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellnext paragraph) shall be included in all copies or substantial 18adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellportions of the Software. 19adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 20adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 28adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell**************************************************************************/ 29adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 30adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* 31adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Authors: 32adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Keith Whitwell <keith@tungstengraphics.com> 33adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 34adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 35adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#ifndef __R200_CONTEXT_H__ 36adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define __R200_CONTEXT_H__ 37adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 38e946688edac5cdf153652defae3ef732a3487416Ian Romanick#include "tnl/t_vertex.h" 39ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl#include "drm.h" 40ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl#include "radeon_drm.h" 41adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "dri_util.h" 42adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "texmem.h" 43adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 44ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/macros.h" 45ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/mtypes.h" 46ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/colormac.h" 47adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_reg.h" 4898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#include "r200_vertprog.h" 49adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 5095a0bd6762737bb25bdf5c4147da9d1372f6aac3Ian Romanick#define ENABLE_HW_3D_TEXTURE 1 /* XXX this is temporary! */ 51adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 52bf35d70635309e499aee666eb5811446aa8b489eRoland Scheidegger#ifndef R200_EMIT_VAP_PVS_CNTL 53bf35d70635309e499aee666eb5811446aa8b489eRoland Scheidegger#error This driver requires a newer libdrm to compile 54bf35d70635309e499aee666eb5811446aa8b489eRoland Scheidegger#endif 55bf35d70635309e499aee666eb5811446aa8b489eRoland Scheidegger 564637235183b80963536f2364e4d50fcb894886ddDave Airlie#include "radeon_screen.h" 578cb16e6daff40bbfd7b63a43da72862226a4a164Dave Airlie#include "radeon_common.h" 588cb16e6daff40bbfd7b63a43da72862226a4a164Dave Airlie 598cb16e6daff40bbfd7b63a43da72862226a4a164Dave Airlie#include "radeon_lock.h" 60692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie 61adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_context; 62adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwelltypedef struct r200_context r200ContextRec; 63adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwelltypedef struct r200_context *r200ContextPtr; 64adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 654637235183b80963536f2364e4d50fcb894886ddDave Airlie#include "main/mm.h" 66adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 6798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheideggerstruct r200_vertex_program { 68122629f27925a9dc50029bebc5079f87f416a7e1Brian Paul struct gl_vertex_program mesa_program; /* Must be first */ 6998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger int translated; 70fc606f7db9072d4f40081aea8f92f1d4489a5115Roland Scheidegger /* need excess instr: 1 for late loop checking, 2 for 71fc606f7db9072d4f40081aea8f92f1d4489a5115Roland Scheidegger additional instr due to instr/attr, 3 for fog */ 72fc606f7db9072d4f40081aea8f92f1d4489a5115Roland Scheidegger VERTEX_SHADER_INSTRUCTION instr[R200_VSF_MAX_INST + 6]; 7398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger int pos_end; 7498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger int inputs[VERT_ATTRIB_MAX]; 75421ce180f52ff55b866066fabd861a51dd6d2b26Roland Scheidegger GLubyte inputmap_rev[16]; 7698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger int native; 77fc606f7db9072d4f40081aea8f92f1d4489a5115Roland Scheidegger int fogpidx; 78fc606f7db9072d4f40081aea8f92f1d4489a5115Roland Scheidegger int fogmode; 7998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger}; 8098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 81692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie#define R200_TEX_ALL 0x3f 82adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 83adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 84adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_texture_env_state { 85692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie radeonTexObjPtr texobj; 8636603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger GLuint outputreg; 8736603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger GLuint unitneeded; 88adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell}; 89adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 9048ccaf200940613032dfaaafe71382947f398004Roland Scheidegger#define R200_MAX_TEXTURE_UNITS 6 91adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 92adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_texture_state { 93adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct r200_texture_env_state unit[R200_MAX_TEXTURE_UNITS]; 94adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell}; 95adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 96adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 97adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* Trying to keep these relatively short as the variables are becoming 98adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * extravagently long. Drop the driver name prefix off the front of 99adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * everything - I think we know which driver we're in by now, and keep the 100adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * prefix to 3 letters unless absolutely impossible. 101adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 102adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 103adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_CMD_0 0 104adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_PP_MISC 1 105adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_PP_FOG_COLOR 2 106adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RE_SOLID_COLOR 3 107adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RB3D_BLENDCNTL 4 108adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RB3D_DEPTHOFFSET 5 109adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RB3D_DEPTHPITCH 6 110adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RB3D_ZSTENCILCNTL 7 111adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_CMD_1 8 112adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_PP_CNTL 9 113adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RB3D_CNTL 10 114adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RB3D_COLOROFFSET 11 115adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_CMD_2 12 /* why */ 116adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CTX_RB3D_COLORPITCH 13 /* why */ 117033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger#define CTX_STATE_SIZE_OLDDRM 14 118033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger#define CTX_CMD_3 14 119033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger#define CTX_RB3D_BLENDCOLOR 15 120033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger#define CTX_RB3D_ABLENDCNTL 16 121033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger#define CTX_RB3D_CBLENDCNTL 17 122033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger#define CTX_STATE_SIZE_NEWDRM 18 123adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 124adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define SET_CMD_0 0 125adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define SET_SE_CNTL 1 126adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define SET_RE_CNTL 2 /* replace se_coord_fmt */ 127adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define SET_STATE_SIZE 3 128adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 129adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTE_CMD_0 0 130adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTE_SE_VTE_CNTL 1 131adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTE_STATE_SIZE 2 132adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 133adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIN_CMD_0 0 134adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIN_RE_LINE_PATTERN 1 135adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIN_RE_LINE_STATE 2 136adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIN_CMD_1 3 137adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIN_SE_LINE_WIDTH 4 138adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIN_STATE_SIZE 5 139adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 140adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSK_CMD_0 0 141adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSK_RB3D_STENCILREFMASK 1 142adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSK_RB3D_ROPCNTL 2 143adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSK_RB3D_PLANEMASK 3 144adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSK_STATE_SIZE 4 145adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 146adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_CMD_0 0 147adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_SE_VPORT_XSCALE 1 148adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_SE_VPORT_XOFFSET 2 149adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_SE_VPORT_YSCALE 3 150adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_SE_VPORT_YOFFSET 4 151adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_SE_VPORT_ZSCALE 5 152adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_SE_VPORT_ZOFFSET 6 153adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VPT_STATE_SIZE 7 154adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 155adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define ZBS_CMD_0 0 156adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define ZBS_SE_ZBIAS_FACTOR 1 157adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define ZBS_SE_ZBIAS_CONSTANT 2 158adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define ZBS_STATE_SIZE 3 159adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 160adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSC_CMD_0 0 161adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSC_RE_MISC 1 162adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSC_STATE_SIZE 2 163adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 164adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TAM_CMD_0 0 165adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TAM_DEBUG3 1 166adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TAM_STATE_SIZE 2 167adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 168adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TEX_CMD_0 0 169adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TEX_PP_TXFILTER 1 /*2c00*/ 170adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TEX_PP_TXFORMAT 2 /*2c04*/ 171adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TEX_PP_TXFORMAT_X 3 /*2c08*/ 172adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TEX_PP_TXSIZE 4 /*2c0c*/ 173adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TEX_PP_TXPITCH 5 /*2c10*/ 174adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TEX_PP_BORDER_COLOR 6 /*2c14*/ 175f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_CMD_1_OLDDRM 7 176f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_PP_TXOFFSET_OLDDRM 8 /*2d00 */ 177f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_STATE_SIZE_OLDDRM 9 178f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_PP_CUBIC_FACES 7 179f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_PP_TXMULTI_CTL 8 180f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_CMD_1_NEWDRM 9 181f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_PP_TXOFFSET_NEWDRM 10 182f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define TEX_STATE_SIZE_NEWDRM 11 183f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 184f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define CUBE_CMD_0 0 /* 1 register follows */ /* this command unnecessary */ 185f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define CUBE_PP_CUBIC_FACES 1 /* 0x2c18 */ /* with new enough drm */ 186adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CUBE_CMD_1 2 /* 5 registers follow */ 187adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CUBE_PP_CUBIC_OFFSET_F1 3 /* 0x2d04 */ 188adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CUBE_PP_CUBIC_OFFSET_F2 4 /* 0x2d08 */ 189adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CUBE_PP_CUBIC_OFFSET_F3 5 /* 0x2d0c */ 190adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CUBE_PP_CUBIC_OFFSET_F4 6 /* 0x2d10 */ 191adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CUBE_PP_CUBIC_OFFSET_F5 7 /* 0x2d14 */ 192adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CUBE_STATE_SIZE 8 193adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 194adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define PIX_CMD_0 0 195adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define PIX_PP_TXCBLEND 1 196adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define PIX_PP_TXCBLEND2 2 197adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define PIX_PP_TXABLEND 3 198adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define PIX_PP_TXABLEND2 4 199adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define PIX_STATE_SIZE 5 200adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 201adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_CMD_0 0 202adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_TFACTOR_0 1 203adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_TFACTOR_1 2 204adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_TFACTOR_2 3 205adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_TFACTOR_3 4 206adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_TFACTOR_4 5 207adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_TFACTOR_5 6 208adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TF_STATE_SIZE 7 209adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 210f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_CMD_0 0 211f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_0 1 212f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_1 2 213f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_2 3 214f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_3 4 215f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_4 5 216f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_5 6 217f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_6 7 218f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_TFACTOR_7 8 219f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define ATF_STATE_SIZE 9 220f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 221f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger/* ATI_FRAGMENT_SHADER */ 222f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define AFS_CMD_0 0 223f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define AFS_IC0 1 /* 2f00 */ 224f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define AFS_IC1 2 /* 2f04 */ 225f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define AFS_IA0 3 /* 2f08 */ 226f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define AFS_IA1 4 /* 2f0c */ 227f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger#define AFS_STATE_SIZE 33 228f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 22998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define PVS_CMD_0 0 23098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define PVS_CNTL_1 1 23198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define PVS_CNTL_2 2 23298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define PVS_STATE_SIZE 3 23398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 23498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger/* those are quite big... */ 23598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_CMD_0 0 23698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_OPDST_0 1 23798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_SRC0_0 2 23898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_SRC1_0 3 23998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_SRC2_0 4 24098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_OPDST_63 253 24198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_SRC0_63 254 24298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_SRC1_63 255 24398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_SRC2_63 256 24498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPI_STATE_SIZE 257 24598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 24698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_CMD_0 0 24798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM0_0 1 24898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM1_0 2 24998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM2_0 3 25098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM3_0 4 25198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM0_95 381 25298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM1_95 382 25398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM2_95 383 25498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_PARAM3_95 384 25598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VPP_STATE_SIZE 385 25698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 257adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_CMD_0 0 258adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_LIGHT_MODEL_CTL_0 1 259adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_LIGHT_MODEL_CTL_1 2 260adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_PER_LIGHT_CTL_0 3 261adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_PER_LIGHT_CTL_1 4 262adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_PER_LIGHT_CTL_2 5 263adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_PER_LIGHT_CTL_3 6 264adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_CMD_1 7 265adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_UCP_VERT_BLEND_CTL 8 266adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_STATE_SIZE 9 267adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 268adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSL_CMD_0 0 269adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSL_MATRIX_SELECT_0 1 270adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSL_MATRIX_SELECT_1 2 271adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSL_MATRIX_SELECT_2 3 272adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSL_MATRIX_SELECT_3 4 273adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSL_MATRIX_SELECT_4 5 274adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MSL_STATE_SIZE 6 275adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 276adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCG_CMD_0 0 277adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCG_TEX_PROC_CTL_2 1 278adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCG_TEX_PROC_CTL_3 2 279adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCG_TEX_PROC_CTL_0 3 280adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCG_TEX_PROC_CTL_1 4 281adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCG_TEX_CYL_WRAP_CTL 5 282adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCG_STATE_SIZE 6 283adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 284adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_CMD_0 0 285adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_EMMISSIVE_RED 1 286adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_EMMISSIVE_GREEN 2 287adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_EMMISSIVE_BLUE 3 288adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_EMMISSIVE_ALPHA 4 289adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_AMBIENT_RED 5 290adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_AMBIENT_GREEN 6 291adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_AMBIENT_BLUE 7 292adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_AMBIENT_ALPHA 8 293adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_DIFFUSE_RED 9 294adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_DIFFUSE_GREEN 10 295adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_DIFFUSE_BLUE 11 296adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_DIFFUSE_ALPHA 12 297adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_SPECULAR_RED 13 298adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_SPECULAR_GREEN 14 299adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_SPECULAR_BLUE 15 300adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_SPECULAR_ALPHA 16 301adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_CMD_1 17 302adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_SHININESS 18 303adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MTL_STATE_SIZE 19 304adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 305adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VAP_CMD_0 0 306adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VAP_SE_VAP_CNTL 1 307adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VAP_STATE_SIZE 2 308adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 309adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* Replaces a lot of packet info from radeon 310adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 311adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_CMD_0 0 312adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_VTXFMT_0 1 313adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_VTXFMT_1 2 314adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_TCL_OUTPUT_VTXFMT_0 3 315adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_TCL_OUTPUT_VTXFMT_1 4 316adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_CMD_1 5 317adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_TCL_OUTPUT_COMPSEL 6 318adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_CMD_2 7 319adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_STATE_CNTL 8 320adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_STATE_SIZE 9 321adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 32244dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger/* SPR - point sprite state 32344dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger */ 324cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define SPR_CMD_0 0 325cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define SPR_POINT_SPRITE_CNTL 1 326cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define SPR_STATE_SIZE 2 327cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger 328cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_CMD_0 0 329cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_VPORT_SCALE_0 1 330cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_VPORT_SCALE_1 2 331cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_VPORT_SCALE_PTSIZE 3 332cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_VPORT_SCALE_3 4 333cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_CMD_1 5 334cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_ATT_CONST_QUAD 6 335cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_ATT_CONST_LIN 7 336cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_ATT_CONST_CON 8 337cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_ATT_CONST_3 9 338cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_EYE_X 10 339cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_EYE_Y 11 340cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_EYE_Z 12 341cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_EYE_3 13 342cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_CLAMP_MIN 14 343cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_CLAMP_MAX 15 344cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_CLAMP_2 16 345cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_CLAMP_3 17 346cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger#define PTP_STATE_SIZE 18 347adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 348adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define VTX_COLOR(v,n) (((v)>>(R200_VTX_COLOR_0_SHIFT+(n)*2))&\ 349adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_COLOR_MASK) 350adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 35195a0bd6762737bb25bdf5c4147da9d1372f6aac3Ian Romanick/** 35295a0bd6762737bb25bdf5c4147da9d1372f6aac3Ian Romanick * Given the \c R200_SE_VTX_FMT_1 for the current vertex state, determine 35395a0bd6762737bb25bdf5c4147da9d1372f6aac3Ian Romanick * how many components are in texture coordinate \c n. 35495a0bd6762737bb25bdf5c4147da9d1372f6aac3Ian Romanick */ 35595a0bd6762737bb25bdf5c4147da9d1372f6aac3Ian Romanick#define VTX_TEXn_COUNT(v,n) (((v) >> (3 * n)) & 0x07) 35695a0bd6762737bb25bdf5c4147da9d1372f6aac3Ian Romanick 357adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MAT_CMD_0 0 358adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MAT_ELT_0 1 359adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define MAT_STATE_SIZE 17 360adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 361adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GRD_CMD_0 0 362adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GRD_VERT_GUARD_CLIP_ADJ 1 363adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GRD_VERT_GUARD_DISCARD_ADJ 2 364adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GRD_HORZ_GUARD_CLIP_ADJ 3 365adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GRD_HORZ_GUARD_DISCARD_ADJ 4 366adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GRD_STATE_SIZE 5 367adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 368adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* position changes frequently when lighting in modelpos - separate 369adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * out to new state item? 370adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 371adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_CMD_0 0 372adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_AMBIENT_RED 1 373adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_AMBIENT_GREEN 2 374adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_AMBIENT_BLUE 3 375adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_AMBIENT_ALPHA 4 376adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIFFUSE_RED 5 377adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIFFUSE_GREEN 6 378adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIFFUSE_BLUE 7 379adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIFFUSE_ALPHA 8 380adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPECULAR_RED 9 381adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPECULAR_GREEN 10 382adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPECULAR_BLUE 11 383adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPECULAR_ALPHA 12 384adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_POSITION_X 13 385adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_POSITION_Y 14 386adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_POSITION_Z 15 387adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_POSITION_W 16 388adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIRECTION_X 17 389adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIRECTION_Y 18 390adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIRECTION_Z 19 391adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_DIRECTION_W 20 3925d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer#define LIT_ATTEN_QUADRATIC 21 393adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_ATTEN_LINEAR 22 3945d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer#define LIT_ATTEN_CONST 23 395adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_ATTEN_XXX 24 396adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_CMD_1 25 397adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPOT_DCD 26 398adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPOT_DCM 27 399adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPOT_EXPONENT 28 400adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPOT_CUTOFF 29 401adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_SPECULAR_THRESH 30 402adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_RANGE_CUTOFF 31 /* ? */ 4035d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer#define LIT_ATTEN_CONST_INV 32 404adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define LIT_STATE_SIZE 33 405adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 406adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* Fog 407adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 408adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define FOG_CMD_0 0 409adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define FOG_R 1 410adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define FOG_C 2 411adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define FOG_D 3 412adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define FOG_PAD 4 413adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define FOG_STATE_SIZE 5 414adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 415adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* UCP 416adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 417adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define UCP_CMD_0 0 418adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define UCP_X 1 419adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define UCP_Y 2 420adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define UCP_Z 3 421adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define UCP_W 4 422adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define UCP_STATE_SIZE 5 423adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 424adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* GLT - Global ambient 425adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 426adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GLT_CMD_0 0 427adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GLT_RED 1 428adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GLT_GREEN 2 429adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GLT_BLUE 3 430adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GLT_ALPHA 4 431adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define GLT_STATE_SIZE 5 432adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 433adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* EYE 434adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 435adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define EYE_CMD_0 0 436adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define EYE_X 1 437adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define EYE_Y 2 438adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define EYE_Z 3 439adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define EYE_RESCALE_FACTOR 4 440adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define EYE_STATE_SIZE 5 441adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 442adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* CST - constant state 443adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 444adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_CMD_0 0 445adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_PP_CNTL_X 1 446adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_CMD_1 2 447adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_RB3D_DEPTHXY_OFFSET 3 448adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_CMD_2 4 449adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_RE_AUX_SCISSOR_CNTL 5 450adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_CMD_3 6 451adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_RE_SCISSOR_TL_0 7 452adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_RE_SCISSOR_BR_0 8 453adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_CMD_4 9 454adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_SE_VAP_CNTL_STATUS 10 455adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_CMD_5 11 456adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_RE_POINTSIZE 12 457adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_CMD_6 13 458adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_SE_TCL_INPUT_VTX_0 14 459adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_SE_TCL_INPUT_VTX_1 15 460adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_SE_TCL_INPUT_VTX_2 16 461adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_SE_TCL_INPUT_VTX_3 17 462adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CST_STATE_SIZE 18 463adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 464fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger#define PRF_CMD_0 0 465fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger#define PRF_PP_TRI_PERF 1 466fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger#define PRF_PP_PERF_CNTL 2 467fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger#define PRF_STATE_SIZE 3 468adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 469adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 470dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen#define SCI_CMD_0 0 471dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen#define SCI_RE_AUX 1 472dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen#define SCI_CMD_1 2 473dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen#define SCI_XY_1 3 474dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen#define SCI_CMD_2 4 475dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen#define SCI_XY_2 5 476dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen#define SCI_STATE_SIZE 6 477dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen 478b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie#define R200_QUERYOBJ_CMD_0 0 479b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie#define R200_QUERYOBJ_DATA_0 1 480b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie#define R200_QUERYOBJ_CMDSIZE 2 481dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen 4827d361537661b93a501c9533271458a41b965ea79Dave Airlie#define STP_CMD_0 0 4837d361537661b93a501c9533271458a41b965ea79Dave Airlie#define STP_DATA_0 1 4847d361537661b93a501c9533271458a41b965ea79Dave Airlie#define STP_CMD_1 2 4857d361537661b93a501c9533271458a41b965ea79Dave Airlie#define STP_STATE_SIZE 35 4867d361537661b93a501c9533271458a41b965ea79Dave Airlie 487adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_hw_state { 488adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Hardware state, stored as cmdbuf commands: 489adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * -- Need to doublebuffer for 490adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * - reviving state after loss of context 491adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * - eliding noop statechange loops? (except line stipple count) 492adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 493b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom ctx; 494b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom set; 495dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen struct radeon_state_atom sci; 496b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom vte; 497b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom lin; 498b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom msk; 499b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom vpt; 500b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom vap; 501b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom vtx; 502b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom tcl; 503b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom msl; 504b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom tcg; 505b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom msc; 506b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom cst; 507b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom tam; 508b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom tf; 509b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom tex[6]; 510b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom cube[6]; 511b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom zbs; 512b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom mtl[2]; 513b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom mat[9]; 514b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom lit[8]; /* includes vec, scl commands */ 515b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom ucp[6]; 516b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom pix[6]; /* pixshader stages */ 517b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom eye; /* eye pos */ 518b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom grd; /* guard band clipping */ 519b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom fog; 520b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom glt; 521b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom prf; 522b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom afs[2]; 523b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom pvs; 524b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom vpi[2]; 525b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom vpp[2]; 526b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom atf; 527b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom spr; 528b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom ptp; 5297d361537661b93a501c9533271458a41b965ea79Dave Airlie struct radeon_state_atom stp; 530adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell}; 531adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 532adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_state { 533adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Derived state for internal purposes: 534adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 535adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct r200_texture_state texture; 53636603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger GLuint envneeded; 537adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell}; 538adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 5398a6182105772280e2727de4a00809c8fb7b13c87Roland Scheidegger#define R200_CMD_BUF_SZ (16*1024) 540adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 5417d01cb37d94b8966fa089106b902325dbef33a58Dave Airlie#define R200_ELT_BUF_SZ (16*1024) 542adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* r200_tcl.c 543adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 544adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_tcl_info { 545adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLuint hw_primitive; 546adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 5477d01cb37d94b8966fa089106b902325dbef33a58Dave Airlie int elt_used; 5487d01cb37d94b8966fa089106b902325dbef33a58Dave Airlie 549adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell}; 550adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 551adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 552adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* r200_swtcl.c 553adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 554adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_swtcl_info { 555e946688edac5cdf153652defae3ef732a3487416Ian Romanick 556adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 5574637235183b80963536f2364e4d50fcb894886ddDave Airlie radeon_point_func draw_point; 5584637235183b80963536f2364e4d50fcb894886ddDave Airlie radeon_line_func draw_line; 5594637235183b80963536f2364e4d50fcb894886ddDave Airlie radeon_tri_func draw_tri; 560adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 561e946688edac5cdf153652defae3ef732a3487416Ian Romanick /** 562e946688edac5cdf153652defae3ef732a3487416Ian Romanick * Offset of the 4UB color data within a hardware (swtcl) vertex. 563e946688edac5cdf153652defae3ef732a3487416Ian Romanick */ 564e946688edac5cdf153652defae3ef732a3487416Ian Romanick GLuint coloroffset; 565e946688edac5cdf153652defae3ef732a3487416Ian Romanick 566e946688edac5cdf153652defae3ef732a3487416Ian Romanick /** 567e946688edac5cdf153652defae3ef732a3487416Ian Romanick * Offset of the 3UB specular color data within a hardware (swtcl) vertex. 568e946688edac5cdf153652defae3ef732a3487416Ian Romanick */ 569e946688edac5cdf153652defae3ef732a3487416Ian Romanick GLuint specoffset; 570e946688edac5cdf153652defae3ef732a3487416Ian Romanick 571e946688edac5cdf153652defae3ef732a3487416Ian Romanick /** 572e946688edac5cdf153652defae3ef732a3487416Ian Romanick * Should Mesa project vertex data or will the hardware do it? 573e946688edac5cdf153652defae3ef732a3487416Ian Romanick */ 574e946688edac5cdf153652defae3ef732a3487416Ian Romanick GLboolean needproj; 575adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell}; 576adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 577adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 578adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 579adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 58048ccaf200940613032dfaaafe71382947f398004Roland Scheidegger /* A maximum total of 29 elements per vertex: 3 floats for position, 3 581adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * floats for normal, 4 floats for color, 4 bytes for secondary color, 58248ccaf200940613032dfaaafe71382947f398004Roland Scheidegger * 3 floats for each texture unit (18 floats total). 583adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * 58448ccaf200940613032dfaaafe71382947f398004Roland Scheidegger * we maybe need add. 4 to prevent segfault if someone specifies 58548ccaf200940613032dfaaafe71382947f398004Roland Scheidegger * GL_TEXTURE6/GL_TEXTURE7 (esp. for the codegen-path) (FIXME: ) 586adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * 587adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * The position data is never actually stored here, so 3 elements could be 588adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * trimmed out of the buffer. 589adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 59048ccaf200940613032dfaaafe71382947f398004Roland Scheidegger 59148ccaf200940613032dfaaafe71382947f398004Roland Scheidegger#define R200_MAX_VERTEX_SIZE ((3*6)+11) 59248ccaf200940613032dfaaafe71382947f398004Roland Scheidegger 593adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstruct r200_context { 5944637235183b80963536f2364e4d50fcb894886ddDave Airlie struct radeon_context radeon; 595adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 596adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Driver and hardware state management 597adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 598adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct r200_hw_state hw; 599adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct r200_state state; 60098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger struct r200_vertex_program *curr_vp_hw; 601adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 602adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Vertex buffers 603adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 604692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie struct radeon_ioctl ioctl; 6050217ed2cf9b0a538ca03d26b302a7cd57af7dd21Dave Airlie struct radeon_store store; 606adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 607adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Clientdata textures; 608adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 6091090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie GLuint prefer_gart_client_texturing; 610adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 611adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* TCL stuff 612adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 613adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLmatrix TexGenMatrix[R200_MAX_TEXTURE_UNITS]; 614adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLboolean recheck_texgen[R200_MAX_TEXTURE_UNITS]; 615adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLboolean TexGenNeedNormals[R200_MAX_TEXTURE_UNITS]; 61624a44d74b6e9880dfc019bd1cfa9ce0351377c85Roland Scheidegger GLuint TexMatEnabled; 617adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLuint TexMatCompSel; 618adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLuint TexGenEnabled; 619adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLuint TexGenCompSel; 620adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLmatrix tmpmat; 621adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 622adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* r200_tcl.c 623adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 624adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct r200_tcl_info tcl; 625adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 626adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* r200_swtcl.c 627adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 628adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct r200_swtcl_info swtcl; 629adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 630b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger GLboolean using_hyperz; 6314837ea30208d002bc36a836d2117f826d40c8bfaRoland Scheidegger GLboolean texmicrotile; 632f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 633f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger struct ati_fragment_shader *afs_loaded; 634adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell}; 635adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 636adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define R200_CONTEXT(ctx) ((r200ContextPtr)(ctx->DriverCtx)) 637adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 638adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 639d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsbergextern void r200DestroyContext( __DRIcontext *driContextPriv ); 640a7a9a91d7b28e5b5faed509d00f0f951e3136b1bKristian Høgsbergextern GLboolean r200CreateContext( gl_api api, 641a7a9a91d7b28e5b5faed509d00f0f951e3136b1bKristian Høgsberg const __GLcontextModes *glVisual, 642d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsberg __DRIcontext *driContextPriv, 643adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell void *sharedContextPrivate); 644d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsbergextern GLboolean r200MakeCurrent( __DRIcontext *driContextPriv, 645d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsberg __DRIdrawable *driDrawPriv, 646d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsberg __DRIdrawable *driReadPriv ); 647d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsbergextern GLboolean r200UnbindContext( __DRIcontext *driContextPriv ); 648adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 6491ced546577745d361ad06577914f44f484656d37Alex Deucherextern void r200_init_texcopy_functions(struct dd_function_table *table); 6501ced546577745d361ad06577914f44f484656d37Alex Deucher 651adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* ================================================================ 652adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Debugging: 653adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 654adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 65523295cf8e84495af86f62395d32b3116261927e8Dave Airlie#define R200_DEBUG RADEON_DEBUG 656adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 657b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie 658adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 659adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#endif /* __R200_CONTEXT_H__ */ 660