r200_context.h revision 4f96000e294fa0d6ba6f5915ff508017d9c26d50
1/* 2Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 3 4The Weather Channel (TM) funded Tungsten Graphics to develop the 5initial release of the Radeon 8500 driver under the XFree86 license. 6This notice must be preserved. 7 8Permission is hereby granted, free of charge, to any person obtaining 9a copy of this software and associated documentation files (the 10"Software"), to deal in the Software without restriction, including 11without limitation the rights to use, copy, modify, merge, publish, 12distribute, sublicense, and/or sell copies of the Software, and to 13permit persons to whom the Software is furnished to do so, subject to 14the following conditions: 15 16The above copyright notice and this permission notice (including the 17next paragraph) shall be included in all copies or substantial 18portions of the Software. 19 20THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27 28**************************************************************************/ 29 30/* 31 * Authors: 32 * Keith Whitwell <keith@tungstengraphics.com> 33 */ 34 35#ifndef __R200_CONTEXT_H__ 36#define __R200_CONTEXT_H__ 37 38#include "tnl/t_vertex.h" 39#include "drm.h" 40#include "radeon_drm.h" 41#include "dri_util.h" 42#include "texmem.h" 43 44#include "macros.h" 45#include "mtypes.h" 46#include "colormac.h" 47#include "r200_reg.h" 48#include "r200_vertprog.h" 49 50#define ENABLE_HW_3D_TEXTURE 1 /* XXX this is temporary! */ 51 52#ifndef R200_EMIT_VAP_PVS_CNTL 53#error This driver requires a newer libdrm to compile 54#endif 55 56struct r200_context; 57typedef struct r200_context r200ContextRec; 58typedef struct r200_context *r200ContextPtr; 59 60/* This union is used to avoid warnings/miscompilation 61 with float to uint32_t casts due to strict-aliasing */ 62typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; 63 64#include "r200_lock.h" 65#include "radeon_screen.h" 66#include "mm.h" 67 68/* Flags for software fallback cases */ 69/* See correponding strings in r200_swtcl.c */ 70#define R200_FALLBACK_TEXTURE 0x01 71#define R200_FALLBACK_DRAW_BUFFER 0x02 72#define R200_FALLBACK_STENCIL 0x04 73#define R200_FALLBACK_RENDER_MODE 0x08 74#define R200_FALLBACK_DISABLE 0x10 75#define R200_FALLBACK_BORDER_MODE 0x20 76 77/* The blit width for texture uploads 78 */ 79#define BLIT_WIDTH_BYTES 1024 80 81/* Use the templated vertex format: 82 */ 83#define COLOR_IS_RGBA 84#define TAG(x) r200##x 85#include "tnl_dd/t_dd_vertex.h" 86#undef TAG 87 88typedef void (*r200_tri_func)( r200ContextPtr, 89 r200Vertex *, 90 r200Vertex *, 91 r200Vertex * ); 92 93typedef void (*r200_line_func)( r200ContextPtr, 94 r200Vertex *, 95 r200Vertex * ); 96 97typedef void (*r200_point_func)( r200ContextPtr, 98 r200Vertex * ); 99 100 101struct r200_vertex_program { 102 struct gl_vertex_program mesa_program; /* Must be first */ 103 int translated; 104 /* need excess instr: 1 for late loop checking, 2 for 105 additional instr due to instr/attr, 3 for fog */ 106 VERTEX_SHADER_INSTRUCTION instr[R200_VSF_MAX_INST + 6]; 107 int pos_end; 108 int inputs[VERT_ATTRIB_MAX]; 109 GLubyte inputmap_rev[16]; 110 int native; 111 int fogpidx; 112 int fogmode; 113}; 114 115struct r200_colorbuffer_state { 116 GLuint clear; 117#if 000 118 GLint drawOffset, drawPitch; 119#endif 120 int roundEnable; 121}; 122 123 124struct r200_depthbuffer_state { 125 GLuint clear; 126 GLfloat scale; 127}; 128 129#if 000 130struct r200_pixel_state { 131 GLint readOffset, readPitch; 132}; 133#endif 134 135struct r200_scissor_state { 136 drm_clip_rect_t rect; 137 GLboolean enabled; 138 139 GLuint numClipRects; /* Cliprects active */ 140 GLuint numAllocedClipRects; /* Cliprects available */ 141 drm_clip_rect_t *pClipRects; 142}; 143 144struct r200_stencilbuffer_state { 145 GLboolean hwBuffer; 146 GLuint clear; /* rb3d_stencilrefmask value */ 147}; 148 149struct r200_stipple_state { 150 GLuint mask[32]; 151}; 152 153 154 155#define TEX_0 0x1 156#define TEX_1 0x2 157#define TEX_2 0x4 158#define TEX_3 0x8 159#define TEX_4 0x10 160#define TEX_5 0x20 161#define TEX_ALL 0x3f 162 163typedef struct r200_tex_obj r200TexObj, *r200TexObjPtr; 164 165/* Texture object in locally shared texture space. 166 */ 167struct r200_tex_obj { 168 driTextureObject base; 169 170 GLuint bufAddr; /* Offset to start of locally 171 shared texture block */ 172 173 GLuint dirty_state; /* Flags (1 per texunit) for 174 whether or not this texobj 175 has dirty hardware state 176 (pp_*) that needs to be 177 brought into the 178 texunit. */ 179 180 drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; 181 /* Six, for the cube faces */ 182 GLboolean image_override; /* Image overridden by GLX_EXT_tfp */ 183 184 GLuint pp_txfilter; /* hardware register values */ 185 GLuint pp_txformat; 186 GLuint pp_txformat_x; 187 GLuint pp_txoffset; /* Image location in texmem. 188 All cube faces follow. */ 189 GLuint pp_txsize; /* npot only */ 190 GLuint pp_txpitch; /* npot only */ 191 GLuint pp_border_color; 192 GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ 193 194 GLboolean border_fallback; 195 196 GLuint tile_bits; /* hw texture tile bits used on this texture */ 197}; 198 199 200struct r200_texture_env_state { 201 r200TexObjPtr texobj; 202 GLuint outputreg; 203 GLuint unitneeded; 204}; 205 206#define R200_MAX_TEXTURE_UNITS 6 207 208struct r200_texture_state { 209 struct r200_texture_env_state unit[R200_MAX_TEXTURE_UNITS]; 210}; 211 212 213struct r200_state_atom { 214 struct r200_state_atom *next, *prev; 215 const char *name; /* for debug */ 216 int cmd_size; /* size in bytes */ 217 GLuint idx; 218 int *cmd; /* one or more cmd's */ 219 int *lastcmd; /* one or more cmd's */ 220 GLboolean dirty; 221 GLboolean (*check)( GLcontext *, int ); /* is this state active? */ 222}; 223 224 225 226/* Trying to keep these relatively short as the variables are becoming 227 * extravagently long. Drop the driver name prefix off the front of 228 * everything - I think we know which driver we're in by now, and keep the 229 * prefix to 3 letters unless absolutely impossible. 230 */ 231 232#define CTX_CMD_0 0 233#define CTX_PP_MISC 1 234#define CTX_PP_FOG_COLOR 2 235#define CTX_RE_SOLID_COLOR 3 236#define CTX_RB3D_BLENDCNTL 4 237#define CTX_RB3D_DEPTHOFFSET 5 238#define CTX_RB3D_DEPTHPITCH 6 239#define CTX_RB3D_ZSTENCILCNTL 7 240#define CTX_CMD_1 8 241#define CTX_PP_CNTL 9 242#define CTX_RB3D_CNTL 10 243#define CTX_RB3D_COLOROFFSET 11 244#define CTX_CMD_2 12 /* why */ 245#define CTX_RB3D_COLORPITCH 13 /* why */ 246#define CTX_STATE_SIZE_OLDDRM 14 247#define CTX_CMD_3 14 248#define CTX_RB3D_BLENDCOLOR 15 249#define CTX_RB3D_ABLENDCNTL 16 250#define CTX_RB3D_CBLENDCNTL 17 251#define CTX_STATE_SIZE_NEWDRM 18 252 253#define SET_CMD_0 0 254#define SET_SE_CNTL 1 255#define SET_RE_CNTL 2 /* replace se_coord_fmt */ 256#define SET_STATE_SIZE 3 257 258#define VTE_CMD_0 0 259#define VTE_SE_VTE_CNTL 1 260#define VTE_STATE_SIZE 2 261 262#define LIN_CMD_0 0 263#define LIN_RE_LINE_PATTERN 1 264#define LIN_RE_LINE_STATE 2 265#define LIN_CMD_1 3 266#define LIN_SE_LINE_WIDTH 4 267#define LIN_STATE_SIZE 5 268 269#define MSK_CMD_0 0 270#define MSK_RB3D_STENCILREFMASK 1 271#define MSK_RB3D_ROPCNTL 2 272#define MSK_RB3D_PLANEMASK 3 273#define MSK_STATE_SIZE 4 274 275#define VPT_CMD_0 0 276#define VPT_SE_VPORT_XSCALE 1 277#define VPT_SE_VPORT_XOFFSET 2 278#define VPT_SE_VPORT_YSCALE 3 279#define VPT_SE_VPORT_YOFFSET 4 280#define VPT_SE_VPORT_ZSCALE 5 281#define VPT_SE_VPORT_ZOFFSET 6 282#define VPT_STATE_SIZE 7 283 284#define ZBS_CMD_0 0 285#define ZBS_SE_ZBIAS_FACTOR 1 286#define ZBS_SE_ZBIAS_CONSTANT 2 287#define ZBS_STATE_SIZE 3 288 289#define MSC_CMD_0 0 290#define MSC_RE_MISC 1 291#define MSC_STATE_SIZE 2 292 293#define TAM_CMD_0 0 294#define TAM_DEBUG3 1 295#define TAM_STATE_SIZE 2 296 297#define TEX_CMD_0 0 298#define TEX_PP_TXFILTER 1 /*2c00*/ 299#define TEX_PP_TXFORMAT 2 /*2c04*/ 300#define TEX_PP_TXFORMAT_X 3 /*2c08*/ 301#define TEX_PP_TXSIZE 4 /*2c0c*/ 302#define TEX_PP_TXPITCH 5 /*2c10*/ 303#define TEX_PP_BORDER_COLOR 6 /*2c14*/ 304#define TEX_CMD_1_OLDDRM 7 305#define TEX_PP_TXOFFSET_OLDDRM 8 /*2d00 */ 306#define TEX_STATE_SIZE_OLDDRM 9 307#define TEX_PP_CUBIC_FACES 7 308#define TEX_PP_TXMULTI_CTL 8 309#define TEX_CMD_1_NEWDRM 9 310#define TEX_PP_TXOFFSET_NEWDRM 10 311#define TEX_STATE_SIZE_NEWDRM 11 312 313#define CUBE_CMD_0 0 /* 1 register follows */ /* this command unnecessary */ 314#define CUBE_PP_CUBIC_FACES 1 /* 0x2c18 */ /* with new enough drm */ 315#define CUBE_CMD_1 2 /* 5 registers follow */ 316#define CUBE_PP_CUBIC_OFFSET_F1 3 /* 0x2d04 */ 317#define CUBE_PP_CUBIC_OFFSET_F2 4 /* 0x2d08 */ 318#define CUBE_PP_CUBIC_OFFSET_F3 5 /* 0x2d0c */ 319#define CUBE_PP_CUBIC_OFFSET_F4 6 /* 0x2d10 */ 320#define CUBE_PP_CUBIC_OFFSET_F5 7 /* 0x2d14 */ 321#define CUBE_STATE_SIZE 8 322 323#define PIX_CMD_0 0 324#define PIX_PP_TXCBLEND 1 325#define PIX_PP_TXCBLEND2 2 326#define PIX_PP_TXABLEND 3 327#define PIX_PP_TXABLEND2 4 328#define PIX_STATE_SIZE 5 329 330#define TF_CMD_0 0 331#define TF_TFACTOR_0 1 332#define TF_TFACTOR_1 2 333#define TF_TFACTOR_2 3 334#define TF_TFACTOR_3 4 335#define TF_TFACTOR_4 5 336#define TF_TFACTOR_5 6 337#define TF_STATE_SIZE 7 338 339#define ATF_CMD_0 0 340#define ATF_TFACTOR_0 1 341#define ATF_TFACTOR_1 2 342#define ATF_TFACTOR_2 3 343#define ATF_TFACTOR_3 4 344#define ATF_TFACTOR_4 5 345#define ATF_TFACTOR_5 6 346#define ATF_TFACTOR_6 7 347#define ATF_TFACTOR_7 8 348#define ATF_STATE_SIZE 9 349 350/* ATI_FRAGMENT_SHADER */ 351#define AFS_CMD_0 0 352#define AFS_IC0 1 /* 2f00 */ 353#define AFS_IC1 2 /* 2f04 */ 354#define AFS_IA0 3 /* 2f08 */ 355#define AFS_IA1 4 /* 2f0c */ 356#define AFS_STATE_SIZE 33 357 358#define PVS_CMD_0 0 359#define PVS_CNTL_1 1 360#define PVS_CNTL_2 2 361#define PVS_STATE_SIZE 3 362 363/* those are quite big... */ 364#define VPI_CMD_0 0 365#define VPI_OPDST_0 1 366#define VPI_SRC0_0 2 367#define VPI_SRC1_0 3 368#define VPI_SRC2_0 4 369#define VPI_OPDST_63 253 370#define VPI_SRC0_63 254 371#define VPI_SRC1_63 255 372#define VPI_SRC2_63 256 373#define VPI_STATE_SIZE 257 374 375#define VPP_CMD_0 0 376#define VPP_PARAM0_0 1 377#define VPP_PARAM1_0 2 378#define VPP_PARAM2_0 3 379#define VPP_PARAM3_0 4 380#define VPP_PARAM0_95 381 381#define VPP_PARAM1_95 382 382#define VPP_PARAM2_95 383 383#define VPP_PARAM3_95 384 384#define VPP_STATE_SIZE 385 385 386#define TCL_CMD_0 0 387#define TCL_LIGHT_MODEL_CTL_0 1 388#define TCL_LIGHT_MODEL_CTL_1 2 389#define TCL_PER_LIGHT_CTL_0 3 390#define TCL_PER_LIGHT_CTL_1 4 391#define TCL_PER_LIGHT_CTL_2 5 392#define TCL_PER_LIGHT_CTL_3 6 393#define TCL_CMD_1 7 394#define TCL_UCP_VERT_BLEND_CTL 8 395#define TCL_STATE_SIZE 9 396 397#define MSL_CMD_0 0 398#define MSL_MATRIX_SELECT_0 1 399#define MSL_MATRIX_SELECT_1 2 400#define MSL_MATRIX_SELECT_2 3 401#define MSL_MATRIX_SELECT_3 4 402#define MSL_MATRIX_SELECT_4 5 403#define MSL_STATE_SIZE 6 404 405#define TCG_CMD_0 0 406#define TCG_TEX_PROC_CTL_2 1 407#define TCG_TEX_PROC_CTL_3 2 408#define TCG_TEX_PROC_CTL_0 3 409#define TCG_TEX_PROC_CTL_1 4 410#define TCG_TEX_CYL_WRAP_CTL 5 411#define TCG_STATE_SIZE 6 412 413#define MTL_CMD_0 0 414#define MTL_EMMISSIVE_RED 1 415#define MTL_EMMISSIVE_GREEN 2 416#define MTL_EMMISSIVE_BLUE 3 417#define MTL_EMMISSIVE_ALPHA 4 418#define MTL_AMBIENT_RED 5 419#define MTL_AMBIENT_GREEN 6 420#define MTL_AMBIENT_BLUE 7 421#define MTL_AMBIENT_ALPHA 8 422#define MTL_DIFFUSE_RED 9 423#define MTL_DIFFUSE_GREEN 10 424#define MTL_DIFFUSE_BLUE 11 425#define MTL_DIFFUSE_ALPHA 12 426#define MTL_SPECULAR_RED 13 427#define MTL_SPECULAR_GREEN 14 428#define MTL_SPECULAR_BLUE 15 429#define MTL_SPECULAR_ALPHA 16 430#define MTL_CMD_1 17 431#define MTL_SHININESS 18 432#define MTL_STATE_SIZE 19 433 434#define VAP_CMD_0 0 435#define VAP_SE_VAP_CNTL 1 436#define VAP_STATE_SIZE 2 437 438/* Replaces a lot of packet info from radeon 439 */ 440#define VTX_CMD_0 0 441#define VTX_VTXFMT_0 1 442#define VTX_VTXFMT_1 2 443#define VTX_TCL_OUTPUT_VTXFMT_0 3 444#define VTX_TCL_OUTPUT_VTXFMT_1 4 445#define VTX_CMD_1 5 446#define VTX_TCL_OUTPUT_COMPSEL 6 447#define VTX_CMD_2 7 448#define VTX_STATE_CNTL 8 449#define VTX_STATE_SIZE 9 450 451/* SPR - point sprite state 452 */ 453#define SPR_CMD_0 0 454#define SPR_POINT_SPRITE_CNTL 1 455#define SPR_STATE_SIZE 2 456 457#define PTP_CMD_0 0 458#define PTP_VPORT_SCALE_0 1 459#define PTP_VPORT_SCALE_1 2 460#define PTP_VPORT_SCALE_PTSIZE 3 461#define PTP_VPORT_SCALE_3 4 462#define PTP_CMD_1 5 463#define PTP_ATT_CONST_QUAD 6 464#define PTP_ATT_CONST_LIN 7 465#define PTP_ATT_CONST_CON 8 466#define PTP_ATT_CONST_3 9 467#define PTP_EYE_X 10 468#define PTP_EYE_Y 11 469#define PTP_EYE_Z 12 470#define PTP_EYE_3 13 471#define PTP_CLAMP_MIN 14 472#define PTP_CLAMP_MAX 15 473#define PTP_CLAMP_2 16 474#define PTP_CLAMP_3 17 475#define PTP_STATE_SIZE 18 476 477#define VTX_COLOR(v,n) (((v)>>(R200_VTX_COLOR_0_SHIFT+(n)*2))&\ 478 R200_VTX_COLOR_MASK) 479 480/** 481 * Given the \c R200_SE_VTX_FMT_1 for the current vertex state, determine 482 * how many components are in texture coordinate \c n. 483 */ 484#define VTX_TEXn_COUNT(v,n) (((v) >> (3 * n)) & 0x07) 485 486#define MAT_CMD_0 0 487#define MAT_ELT_0 1 488#define MAT_STATE_SIZE 17 489 490#define GRD_CMD_0 0 491#define GRD_VERT_GUARD_CLIP_ADJ 1 492#define GRD_VERT_GUARD_DISCARD_ADJ 2 493#define GRD_HORZ_GUARD_CLIP_ADJ 3 494#define GRD_HORZ_GUARD_DISCARD_ADJ 4 495#define GRD_STATE_SIZE 5 496 497/* position changes frequently when lighting in modelpos - separate 498 * out to new state item? 499 */ 500#define LIT_CMD_0 0 501#define LIT_AMBIENT_RED 1 502#define LIT_AMBIENT_GREEN 2 503#define LIT_AMBIENT_BLUE 3 504#define LIT_AMBIENT_ALPHA 4 505#define LIT_DIFFUSE_RED 5 506#define LIT_DIFFUSE_GREEN 6 507#define LIT_DIFFUSE_BLUE 7 508#define LIT_DIFFUSE_ALPHA 8 509#define LIT_SPECULAR_RED 9 510#define LIT_SPECULAR_GREEN 10 511#define LIT_SPECULAR_BLUE 11 512#define LIT_SPECULAR_ALPHA 12 513#define LIT_POSITION_X 13 514#define LIT_POSITION_Y 14 515#define LIT_POSITION_Z 15 516#define LIT_POSITION_W 16 517#define LIT_DIRECTION_X 17 518#define LIT_DIRECTION_Y 18 519#define LIT_DIRECTION_Z 19 520#define LIT_DIRECTION_W 20 521#define LIT_ATTEN_QUADRATIC 21 522#define LIT_ATTEN_LINEAR 22 523#define LIT_ATTEN_CONST 23 524#define LIT_ATTEN_XXX 24 525#define LIT_CMD_1 25 526#define LIT_SPOT_DCD 26 527#define LIT_SPOT_DCM 27 528#define LIT_SPOT_EXPONENT 28 529#define LIT_SPOT_CUTOFF 29 530#define LIT_SPECULAR_THRESH 30 531#define LIT_RANGE_CUTOFF 31 /* ? */ 532#define LIT_ATTEN_CONST_INV 32 533#define LIT_STATE_SIZE 33 534 535/* Fog 536 */ 537#define FOG_CMD_0 0 538#define FOG_R 1 539#define FOG_C 2 540#define FOG_D 3 541#define FOG_PAD 4 542#define FOG_STATE_SIZE 5 543 544/* UCP 545 */ 546#define UCP_CMD_0 0 547#define UCP_X 1 548#define UCP_Y 2 549#define UCP_Z 3 550#define UCP_W 4 551#define UCP_STATE_SIZE 5 552 553/* GLT - Global ambient 554 */ 555#define GLT_CMD_0 0 556#define GLT_RED 1 557#define GLT_GREEN 2 558#define GLT_BLUE 3 559#define GLT_ALPHA 4 560#define GLT_STATE_SIZE 5 561 562/* EYE 563 */ 564#define EYE_CMD_0 0 565#define EYE_X 1 566#define EYE_Y 2 567#define EYE_Z 3 568#define EYE_RESCALE_FACTOR 4 569#define EYE_STATE_SIZE 5 570 571/* CST - constant state 572 */ 573#define CST_CMD_0 0 574#define CST_PP_CNTL_X 1 575#define CST_CMD_1 2 576#define CST_RB3D_DEPTHXY_OFFSET 3 577#define CST_CMD_2 4 578#define CST_RE_AUX_SCISSOR_CNTL 5 579#define CST_CMD_3 6 580#define CST_RE_SCISSOR_TL_0 7 581#define CST_RE_SCISSOR_BR_0 8 582#define CST_CMD_4 9 583#define CST_SE_VAP_CNTL_STATUS 10 584#define CST_CMD_5 11 585#define CST_RE_POINTSIZE 12 586#define CST_CMD_6 13 587#define CST_SE_TCL_INPUT_VTX_0 14 588#define CST_SE_TCL_INPUT_VTX_1 15 589#define CST_SE_TCL_INPUT_VTX_2 16 590#define CST_SE_TCL_INPUT_VTX_3 17 591#define CST_STATE_SIZE 18 592 593#define PRF_CMD_0 0 594#define PRF_PP_TRI_PERF 1 595#define PRF_PP_PERF_CNTL 2 596#define PRF_STATE_SIZE 3 597 598 599struct r200_hw_state { 600 /* Head of the linked list of state atoms. */ 601 struct r200_state_atom atomlist; 602 603 /* Hardware state, stored as cmdbuf commands: 604 * -- Need to doublebuffer for 605 * - reviving state after loss of context 606 * - eliding noop statechange loops? (except line stipple count) 607 */ 608 struct r200_state_atom ctx; 609 struct r200_state_atom set; 610 struct r200_state_atom vte; 611 struct r200_state_atom lin; 612 struct r200_state_atom msk; 613 struct r200_state_atom vpt; 614 struct r200_state_atom vap; 615 struct r200_state_atom vtx; 616 struct r200_state_atom tcl; 617 struct r200_state_atom msl; 618 struct r200_state_atom tcg; 619 struct r200_state_atom msc; 620 struct r200_state_atom cst; 621 struct r200_state_atom tam; 622 struct r200_state_atom tf; 623 struct r200_state_atom tex[6]; 624 struct r200_state_atom cube[6]; 625 struct r200_state_atom zbs; 626 struct r200_state_atom mtl[2]; 627 struct r200_state_atom mat[9]; 628 struct r200_state_atom lit[8]; /* includes vec, scl commands */ 629 struct r200_state_atom ucp[6]; 630 struct r200_state_atom pix[6]; /* pixshader stages */ 631 struct r200_state_atom eye; /* eye pos */ 632 struct r200_state_atom grd; /* guard band clipping */ 633 struct r200_state_atom fog; 634 struct r200_state_atom glt; 635 struct r200_state_atom prf; 636 struct r200_state_atom afs[2]; 637 struct r200_state_atom pvs; 638 struct r200_state_atom vpi[2]; 639 struct r200_state_atom vpp[2]; 640 struct r200_state_atom atf; 641 struct r200_state_atom spr; 642 struct r200_state_atom ptp; 643 644 int max_state_size; /* Number of bytes necessary for a full state emit. */ 645 GLboolean is_dirty, all_dirty; 646}; 647 648struct r200_state { 649 /* Derived state for internal purposes: 650 */ 651 struct r200_colorbuffer_state color; 652 struct r200_depthbuffer_state depth; 653#if 00 654 struct r200_pixel_state pixel; 655#endif 656 struct r200_scissor_state scissor; 657 struct r200_stencilbuffer_state stencil; 658 struct r200_stipple_state stipple; 659 struct r200_texture_state texture; 660 GLuint envneeded; 661}; 662 663/* Need refcounting on dma buffers: 664 */ 665struct r200_dma_buffer { 666 int refcount; /* the number of retained regions in buf */ 667 drmBufPtr buf; 668}; 669 670#define GET_START(rvb) (rmesa->r200Screen->gart_buffer_offset + \ 671 (rvb)->address - rmesa->dma.buf0_address + \ 672 (rvb)->start) 673 674/* A retained region, eg vertices for indexed vertices. 675 */ 676struct r200_dma_region { 677 struct r200_dma_buffer *buf; 678 char *address; /* == buf->address */ 679 int start, end, ptr; /* offsets from start of buf */ 680 int aos_start; 681 int aos_stride; 682 int aos_size; 683}; 684 685 686struct r200_dma { 687 /* Active dma region. Allocations for vertices and retained 688 * regions come from here. Also used for emitting random vertices, 689 * these may be flushed by calling flush_current(); 690 */ 691 struct r200_dma_region current; 692 693 void (*flush)( r200ContextPtr ); 694 695 char *buf0_address; /* start of buf[0], for index calcs */ 696 GLuint nr_released_bufs; /* flush after so many buffers released */ 697}; 698 699struct r200_dri_mirror { 700 __DRIcontextPrivate *context; /* DRI context */ 701 __DRIscreenPrivate *screen; /* DRI screen */ 702 __DRIdrawablePrivate *drawable; /* DRI drawable bound to this ctx */ 703 __DRIdrawablePrivate *readable; /* DRI readable bound to this ctx */ 704 705 drm_context_t hwContext; 706 drm_hw_lock_t *hwLock; 707 int fd; 708 int drmMinor; 709}; 710 711 712#define R200_CMD_BUF_SZ (16*1024) 713 714struct r200_store { 715 GLuint statenr; 716 GLuint primnr; 717 char cmd_buf[R200_CMD_BUF_SZ]; 718 int cmd_used; 719 int elts_start; 720}; 721 722 723/* r200_tcl.c 724 */ 725struct r200_tcl_info { 726 GLuint hw_primitive; 727 728/* hw can handle 12 components max */ 729 struct r200_dma_region *aos_components[12]; 730 GLuint nr_aos_components; 731 732 GLuint *Elts; 733 734 struct r200_dma_region indexed_verts; 735 struct r200_dma_region vertex_data[15]; 736}; 737 738 739/* r200_swtcl.c 740 */ 741struct r200_swtcl_info { 742 GLuint RenderIndex; 743 744 /** 745 * Size of a hardware vertex. This is calculated when \c ::vertex_attrs is 746 * installed in the Mesa state vector. 747 */ 748 GLuint vertex_size; 749 750 /** 751 * Attributes instructing the Mesa TCL pipeline where / how to put vertex 752 * data in the hardware buffer. 753 */ 754 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; 755 756 /** 757 * Number of elements of \c ::vertex_attrs that are actually used. 758 */ 759 GLuint vertex_attr_count; 760 761 /** 762 * Cached pointer to the buffer where Mesa will store vertex data. 763 */ 764 GLubyte *verts; 765 766 /* Fallback rasterization functions 767 */ 768 r200_point_func draw_point; 769 r200_line_func draw_line; 770 r200_tri_func draw_tri; 771 772 GLuint hw_primitive; 773 GLenum render_primitive; 774 GLuint numverts; 775 776 /** 777 * Offset of the 4UB color data within a hardware (swtcl) vertex. 778 */ 779 GLuint coloroffset; 780 781 /** 782 * Offset of the 3UB specular color data within a hardware (swtcl) vertex. 783 */ 784 GLuint specoffset; 785 786 /** 787 * Should Mesa project vertex data or will the hardware do it? 788 */ 789 GLboolean needproj; 790 791 struct r200_dma_region indexed_verts; 792}; 793 794 795struct r200_ioctl { 796 GLuint vertex_offset; 797 GLuint vertex_size; 798}; 799 800 801 802#define R200_MAX_PRIMS 64 803 804 805 806struct r200_prim { 807 GLuint start; 808 GLuint end; 809 GLuint prim; 810}; 811 812 /* A maximum total of 29 elements per vertex: 3 floats for position, 3 813 * floats for normal, 4 floats for color, 4 bytes for secondary color, 814 * 3 floats for each texture unit (18 floats total). 815 * 816 * we maybe need add. 4 to prevent segfault if someone specifies 817 * GL_TEXTURE6/GL_TEXTURE7 (esp. for the codegen-path) (FIXME: ) 818 * 819 * The position data is never actually stored here, so 3 elements could be 820 * trimmed out of the buffer. 821 */ 822 823#define R200_MAX_VERTEX_SIZE ((3*6)+11) 824 825 826struct r200_context { 827 GLcontext *glCtx; /* Mesa context */ 828 829 /* Driver and hardware state management 830 */ 831 struct r200_hw_state hw; 832 struct r200_state state; 833 struct r200_vertex_program *curr_vp_hw; 834 835 /* Texture object bookkeeping 836 */ 837 unsigned nr_heaps; 838 driTexHeap * texture_heaps[ RADEON_NR_TEX_HEAPS ]; 839 driTextureObject swapped; 840 int texture_depth; 841 float initialMaxAnisotropy; 842 843 /* Rasterization and vertex state: 844 */ 845 GLuint TclFallback; 846 GLuint Fallback; 847 GLuint NewGLState; 848 DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ 849 850 /* Vertex buffers 851 */ 852 struct r200_ioctl ioctl; 853 struct r200_dma dma; 854 struct r200_store store; 855 /* A full state emit as of the first state emit in the main store, in case 856 * the context is lost. 857 */ 858 struct r200_store backup_store; 859 860 /* Page flipping 861 */ 862 GLuint doPageFlip; 863 864 /* Busy waiting 865 */ 866 GLuint do_usleeps; 867 GLuint do_irqs; 868 GLuint irqsEmitted; 869 drm_radeon_irq_wait_t iw; 870 871 /* Clientdata textures; 872 */ 873 GLuint prefer_gart_client_texturing; 874 875 /* Drawable, cliprect and scissor information 876 */ 877 GLuint numClipRects; /* Cliprects for the draw buffer */ 878 drm_clip_rect_t *pClipRects; 879 unsigned int lastStamp; 880 GLboolean lost_context; 881 GLboolean save_on_next_emit; 882 radeonScreenPtr r200Screen; /* Screen private DRI data */ 883 drm_radeon_sarea_t *sarea; /* Private SAREA data */ 884 885 /* TCL stuff 886 */ 887 GLmatrix TexGenMatrix[R200_MAX_TEXTURE_UNITS]; 888 GLboolean recheck_texgen[R200_MAX_TEXTURE_UNITS]; 889 GLboolean TexGenNeedNormals[R200_MAX_TEXTURE_UNITS]; 890 GLuint TexMatEnabled; 891 GLuint TexMatCompSel; 892 GLuint TexGenEnabled; 893 GLuint TexGenCompSel; 894 GLmatrix tmpmat; 895 896 /* VBI / buffer swap 897 */ 898 GLuint vbl_seq; 899 GLuint vblank_flags; 900 901 int64_t swap_ust; 902 int64_t swap_missed_ust; 903 904 GLuint swap_count; 905 GLuint swap_missed_count; 906 907 908 /* r200_tcl.c 909 */ 910 struct r200_tcl_info tcl; 911 912 /* r200_swtcl.c 913 */ 914 struct r200_swtcl_info swtcl; 915 916 /* Mirrors of some DRI state 917 */ 918 struct r200_dri_mirror dri; 919 920 /* Configuration cache 921 */ 922 driOptionCache optionCache; 923 924 GLboolean using_hyperz; 925 GLboolean texmicrotile; 926 927 struct ati_fragment_shader *afs_loaded; 928}; 929 930#define R200_CONTEXT(ctx) ((r200ContextPtr)(ctx->DriverCtx)) 931 932 933static __inline GLuint r200PackColor( GLuint cpp, 934 GLubyte r, GLubyte g, 935 GLubyte b, GLubyte a ) 936{ 937 switch ( cpp ) { 938 case 2: 939 return PACK_COLOR_565( r, g, b ); 940 case 4: 941 return PACK_COLOR_8888( a, r, g, b ); 942 default: 943 return 0; 944 } 945} 946 947 948extern void r200DestroyContext( __DRIcontextPrivate *driContextPriv ); 949extern GLboolean r200CreateContext( const __GLcontextModes *glVisual, 950 __DRIcontextPrivate *driContextPriv, 951 void *sharedContextPrivate); 952extern void r200SwapBuffers( __DRIdrawablePrivate *dPriv ); 953extern void r200CopySubBuffer( __DRIdrawablePrivate * dPriv, 954 int x, int y, int w, int h ); 955extern GLboolean r200MakeCurrent( __DRIcontextPrivate *driContextPriv, 956 __DRIdrawablePrivate *driDrawPriv, 957 __DRIdrawablePrivate *driReadPriv ); 958extern GLboolean r200UnbindContext( __DRIcontextPrivate *driContextPriv ); 959 960/* ================================================================ 961 * Debugging: 962 */ 963#define DO_DEBUG 1 964 965#if DO_DEBUG 966extern int R200_DEBUG; 967#else 968#define R200_DEBUG 0 969#endif 970 971#define DEBUG_TEXTURE 0x001 972#define DEBUG_STATE 0x002 973#define DEBUG_IOCTL 0x004 974#define DEBUG_PRIMS 0x008 975#define DEBUG_VERTS 0x010 976#define DEBUG_FALLBACKS 0x020 977#define DEBUG_VFMT 0x040 978#define DEBUG_CODEGEN 0x080 979#define DEBUG_VERBOSE 0x100 980#define DEBUG_DRI 0x200 981#define DEBUG_DMA 0x400 982#define DEBUG_SANITY 0x800 983#define DEBUG_SYNC 0x1000 984#define DEBUG_PIXEL 0x2000 985#define DEBUG_MEMORY 0x4000 986 987#endif /* __R200_CONTEXT_H__ */ 988