r200_context.h revision f697308ae583dbcdf0268e98232c32be7f25fac6
1/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_context.h,v 1.2 2002/12/16 16:18:54 dawes Exp $ */ 2/* 3Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 4 5The Weather Channel (TM) funded Tungsten Graphics to develop the 6initial release of the Radeon 8500 driver under the XFree86 license. 7This notice must be preserved. 8 9Permission is hereby granted, free of charge, to any person obtaining 10a copy of this software and associated documentation files (the 11"Software"), to deal in the Software without restriction, including 12without limitation the rights to use, copy, modify, merge, publish, 13distribute, sublicense, and/or sell copies of the Software, and to 14permit persons to whom the Software is furnished to do so, subject to 15the following conditions: 16 17The above copyright notice and this permission notice (including the 18next paragraph) shall be included in all copies or substantial 19portions of the Software. 20 21THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 22EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 23MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 24IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 25LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 26OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 27WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 28 29**************************************************************************/ 30 31/* 32 * Authors: 33 * Keith Whitwell <keith@tungstengraphics.com> 34 */ 35 36#ifndef __R200_CONTEXT_H__ 37#define __R200_CONTEXT_H__ 38 39#include "tnl/t_vertex.h" 40#include "drm.h" 41#include "radeon_drm.h" 42#include "dri_util.h" 43#include "texmem.h" 44 45#include "macros.h" 46#include "mtypes.h" 47#include "colormac.h" 48#include "r200_reg.h" 49#include "r200_vertprog.h" 50 51#define ENABLE_HW_3D_TEXTURE 1 /* XXX this is temporary! */ 52 53#ifndef R200_EMIT_VAP_PVS_CNTL 54#error This driver requires a newer libdrm to compile 55#endif 56 57struct r200_context; 58typedef struct r200_context r200ContextRec; 59typedef struct r200_context *r200ContextPtr; 60 61/* This union is used to avoid warnings/miscompilation 62 with float to uint32_t casts due to strict-aliasing */ 63typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; 64 65#include "r200_lock.h" 66#include "radeon_screen.h" 67#include "mm.h" 68 69/* Flags for software fallback cases */ 70/* See correponding strings in r200_swtcl.c */ 71#define R200_FALLBACK_TEXTURE 0x01 72#define R200_FALLBACK_DRAW_BUFFER 0x02 73#define R200_FALLBACK_STENCIL 0x04 74#define R200_FALLBACK_RENDER_MODE 0x08 75#define R200_FALLBACK_DISABLE 0x10 76#define R200_FALLBACK_BORDER_MODE 0x20 77 78/* The blit width for texture uploads 79 */ 80#define BLIT_WIDTH_BYTES 1024 81 82/* Use the templated vertex format: 83 */ 84#define COLOR_IS_RGBA 85#define TAG(x) r200##x 86#include "tnl_dd/t_dd_vertex.h" 87#undef TAG 88 89typedef void (*r200_tri_func)( r200ContextPtr, 90 r200Vertex *, 91 r200Vertex *, 92 r200Vertex * ); 93 94typedef void (*r200_line_func)( r200ContextPtr, 95 r200Vertex *, 96 r200Vertex * ); 97 98typedef void (*r200_point_func)( r200ContextPtr, 99 r200Vertex * ); 100 101 102struct r200_vertex_program { 103 struct gl_vertex_program mesa_program; /* Must be first */ 104 int translated; 105 /* need excess instr: 1 for late loop checking, 2 for 106 additional instr due to instr/attr, 3 for fog */ 107 VERTEX_SHADER_INSTRUCTION instr[R200_VSF_MAX_INST + 6]; 108 int pos_end; 109 int inputs[VERT_ATTRIB_MAX]; 110 int rev_inputs[16]; 111 int gen_inputs_mapped; 112 int native; 113 int fogpidx; 114 int fogmode; 115}; 116 117struct r200_colorbuffer_state { 118 GLuint clear; 119#if 000 120 GLint drawOffset, drawPitch; 121#endif 122 int roundEnable; 123}; 124 125 126struct r200_depthbuffer_state { 127 GLuint clear; 128 GLfloat scale; 129}; 130 131#if 000 132struct r200_pixel_state { 133 GLint readOffset, readPitch; 134}; 135#endif 136 137struct r200_scissor_state { 138 drm_clip_rect_t rect; 139 GLboolean enabled; 140 141 GLuint numClipRects; /* Cliprects active */ 142 GLuint numAllocedClipRects; /* Cliprects available */ 143 drm_clip_rect_t *pClipRects; 144}; 145 146struct r200_stencilbuffer_state { 147 GLboolean hwBuffer; 148 GLuint clear; /* rb3d_stencilrefmask value */ 149}; 150 151struct r200_stipple_state { 152 GLuint mask[32]; 153}; 154 155 156 157#define TEX_0 0x1 158#define TEX_1 0x2 159#define TEX_2 0x4 160#define TEX_3 0x8 161#define TEX_4 0x10 162#define TEX_5 0x20 163#define TEX_ALL 0x3f 164 165typedef struct r200_tex_obj r200TexObj, *r200TexObjPtr; 166 167/* Texture object in locally shared texture space. 168 */ 169struct r200_tex_obj { 170 driTextureObject base; 171 172 GLuint bufAddr; /* Offset to start of locally 173 shared texture block */ 174 175 GLuint dirty_state; /* Flags (1 per texunit) for 176 whether or not this texobj 177 has dirty hardware state 178 (pp_*) that needs to be 179 brought into the 180 texunit. */ 181 182 drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; 183 /* Six, for the cube faces */ 184 185 GLuint pp_txfilter; /* hardware register values */ 186 GLuint pp_txformat; 187 GLuint pp_txformat_x; 188 GLuint pp_txoffset; /* Image location in texmem. 189 All cube faces follow. */ 190 GLuint pp_txsize; /* npot only */ 191 GLuint pp_txpitch; /* npot only */ 192 GLuint pp_border_color; 193 GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ 194 195 GLboolean border_fallback; 196 197 GLuint tile_bits; /* hw texture tile bits used on this texture */ 198}; 199 200 201struct r200_texture_env_state { 202 r200TexObjPtr texobj; 203 GLuint outputreg; 204 GLuint unitneeded; 205}; 206 207#define R200_MAX_TEXTURE_UNITS 6 208 209struct r200_texture_state { 210 struct r200_texture_env_state unit[R200_MAX_TEXTURE_UNITS]; 211}; 212 213 214struct r200_state_atom { 215 struct r200_state_atom *next, *prev; 216 const char *name; /* for debug */ 217 int cmd_size; /* size in bytes */ 218 GLuint idx; 219 int *cmd; /* one or more cmd's */ 220 int *lastcmd; /* one or more cmd's */ 221 GLboolean dirty; 222 GLboolean (*check)( GLcontext *, int ); /* is this state active? */ 223}; 224 225 226 227/* Trying to keep these relatively short as the variables are becoming 228 * extravagently long. Drop the driver name prefix off the front of 229 * everything - I think we know which driver we're in by now, and keep the 230 * prefix to 3 letters unless absolutely impossible. 231 */ 232 233#define CTX_CMD_0 0 234#define CTX_PP_MISC 1 235#define CTX_PP_FOG_COLOR 2 236#define CTX_RE_SOLID_COLOR 3 237#define CTX_RB3D_BLENDCNTL 4 238#define CTX_RB3D_DEPTHOFFSET 5 239#define CTX_RB3D_DEPTHPITCH 6 240#define CTX_RB3D_ZSTENCILCNTL 7 241#define CTX_CMD_1 8 242#define CTX_PP_CNTL 9 243#define CTX_RB3D_CNTL 10 244#define CTX_RB3D_COLOROFFSET 11 245#define CTX_CMD_2 12 /* why */ 246#define CTX_RB3D_COLORPITCH 13 /* why */ 247#define CTX_STATE_SIZE_OLDDRM 14 248#define CTX_CMD_3 14 249#define CTX_RB3D_BLENDCOLOR 15 250#define CTX_RB3D_ABLENDCNTL 16 251#define CTX_RB3D_CBLENDCNTL 17 252#define CTX_STATE_SIZE_NEWDRM 18 253 254#define SET_CMD_0 0 255#define SET_SE_CNTL 1 256#define SET_RE_CNTL 2 /* replace se_coord_fmt */ 257#define SET_STATE_SIZE 3 258 259#define VTE_CMD_0 0 260#define VTE_SE_VTE_CNTL 1 261#define VTE_STATE_SIZE 2 262 263#define LIN_CMD_0 0 264#define LIN_RE_LINE_PATTERN 1 265#define LIN_RE_LINE_STATE 2 266#define LIN_CMD_1 3 267#define LIN_SE_LINE_WIDTH 4 268#define LIN_STATE_SIZE 5 269 270#define MSK_CMD_0 0 271#define MSK_RB3D_STENCILREFMASK 1 272#define MSK_RB3D_ROPCNTL 2 273#define MSK_RB3D_PLANEMASK 3 274#define MSK_STATE_SIZE 4 275 276#define VPT_CMD_0 0 277#define VPT_SE_VPORT_XSCALE 1 278#define VPT_SE_VPORT_XOFFSET 2 279#define VPT_SE_VPORT_YSCALE 3 280#define VPT_SE_VPORT_YOFFSET 4 281#define VPT_SE_VPORT_ZSCALE 5 282#define VPT_SE_VPORT_ZOFFSET 6 283#define VPT_STATE_SIZE 7 284 285#define ZBS_CMD_0 0 286#define ZBS_SE_ZBIAS_FACTOR 1 287#define ZBS_SE_ZBIAS_CONSTANT 2 288#define ZBS_STATE_SIZE 3 289 290#define MSC_CMD_0 0 291#define MSC_RE_MISC 1 292#define MSC_STATE_SIZE 2 293 294#define TAM_CMD_0 0 295#define TAM_DEBUG3 1 296#define TAM_STATE_SIZE 2 297 298#define TEX_CMD_0 0 299#define TEX_PP_TXFILTER 1 /*2c00*/ 300#define TEX_PP_TXFORMAT 2 /*2c04*/ 301#define TEX_PP_TXFORMAT_X 3 /*2c08*/ 302#define TEX_PP_TXSIZE 4 /*2c0c*/ 303#define TEX_PP_TXPITCH 5 /*2c10*/ 304#define TEX_PP_BORDER_COLOR 6 /*2c14*/ 305#define TEX_CMD_1_OLDDRM 7 306#define TEX_PP_TXOFFSET_OLDDRM 8 /*2d00 */ 307#define TEX_STATE_SIZE_OLDDRM 9 308#define TEX_PP_CUBIC_FACES 7 309#define TEX_PP_TXMULTI_CTL 8 310#define TEX_CMD_1_NEWDRM 9 311#define TEX_PP_TXOFFSET_NEWDRM 10 312#define TEX_STATE_SIZE_NEWDRM 11 313 314#define CUBE_CMD_0 0 /* 1 register follows */ /* this command unnecessary */ 315#define CUBE_PP_CUBIC_FACES 1 /* 0x2c18 */ /* with new enough drm */ 316#define CUBE_CMD_1 2 /* 5 registers follow */ 317#define CUBE_PP_CUBIC_OFFSET_F1 3 /* 0x2d04 */ 318#define CUBE_PP_CUBIC_OFFSET_F2 4 /* 0x2d08 */ 319#define CUBE_PP_CUBIC_OFFSET_F3 5 /* 0x2d0c */ 320#define CUBE_PP_CUBIC_OFFSET_F4 6 /* 0x2d10 */ 321#define CUBE_PP_CUBIC_OFFSET_F5 7 /* 0x2d14 */ 322#define CUBE_STATE_SIZE 8 323 324#define PIX_CMD_0 0 325#define PIX_PP_TXCBLEND 1 326#define PIX_PP_TXCBLEND2 2 327#define PIX_PP_TXABLEND 3 328#define PIX_PP_TXABLEND2 4 329#define PIX_STATE_SIZE 5 330 331#define TF_CMD_0 0 332#define TF_TFACTOR_0 1 333#define TF_TFACTOR_1 2 334#define TF_TFACTOR_2 3 335#define TF_TFACTOR_3 4 336#define TF_TFACTOR_4 5 337#define TF_TFACTOR_5 6 338#define TF_STATE_SIZE 7 339 340#define ATF_CMD_0 0 341#define ATF_TFACTOR_0 1 342#define ATF_TFACTOR_1 2 343#define ATF_TFACTOR_2 3 344#define ATF_TFACTOR_3 4 345#define ATF_TFACTOR_4 5 346#define ATF_TFACTOR_5 6 347#define ATF_TFACTOR_6 7 348#define ATF_TFACTOR_7 8 349#define ATF_STATE_SIZE 9 350 351/* ATI_FRAGMENT_SHADER */ 352#define AFS_CMD_0 0 353#define AFS_IC0 1 /* 2f00 */ 354#define AFS_IC1 2 /* 2f04 */ 355#define AFS_IA0 3 /* 2f08 */ 356#define AFS_IA1 4 /* 2f0c */ 357#define AFS_STATE_SIZE 33 358 359#define PVS_CMD_0 0 360#define PVS_CNTL_1 1 361#define PVS_CNTL_2 2 362#define PVS_STATE_SIZE 3 363 364/* those are quite big... */ 365#define VPI_CMD_0 0 366#define VPI_OPDST_0 1 367#define VPI_SRC0_0 2 368#define VPI_SRC1_0 3 369#define VPI_SRC2_0 4 370#define VPI_OPDST_63 253 371#define VPI_SRC0_63 254 372#define VPI_SRC1_63 255 373#define VPI_SRC2_63 256 374#define VPI_STATE_SIZE 257 375 376#define VPP_CMD_0 0 377#define VPP_PARAM0_0 1 378#define VPP_PARAM1_0 2 379#define VPP_PARAM2_0 3 380#define VPP_PARAM3_0 4 381#define VPP_PARAM0_95 381 382#define VPP_PARAM1_95 382 383#define VPP_PARAM2_95 383 384#define VPP_PARAM3_95 384 385#define VPP_STATE_SIZE 385 386 387#define TCL_CMD_0 0 388#define TCL_LIGHT_MODEL_CTL_0 1 389#define TCL_LIGHT_MODEL_CTL_1 2 390#define TCL_PER_LIGHT_CTL_0 3 391#define TCL_PER_LIGHT_CTL_1 4 392#define TCL_PER_LIGHT_CTL_2 5 393#define TCL_PER_LIGHT_CTL_3 6 394#define TCL_CMD_1 7 395#define TCL_UCP_VERT_BLEND_CTL 8 396#define TCL_STATE_SIZE 9 397 398#define MSL_CMD_0 0 399#define MSL_MATRIX_SELECT_0 1 400#define MSL_MATRIX_SELECT_1 2 401#define MSL_MATRIX_SELECT_2 3 402#define MSL_MATRIX_SELECT_3 4 403#define MSL_MATRIX_SELECT_4 5 404#define MSL_STATE_SIZE 6 405 406#define TCG_CMD_0 0 407#define TCG_TEX_PROC_CTL_2 1 408#define TCG_TEX_PROC_CTL_3 2 409#define TCG_TEX_PROC_CTL_0 3 410#define TCG_TEX_PROC_CTL_1 4 411#define TCG_TEX_CYL_WRAP_CTL 5 412#define TCG_STATE_SIZE 6 413 414#define MTL_CMD_0 0 415#define MTL_EMMISSIVE_RED 1 416#define MTL_EMMISSIVE_GREEN 2 417#define MTL_EMMISSIVE_BLUE 3 418#define MTL_EMMISSIVE_ALPHA 4 419#define MTL_AMBIENT_RED 5 420#define MTL_AMBIENT_GREEN 6 421#define MTL_AMBIENT_BLUE 7 422#define MTL_AMBIENT_ALPHA 8 423#define MTL_DIFFUSE_RED 9 424#define MTL_DIFFUSE_GREEN 10 425#define MTL_DIFFUSE_BLUE 11 426#define MTL_DIFFUSE_ALPHA 12 427#define MTL_SPECULAR_RED 13 428#define MTL_SPECULAR_GREEN 14 429#define MTL_SPECULAR_BLUE 15 430#define MTL_SPECULAR_ALPHA 16 431#define MTL_CMD_1 17 432#define MTL_SHININESS 18 433#define MTL_STATE_SIZE 19 434 435#define VAP_CMD_0 0 436#define VAP_SE_VAP_CNTL 1 437#define VAP_STATE_SIZE 2 438 439/* Replaces a lot of packet info from radeon 440 */ 441#define VTX_CMD_0 0 442#define VTX_VTXFMT_0 1 443#define VTX_VTXFMT_1 2 444#define VTX_TCL_OUTPUT_VTXFMT_0 3 445#define VTX_TCL_OUTPUT_VTXFMT_1 4 446#define VTX_CMD_1 5 447#define VTX_TCL_OUTPUT_COMPSEL 6 448#define VTX_CMD_2 7 449#define VTX_STATE_CNTL 8 450#define VTX_STATE_SIZE 9 451 452/* SPR - point sprite state 453 */ 454#define SPR_CMD_0 0 455#define SPR_POINT_SPRITE_CNTL 1 456#define SPR_STATE_SIZE 2 457 458#define PTP_CMD_0 0 459#define PTP_VPORT_SCALE_0 1 460#define PTP_VPORT_SCALE_1 2 461#define PTP_VPORT_SCALE_PTSIZE 3 462#define PTP_VPORT_SCALE_3 4 463#define PTP_CMD_1 5 464#define PTP_ATT_CONST_QUAD 6 465#define PTP_ATT_CONST_LIN 7 466#define PTP_ATT_CONST_CON 8 467#define PTP_ATT_CONST_3 9 468#define PTP_EYE_X 10 469#define PTP_EYE_Y 11 470#define PTP_EYE_Z 12 471#define PTP_EYE_3 13 472#define PTP_CLAMP_MIN 14 473#define PTP_CLAMP_MAX 15 474#define PTP_CLAMP_2 16 475#define PTP_CLAMP_3 17 476#define PTP_STATE_SIZE 18 477 478#define VTX_COLOR(v,n) (((v)>>(R200_VTX_COLOR_0_SHIFT+(n)*2))&\ 479 R200_VTX_COLOR_MASK) 480 481/** 482 * Given the \c R200_SE_VTX_FMT_1 for the current vertex state, determine 483 * how many components are in texture coordinate \c n. 484 */ 485#define VTX_TEXn_COUNT(v,n) (((v) >> (3 * n)) & 0x07) 486 487#define MAT_CMD_0 0 488#define MAT_ELT_0 1 489#define MAT_STATE_SIZE 17 490 491#define GRD_CMD_0 0 492#define GRD_VERT_GUARD_CLIP_ADJ 1 493#define GRD_VERT_GUARD_DISCARD_ADJ 2 494#define GRD_HORZ_GUARD_CLIP_ADJ 3 495#define GRD_HORZ_GUARD_DISCARD_ADJ 4 496#define GRD_STATE_SIZE 5 497 498/* position changes frequently when lighting in modelpos - separate 499 * out to new state item? 500 */ 501#define LIT_CMD_0 0 502#define LIT_AMBIENT_RED 1 503#define LIT_AMBIENT_GREEN 2 504#define LIT_AMBIENT_BLUE 3 505#define LIT_AMBIENT_ALPHA 4 506#define LIT_DIFFUSE_RED 5 507#define LIT_DIFFUSE_GREEN 6 508#define LIT_DIFFUSE_BLUE 7 509#define LIT_DIFFUSE_ALPHA 8 510#define LIT_SPECULAR_RED 9 511#define LIT_SPECULAR_GREEN 10 512#define LIT_SPECULAR_BLUE 11 513#define LIT_SPECULAR_ALPHA 12 514#define LIT_POSITION_X 13 515#define LIT_POSITION_Y 14 516#define LIT_POSITION_Z 15 517#define LIT_POSITION_W 16 518#define LIT_DIRECTION_X 17 519#define LIT_DIRECTION_Y 18 520#define LIT_DIRECTION_Z 19 521#define LIT_DIRECTION_W 20 522#define LIT_ATTEN_QUADRATIC 21 523#define LIT_ATTEN_LINEAR 22 524#define LIT_ATTEN_CONST 23 525#define LIT_ATTEN_XXX 24 526#define LIT_CMD_1 25 527#define LIT_SPOT_DCD 26 528#define LIT_SPOT_DCM 27 529#define LIT_SPOT_EXPONENT 28 530#define LIT_SPOT_CUTOFF 29 531#define LIT_SPECULAR_THRESH 30 532#define LIT_RANGE_CUTOFF 31 /* ? */ 533#define LIT_ATTEN_CONST_INV 32 534#define LIT_STATE_SIZE 33 535 536/* Fog 537 */ 538#define FOG_CMD_0 0 539#define FOG_R 1 540#define FOG_C 2 541#define FOG_D 3 542#define FOG_PAD 4 543#define FOG_STATE_SIZE 5 544 545/* UCP 546 */ 547#define UCP_CMD_0 0 548#define UCP_X 1 549#define UCP_Y 2 550#define UCP_Z 3 551#define UCP_W 4 552#define UCP_STATE_SIZE 5 553 554/* GLT - Global ambient 555 */ 556#define GLT_CMD_0 0 557#define GLT_RED 1 558#define GLT_GREEN 2 559#define GLT_BLUE 3 560#define GLT_ALPHA 4 561#define GLT_STATE_SIZE 5 562 563/* EYE 564 */ 565#define EYE_CMD_0 0 566#define EYE_X 1 567#define EYE_Y 2 568#define EYE_Z 3 569#define EYE_RESCALE_FACTOR 4 570#define EYE_STATE_SIZE 5 571 572/* CST - constant state 573 */ 574#define CST_CMD_0 0 575#define CST_PP_CNTL_X 1 576#define CST_CMD_1 2 577#define CST_RB3D_DEPTHXY_OFFSET 3 578#define CST_CMD_2 4 579#define CST_RE_AUX_SCISSOR_CNTL 5 580#define CST_CMD_3 6 581#define CST_RE_SCISSOR_TL_0 7 582#define CST_RE_SCISSOR_BR_0 8 583#define CST_CMD_4 9 584#define CST_SE_VAP_CNTL_STATUS 10 585#define CST_CMD_5 11 586#define CST_RE_POINTSIZE 12 587#define CST_CMD_6 13 588#define CST_SE_TCL_INPUT_VTX_0 14 589#define CST_SE_TCL_INPUT_VTX_1 15 590#define CST_SE_TCL_INPUT_VTX_2 16 591#define CST_SE_TCL_INPUT_VTX_3 17 592#define CST_STATE_SIZE 18 593 594#define PRF_CMD_0 0 595#define PRF_PP_TRI_PERF 1 596#define PRF_PP_PERF_CNTL 2 597#define PRF_STATE_SIZE 3 598 599 600struct r200_hw_state { 601 /* Head of the linked list of state atoms. */ 602 struct r200_state_atom atomlist; 603 604 /* Hardware state, stored as cmdbuf commands: 605 * -- Need to doublebuffer for 606 * - reviving state after loss of context 607 * - eliding noop statechange loops? (except line stipple count) 608 */ 609 struct r200_state_atom ctx; 610 struct r200_state_atom set; 611 struct r200_state_atom vte; 612 struct r200_state_atom lin; 613 struct r200_state_atom msk; 614 struct r200_state_atom vpt; 615 struct r200_state_atom vap; 616 struct r200_state_atom vtx; 617 struct r200_state_atom tcl; 618 struct r200_state_atom msl; 619 struct r200_state_atom tcg; 620 struct r200_state_atom msc; 621 struct r200_state_atom cst; 622 struct r200_state_atom tam; 623 struct r200_state_atom tf; 624 struct r200_state_atom tex[6]; 625 struct r200_state_atom cube[6]; 626 struct r200_state_atom zbs; 627 struct r200_state_atom mtl[2]; 628 struct r200_state_atom mat[9]; 629 struct r200_state_atom lit[8]; /* includes vec, scl commands */ 630 struct r200_state_atom ucp[6]; 631 struct r200_state_atom pix[6]; /* pixshader stages */ 632 struct r200_state_atom eye; /* eye pos */ 633 struct r200_state_atom grd; /* guard band clipping */ 634 struct r200_state_atom fog; 635 struct r200_state_atom glt; 636 struct r200_state_atom prf; 637 struct r200_state_atom afs[2]; 638 struct r200_state_atom pvs; 639 struct r200_state_atom vpi[2]; 640 struct r200_state_atom vpp[2]; 641 struct r200_state_atom atf; 642 struct r200_state_atom spr; 643 struct r200_state_atom ptp; 644 645 int max_state_size; /* Number of bytes necessary for a full state emit. */ 646 GLboolean is_dirty, all_dirty; 647}; 648 649struct r200_state { 650 /* Derived state for internal purposes: 651 */ 652 struct r200_colorbuffer_state color; 653 struct r200_depthbuffer_state depth; 654#if 00 655 struct r200_pixel_state pixel; 656#endif 657 struct r200_scissor_state scissor; 658 struct r200_stencilbuffer_state stencil; 659 struct r200_stipple_state stipple; 660 struct r200_texture_state texture; 661 GLuint envneeded; 662}; 663 664/* Need refcounting on dma buffers: 665 */ 666struct r200_dma_buffer { 667 int refcount; /* the number of retained regions in buf */ 668 drmBufPtr buf; 669}; 670 671#define GET_START(rvb) (rmesa->r200Screen->gart_buffer_offset + \ 672 (rvb)->address - rmesa->dma.buf0_address + \ 673 (rvb)->start) 674 675/* A retained region, eg vertices for indexed vertices. 676 */ 677struct r200_dma_region { 678 struct r200_dma_buffer *buf; 679 char *address; /* == buf->address */ 680 int start, end, ptr; /* offsets from start of buf */ 681 int aos_start; 682 int aos_stride; 683 int aos_size; 684}; 685 686 687struct r200_dma { 688 /* Active dma region. Allocations for vertices and retained 689 * regions come from here. Also used for emitting random vertices, 690 * these may be flushed by calling flush_current(); 691 */ 692 struct r200_dma_region current; 693 694 void (*flush)( r200ContextPtr ); 695 696 char *buf0_address; /* start of buf[0], for index calcs */ 697 GLuint nr_released_bufs; /* flush after so many buffers released */ 698}; 699 700struct r200_dri_mirror { 701 __DRIcontextPrivate *context; /* DRI context */ 702 __DRIscreenPrivate *screen; /* DRI screen */ 703 __DRIdrawablePrivate *drawable; /* DRI drawable bound to this ctx */ 704 __DRIdrawablePrivate *readable; /* DRI readable bound to this ctx */ 705 706 drm_context_t hwContext; 707 drm_hw_lock_t *hwLock; 708 int fd; 709 int drmMinor; 710}; 711 712 713#define R200_CMD_BUF_SZ (16*1024) 714 715struct r200_store { 716 GLuint statenr; 717 GLuint primnr; 718 char cmd_buf[R200_CMD_BUF_SZ]; 719 int cmd_used; 720 int elts_start; 721}; 722 723 724/* r200_tcl.c 725 */ 726struct r200_tcl_info { 727 GLuint hw_primitive; 728 729/* hw can handle 12 components max */ 730 struct r200_dma_region *aos_components[12]; 731 GLuint nr_aos_components; 732 733 GLuint *Elts; 734 735 struct r200_dma_region indexed_verts; 736 struct r200_dma_region weight; 737 struct r200_dma_region obj; 738 struct r200_dma_region rgba; 739 struct r200_dma_region spec; 740 struct r200_dma_region fog; 741 struct r200_dma_region tex[R200_MAX_TEXTURE_UNITS]; 742 struct r200_dma_region norm; 743 struct r200_dma_region generic[16]; 744}; 745 746 747/* r200_swtcl.c 748 */ 749struct r200_swtcl_info { 750 GLuint RenderIndex; 751 752 /** 753 * Size of a hardware vertex. This is calculated when \c ::vertex_attrs is 754 * installed in the Mesa state vector. 755 */ 756 GLuint vertex_size; 757 758 /** 759 * Attributes instructing the Mesa TCL pipeline where / how to put vertex 760 * data in the hardware buffer. 761 */ 762 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; 763 764 /** 765 * Number of elements of \c ::vertex_attrs that are actually used. 766 */ 767 GLuint vertex_attr_count; 768 769 /** 770 * Cached pointer to the buffer where Mesa will store vertex data. 771 */ 772 GLubyte *verts; 773 774 /* Fallback rasterization functions 775 */ 776 r200_point_func draw_point; 777 r200_line_func draw_line; 778 r200_tri_func draw_tri; 779 780 GLuint hw_primitive; 781 GLenum render_primitive; 782 GLuint numverts; 783 784 /** 785 * Offset of the 4UB color data within a hardware (swtcl) vertex. 786 */ 787 GLuint coloroffset; 788 789 /** 790 * Offset of the 3UB specular color data within a hardware (swtcl) vertex. 791 */ 792 GLuint specoffset; 793 794 /** 795 * Should Mesa project vertex data or will the hardware do it? 796 */ 797 GLboolean needproj; 798 799 struct r200_dma_region indexed_verts; 800}; 801 802 803struct r200_ioctl { 804 GLuint vertex_offset; 805 GLuint vertex_size; 806}; 807 808 809 810#define R200_MAX_PRIMS 64 811 812 813 814struct r200_prim { 815 GLuint start; 816 GLuint end; 817 GLuint prim; 818}; 819 820 /* A maximum total of 29 elements per vertex: 3 floats for position, 3 821 * floats for normal, 4 floats for color, 4 bytes for secondary color, 822 * 3 floats for each texture unit (18 floats total). 823 * 824 * we maybe need add. 4 to prevent segfault if someone specifies 825 * GL_TEXTURE6/GL_TEXTURE7 (esp. for the codegen-path) (FIXME: ) 826 * 827 * The position data is never actually stored here, so 3 elements could be 828 * trimmed out of the buffer. 829 */ 830 831#define R200_MAX_VERTEX_SIZE ((3*6)+11) 832 833 834struct r200_context { 835 GLcontext *glCtx; /* Mesa context */ 836 837 /* Driver and hardware state management 838 */ 839 struct r200_hw_state hw; 840 struct r200_state state; 841 struct r200_vertex_program *curr_vp_hw; 842 843 /* Texture object bookkeeping 844 */ 845 unsigned nr_heaps; 846 driTexHeap * texture_heaps[ RADEON_NR_TEX_HEAPS ]; 847 driTextureObject swapped; 848 int texture_depth; 849 float initialMaxAnisotropy; 850 851 /* Rasterization and vertex state: 852 */ 853 GLuint TclFallback; 854 GLuint Fallback; 855 GLuint NewGLState; 856 DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ 857 858 /* Vertex buffers 859 */ 860 struct r200_ioctl ioctl; 861 struct r200_dma dma; 862 struct r200_store store; 863 /* A full state emit as of the first state emit in the main store, in case 864 * the context is lost. 865 */ 866 struct r200_store backup_store; 867 868 /* Page flipping 869 */ 870 GLuint doPageFlip; 871 872 /* Busy waiting 873 */ 874 GLuint do_usleeps; 875 GLuint do_irqs; 876 GLuint irqsEmitted; 877 drm_radeon_irq_wait_t iw; 878 879 /* Clientdata textures; 880 */ 881 GLuint prefer_gart_client_texturing; 882 883 /* Drawable, cliprect and scissor information 884 */ 885 GLuint numClipRects; /* Cliprects for the draw buffer */ 886 drm_clip_rect_t *pClipRects; 887 unsigned int lastStamp; 888 GLboolean lost_context; 889 GLboolean save_on_next_emit; 890 radeonScreenPtr r200Screen; /* Screen private DRI data */ 891 drm_radeon_sarea_t *sarea; /* Private SAREA data */ 892 893 /* TCL stuff 894 */ 895 GLmatrix TexGenMatrix[R200_MAX_TEXTURE_UNITS]; 896 GLboolean recheck_texgen[R200_MAX_TEXTURE_UNITS]; 897 GLboolean TexGenNeedNormals[R200_MAX_TEXTURE_UNITS]; 898 GLuint TexMatEnabled; 899 GLuint TexMatCompSel; 900 GLuint TexGenEnabled; 901 GLuint TexGenCompSel; 902 GLmatrix tmpmat; 903 904 /* VBI / buffer swap 905 */ 906 GLuint vbl_seq; 907 GLuint vblank_flags; 908 909 int64_t swap_ust; 910 int64_t swap_missed_ust; 911 912 GLuint swap_count; 913 GLuint swap_missed_count; 914 915 916 /* r200_tcl.c 917 */ 918 struct r200_tcl_info tcl; 919 920 /* r200_swtcl.c 921 */ 922 struct r200_swtcl_info swtcl; 923 924 /* Mirrors of some DRI state 925 */ 926 struct r200_dri_mirror dri; 927 928 /* Configuration cache 929 */ 930 driOptionCache optionCache; 931 932 GLboolean using_hyperz; 933 GLboolean texmicrotile; 934 935 struct ati_fragment_shader *afs_loaded; 936}; 937 938#define R200_CONTEXT(ctx) ((r200ContextPtr)(ctx->DriverCtx)) 939 940 941static __inline GLuint r200PackColor( GLuint cpp, 942 GLubyte r, GLubyte g, 943 GLubyte b, GLubyte a ) 944{ 945 switch ( cpp ) { 946 case 2: 947 return PACK_COLOR_565( r, g, b ); 948 case 4: 949 return PACK_COLOR_8888( a, r, g, b ); 950 default: 951 return 0; 952 } 953} 954 955 956extern void r200DestroyContext( __DRIcontextPrivate *driContextPriv ); 957extern GLboolean r200CreateContext( const __GLcontextModes *glVisual, 958 __DRIcontextPrivate *driContextPriv, 959 void *sharedContextPrivate); 960extern void r200SwapBuffers( __DRIdrawablePrivate *dPriv ); 961extern void r200CopySubBuffer( __DRIdrawablePrivate * dPriv, 962 int x, int y, int w, int h ); 963extern GLboolean r200MakeCurrent( __DRIcontextPrivate *driContextPriv, 964 __DRIdrawablePrivate *driDrawPriv, 965 __DRIdrawablePrivate *driReadPriv ); 966extern GLboolean r200UnbindContext( __DRIcontextPrivate *driContextPriv ); 967 968/* ================================================================ 969 * Debugging: 970 */ 971#define DO_DEBUG 1 972 973#if DO_DEBUG 974extern int R200_DEBUG; 975#else 976#define R200_DEBUG 0 977#endif 978 979#define DEBUG_TEXTURE 0x001 980#define DEBUG_STATE 0x002 981#define DEBUG_IOCTL 0x004 982#define DEBUG_PRIMS 0x008 983#define DEBUG_VERTS 0x010 984#define DEBUG_FALLBACKS 0x020 985#define DEBUG_VFMT 0x040 986#define DEBUG_CODEGEN 0x080 987#define DEBUG_VERBOSE 0x100 988#define DEBUG_DRI 0x200 989#define DEBUG_DMA 0x400 990#define DEBUG_SANITY 0x800 991#define DEBUG_SYNC 0x1000 992#define DEBUG_PIXEL 0x2000 993#define DEBUG_MEMORY 0x4000 994 995#endif /* __R200_CONTEXT_H__ */ 996