r200_state_init.c revision 294aab9b713f4646992cf72b19a492285a4bbcdb
1adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* 2adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellCopyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 3adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 4adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe Weather Channel (TM) funded Tungsten Graphics to develop the 5adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellinitial release of the Radeon 8500 driver under the XFree86 license. 6adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThis notice must be preserved. 7adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 8adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellPermission is hereby granted, free of charge, to any person obtaining 9adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwella copy of this software and associated documentation files (the 10adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell"Software"), to deal in the Software without restriction, including 11adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellwithout limitation the rights to use, copy, modify, merge, publish, 12adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwelldistribute, sublicense, and/or sell copies of the Software, and to 13adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellpermit persons to whom the Software is furnished to do so, subject to 14adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellthe following conditions: 15adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 16adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe above copyright notice and this permission notice (including the 17adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellnext paragraph) shall be included in all copies or substantial 18adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellportions of the Software. 19adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 20adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell*/ 28adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 29adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* 30adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Authors: 31adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Keith Whitwell <keith@tungstengraphics.com> 32adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 33adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 34ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/glheader.h" 35ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/imports.h" 36ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/enums.h" 37ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/colormac.h" 38ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/api_arrayelt.h" 39adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 40adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "swrast/swrast.h" 4180c88304fc9d09531b2530b74973821e47b46753Keith Whitwell#include "vbo/vbo.h" 42adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "tnl/tnl.h" 43adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "tnl/t_pipeline.h" 44adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "swrast_setup/swrast_setup.h" 45adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 468cb16e6daff40bbfd7b63a43da72862226a4a164Dave Airlie#include "radeon_common.h" 4761bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie#include "radeon_mipmap_tree.h" 48adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_context.h" 49adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_ioctl.h" 50adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_state.h" 51adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_tcl.h" 52adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_tex.h" 53adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_swtcl.h" 54adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 55273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane#include "xmlpool.h" 56273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane 57ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie/* New (1.3) state mechanism. 3 commands (packet, scalar, vector) in 58ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie * 1.3 cmdbuffers allow all previous state to be updated as well as 59ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie * the tcl scalar and vector areas. 60ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie */ 61ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airliestatic struct { 62ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie int start; 63ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie int len; 64ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie const char *name; 65ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} packet[RADEON_MAX_STATE_PACKETS] = { 66ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_MISC, 7, "RADEON_PP_MISC"}, 67ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CNTL, 3, "RADEON_PP_CNTL"}, 68ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RB3D_COLORPITCH, 1, "RADEON_RB3D_COLORPITCH"}, 69ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RE_LINE_PATTERN, 2, "RADEON_RE_LINE_PATTERN"}, 70ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_LINE_WIDTH, 1, "RADEON_SE_LINE_WIDTH"}, 71ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_LUM_MATRIX, 1, "RADEON_PP_LUM_MATRIX"}, 72ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_ROT_MATRIX_0, 2, "RADEON_PP_ROT_MATRIX_0"}, 73ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RB3D_STENCILREFMASK, 3, "RADEON_RB3D_STENCILREFMASK"}, 74ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_VPORT_XSCALE, 6, "RADEON_SE_VPORT_XSCALE"}, 75ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_CNTL, 2, "RADEON_SE_CNTL"}, 76ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_CNTL_STATUS, 1, "RADEON_SE_CNTL_STATUS"}, 77ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RE_MISC, 1, "RADEON_RE_MISC"}, 78ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_0, 6, "RADEON_PP_TXFILTER_0"}, 79ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_0, 1, "RADEON_PP_BORDER_COLOR_0"}, 80ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_1, 6, "RADEON_PP_TXFILTER_1"}, 81ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_1, 1, "RADEON_PP_BORDER_COLOR_1"}, 82ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_2, 6, "RADEON_PP_TXFILTER_2"}, 83ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_2, 1, "RADEON_PP_BORDER_COLOR_2"}, 84ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_ZBIAS_FACTOR, 2, "RADEON_SE_ZBIAS_FACTOR"}, 85ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_TCL_OUTPUT_VTX_FMT, 11, "RADEON_SE_TCL_OUTPUT_VTX_FMT"}, 86ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED, 17, 87ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED"}, 88ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0"}, 89ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1"}, 90ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2"}, 91ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3"}, 92ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4"}, 93ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5"}, 94ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6"}, 95ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7"}, 96ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0"}, 97ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0"}, 98ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0"}, 99ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL"}, 100ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0"}, 101ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2"}, 102ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL"}, 103ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0"}, 104ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1"}, 105ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2"}, 106ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3"}, 107ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4"}, 108ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5"}, 109ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0"}, 110ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1"}, 111ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2"}, 112ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3"}, 113ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4"}, 114ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5"}, 115ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL"}, 116ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, 117ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "R200_SE_TCL_OUTPUT_VTX_COMP_SEL"}, 118ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3"}, 119ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CNTL_X, 1, "R200_PP_CNTL_X"}, 120ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET"}, 121ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL"}, 122ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0"}, 123ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1"}, 124ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2"}, 125ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS"}, 126ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL"}, 127ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE"}, 128ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, 129ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0"}, 130ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0"}, /* 61 */ 131ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0"}, /* 62 */ 132ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1"}, 133ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1"}, 134ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2"}, 135ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2"}, 136ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3"}, 137ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3"}, 138ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4"}, 139ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4"}, 140ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5"}, 141ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5"}, 142ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0"}, 143ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1"}, 144ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2"}, 145ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR"}, 146ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_POINT_SPRITE_CNTL, 1, "R200_SE_TCL_POINT_SPRITE_CNTL"}, 147ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_0, 1, "RADEON_PP_CUBIC_FACES_0"}, 148ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T0_0, 5, "RADEON_PP_CUBIC_OFFSET_T0_0"}, 149ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"}, 150ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"}, 151ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"}, 152ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, 153ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"}, 154ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_8, 32, "R200_PP_AFS_0"}, /* 85 */ 155ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_0, 32, "R200_PP_AFS_1"}, 156ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TFACTOR_0, 8, "R200_ATF_TFACTOR"}, 157ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_0, 8, "R200_PP_TXCTLALL_0"}, 158ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_1, 8, "R200_PP_TXCTLALL_1"}, 159ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_2, 8, "R200_PP_TXCTLALL_2"}, 160ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"}, 161ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"}, 162ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"}, 163ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_VAP_PVS_CNTL_1, 2, "R200_VAP_PVS_CNTL"}, 164ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie}; 165ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 166adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* ============================================================= 167adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * State initialization 168adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 169adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 170adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellvoid r200PrintDirty( r200ContextPtr rmesa, const char *msg ) 171adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 172b6e486906968d82c7b8a869d7ab51697a7cce80cDave Airlie struct radeon_state_atom *l; 173adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 174adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell fprintf(stderr, msg); 175adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell fprintf(stderr, ": "); 176adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1771090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie foreach(l, &rmesa->radeon.hw.atomlist) { 1781090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie if (l->dirty || rmesa->radeon.hw.all_dirty) 1790c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt fprintf(stderr, "%s, ", l->name); 180adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 181adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 182adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell fprintf(stderr, "\n"); 183adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 184adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 185474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic int cmdpkt( r200ContextPtr rmesa, int id ) 186adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 187ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 188474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 189474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) { 190474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie return CP_PACKET0(packet[id].start, packet[id].len - 1); 191474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } else { 192474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = 0; 193474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.packet.cmd_type = RADEON_CMD_PACKET; 194474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.packet.packet_id = id; 195474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 196adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 197adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 198adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 199adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdvec( int offset, int stride, int count ) 200adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 201ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 202adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 203adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.cmd_type = RADEON_CMD_VECTORS; 204adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.offset = offset; 205adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.stride = stride; 206adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.count = count; 207adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 208adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 209adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 21098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger/* warning: the count here is divided by 4 compared to other cmds 21198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger (so it doesn't exceed the char size)! */ 21298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheideggerstatic int cmdveclinear( int offset, int count ) 21398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger{ 21498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger drm_radeon_cmd_header_t h; 21598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.i = 0; 21698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.cmd_type = RADEON_CMD_VECLINEAR; 21798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.addr_lo = offset & 0xff; 21898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.addr_hi = (offset & 0xff00) >> 8; 21998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.count = count; 22098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger return h.i; 22198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 22298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 223adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdscl( int offset, int stride, int count ) 224adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 225ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 226adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 227adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.cmd_type = RADEON_CMD_SCALARS; 228adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.offset = offset; 229adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.stride = stride; 230adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.count = count; 231adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 232adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 233adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 234adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdscl2( int offset, int stride, int count ) 235adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 236ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 237adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 238adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.cmd_type = RADEON_CMD_SCALARS2; 239adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.offset = offset - 0x100; 240adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.stride = stride; 241adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.count = count; 242adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 243adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 244adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 245adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define CHECK( NM, FLAG ) \ 2464637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom) \ 247adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ \ 24836603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 24936603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger (void) rmesa; \ 2500c0a55a21158e1f97cf140c0a1c0531c06751873Dave Airlie return (FLAG) ? atom->cmd_size : 0; \ 251adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 252adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 253adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define TCL_CHECK( NM, FLAG ) \ 2544637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom) \ 2554637235183b80963536f2364e4d50fcb894886ddDave Airlie{ \ 2564637235183b80963536f2364e4d50fcb894886ddDave Airlie r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2570c0a55a21158e1f97cf140c0a1c0531c06751873Dave Airlie return (!rmesa->radeon.TclFallback && !ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size : 0; \ 25898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 25998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 26098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define TCL_OR_VP_CHECK( NM, FLAG ) \ 2614637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom ) \ 26298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger{ \ 26398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2640c0a55a21158e1f97cf140c0a1c0531c06751873Dave Airlie return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size : 0; \ 265adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 266adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 26798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger#define VP_CHECK( NM, FLAG ) \ 2684637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom ) \ 2694637235183b80963536f2364e4d50fcb894886ddDave Airlie{ \ 2704637235183b80963536f2364e4d50fcb894886ddDave Airlie r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2714637235183b80963536f2364e4d50fcb894886ddDave Airlie (void) atom; \ 2720c0a55a21158e1f97cf140c0a1c0531c06751873Dave Airlie return (!rmesa->radeon.TclFallback && ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size : 0; \ 27398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 274adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 275adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellCHECK( always, GL_TRUE ) 276bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon SmirlCHECK( never, GL_FALSE ) 277adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellCHECK( tex_any, ctx->Texture._EnabledUnits ) 278f20917de5bd2b1fc152e74304d3649a1f6042422Roland ScheideggerCHECK( tf, (ctx->Texture._EnabledUnits && !ctx->ATIFragmentShader._Enabled) ); 2794637235183b80963536f2364e4d50fcb894886ddDave AirlieCHECK( tex_pair, (rmesa->state.texture.unit[atom->idx].unitneeded | rmesa->state.texture.unit[atom->idx & ~1].unitneeded) ) 2804637235183b80963536f2364e4d50fcb894886ddDave AirlieCHECK( tex, rmesa->state.texture.unit[atom->idx].unitneeded ) 281f20917de5bd2b1fc152e74304d3649a1f6042422Roland ScheideggerCHECK( pix_zero, !ctx->ATIFragmentShader._Enabled ) 2824637235183b80963536f2364e4d50fcb894886ddDave Airlie CHECK( texenv, (rmesa->state.envneeded & (1 << (atom->idx)) && !ctx->ATIFragmentShader._Enabled) ) 283f20917de5bd2b1fc152e74304d3649a1f6042422Roland ScheideggerCHECK( afs_pass1, (ctx->ATIFragmentShader._Enabled && (ctx->ATIFragmentShader.Current->NumPasses > 1)) ) 284f20917de5bd2b1fc152e74304d3649a1f6042422Roland ScheideggerCHECK( afs, ctx->ATIFragmentShader._Enabled ) 2854637235183b80963536f2364e4d50fcb894886ddDave AirlieCHECK( tex_cube, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT ) 286014bfda235e5315baf84b1d47329be167dd2ec7fRoland ScheideggerTCL_CHECK( tcl_fog, ctx->Fog.Enabled ) 287adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellTCL_CHECK( tcl, GL_TRUE ) 2884637235183b80963536f2364e4d50fcb894886ddDave AirlieTCL_CHECK( tcl_tex, rmesa->state.texture.unit[atom->idx].unitneeded ) 289adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellTCL_CHECK( tcl_lighting, ctx->Light.Enabled ) 2904637235183b80963536f2364e4d50fcb894886ddDave AirlieTCL_CHECK( tcl_light, ctx->Light.Enabled && ctx->Light.Light[atom->idx].Enabled ) 2914637235183b80963536f2364e4d50fcb894886ddDave AirlieTCL_OR_VP_CHECK( tcl_ucp, (ctx->Transform.ClipPlanesEnabled & (1 << (atom->idx))) ) 29298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland ScheideggerTCL_OR_VP_CHECK( tcl_or_vp, GL_TRUE ) 29398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland ScheideggerVP_CHECK( tcl_vp, GL_TRUE ) 29498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland ScheideggerVP_CHECK( tcl_vp_size, ctx->VertexProgram.Current->Base.NumNativeInstructions > 64 ) 29598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland ScheideggerVP_CHECK( tcl_vpp_size, ctx->VertexProgram.Current->Base.NumNativeParameters > 96 ) 296adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 297474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_VEC(hdr, data) do { \ 298474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 299474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 300474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_SE_TCL_STATE_FLUSH, 0)); \ 301474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); \ 302474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_VECTOR_INDX_REG, 0)); \ 303474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(h.vectors.offset | (h.vectors.stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); \ 304474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_VECTOR_DATA_REG, h.vectors.count - 1)); \ 305474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.vectors.count); \ 306474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 307474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 308474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_VECLINEAR(hdr, data) do { \ 309474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 310474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t _start = h.veclinear.addr_lo | (h.veclinear.addr_hi << 8); \ 311474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t _sz = h.veclinear.count * 4; \ 312474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 313474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_SE_TCL_STATE_FLUSH, 0)); \ 314474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); \ 315474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_VECTOR_INDX_REG, 0)); \ 316474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(_start | (1 << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); \ 317474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_VECTOR_DATA_REG, _sz - 1)); \ 318474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), _sz); \ 319474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 320474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 321474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_SCL(hdr, data) do { \ 322474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 323474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 324474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_SCALAR_INDX_REG, 0)); \ 325474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH((h.scalars.offset) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 326474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 327474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.scalars.count); \ 328474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 329474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 330474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_SCL2(hdr, data) do { \ 331474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 332474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 333474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_SCALAR_INDX_REG, 0)); \ 334474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH((h.scalars.offset + 0x100) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 335474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 336474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.scalars.count); \ 337474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 338474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 339474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void mtl_emit(GLcontext *ctx, struct radeon_state_atom *atom) 340474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 341474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 342474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 343474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t dwords = atom->cmd_size; 344474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 345294aab9b713f4646992cf72b19a492285a4bbcdbDave Airlie dwords += 6; 346474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 347474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[MTL_CMD_0], (atom->cmd+1)); 348474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_SCL2(atom->cmd[MTL_CMD_1], (atom->cmd + 18)); 349474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 350474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 351474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 352474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void lit_emit(GLcontext *ctx, struct radeon_state_atom *atom) 353474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 354474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 355474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 356474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t dwords = atom->cmd_size; 357474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 358294aab9b713f4646992cf72b19a492285a4bbcdbDave Airlie dwords += 8; 359474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 360474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[LIT_CMD_0], atom->cmd+1); 361474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[LIT_CMD_1], atom->cmd+LIT_CMD_1+1); 362474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 363474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 364474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 365474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void ptp_emit(GLcontext *ctx, struct radeon_state_atom *atom) 366474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 367474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 368474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 369474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t dwords = atom->cmd_size; 370474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 371294aab9b713f4646992cf72b19a492285a4bbcdbDave Airlie dwords += 8; 372474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 373474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[PTP_CMD_0], atom->cmd+1); 374474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[PTP_CMD_1], atom->cmd+PTP_CMD_1+1); 375474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 376474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 377474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 378474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void veclinear_emit(GLcontext *ctx, struct radeon_state_atom *atom) 379474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 380474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 381474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 382474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t dwords = atom->cmd_size; 383474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 384294aab9b713f4646992cf72b19a492285a4bbcdbDave Airlie dwords += 4; 385474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 386474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VECLINEAR(atom->cmd[0], atom->cmd+1); 387474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 388474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 389474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 390474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void scl_emit(GLcontext *ctx, struct radeon_state_atom *atom) 391474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 392474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 393474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 394474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t dwords = atom->cmd_size; 395474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 396294aab9b713f4646992cf72b19a492285a4bbcdbDave Airlie dwords += 2; 397474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 398474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_SCL(atom->cmd[0], atom->cmd+1); 399474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 400474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 401474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 402474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 403474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void vec_emit(GLcontext *ctx, struct radeon_state_atom *atom) 404474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 405474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 406474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 407474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t dwords = atom->cmd_size; 408474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 409294aab9b713f4646992cf72b19a492285a4bbcdbDave Airlie dwords += 4; 410474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 411474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[0], atom->cmd+1); 412474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 413474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 414adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 415d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airliestatic void ctx_emit(GLcontext *ctx, struct radeon_state_atom *atom) 416ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie{ 417ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 418ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie BATCH_LOCALS(&r200->radeon); 419ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie struct radeon_renderbuffer *rrb; 420ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie uint32_t cbpitch; 421e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie uint32_t zbpitch, depth_fmt; 422d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie uint32_t dwords = atom->cmd_size; 423d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 424d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie /* output the first 7 bytes of context */ 425ade3660942452985afa1bb67bbeab8fed734089dDave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords+2+2); 426d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_TABLE(atom->cmd, 5); 427d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 428e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rrb = radeon_get_depthbuffer(&r200->radeon); 429d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie if (!rrb) { 430474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); 431474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); 432d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } else { 433d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie zbpitch = (rrb->pitch / rrb->cpp); 434e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (r200->using_hyperz) 435e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie zbpitch |= RADEON_DEPTH_HYPERZ; 436d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 437d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(zbpitch); 438e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->cpp == 4) 439e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; 440e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 441e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; 442e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_DEPTH_FORMAT_MASK; 443e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] |= depth_fmt; 444d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } 445d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 446d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_ZSTENCILCNTL]); 447d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_CMD_1]); 448d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_PP_CNTL]); 449d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 450e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rrb = radeon_get_colorbuffer(&r200->radeon); 451ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie if (!rrb || !rrb->bo) { 452e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_CNTL]); 453d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_COLOROFFSET]); 454d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } else { 455e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10); 456e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->cpp == 4) 457e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; 458e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 459e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; 460e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 461e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_CNTL]); 462d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 463ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie } 464ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 465d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_CMD_2]); 466d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 467d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie if (!rrb || !rrb->bo) { 468d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_COLORPITCH]); 469d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } else { 470d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie cbpitch = (rrb->pitch / rrb->cpp); 471e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 472d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie cbpitch |= R200_COLOR_TILE_ENABLE; 473d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(cbpitch); 474d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } 475d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 476d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) 477d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_TABLE((atom->cmd + 14), 4); 478d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 479d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie END_BATCH(); 480474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 481474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 482474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void ctx_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) 483474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 484474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 485474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 486474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie struct radeon_renderbuffer *rrb, *drb; 487474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t cbpitch = 0; 488474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t zbpitch = 0; 489474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t dwords = atom->cmd_size; 490e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie uint32_t depth_fmt; 491474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 492e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rrb = radeon_get_colorbuffer(&r200->radeon); 493e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (!rrb || !rrb->bo) { 494e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie return; 495474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 496e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 497e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10); 498e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->cpp == 4) 499e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; 500e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 501e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; 502e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 503e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie cbpitch = (rrb->pitch / rrb->cpp); 504e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 505474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie cbpitch |= R200_COLOR_TILE_ENABLE; 506e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 507e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie drb = radeon_get_depthbuffer(&r200->radeon); 508e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (drb) { 509e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie zbpitch = (drb->pitch / drb->cpp); 510e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (drb->cpp == 4) 511e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; 512e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 513e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; 514e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_DEPTH_FORMAT_MASK; 515e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] |= depth_fmt; 516474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 517474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 518474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (drb) 519e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie dwords += 4; 520e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb) 521e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie dwords += 4; 522474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 523474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie /* output the first 7 bytes of context */ 524474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 525474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 526474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie /* In the CS case we need to split this up */ 527474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(packet[0].start, 3)); 528474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((atom->cmd + 1), 4); 529474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 530474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (drb) { 531474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_DEPTHOFFSET, 0)); 532474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 533474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 534474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_DEPTHPITCH, 0)); 535474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(zbpitch); 536474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 537474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 538474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZSTENCILCNTL, 0)); 539474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_ZSTENCILCNTL]); 540474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_PP_CNTL, 1)); 541474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_PP_CNTL]); 542474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_CNTL]); 543474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 544474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 545474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rrb) { 546474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLOROFFSET, 0)); 547474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 548474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 549474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 550474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rrb) { 551474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0)); 552474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(cbpitch); 553474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 554474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 555474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) { 556474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((atom->cmd + 14), 4); 557474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 558474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 559474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 560ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} 561ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 56261bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airliestatic void tex_emit(GLcontext *ctx, struct radeon_state_atom *atom) 563ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie{ 56461bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 56561bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie BATCH_LOCALS(&r200->radeon); 56661bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie uint32_t dwords = atom->cmd_size; 56761bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie int i = atom->idx; 56861bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie radeonTexObj *t = r200->state.texture.unit[i].texobj; 56961bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie 570695ca1e2be6f222c132a76299fc3a0ac9143d960Dave Airlie if (t && t->mt && !t->image_override) 571695ca1e2be6f222c132a76299fc3a0ac9143d960Dave Airlie dwords += 2; 57261bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 57361bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie OUT_BATCH_TABLE(atom->cmd, 10); 57461bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie if (t && !t->image_override) { 57561bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0, 57661bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie RADEON_GEM_DOMAIN_VRAM, 0, 0); 57761bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie } else if (!t) { 578695ca1e2be6f222c132a76299fc3a0ac9143d960Dave Airlie /* workaround for old CS mechanism */ 579695ca1e2be6f222c132a76299fc3a0ac9143d960Dave Airlie OUT_BATCH(r200->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]); 5802753dd42fd42a3383d2e74ab231d0b1373a2d46dDave Airlie } else if (t->image_override) 58162d504d818f1ab1836a134658b1661ceabb65f1fDave Airlie OUT_BATCH(t->override_offset); 582ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 58361bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie END_BATCH(); 584ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} 585ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 586674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airliestatic void cube_emit(GLcontext *ctx, struct radeon_state_atom *atom) 587674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie{ 588674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 589674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie BATCH_LOCALS(&r200->radeon); 590674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie uint32_t dwords = atom->cmd_size; 591674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie int i = atom->idx; 592674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie radeonTexObj *t = r200->state.texture.unit[i].texobj; 593674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie GLuint size; 594674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 595f8c2beccd4847836dec18849d2d58f3220ff81ebDave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords + (2 * 5)); 596674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie OUT_BATCH_TABLE(atom->cmd, 3); 597674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 598674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie if (t && !t->image_override) { 599674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie size = t->mt->totalsize / 6; 600674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie OUT_BATCH_RELOC(0, t->mt->bo, size, RADEON_GEM_DOMAIN_VRAM, 0, 0); 601674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie OUT_BATCH_RELOC(0, t->mt->bo, size * 2, RADEON_GEM_DOMAIN_VRAM, 0, 0); 602674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie OUT_BATCH_RELOC(0, t->mt->bo, size * 3, RADEON_GEM_DOMAIN_VRAM, 0, 0); 603674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie OUT_BATCH_RELOC(0, t->mt->bo, size * 4, RADEON_GEM_DOMAIN_VRAM, 0, 0); 604674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie OUT_BATCH_RELOC(0, t->mt->bo, size * 5, RADEON_GEM_DOMAIN_VRAM, 0, 0); 605674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie } 606674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie END_BATCH(); 607674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie} 608ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 609adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* Initialize the context's hardware state. 610adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 611adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellvoid r200InitState( r200ContextPtr rmesa ) 612adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 6134637235183b80963536f2364e4d50fcb894886ddDave Airlie GLcontext *ctx = rmesa->radeon.glCtx; 614e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie GLuint i; 615adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 616d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.clear = 0x00000000; 617adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 618adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell switch ( ctx->Visual.depthBits ) { 619adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell case 16: 620d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.clear = 0x0000ffff; 621d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffff; 622d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.stencil.clear = 0x00000000; 623adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell break; 624adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell case 24: 625d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.clear = 0x00ffffff; 626d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffffff; 627d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.stencil.clear = 0xffff0000; 628adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell break; 629adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell default: 630adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell fprintf( stderr, "Error: Unsupported depth %d... exiting\n", 631adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Visual.depthBits ); 632adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell exit( -1 ); 633adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 634adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 635adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Only have hw stencil when depth buffer is 24 bits deep */ 636d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.stencil.hwBuffer = ( ctx->Visual.stencilBits > 0 && 637adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Visual.depthBits == 24 ); 638adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 6394637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.Fallback = 0; 640adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 6411090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rmesa->radeon.hw.max_state_size = 0; 642adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 643adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define ALLOC_STATE( ATOM, CHK, SZ, NM, IDX ) \ 644adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell do { \ 645adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.cmd_size = SZ; \ 6464637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 6474637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 648adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.name = NM; \ 649adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.idx = IDX; \ 6500c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt rmesa->hw.ATOM.check = check_##CHK; \ 6510c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt rmesa->hw.ATOM.dirty = GL_FALSE; \ 6521090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rmesa->radeon.hw.max_state_size += SZ * sizeof(int); \ 653adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } while (0) 654f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 655f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 656adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Allocate state buffers: 657adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 6584637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) 659033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger ALLOC_STATE( ctx, always, CTX_STATE_SIZE_NEWDRM, "CTX/context", 0 ); 660033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger else 661033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger ALLOC_STATE( ctx, always, CTX_STATE_SIZE_OLDDRM, "CTX/context", 0 ); 662ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 663474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) 664474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.emit = ctx_emit_cs; 665474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie else 666474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.emit = ctx_emit; 667adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( set, always, SET_STATE_SIZE, "SET/setup", 0 ); 668adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lin, always, LIN_STATE_SIZE, "LIN/line", 0 ); 669adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msk, always, MSK_STATE_SIZE, "MSK/mask", 0 ); 670adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); 671adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vtx, always, VTX_STATE_SIZE, "VTX/vertex", 0 ); 672adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vap, always, VAP_STATE_SIZE, "VAP/vap", 0 ); 673adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vte, always, VTE_STATE_SIZE, "VTE/vte", 0 ); 674adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msc, always, MSC_STATE_SIZE, "MSC/misc", 0 ); 675adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( cst, always, CST_STATE_SIZE, "CST/constant", 0 ); 676adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( zbs, always, ZBS_STATE_SIZE, "ZBS/zbias", 0 ); 677f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tf, tf, TF_STATE_SIZE, "TF/tfactor", 0 ); 6784637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsFragShader) { 6794637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) { 680f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger /* make sure texture units 0/1 are emitted pair-wise for r200 t0 hang workaround */ 681f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[0], tex_pair, TEX_STATE_SIZE_NEWDRM, "TEX/tex-0", 0 ); 682f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[1], tex_pair, TEX_STATE_SIZE_NEWDRM, "TEX/tex-1", 1 ); 683f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tam, tex_any, TAM_STATE_SIZE, "TAM/tam", 0 ); 684f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 685f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger else { 686f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[0], tex, TEX_STATE_SIZE_NEWDRM, "TEX/tex-0", 0 ); 687f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[1], tex, TEX_STATE_SIZE_NEWDRM, "TEX/tex-1", 1 ); 688f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tam, never, TAM_STATE_SIZE, "TAM/tam", 0 ); 689f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 690f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[2], tex, TEX_STATE_SIZE_NEWDRM, "TEX/tex-2", 2 ); 691f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[3], tex, TEX_STATE_SIZE_NEWDRM, "TEX/tex-3", 3 ); 692f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[4], tex, TEX_STATE_SIZE_NEWDRM, "TEX/tex-4", 4 ); 693f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[5], tex, TEX_STATE_SIZE_NEWDRM, "TEX/tex-5", 5 ); 694f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( atf, afs, ATF_STATE_SIZE, "ATF/tfactor", 0 ); 695f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( afs[0], afs_pass1, AFS_STATE_SIZE, "AFS/afsinst-0", 0 ); 696f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( afs[1], afs, AFS_STATE_SIZE, "AFS/afsinst-1", 1 ); 69748ccaf200940613032dfaaafe71382947f398004Roland Scheidegger } 69848ccaf200940613032dfaaafe71382947f398004Roland Scheidegger else { 6994637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) { 700f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[0], tex_pair, TEX_STATE_SIZE_OLDDRM, "TEX/tex-0", 0 ); 701f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[1], tex_pair, TEX_STATE_SIZE_OLDDRM, "TEX/tex-1", 1 ); 702f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tam, tex_any, TAM_STATE_SIZE, "TAM/tam", 0 ); 703f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 704f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger else { 705f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[0], tex, TEX_STATE_SIZE_OLDDRM, "TEX/tex-0", 0 ); 706f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[1], tex, TEX_STATE_SIZE_OLDDRM, "TEX/tex-1", 1 ); 707f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tam, never, TAM_STATE_SIZE, "TAM/tam", 0 ); 708f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 709f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[2], tex, TEX_STATE_SIZE_OLDDRM, "TEX/tex-2", 2 ); 710f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[3], tex, TEX_STATE_SIZE_OLDDRM, "TEX/tex-3", 3 ); 711f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[4], tex, TEX_STATE_SIZE_OLDDRM, "TEX/tex-4", 4 ); 712f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tex[5], tex, TEX_STATE_SIZE_OLDDRM, "TEX/tex-5", 5 ); 713f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( atf, never, ATF_STATE_SIZE, "TF/tfactor", 0 ); 714f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( afs[0], never, AFS_STATE_SIZE, "AFS/afsinst-0", 0 ); 715f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( afs[1], never, AFS_STATE_SIZE, "AFS/afsinst-1", 1 ); 71648ccaf200940613032dfaaafe71382947f398004Roland Scheidegger } 71761bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie 71861bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie for (i = 0; i < 5; i++) 71961bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie rmesa->hw.tex[i].emit = tex_emit; 7204637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200) { 72148ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[0], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-0", 0 ); 72248ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[1], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-1", 1 ); 72348ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[2], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-2", 2 ); 72448ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[3], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-3", 3 ); 72548ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[4], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-4", 4 ); 72648ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[5], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-5", 5 ); 727674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie for (i = 0; i < 5; i++) 728674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie rmesa->hw.cube[i].emit = cube_emit; 729bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl } 730bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl else { 731bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl ALLOC_STATE( cube[0], never, CUBE_STATE_SIZE, "CUBE/tex-0", 0 ); 732bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl ALLOC_STATE( cube[1], never, CUBE_STATE_SIZE, "CUBE/tex-1", 1 ); 73348ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[2], never, CUBE_STATE_SIZE, "CUBE/tex-2", 2 ); 73448ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[3], never, CUBE_STATE_SIZE, "CUBE/tex-3", 3 ); 73548ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[4], never, CUBE_STATE_SIZE, "CUBE/tex-4", 4 ); 73648ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[5], never, CUBE_STATE_SIZE, "CUBE/tex-5", 5 ); 737bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl } 738674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 7394637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsVertexProgram) { 74098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( pvs, tcl_vp, PVS_STATE_SIZE, "PVS/pvscntl", 0 ); 74198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpi[0], tcl_vp, VPI_STATE_SIZE, "VP/vertexprog-0", 0 ); 74298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpi[1], tcl_vp_size, VPI_STATE_SIZE, "VP/vertexprog-1", 1 ); 74398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpp[0], tcl_vp, VPP_STATE_SIZE, "VPP/vertexparam-0", 0 ); 74498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpp[1], tcl_vpp_size, VPP_STATE_SIZE, "VPP/vertexparam-1", 1 ); 74598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger } 74698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger else { 74798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( pvs, never, PVS_STATE_SIZE, "PVS/pvscntl", 0 ); 74898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpi[0], never, VPI_STATE_SIZE, "VP/vertexprog-0", 0 ); 74998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpi[1], never, VPI_STATE_SIZE, "VP/vertexprog-1", 1 ); 75098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpp[0], never, VPP_STATE_SIZE, "VPP/vertexparam-0", 0 ); 75198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpp[1], never, VPP_STATE_SIZE, "VPP/vertexparam-1", 1 ); 75298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger } 75398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger /* FIXME: this atom has two commands, we need only one (ucp_vert_blend) for vp */ 75498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( tcl, tcl_or_vp, TCL_STATE_SIZE, "TCL/tcl", 0 ); 755adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msl, tcl, MSL_STATE_SIZE, "MSL/matrix-select", 0 ); 756adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( tcg, tcl, TCG_STATE_SIZE, "TCG/texcoordgen", 0 ); 757adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( mtl[0], tcl_lighting, MTL_STATE_SIZE, "MTL0/material0", 0 ); 758a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger ALLOC_STATE( mtl[1], tcl_lighting, MTL_STATE_SIZE, "MTL1/material1", 1 ); 75998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( grd, tcl_or_vp, GRD_STATE_SIZE, "GRD/guard-band", 0 ); 760014bfda235e5315baf84b1d47329be167dd2ec7fRoland Scheidegger ALLOC_STATE( fog, tcl_fog, FOG_STATE_SIZE, "FOG/fog", 0 ); 761adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( glt, tcl_lighting, GLT_STATE_SIZE, "GLT/light-global", 0 ); 762adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( eye, tcl_lighting, EYE_STATE_SIZE, "EYE/eye-vector", 0 ); 763adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( mat[R200_MTX_MV], tcl, MAT_STATE_SIZE, "MAT/modelview", 0 ); 764adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( mat[R200_MTX_IMV], tcl, MAT_STATE_SIZE, "MAT/it-modelview", 0 ); 765adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( mat[R200_MTX_MVP], tcl, MAT_STATE_SIZE, "MAT/modelproject", 0 ); 766adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( mat[R200_MTX_TEX0], tcl_tex, MAT_STATE_SIZE, "MAT/texmat0", 0 ); 767adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( mat[R200_MTX_TEX1], tcl_tex, MAT_STATE_SIZE, "MAT/texmat1", 1 ); 76848ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( mat[R200_MTX_TEX2], tcl_tex, MAT_STATE_SIZE, "MAT/texmat2", 2 ); 76948ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( mat[R200_MTX_TEX3], tcl_tex, MAT_STATE_SIZE, "MAT/texmat3", 3 ); 77048ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( mat[R200_MTX_TEX4], tcl_tex, MAT_STATE_SIZE, "MAT/texmat4", 4 ); 77148ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( mat[R200_MTX_TEX5], tcl_tex, MAT_STATE_SIZE, "MAT/texmat5", 5 ); 772adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( ucp[0], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-0", 0 ); 773adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( ucp[1], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-1", 1 ); 774adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( ucp[2], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-2", 2 ); 775adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( ucp[3], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-3", 3 ); 776adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( ucp[4], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-4", 4 ); 777adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( ucp[5], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-5", 5 ); 778adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[0], tcl_light, LIT_STATE_SIZE, "LIT/light-0", 0 ); 779adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[1], tcl_light, LIT_STATE_SIZE, "LIT/light-1", 1 ); 780adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[2], tcl_light, LIT_STATE_SIZE, "LIT/light-2", 2 ); 781adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[3], tcl_light, LIT_STATE_SIZE, "LIT/light-3", 3 ); 782adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[4], tcl_light, LIT_STATE_SIZE, "LIT/light-4", 4 ); 783adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[5], tcl_light, LIT_STATE_SIZE, "LIT/light-5", 5 ); 784adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[6], tcl_light, LIT_STATE_SIZE, "LIT/light-6", 6 ); 785adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lit[7], tcl_light, LIT_STATE_SIZE, "LIT/light-7", 7 ); 786f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( pix[0], pix_zero, PIX_STATE_SIZE, "PIX/pixstage-0", 0 ); 78736603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[1], texenv, PIX_STATE_SIZE, "PIX/pixstage-1", 1 ); 78836603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[2], texenv, PIX_STATE_SIZE, "PIX/pixstage-2", 2 ); 78936603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[3], texenv, PIX_STATE_SIZE, "PIX/pixstage-3", 3 ); 79036603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[4], texenv, PIX_STATE_SIZE, "PIX/pixstage-4", 4 ); 79136603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[5], texenv, PIX_STATE_SIZE, "PIX/pixstage-5", 5 ); 7924637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsTriPerf) { 793fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger ALLOC_STATE( prf, always, PRF_STATE_SIZE, "PRF/performance-tri", 0 ); 794fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger } 795fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger else { 796fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger ALLOC_STATE( prf, never, PRF_STATE_SIZE, "PRF/performance-tri", 0 ); 797fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger } 7984637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsPointSprites) { 79944dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger ALLOC_STATE( spr, always, SPR_STATE_SIZE, "SPR/pointsprite", 0 ); 800cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger ALLOC_STATE( ptp, tcl, PTP_STATE_SIZE, "PTP/pointparams", 0 ); 801cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger } 802cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger else { 80344dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger ALLOC_STATE (spr, never, SPR_STATE_SIZE, "SPR/pointsprite", 0 ); 804cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger ALLOC_STATE (ptp, never, PTP_STATE_SIZE, "PTP/pointparams", 0 ); 805cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger } 806adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 8070c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt r200SetUpAtomList( rmesa ); 808adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 809adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Fill in the packet headers: 810adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 811474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_MISC); 812474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CNTL); 813474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_2] = cmdpkt(rmesa, RADEON_EMIT_RB3D_COLORPITCH); 8144637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) 815474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_3] = cmdpkt(rmesa, R200_EMIT_RB3D_BLENDCOLOR); 816474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lin.cmd[LIN_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RE_LINE_PATTERN); 817474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lin.cmd[LIN_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_SE_LINE_WIDTH); 818474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msk.cmd[MSK_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RB3D_STENCILREFMASK); 819474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); 820474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.set.cmd[SET_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_CNTL); 821474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msc.cmd[MSC_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RE_MISC); 822474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CNTL_X); 823474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_1] = cmdpkt(rmesa, R200_EMIT_RB3D_DEPTHXY_OFFSET); 824474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_2] = cmdpkt(rmesa, R200_EMIT_RE_AUX_SCISSOR_CNTL); 825474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_3] = cmdpkt(rmesa, R200_EMIT_RE_SCISSOR_TL_0); 826474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_4] = cmdpkt(rmesa, R200_EMIT_SE_VAP_CNTL_STATUS); 827474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_5] = cmdpkt(rmesa, R200_EMIT_RE_POINTSIZE); 828474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_6] = cmdpkt(rmesa, R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0); 829474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tam.cmd[TAM_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TAM_DEBUG3); 830474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tf.cmd[TF_CMD_0] = cmdpkt(rmesa, R200_EMIT_TFACTOR_0); 8314637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsFragShader) { 832474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.atf.cmd[ATF_CMD_0] = cmdpkt(rmesa, R200_EMIT_ATF_TFACTOR); 833474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_0); 834474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_0); 835474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_1); 836474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_1); 837474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_2); 838474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_2); 839474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_3); 840474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_3); 841474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_4); 842474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_4); 843474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_5); 844474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_5); 845f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } else { 846474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_0); 847474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_0); 848474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_1); 849474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_1); 850474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_2); 851474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_2); 852474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_3); 853474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_3); 854474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_4); 855474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_4); 856474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_5); 857474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_5); 858474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 859474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.afs[0].cmd[AFS_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_AFS_0); 860474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.afs[1].cmd[AFS_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_AFS_1); 861474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pvs.cmd[PVS_CMD_0] = cmdpkt(rmesa, R200_EMIT_VAP_PVS_CNTL); 862474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[0].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_0); 863474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_0); 864474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[1].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_1); 865474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_1); 866474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[2].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_2); 867474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_2); 868474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[3].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_3); 869474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[3].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_3); 870474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[4].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_4); 871474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[4].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_4); 872474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[5].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_5); 873474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[5].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_5); 874474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[0].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_0); 875474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[1].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_1); 876474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[2].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_2); 877474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[3].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_3); 878474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[4].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_4); 879474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[5].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_5); 880474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.zbs.cmd[ZBS_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_ZBIAS_FACTOR); 881474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcl.cmd[TCL_CMD_0] = cmdpkt(rmesa, R200_EMIT_TCL_LIGHT_MODEL_CTL_0); 882474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcl.cmd[TCL_CMD_1] = cmdpkt(rmesa, R200_EMIT_TCL_UCP_VERT_BLEND_CTL); 883474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcg.cmd[TCG_CMD_0] = cmdpkt(rmesa, R200_EMIT_TEX_PROC_CTL_2); 884474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msl.cmd[MSL_CMD_0] = cmdpkt(rmesa, R200_EMIT_MATRIX_SELECT_0); 885474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vap.cmd[VAP_CMD_0] = cmdpkt(rmesa, R200_EMIT_VAP_CTL); 886474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_0] = cmdpkt(rmesa, R200_EMIT_VTX_FMT_0); 887474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_1] = cmdpkt(rmesa, R200_EMIT_OUTPUT_VTX_COMP_SEL); 888474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_2] = cmdpkt(rmesa, R200_EMIT_SE_VTX_STATE_CNTL); 889474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vte.cmd[VTE_CMD_0] = cmdpkt(rmesa, R200_EMIT_VTE_CNTL); 890474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.prf.cmd[PRF_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TRI_PERF_CNTL); 891474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.spr.cmd[SPR_CMD_0] = cmdpkt(rmesa, R200_EMIT_TCL_POINT_SPRITE_CNTL); 892474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) { 893474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.mtl[0].emit = mtl_emit; 894474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.mtl[1].emit = mtl_emit; 895474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 896474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vpi[0].emit = veclinear_emit; 897474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vpi[1].emit = veclinear_emit; 898474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vpp[0].emit = veclinear_emit; 899474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vpp[1].emit = veclinear_emit; 900474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 901474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.grd.emit = scl_emit; 902474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.fog.emit = vec_emit; 903474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.glt.emit = vec_emit; 904474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.eye.emit = vec_emit; 905474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 906474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie for (i = R200_MTX_MV; i <= R200_MTX_TEX5; i++) 907474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.mat[i].emit = vec_emit; 908474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 909474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie for (i = 0; i < 8; i++) 910474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lit[i].emit = lit_emit; 911474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 912474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie for (i = 0; i < 6; i++) 913474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ucp[i].emit = vec_emit; 914474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 915474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ptp.emit = ptp_emit; 916f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 917474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 918474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 919474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 920adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mtl[0].cmd[MTL_CMD_0] = 921adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MAT_0_EMISS, 1, 16 ); 922adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mtl[0].cmd[MTL_CMD_1] = 923adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl2( R200_SS_MAT_0_SHININESS, 1, 1 ); 924a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger rmesa->hw.mtl[1].cmd[MTL_CMD_0] = 925a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger cmdvec( R200_VS_MAT_1_EMISS, 1, 16 ); 926a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger rmesa->hw.mtl[1].cmd[MTL_CMD_1] = 927a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger cmdscl2( R200_SS_MAT_1_SHININESS, 1, 1 ); 928a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger 92998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpi[0].cmd[VPI_CMD_0] = 93098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PROG0, 64 ); 93198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpi[1].cmd[VPI_CMD_0] = 93298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PROG1, 64 ); 93398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpp[0].cmd[VPP_CMD_0] = 93498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PARAM0, 96 ); 93598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpp[1].cmd[VPP_CMD_0] = 93698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PARAM1, 96 ); 93798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 938adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_CMD_0] = 939adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl( R200_SS_VERT_GUARD_CLIP_ADJ_ADDR, 1, 4 ); 940adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.fog.cmd[FOG_CMD_0] = 941adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_FOG_PARAM_ADDR, 1, 4 ); 942adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.glt.cmd[GLT_CMD_0] = 943adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_GLOBAL_AMBIENT_ADDR, 1, 4 ); 944adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_CMD_0] = 945adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_EYE_VECTOR_ADDR, 1, 4 ); 946adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 947adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_MV].cmd[MAT_CMD_0] = 948adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_0_MV, 1, 16); 949adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_IMV].cmd[MAT_CMD_0] = 950adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_1_INV_MV, 1, 16); 951adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_MVP].cmd[MAT_CMD_0] = 952adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_2_MVP, 1, 16); 953adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_TEX0].cmd[MAT_CMD_0] = 954adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_3_TEX0, 1, 16); 955adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_TEX1].cmd[MAT_CMD_0] = 956adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_4_TEX1, 1, 16); 95748ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX2].cmd[MAT_CMD_0] = 95848ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_5_TEX2, 1, 16); 95948ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX3].cmd[MAT_CMD_0] = 96048ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_6_TEX3, 1, 16); 96148ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX4].cmd[MAT_CMD_0] = 96248ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_7_TEX4, 1, 16); 96348ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX5].cmd[MAT_CMD_0] = 96448ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_8_TEX5, 1, 16); 965adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 966adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 8; i++) { 967adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lit[i].cmd[LIT_CMD_0] = 968adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_LIGHT_AMBIENT_ADDR + i, 8, 24 ); 969adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lit[i].cmd[LIT_CMD_1] = 970adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl( R200_SS_LIGHT_DCD_ADDR + i, 8, 7 ); 971adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 972adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 973adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 6; i++) { 974adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ucp[i].cmd[UCP_CMD_0] = 975adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_UCP_ADDR + i, 1, 4 ); 976adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 977adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 978cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CMD_0] = 979cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger cmdvec( R200_VS_PNT_SPRITE_VPORT_SCALE, 1, 4 ); 980cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CMD_1] = 981cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger cmdvec( R200_VS_PNT_SPRITE_ATT_CONST, 1, 12 ); 982cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger 983adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Initial Harware state: 984adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 985adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_MISC] = (R200_ALPHA_TEST_PASS 986adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* | R200_RIGHT_HAND_CUBE_OGL*/); 987adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 988adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] = (R200_FOG_VERTEX | 989adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FOG_USE_SPEC_ALPHA); 990adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 991adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RE_SOLID_COLOR] = 0x00000000; 992adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 993adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 994033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 995033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 996033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger 9974637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) { 998033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = 0x00000000; 999033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 1000033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 1001033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 1002033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_CBLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 1003033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 1004033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 1005033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger } 1006adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1007adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHOFFSET] = 10084637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->depthOffset + rmesa->radeon.radeonScreen->fbLocation; 1009adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1010adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] = 10114637235183b80963536f2364e4d50fcb894886ddDave Airlie ((rmesa->radeon.radeonScreen->depthPitch & 1012adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DEPTHPITCH_MASK) | 1013adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DEPTH_ENDIAN_NO_SWAP); 1014b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger 1015b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger if (rmesa->using_hyperz) 1016b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] |= R200_DEPTH_HYPERZ; 1017adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1018e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] = (R200_Z_TEST_LESS | 1019adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_TEST_ALWAYS | 1020adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_FAIL_KEEP | 1021adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_ZPASS_KEEP | 1022adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_ZFAIL_KEEP | 1023adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_Z_WRITE_ENABLE); 1024adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1025b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger if (rmesa->using_hyperz) { 1026b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= R200_Z_COMPRESSION_ENABLE | 1027b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger R200_Z_DECOMPRESSION_ENABLE; 10284637235183b80963536f2364e4d50fcb894886ddDave Airlie/* if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) 1029b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_HIERARCHY_ENABLE;*/ 1030b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger } 1031b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger 1032adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_CNTL] = (R200_ANTI_ALIAS_NONE 1033adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell | R200_TEX_BLEND_0_ENABLE); 1034adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 10354637235183b80963536f2364e4d50fcb894886ddDave Airlie switch ( driQueryOptioni( &rmesa->radeon.optionCache, "dither_mode" ) ) { 1036273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane case DRI_CONF_DITHER_XERRORDIFFRESET: 1037273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_INIT; 1038273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane break; 1039273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane case DRI_CONF_DITHER_ORDERED: 1040273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_SCALE_DITHER_ENABLE; 1041273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane break; 1042273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane } 10434637235183b80963536f2364e4d50fcb894886ddDave Airlie if ( driQueryOptioni( &rmesa->radeon.optionCache, "round_mode" ) == 1044273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane DRI_CONF_ROUND_ROUND ) 1045d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.roundEnable = R200_ROUND_ENABLE; 1046273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane else 1047d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.roundEnable = 0; 10484637235183b80963536f2364e4d50fcb894886ddDave Airlie if ( driQueryOptioni (&rmesa->radeon.optionCache, "color_reduction" ) == 1049273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane DRI_CONF_COLOR_REDUCTION_DITHER ) 1050273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_ENABLE; 1051273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane else 1052d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->radeon.state.color.roundEnable; 1053273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane 1054fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger rmesa->hw.prf.cmd[PRF_PP_TRI_PERF] = R200_TRI_CUTOFF_MASK - R200_TRI_CUTOFF_MASK * 10554637235183b80963536f2364e4d50fcb894886ddDave Airlie driQueryOptionf (&rmesa->radeon.optionCache,"texture_blend_quality"); 1056fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger rmesa->hw.prf.cmd[PRF_PP_PERF_CNTL] = 0; 1057fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger 1058adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.set.cmd[SET_SE_CNTL] = (R200_FFACE_CULL_CCW | 1059adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_BFACE_SOLID | 1060adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FFACE_SOLID | 1061adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FLAT_SHADE_VTX_LAST | 1062adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DIFFUSE_SHADE_GOURAUD | 1063adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ALPHA_SHADE_GOURAUD | 1064adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_SPECULAR_SHADE_GOURAUD | 1065adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FOG_SHADE_GOURAUD | 1066cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger R200_DISC_FOG_SHADE_GOURAUD | 1067adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_PIX_CENTER_OGL | 1068adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ROUND_MODE_TRUNC | 1069adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ROUND_PREC_8TH_PIX); 1070adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1071adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.set.cmd[SET_RE_CNTL] = (R200_PERSPECTIVE_ENABLE | 1072adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_SCISSOR_ENABLE); 1073adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1074adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] = ((1 << 16) | 0xffff); 1075adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1076adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_RE_LINE_STATE] = 1077adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_LINE_CURRENT_PTR_SHIFT) | 1078adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_LINE_CURRENT_COUNT_SHIFT)); 1079adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1080adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_SE_LINE_WIDTH] = (1 << 4); 1081adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1082adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] = 1083adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0x00 << R200_STENCIL_REF_SHIFT) | 1084adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0xff << R200_STENCIL_MASK_SHIFT) | 1085adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0xff << R200_STENCIL_WRITEMASK_SHIFT)); 1086adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1087adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = R200_ROP_COPY; 1088adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK] = 0xffffffff; 1089adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1090adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tam.cmd[TAM_DEBUG3] = 0; 1091adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1092adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msc.cmd[MSC_RE_MISC] = 1093adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_STIPPLE_X_OFFSET_SHIFT) | 1094adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0 << R200_STIPPLE_Y_OFFSET_SHIFT) | 1095adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STIPPLE_BIG_BIT_ORDER); 1096adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1097adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1098adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0; 1099adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RB3D_DEPTHXY_OFFSET] = 0; 1100adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_AUX_SCISSOR_CNTL] = 0x0; 1101adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_SCISSOR_TL_0] = 0; 1102adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_SCISSOR_BR_0] = 0; 1103adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] = 1104adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#ifdef MESA_BIG_ENDIAN 1105adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VC_32BIT_SWAP; 1106adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#else 1107adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VC_NO_SWAP; 1108adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#endif 110910095c9024efb1767fb3df0b59672299c090ad10Eric Anholt 11104637235183b80963536f2364e4d50fcb894886ddDave Airlie if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) { 111110095c9024efb1767fb3df0b59672299c090ad10Eric Anholt /* Bypass TCL */ 111210095c9024efb1767fb3df0b59672299c090ad10Eric Anholt rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] |= (1<<8); 111310095c9024efb1767fb3df0b59672299c090ad10Eric Anholt } 111410095c9024efb1767fb3df0b59672299c090ad10Eric Anholt 111544dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger rmesa->hw.cst.cmd[CST_RE_POINTSIZE] = 111644dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger (((GLuint)(ctx->Const.MaxPointSize * 16.0)) << R200_MAXPOINTSIZE_SHIFT) | 0x10; 1117adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_0] = 1118adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0 << R200_VERTEX_POSITION_ADDR__SHIFT); 1119adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_1] = 1120adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x02 << R200_VTX_COLOR_0_ADDR__SHIFT) | 1121adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x03 << R200_VTX_COLOR_1_ADDR__SHIFT); 1122adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_2] = 1123adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x06 << R200_VTX_TEX_0_ADDR__SHIFT) | 1124adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x07 << R200_VTX_TEX_1_ADDR__SHIFT) | 1125adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x08 << R200_VTX_TEX_2_ADDR__SHIFT) | 1126adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x09 << R200_VTX_TEX_3_ADDR__SHIFT); 1127adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_3] = 1128adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0A << R200_VTX_TEX_4_ADDR__SHIFT) | 1129adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0B << R200_VTX_TEX_5_ADDR__SHIFT); 1130adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1131adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1132adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; 1133adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; 1134adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; 1135adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; 1136adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; 1137adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000; 1138adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1139adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for ( i = 0 ; i < ctx->Const.MaxTextureUnits ; i++ ) { 1140adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFILTER] = R200_BORDER_MODE_OGL; 1141adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT] = 1142adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((i << R200_TXFORMAT_ST_ROUTE_SHIFT) | /* <-- note i */ 1143adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TXFORMAT_WIDTH_SHIFT) | 1144adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TXFORMAT_HEIGHT_SHIFT)); 1145adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0; 1146adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] = 1147adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (/* R200_TEXCOORD_PROJ | */ 1148adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 0x100000); /* Small default bias */ 11494637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsFragShader) { 1150f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_NEWDRM] = 11514637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1152f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_CUBIC_FACES] = 0; 1153f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_TXMULTI_CTL] = 0; 1154f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 1155f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger else { 1156f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_OLDDRM] = 11574637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1158f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 1159adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1160adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0; 1161067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F1] = 11624637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1163067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F2] = 11644637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1165067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F3] = 11664637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1167067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F4] = 11684637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1169067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F5] = 11704637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1171adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 11721bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND] = 11731bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger (R200_TXC_ARG_A_ZERO | 11741bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_ARG_B_ZERO | 11751bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_ARG_C_DIFFUSE_COLOR | 11761bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_OP_MADD); 11771bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 11781bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND2] = 11791bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger ((i << R200_TXC_TFACTOR_SEL_SHIFT) | 11801bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_SCALE_1X | 11811bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_CLAMP_0_1 | 11821bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_OUTPUT_REG_R0); 11831bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 11841bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXABLEND] = 11851bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger (R200_TXA_ARG_A_ZERO | 11861bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_ARG_B_ZERO | 11871bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_ARG_C_DIFFUSE_ALPHA | 11881bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_OP_MADD); 11891bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 11901bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXABLEND2] = 11911bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger ((i << R200_TXA_TFACTOR_SEL_SHIFT) | 11921bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_SCALE_1X | 11931bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_CLAMP_0_1 | 11941bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_OUTPUT_REG_R0); 11951bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger } 1196adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1197adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_0] = 0; 1198adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_1] = 0; 1199adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_2] = 0; 1200adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_3] = 0; 1201adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_4] = 0; 1202adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_5] = 0; 1203adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1204adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] = 1205adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VAP_TCL_ENABLE | 1206adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x9 << R200_VAP_VF_MAX_VTX_NUM__SHIFT)); 1207adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1208adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] = 1209adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VPORT_X_SCALE_ENA | 1210adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Y_SCALE_ENA | 1211adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Z_SCALE_ENA | 1212adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_X_OFFSET_ENA | 1213adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Y_OFFSET_ENA | 1214adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Z_OFFSET_ENA | 1215adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* FIXME: Turn on for tex rect only */ 1216adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_ST_DENORMALIZED | 1217adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_W0_FMT); 1218adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1219adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1220adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_VTXFMT_0] = 0; 1221adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_VTXFMT_1] = 0; 1222adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_0] = 1223adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_VTX_Z0 | R200_VTX_W0 | 1224adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VTX_FP_RGBA << R200_VTX_COLOR_0_SHIFT))); 1225adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] = 0; 1226adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] = (R200_OUTPUT_XYZW); 1227adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_STATE_CNTL] = R200_VSC_UPDATE_USER_COLOR_0_ENABLE; 1228adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1229adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1230adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Matrix selection */ 1231adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_0] = 1232adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_MV << R200_MODELVIEW_0_SHIFT); 1233adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1234adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_1] = 1235adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_IMV << R200_IT_MODELVIEW_0_SHIFT); 1236adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1237adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_2] = 1238adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_MVP << R200_MODELPROJECT_0_SHIFT); 1239adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1240adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_3] = 1241adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_MTX_TEX0 << R200_TEXMAT_0_SHIFT) | 1242adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX1 << R200_TEXMAT_1_SHIFT) | 1243adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX2 << R200_TEXMAT_2_SHIFT) | 1244adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX3 << R200_TEXMAT_3_SHIFT)); 1245adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1246adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_4] = 1247adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_MTX_TEX4 << R200_TEXMAT_4_SHIFT) | 1248adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX5 << R200_TEXMAT_5_SHIFT)); 1249adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1250adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1251adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* General TCL state */ 1252adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0] = 1253adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_SPECULAR_LIGHTS | 1254adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DIFFUSE_SPECULAR_COMBINE | 1255a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LOCAL_LIGHT_VEC_GL | 1256a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LM0_SOURCE_MATERIAL_0 << R200_FRONT_SHININESS_SOURCE_SHIFT | 1257a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LM0_SOURCE_MATERIAL_1 << R200_BACK_SHININESS_SOURCE_SHIFT); 1258adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1259adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_1] = 1260a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger ((R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_EMISSIVE_SOURCE_SHIFT) | 1261a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_AMBIENT_SOURCE_SHIFT) | 1262a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_DIFFUSE_SOURCE_SHIFT) | 1263a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_SPECULAR_SOURCE_SHIFT) | 1264a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_EMISSIVE_SOURCE_SHIFT) | 1265a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_AMBIENT_SOURCE_SHIFT) | 1266a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_DIFFUSE_SOURCE_SHIFT) | 1267a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_SPECULAR_SOURCE_SHIFT)); 1268adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1269adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_0] = 0; /* filled in via callbacks */ 1270adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_1] = 0; 1271adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_2] = 0; 1272adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_3] = 0; 1273adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1274adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = 1275adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_UCP_IN_CLIP_SPACE | 1276adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_CULL_FRONT_IS_CCW); 1277adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1278adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Texgen/Texmat state */ 1279b1ebd306bf4fdc4076d3d3daa410b08f477cb4c4Eric Anholt rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_2] = 0x00ffffff; 1280adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_3] = 1281adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_TEXGEN_0_INPUT_TEX_SHIFT) | 1282adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_TEXGEN_1_INPUT_TEX_SHIFT) | 1283adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TEXGEN_2_INPUT_TEX_SHIFT) | 1284adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (3 << R200_TEXGEN_3_INPUT_TEX_SHIFT) | 1285adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (4 << R200_TEXGEN_4_INPUT_TEX_SHIFT) | 1286adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (5 << R200_TEXGEN_5_INPUT_TEX_SHIFT)); 1287adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_0] = 0; 1288adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_1] = 1289adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_TEXGEN_0_INPUT_SHIFT) | 1290adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_TEXGEN_1_INPUT_SHIFT) | 1291adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TEXGEN_2_INPUT_SHIFT) | 1292adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (3 << R200_TEXGEN_3_INPUT_SHIFT) | 1293adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (4 << R200_TEXGEN_4_INPUT_SHIFT) | 1294adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (5 << R200_TEXGEN_5_INPUT_SHIFT)); 1295adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_CYL_WRAP_CTL] = 0; 1296adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1297adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1298adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 8; i++) { 1299adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct gl_light *l = &ctx->Light.Light[i]; 1300adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLenum p = GL_LIGHT0 + i; 1301adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell *(float *)&(rmesa->hw.lit[i].cmd[LIT_RANGE_CUTOFF]) = FLT_MAX; 1302adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1303adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_AMBIENT, l->Ambient ); 1304adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_DIFFUSE, l->Diffuse ); 1305adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPECULAR, l->Specular ); 13060846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Lightfv( ctx, p, GL_POSITION, NULL ); 13070846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Lightfv( ctx, p, GL_SPOT_DIRECTION, NULL ); 1308adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPOT_EXPONENT, &l->SpotExponent ); 1309adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPOT_CUTOFF, &l->SpotCutoff ); 1310adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_CONSTANT_ATTENUATION, 1311adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell &l->ConstantAttenuation ); 1312adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_LINEAR_ATTENUATION, 1313adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell &l->LinearAttenuation ); 1314adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_QUADRATIC_ATTENUATION, 1315bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl &l->QuadraticAttenuation ); 13165d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer *(float *)&(rmesa->hw.lit[i].cmd[LIT_ATTEN_XXX]) = 0.0; 1317adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1318adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1319adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.LightModelfv( ctx, GL_LIGHT_MODEL_AMBIENT, 1320adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Light.Model.Ambient ); 1321adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1322adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell TNL_CONTEXT(ctx)->Driver.NotifyMaterialChange( ctx ); 1323adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1324adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 6; i++) { 1325adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.ClipPlane( ctx, GL_CLIP_PLANE0 + i, NULL ); 1326adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1327adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 13280846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Fogfv( ctx, GL_FOG_MODE, NULL ); 1329adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); 1330adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); 1331adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); 1332adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); 13330846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Fogfv( ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL ); 1334adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1335adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_VERT_GUARD_CLIP_ADJ] = IEEE_ONE; 1336adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_VERT_GUARD_DISCARD_ADJ] = IEEE_ONE; 1337adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_HORZ_GUARD_CLIP_ADJ] = IEEE_ONE; 1338adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_HORZ_GUARD_DISCARD_ADJ] = IEEE_ONE; 1339adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1340adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_X] = 0; 1341adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_Y] = 0; 1342adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE; 1343adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE; 1344adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1345cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] = 1346cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger R200_PS_SE_SEL_STATE | R200_PS_MULT_CONST; 1347cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger 1348cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger /* ptp_eye is presumably used to calculate the attenuation wrt a different 1349cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger location? In any case, since point attenuation triggers _needeyecoords, 1350cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger it is constant. Probably ignored as long as R200_PS_USE_MODEL_EYE_VEC 1351cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger isn't set */ 1352cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_X] = 0; 1353cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_Y] = 0; 1354cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_Z] = IEEE_ONE | 0x80000000; /* -1.0 */ 1355cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_3] = 0; 1356cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger /* no idea what the ptp_vport_scale values are good for, except the 1357cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger PTSIZE one - hopefully doesn't matter */ 1358cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_0] = IEEE_ONE; 1359cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_1] = IEEE_ONE; 1360cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_PTSIZE] = IEEE_ONE; 1361cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_3] = IEEE_ONE; 1362cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_QUAD] = 0; 1363cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_LIN] = 0; 1364cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_CON] = IEEE_ONE; 1365cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_3] = 0; 1366cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_MIN] = IEEE_ONE; 1367cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_MAX] = 0x44ffe000; /* 2047 */ 1368cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_2] = 0; 1369cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_3] = 0; 137044dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger 1371adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell r200LightingSpaceChange( ctx ); 137244dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger 13731090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rmesa->radeon.hw.all_dirty = GL_TRUE; 1374ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 13751090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rcommonInitCmdBuf(&rmesa->radeon); 1376adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 1377