r200_state_init.c revision afe84fa698eae3e035e967589f0a8d55f6a83698
1adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* 2adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellCopyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 3adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 4adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe Weather Channel (TM) funded Tungsten Graphics to develop the 5adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellinitial release of the Radeon 8500 driver under the XFree86 license. 6adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThis notice must be preserved. 7adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 8adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellPermission is hereby granted, free of charge, to any person obtaining 9adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwella copy of this software and associated documentation files (the 10adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell"Software"), to deal in the Software without restriction, including 11adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellwithout limitation the rights to use, copy, modify, merge, publish, 12adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwelldistribute, sublicense, and/or sell copies of the Software, and to 13adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellpermit persons to whom the Software is furnished to do so, subject to 14adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellthe following conditions: 15adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 16adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe above copyright notice and this permission notice (including the 17adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellnext paragraph) shall be included in all copies or substantial 18adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellportions of the Software. 19adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 20adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell*/ 28adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 29adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* 30adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Authors: 31adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Keith Whitwell <keith@tungstengraphics.com> 32adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 33adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 34ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/glheader.h" 35ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/imports.h" 36ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/enums.h" 37ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/colormac.h" 38ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/api_arrayelt.h" 39adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 40adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "swrast/swrast.h" 4180c88304fc9d09531b2530b74973821e47b46753Keith Whitwell#include "vbo/vbo.h" 42adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "tnl/tnl.h" 43adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "tnl/t_pipeline.h" 44adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "swrast_setup/swrast_setup.h" 45adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 468cb16e6daff40bbfd7b63a43da72862226a4a164Dave Airlie#include "radeon_common.h" 4761bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie#include "radeon_mipmap_tree.h" 48adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_context.h" 49adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_ioctl.h" 50adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_state.h" 51adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_tcl.h" 52adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_tex.h" 53adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_swtcl.h" 54b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie#include "radeon_queryobj.h" 55adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 56273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane#include "xmlpool.h" 57273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane 58ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie/* New (1.3) state mechanism. 3 commands (packet, scalar, vector) in 59ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie * 1.3 cmdbuffers allow all previous state to be updated as well as 60ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie * the tcl scalar and vector areas. 61ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie */ 62ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airliestatic struct { 63ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie int start; 64ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie int len; 65ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie const char *name; 66ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} packet[RADEON_MAX_STATE_PACKETS] = { 67ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_MISC, 7, "RADEON_PP_MISC"}, 68ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CNTL, 3, "RADEON_PP_CNTL"}, 69ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RB3D_COLORPITCH, 1, "RADEON_RB3D_COLORPITCH"}, 70ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RE_LINE_PATTERN, 2, "RADEON_RE_LINE_PATTERN"}, 71ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_LINE_WIDTH, 1, "RADEON_SE_LINE_WIDTH"}, 72ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_LUM_MATRIX, 1, "RADEON_PP_LUM_MATRIX"}, 73ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_ROT_MATRIX_0, 2, "RADEON_PP_ROT_MATRIX_0"}, 74ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RB3D_STENCILREFMASK, 3, "RADEON_RB3D_STENCILREFMASK"}, 75ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_VPORT_XSCALE, 6, "RADEON_SE_VPORT_XSCALE"}, 76ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_CNTL, 2, "RADEON_SE_CNTL"}, 77ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_CNTL_STATUS, 1, "RADEON_SE_CNTL_STATUS"}, 78ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RE_MISC, 1, "RADEON_RE_MISC"}, 79ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_0, 6, "RADEON_PP_TXFILTER_0"}, 80ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_0, 1, "RADEON_PP_BORDER_COLOR_0"}, 81ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_1, 6, "RADEON_PP_TXFILTER_1"}, 82ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_1, 1, "RADEON_PP_BORDER_COLOR_1"}, 83ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_2, 6, "RADEON_PP_TXFILTER_2"}, 84ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_2, 1, "RADEON_PP_BORDER_COLOR_2"}, 85ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_ZBIAS_FACTOR, 2, "RADEON_SE_ZBIAS_FACTOR"}, 86ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_TCL_OUTPUT_VTX_FMT, 11, "RADEON_SE_TCL_OUTPUT_VTX_FMT"}, 87ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED, 17, 88ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED"}, 89ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0"}, 90ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1"}, 91ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2"}, 92ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3"}, 93ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4"}, 94ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5"}, 95ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6"}, 96ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7"}, 97ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0"}, 98ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0"}, 99ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0"}, 100ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL"}, 101ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0"}, 102ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2"}, 103ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL"}, 104ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0"}, 105ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1"}, 106ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2"}, 107ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3"}, 108ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4"}, 109ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5"}, 110ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0"}, 111ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1"}, 112ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2"}, 113ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3"}, 114ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4"}, 115ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5"}, 116ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL"}, 117ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, 118ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "R200_SE_TCL_OUTPUT_VTX_COMP_SEL"}, 119ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3"}, 120ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CNTL_X, 1, "R200_PP_CNTL_X"}, 121ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET"}, 122ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL"}, 123ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0"}, 124ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1"}, 125ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2"}, 126ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS"}, 127ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL"}, 128ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE"}, 129ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, 130ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0"}, 131ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0"}, /* 61 */ 132ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0"}, /* 62 */ 133ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1"}, 134ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1"}, 135ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2"}, 136ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2"}, 137ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3"}, 138ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3"}, 139ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4"}, 140ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4"}, 141ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5"}, 142ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5"}, 143ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0"}, 144ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1"}, 145ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2"}, 146ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR"}, 147ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_POINT_SPRITE_CNTL, 1, "R200_SE_TCL_POINT_SPRITE_CNTL"}, 148ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_0, 1, "RADEON_PP_CUBIC_FACES_0"}, 149ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T0_0, 5, "RADEON_PP_CUBIC_OFFSET_T0_0"}, 150ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"}, 151ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"}, 152ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"}, 153ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, 154ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"}, 155ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_8, 32, "R200_PP_AFS_0"}, /* 85 */ 156ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_0, 32, "R200_PP_AFS_1"}, 157ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TFACTOR_0, 8, "R200_ATF_TFACTOR"}, 158ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_0, 8, "R200_PP_TXCTLALL_0"}, 159ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_1, 8, "R200_PP_TXCTLALL_1"}, 160ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_2, 8, "R200_PP_TXCTLALL_2"}, 161ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"}, 162ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"}, 163ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"}, 164ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_VAP_PVS_CNTL_1, 2, "R200_VAP_PVS_CNTL"}, 165ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie}; 166ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 167adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* ============================================================= 168adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * State initialization 169adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 170474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic int cmdpkt( r200ContextPtr rmesa, int id ) 171adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 172ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 173474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 174474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) { 175474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie return CP_PACKET0(packet[id].start, packet[id].len - 1); 176474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } else { 177474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = 0; 178474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.packet.cmd_type = RADEON_CMD_PACKET; 179474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.packet.packet_id = id; 180474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 181adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 182adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 183adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 184adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdvec( int offset, int stride, int count ) 185adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 186ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 187adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 188adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.cmd_type = RADEON_CMD_VECTORS; 189adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.offset = offset; 190adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.stride = stride; 191adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.count = count; 192adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 193adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 194adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 19598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger/* warning: the count here is divided by 4 compared to other cmds 19698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger (so it doesn't exceed the char size)! */ 19798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheideggerstatic int cmdveclinear( int offset, int count ) 19898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger{ 19998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger drm_radeon_cmd_header_t h; 20098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.i = 0; 20198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.cmd_type = RADEON_CMD_VECLINEAR; 20298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.addr_lo = offset & 0xff; 20398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.addr_hi = (offset & 0xff00) >> 8; 20498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.count = count; 20598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger return h.i; 20698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 20798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 208adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdscl( int offset, int stride, int count ) 209adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 210ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 211adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 212adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.cmd_type = RADEON_CMD_SCALARS; 213adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.offset = offset; 214adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.stride = stride; 215adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.count = count; 216adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 217adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 218adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 219adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdscl2( int offset, int stride, int count ) 220adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 221ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 222adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 223adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.cmd_type = RADEON_CMD_SCALARS2; 224adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.offset = offset - 0x100; 225adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.stride = stride; 226adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.count = count; 227adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 228adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 229adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2300f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen/** 2310f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen * Check functions are used to check if state is active. 2320f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen * If it is active check function returns maximum emit size. 2330f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen */ 2340f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define CHECK( NM, FLAG, ADD ) \ 2354637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom) \ 236adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ \ 23736603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 23836603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger (void) rmesa; \ 2390f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (FLAG) ? atom->cmd_size + (ADD) : 0; \ 240adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 241adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2420f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define TCL_CHECK( NM, FLAG, ADD ) \ 2434637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom) \ 2444637235183b80963536f2364e4d50fcb894886ddDave Airlie{ \ 2454637235183b80963536f2364e4d50fcb894886ddDave Airlie r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2460f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (!rmesa->radeon.TclFallback && !ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \ 24798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 24898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 2490f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define TCL_OR_VP_CHECK( NM, FLAG, ADD ) \ 2504637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom ) \ 25198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger{ \ 25298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2530f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size + (ADD) : 0; \ 254adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 255adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2560f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define VP_CHECK( NM, FLAG, ADD ) \ 2574637235183b80963536f2364e4d50fcb894886ddDave Airliestatic int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom ) \ 2584637235183b80963536f2364e4d50fcb894886ddDave Airlie{ \ 2594637235183b80963536f2364e4d50fcb894886ddDave Airlie r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2604637235183b80963536f2364e4d50fcb894886ddDave Airlie (void) atom; \ 2610f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (!rmesa->radeon.TclFallback && ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \ 26298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 263adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2640f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( always, GL_TRUE, 0 ) 2650f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( always_add4, GL_TRUE, 4 ) 2660f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( never, GL_FALSE, 0 ) 2670f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( tex_any, ctx->Texture._EnabledUnits, 0 ) 2680f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( tf, (ctx->Texture._EnabledUnits && !ctx->ATIFragmentShader._Enabled), 0 ); 2690f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( pix_zero, !ctx->ATIFragmentShader._Enabled, 0 ) 2700f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen CHECK( texenv, (rmesa->state.envneeded & (1 << (atom->idx)) && !ctx->ATIFragmentShader._Enabled), 0 ) 2710f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( afs_pass1, (ctx->ATIFragmentShader._Enabled && (ctx->ATIFragmentShader.Current->NumPasses > 1)), 0 ) 2720f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( afs, ctx->ATIFragmentShader._Enabled, 0 ) 2730f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( tex_cube, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT, 3 + 3*5 - CUBE_STATE_SIZE ) 27497aa3d553f73d955a5c3eced33384348158307a7Dave AirlieCHECK( tex_cube_cs, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT, 2 + 4*5 - CUBE_STATE_SIZE ) 2750f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_fog, ctx->Fog.Enabled, 0 ) 2760f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_fog_add4, ctx->Fog.Enabled, 4 ) 2770f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl, GL_TRUE, 0 ) 2780f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_add8, GL_TRUE, 8 ) 2790f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_add4, GL_TRUE, 4 ) 2800f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_tex, rmesa->state.texture.unit[atom->idx].unitneeded, 0 ) 2810f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_lighting, ctx->Light.Enabled, 0 ) 2820f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_light, ctx->Light.Enabled && ctx->Light.Light[atom->idx].Enabled, 0 ) 2830f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_tex_add4, rmesa->state.texture.unit[atom->idx].unitneeded, 4 ) 2840f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_lighting_add4, ctx->Light.Enabled, 4 ) 2850f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_lighting_add6, ctx->Light.Enabled, 6 ) 2860f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_light_add8, ctx->Light.Enabled && ctx->Light.Light[atom->idx].Enabled, 8 ) 2870f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_OR_VP_CHECK( tcl_ucp, (ctx->Transform.ClipPlanesEnabled & (1 << (atom->idx))), 0 ) 2880f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_OR_VP_CHECK( tcl_ucp_add4, (ctx->Transform.ClipPlanesEnabled & (1 << (atom->idx))), 4 ) 2890f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_OR_VP_CHECK( tcl_or_vp, GL_TRUE, 0 ) 2900f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_OR_VP_CHECK( tcl_or_vp_add2, GL_TRUE, 2 ) 2910f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vp, GL_TRUE, 0 ) 2920f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vp_add4, GL_TRUE, 4 ) 2930f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vp_size, ctx->VertexProgram.Current->Base.NumNativeInstructions > 64, 0 ) 2940f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vpp_size, ctx->VertexProgram.Current->Base.NumNativeParameters > 96, 0 ) 2950f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vp_size_add4, ctx->VertexProgram.Current->Base.NumNativeInstructions > 64, 4 ) 2960f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vpp_size_add4, ctx->VertexProgram.Current->Base.NumNativeParameters > 96, 4 ) 297adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 298474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_VEC(hdr, data) do { \ 299474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 300474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 301474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_SE_TCL_STATE_FLUSH, 0)); \ 302474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); \ 303474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_VECTOR_INDX_REG, 0)); \ 304474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(h.vectors.offset | (h.vectors.stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); \ 305474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_VECTOR_DATA_REG, h.vectors.count - 1)); \ 306474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.vectors.count); \ 307474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 308474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 3091570bde279362d95a58d120e42e68cb307d00ddeDave Airlie#define OUT_VECLINEAR(hdr, data) do { \ 3101570bde279362d95a58d120e42e68cb307d00ddeDave Airlie drm_radeon_cmd_header_t h; \ 3111570bde279362d95a58d120e42e68cb307d00ddeDave Airlie uint32_t _start, _sz; \ 312474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 3131570bde279362d95a58d120e42e68cb307d00ddeDave Airlie _start = h.veclinear.addr_lo | (h.veclinear.addr_hi << 8); \ 3141570bde279362d95a58d120e42e68cb307d00ddeDave Airlie _sz = h.veclinear.count * 4; \ 3158308bf9ee155b405ad42e6621daf33a108330418Jerome Glisse if (r200->radeon.radeonScreen->kernel_mm && _sz) { \ 3168308bf9ee155b405ad42e6621daf33a108330418Jerome Glisse BEGIN_BATCH_NO_AUTOSTATE(dwords); \ 317474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_SE_TCL_STATE_FLUSH, 0)); \ 318474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); \ 319474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_VECTOR_INDX_REG, 0)); \ 320474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(_start | (1 << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); \ 321474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_VECTOR_DATA_REG, _sz - 1)); \ 322474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), _sz); \ 3238308bf9ee155b405ad42e6621daf33a108330418Jerome Glisse END_BATCH(); \ 3248308bf9ee155b405ad42e6621daf33a108330418Jerome Glisse } \ 325474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 326474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 327474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_SCL(hdr, data) do { \ 328474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 329474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 330474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_SCALAR_INDX_REG, 0)); \ 331474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH((h.scalars.offset) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 332474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 333474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.scalars.count); \ 334474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 335474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 336474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_SCL2(hdr, data) do { \ 337474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 338474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 339474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_SCALAR_INDX_REG, 0)); \ 340474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH((h.scalars.offset + 0x100) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 341474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 342474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.scalars.count); \ 343474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 344dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminenstatic int check_rrb(GLcontext *ctx, struct radeon_state_atom *atom) 345dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen{ 346dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 347dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen struct radeon_renderbuffer *rrb; 348dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rrb = radeon_get_colorbuffer(&r200->radeon); 349dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen if (!rrb || !rrb->bo) 350dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen return 0; 351dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen return atom->cmd_size; 352dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen} 353474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 354474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void mtl_emit(GLcontext *ctx, struct radeon_state_atom *atom) 355474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 356474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 357474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3580f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 359474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 360474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 361474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[MTL_CMD_0], (atom->cmd+1)); 362474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_SCL2(atom->cmd[MTL_CMD_1], (atom->cmd + 18)); 363474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 364474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 365474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 366474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void lit_emit(GLcontext *ctx, struct radeon_state_atom *atom) 367474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 368474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 369474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3700f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 371474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 372474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 373474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[LIT_CMD_0], atom->cmd+1); 374474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[LIT_CMD_1], atom->cmd+LIT_CMD_1+1); 375474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 376474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 377474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 378474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void ptp_emit(GLcontext *ctx, struct radeon_state_atom *atom) 379474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 380474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 381474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3820f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 383474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 384474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 385474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[PTP_CMD_0], atom->cmd+1); 386474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[PTP_CMD_1], atom->cmd+PTP_CMD_1+1); 387474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 388474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 389474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 390474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void veclinear_emit(GLcontext *ctx, struct radeon_state_atom *atom) 391474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 392474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 393474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3940f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 395474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 396474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VECLINEAR(atom->cmd[0], atom->cmd+1); 397474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 398474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 399474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void scl_emit(GLcontext *ctx, struct radeon_state_atom *atom) 400474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 401474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 402474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 4030f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 404474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 405474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 406474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_SCL(atom->cmd[0], atom->cmd+1); 407474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 408474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 409474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 410474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 411474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void vec_emit(GLcontext *ctx, struct radeon_state_atom *atom) 412474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 413474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 414474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 4150f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 416474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 417474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 418474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[0], atom->cmd+1); 419474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 420474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 421adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 422d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airliestatic void ctx_emit(GLcontext *ctx, struct radeon_state_atom *atom) 423ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie{ 424ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 425ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie BATCH_LOCALS(&r200->radeon); 426ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie struct radeon_renderbuffer *rrb; 427ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie uint32_t cbpitch; 428e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie uint32_t zbpitch, depth_fmt; 4290f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 430d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 431d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie /* output the first 7 bytes of context */ 4320f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen BEGIN_BATCH_NO_AUTOSTATE(dwords); 433d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_TABLE(atom->cmd, 5); 434d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 435e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rrb = radeon_get_depthbuffer(&r200->radeon); 436d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie if (!rrb) { 437474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); 438474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); 439d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } else { 440d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie zbpitch = (rrb->pitch / rrb->cpp); 441e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (r200->using_hyperz) 442e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie zbpitch |= RADEON_DEPTH_HYPERZ; 443d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 444d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(zbpitch); 445e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->cpp == 4) 446e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; 447e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 448e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; 449e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_DEPTH_FORMAT_MASK; 450e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] |= depth_fmt; 451d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } 452d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 453d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_ZSTENCILCNTL]); 454d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_CMD_1]); 455d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_PP_CNTL]); 456d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 457e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rrb = radeon_get_colorbuffer(&r200->radeon); 458ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie if (!rrb || !rrb->bo) { 459e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_CNTL]); 460d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_COLOROFFSET]); 461d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } else { 462e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10); 463e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->cpp == 4) 464e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; 465e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 466e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; 467e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 468e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_CNTL]); 469d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 470ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie } 471ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 472d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_CMD_2]); 473d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 474d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie if (!rrb || !rrb->bo) { 475d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_COLORPITCH]); 476d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } else { 477d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie cbpitch = (rrb->pitch / rrb->cpp); 478e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 479d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie cbpitch |= R200_COLOR_TILE_ENABLE; 480d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH(cbpitch); 481d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie } 482d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 483d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) 484d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie OUT_BATCH_TABLE((atom->cmd + 14), 4); 485d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie 486d9c4a01bad3a7d4a965fc09d8605afc6ca48f6f9Dave Airlie END_BATCH(); 487474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 488474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 4890f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic int check_always_ctx( GLcontext *ctx, struct radeon_state_atom *atom) 4900f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 4910f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 4920f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen struct radeon_renderbuffer *rrb, *drb; 4930f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords; 4940f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 4950f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rrb = radeon_get_colorbuffer(&r200->radeon); 4960f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!rrb || !rrb->bo) { 4970f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 4980f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 4990f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 5000f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen drb = radeon_get_depthbuffer(&r200->radeon); 5010f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 5020f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords = 10; 5030f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (drb) 5040f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords += 6; 5050f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rrb) 5060f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords += 8; 5070f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) 5080f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords += 4; 5090f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 5100f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 5110f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return dwords; 5120f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 5130f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 514474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic void ctx_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) 515474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 516474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 517474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 518474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie struct radeon_renderbuffer *rrb, *drb; 519474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t cbpitch = 0; 520474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t zbpitch = 0; 5210f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 522e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie uint32_t depth_fmt; 523474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 524e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rrb = radeon_get_colorbuffer(&r200->radeon); 525e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (!rrb || !rrb->bo) { 526e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie return; 527474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 528e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 529e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10); 530e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->cpp == 4) 531e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; 53245e76d2665b38ba3787548310efc59e969124c01Brian Paul else switch (rrb->base.Format) { 53345e76d2665b38ba3787548310efc59e969124c01Brian Paul case MESA_FORMAT_RGB565: 534e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; 53533f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer break; 53645e76d2665b38ba3787548310efc59e969124c01Brian Paul case MESA_FORMAT_ARGB4444: 53733f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB4444; 53833f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer break; 53945e76d2665b38ba3787548310efc59e969124c01Brian Paul case MESA_FORMAT_ARGB1555: 54033f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB1555; 54133f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer break; 54245e76d2665b38ba3787548310efc59e969124c01Brian Paul default: 54345e76d2665b38ba3787548310efc59e969124c01Brian Paul _mesa_problem(ctx, "Unexpected format in ctx_emit_cs"); 54433f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer } 545e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 546e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie cbpitch = (rrb->pitch / rrb->cpp); 547e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 548474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie cbpitch |= R200_COLOR_TILE_ENABLE; 549e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 550e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie drb = radeon_get_depthbuffer(&r200->radeon); 551e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (drb) { 552e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie zbpitch = (drb->pitch / drb->cpp); 553e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (drb->cpp == 4) 554e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; 555e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 556e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; 557e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_DEPTH_FORMAT_MASK; 558e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] |= depth_fmt; 559474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 560474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 561474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie /* output the first 7 bytes of context */ 562474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 563474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 564474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie /* In the CS case we need to split this up */ 565474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(packet[0].start, 3)); 566474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((atom->cmd + 1), 4); 567474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 568474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (drb) { 569474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_DEPTHOFFSET, 0)); 570eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie OUT_BATCH_RELOC(0, drb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 571474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 572474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_DEPTHPITCH, 0)); 573474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(zbpitch); 574474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 575474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 576474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZSTENCILCNTL, 0)); 577474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_ZSTENCILCNTL]); 578474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_PP_CNTL, 1)); 579474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_PP_CNTL]); 580474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_CNTL]); 581474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 582474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 583474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rrb) { 584474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLOROFFSET, 0)); 585474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 586474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 587474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0)); 588ac3de85eb6af680f2884194b40ada7b3e1edda8aDave Airlie OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0); 589474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 590474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 591474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) { 592474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((atom->cmd + 14), 4); 593474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 594474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 595474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 596ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} 597ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 5980f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic int get_tex_size(GLcontext* ctx, struct radeon_state_atom *atom) 5990f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 6000f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 6010f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->cmd_size + 2; 6020f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen int i = atom->idx; 6030f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen radeonTexObj *t = r200->state.texture.unit[i].texobj; 6040f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(t && t->mt && !t->image_override)) 6050f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords -= 2; 6060f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6070f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return dwords; 6080f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 6090f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6100f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic int check_tex_pair(GLcontext* ctx, struct radeon_state_atom *atom) 6110f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 6120f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 6130f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen /** XOR is bit flip operation so use it for finding pair */ 6140f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(r200->state.texture.unit[atom->idx].unitneeded | r200->state.texture.unit[atom->idx ^ 1].unitneeded)) 6150f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 6160f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6170f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return get_tex_size(ctx, atom); 6180f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 6190f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6200f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic int check_tex(GLcontext* ctx, struct radeon_state_atom *atom) 6210f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 6220f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 6230f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(r200->state.texture.unit[atom->idx].unitneeded)) 6240f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 6250f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6260f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return get_tex_size(ctx, atom); 6270f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 6280f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6290f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 63061bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airliestatic void tex_emit(GLcontext *ctx, struct radeon_state_atom *atom) 631ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie{ 63261bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 63361bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie BATCH_LOCALS(&r200->radeon); 6340f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 63561bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie int i = atom->idx; 63661bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie radeonTexObj *t = r200->state.texture.unit[i].texobj; 63761bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie 63861bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 6395f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger /* is this ok even with drm older than 1.18? */ 64061bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie OUT_BATCH_TABLE(atom->cmd, 10); 641eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 642eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (t && t->mt && !t->image_override) { 643afe84fa698eae3e035e967589f0a8d55f6a83698Maciej Cencora OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, get_base_teximage_offset(t), 6445f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 64561bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie } else if (!t) { 646695ca1e2be6f222c132a76299fc3a0ac9143d960Dave Airlie /* workaround for old CS mechanism */ 647695ca1e2be6f222c132a76299fc3a0ac9143d960Dave Airlie OUT_BATCH(r200->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]); 648eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } else { 64962d504d818f1ab1836a134658b1661ceabb65f1fDave Airlie OUT_BATCH(t->override_offset); 650eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } 651eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 652eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie END_BATCH(); 653eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie} 654eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 6550f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic int get_tex_mm_size(GLcontext* ctx, struct radeon_state_atom *atom) 656eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie{ 657eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 6580f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->cmd_size + 2; 6590f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen int hastexture = 1; 660eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie int i = atom->idx; 661eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie radeonTexObj *t = r200->state.texture.unit[i].texobj; 662eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (!t) 663eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie hastexture = 0; 664eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie else { 665eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (!t->mt && !t->bo) 666eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie hastexture = 0; 667eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } 668b074aacdb2a9e3520ccd6cfd892b60599ad0d1d8Dave Airlie 6690f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!hastexture) 6700f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords -= 4; 6710f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return dwords; 6720f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 6730f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6740f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic int check_tex_pair_mm(GLcontext* ctx, struct radeon_state_atom *atom) 6750f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 6760f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 6770f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen /** XOR is bit flip operation so use it for finding pair */ 6780f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(r200->state.texture.unit[atom->idx].unitneeded | r200->state.texture.unit[atom->idx ^ 1].unitneeded)) 6790f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 6800f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6810f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return get_tex_mm_size(ctx, atom); 6820f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 6830f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6840f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic int check_tex_mm(GLcontext* ctx, struct radeon_state_atom *atom) 6850f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 6860f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 6870f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(r200->state.texture.unit[atom->idx].unitneeded)) 6880f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 6890f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6900f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return get_tex_mm_size(ctx, atom); 6910f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 6920f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6930f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 6940f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminenstatic void tex_emit_mm(GLcontext *ctx, struct radeon_state_atom *atom) 6950f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 6960f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 6970f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen BATCH_LOCALS(&r200->radeon); 6980f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 6990f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen int i = atom->idx; 7000f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen radeonTexObj *t = r200->state.texture.unit[i].texobj; 7010f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!r200->state.texture.unit[i].unitneeded) 7020f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords -= 4; 703eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 704eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 70539ef33708c1a048863a1956cd99782013791ca92Jerome Glisse OUT_BATCH(CP_PACKET0(R200_PP_TXFILTER_0 + (32 * i), 7)); 706b074aacdb2a9e3520ccd6cfd892b60599ad0d1d8Dave Airlie OUT_BATCH_TABLE((atom->cmd + 1), 8); 707eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 7080f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (dwords > atom->cmd_size) { 709eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie OUT_BATCH(CP_PACKET0(R200_PP_TXOFFSET_0 + (24 * i), 0)); 710eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (t->mt && !t->image_override) { 7115f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0, 7125f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 713eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } else { 714eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (t->bo) 715eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie OUT_BATCH_RELOC(t->tile_bits, t->bo, 0, 716eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 717eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } 718eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } 71961bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie END_BATCH(); 720ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} 721ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 722eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 723674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airliestatic void cube_emit(GLcontext *ctx, struct radeon_state_atom *atom) 724674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie{ 725674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 726674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie BATCH_LOCALS(&r200->radeon); 7270f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 728ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger int i = atom->idx, j; 729ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger radeonTexObj *t = r200->state.texture.unit[i].texobj; 730ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger radeon_mipmap_level *lvl; 731ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger 7320f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(t && !t->image_override)) 7330f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords = 2; 7340f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 7350f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen BEGIN_BATCH_NO_AUTOSTATE(dwords); 736ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger /* XXX that size won't really match with image_override... */ 737ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger OUT_BATCH_TABLE(atom->cmd, 2); 738ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger 739ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger if (t && !t->image_override) { 740ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger lvl = &t->mt->levels[0]; 741ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger OUT_BATCH_TABLE((atom->cmd + 2), 1); 742ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger for (j = 1; j <= 5; j++) { 743ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset, 744ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger RADEON_GEM_DOMAIN_VRAM, 0, 0); 745ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger } 746ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger } 747ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger END_BATCH(); 748ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger} 749ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger 750ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheideggerstatic void cube_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) 751ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger{ 752ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger r200ContextPtr r200 = R200_CONTEXT(ctx); 753ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger BATCH_LOCALS(&r200->radeon); 7540f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 7555f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger int i = atom->idx, j; 756674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie radeonTexObj *t = r200->state.texture.unit[i].texobj; 7575f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger radeon_mipmap_level *lvl; 7580f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(t && !t->image_override)) 7590f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords = 2; 760674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 7610f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen BEGIN_BATCH_NO_AUTOSTATE(dwords); 762acf086ebfa95b77bb221c15acf6776439063c0b7Dave Airlie OUT_BATCH_TABLE(atom->cmd, 2); 763674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 764674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie if (t && !t->image_override) { 7655f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger lvl = &t->mt->levels[0]; 7665f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger for (j = 1; j <= 5; j++) { 767acf086ebfa95b77bb221c15acf6776439063c0b7Dave Airlie OUT_BATCH(CP_PACKET0(R200_PP_CUBIC_OFFSET_F1_0 + (24*i) + (4 * (j-1)), 0)); 7685f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset, 76997aa3d553f73d955a5c3eced33384348158307a7Dave Airlie RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 7705f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger } 771674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie } 772674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie END_BATCH(); 773674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie} 774ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 775adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* Initialize the context's hardware state. 776adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 777adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellvoid r200InitState( r200ContextPtr rmesa ) 778adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 7794637235183b80963536f2364e4d50fcb894886ddDave Airlie GLcontext *ctx = rmesa->radeon.glCtx; 780e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie GLuint i; 781adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 782d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.clear = 0x00000000; 783adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 784adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell switch ( ctx->Visual.depthBits ) { 785adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell case 16: 786d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.clear = 0x0000ffff; 787d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.stencil.clear = 0x00000000; 788adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell break; 789adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell case 24: 790a03a4dd524b97f43356b830c21df05f82795fe0bDave Airlie default: 791d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.clear = 0x00ffffff; 792d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.stencil.clear = 0xffff0000; 793adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell break; 794adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 795adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 7964637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.Fallback = 0; 797adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 7981090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rmesa->radeon.hw.max_state_size = 0; 799adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 800adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define ALLOC_STATE( ATOM, CHK, SZ, NM, IDX ) \ 801adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell do { \ 802adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.cmd_size = SZ; \ 8034637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 8044637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 805adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.name = NM; \ 806adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.idx = IDX; \ 807dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen if (check_##CHK != check_never) { \ 808dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.ATOM.check = check_##CHK; \ 809dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->radeon.hw.max_state_size += SZ * sizeof(int); \ 810dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen } else { \ 811dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.ATOM.check = NULL; \ 812dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen } \ 8130c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt rmesa->hw.ATOM.dirty = GL_FALSE; \ 814adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } while (0) 815f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 816f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 817adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Allocate state buffers: 818adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 8194637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) 8200f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ctx, always_add4, CTX_STATE_SIZE_NEWDRM, "CTX/context", 0 ); 821033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger else 8220f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ctx, always_add4, CTX_STATE_SIZE_OLDDRM, "CTX/context", 0 ); 823ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 824474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) 8250f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen { 826474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.emit = ctx_emit_cs; 8270f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.ctx.check = check_always_ctx; 8280f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 829474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie else 8300f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen { 831474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.emit = ctx_emit; 8320f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 833adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( set, always, SET_STATE_SIZE, "SET/setup", 0 ); 834adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lin, always, LIN_STATE_SIZE, "LIN/line", 0 ); 835adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msk, always, MSK_STATE_SIZE, "MSK/mask", 0 ); 836adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); 837adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vtx, always, VTX_STATE_SIZE, "VTX/vertex", 0 ); 838adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vap, always, VAP_STATE_SIZE, "VAP/vap", 0 ); 839adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vte, always, VTE_STATE_SIZE, "VTE/vte", 0 ); 840adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msc, always, MSC_STATE_SIZE, "MSC/misc", 0 ); 841adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( cst, always, CST_STATE_SIZE, "CST/constant", 0 ); 842adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( zbs, always, ZBS_STATE_SIZE, "ZBS/zbias", 0 ); 843f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tf, tf, TF_STATE_SIZE, "TF/tfactor", 0 ); 8440f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen { 8450f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen int state_size = TEX_STATE_SIZE_NEWDRM; 8460f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!rmesa->radeon.radeonScreen->drmSupportsFragShader) { 8470f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen state_size = TEX_STATE_SIZE_OLDDRM; 848f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 8490f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->drmSupportsFragShader) { 8500f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) { 8510f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen /* make sure texture units 0/1 are emitted pair-wise for r200 t0 hang workaround */ 8520f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[0], tex_pair_mm, state_size, "TEX/tex-0", 0 ); 8530f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[1], tex_pair_mm, state_size, "TEX/tex-1", 1 ); 8540f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tam, tex_any, TAM_STATE_SIZE, "TAM/tam", 0 ); 8550f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 8560f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen else { 8570f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[0], tex_mm, state_size, "TEX/tex-0", 0 ); 8580f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[1], tex_mm, state_size, "TEX/tex-1", 1 ); 8590f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tam, never, TAM_STATE_SIZE, "TAM/tam", 0 ); 8600f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 8610f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[2], tex_mm, state_size, "TEX/tex-2", 2 ); 8620f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[3], tex_mm, state_size, "TEX/tex-3", 3 ); 8630f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[4], tex_mm, state_size, "TEX/tex-4", 4 ); 8640f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( tex[5], tex_mm, state_size, "TEX/tex-5", 5 ); 8650f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!rmesa->radeon.radeonScreen->kernel_mm) 8660f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen { 8670f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) { 8680f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[0].check = check_tex_pair; 8690f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[1].check = check_tex_pair; 8700f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } else { 8710f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[0].check = check_tex; 8720f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[1].check = check_tex; 8730f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 8740f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[2].check = check_tex; 8750f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[3].check = check_tex; 8760f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[4].check = check_tex; 8770f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[5].check = check_tex; 8780f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 8790f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->drmSupportsFragShader) { 8800f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( atf, afs, ATF_STATE_SIZE, "ATF/tfactor", 0 ); 8810f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( afs[0], afs_pass1, AFS_STATE_SIZE, "AFS/afsinst-0", 0 ); 8820f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( afs[1], afs, AFS_STATE_SIZE, "AFS/afsinst-1", 1 ); 8830f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } else { 8840f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( atf, never, ATF_STATE_SIZE, "ATF/tfactor", 0 ); 8850f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( afs[0], never, AFS_STATE_SIZE, "AFS/afsinst-0", 0 ); 8860f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( afs[1], never, AFS_STATE_SIZE, "AFS/afsinst-1", 1 ); 8870f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 888f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 88948ccaf200940613032dfaaafe71382947f398004Roland Scheidegger } 8907d361537661b93a501c9533271458a41b965ea79Dave Airlie /* polygon stipple is done with irq for non-kms */ 8917d361537661b93a501c9533271458a41b965ea79Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) { 8927d361537661b93a501c9533271458a41b965ea79Dave Airlie ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 ); 8937d361537661b93a501c9533271458a41b965ea79Dave Airlie } 89461bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie 8958b9a5cfce0065d6e32d3a882b6ee9f94bf2634ffRoland Scheidegger for (i = 0; i < 6; i++) 896eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) 8970f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.tex[i].emit = tex_emit_mm; 898eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie else 899eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie rmesa->hw.tex[i].emit = tex_emit; 9004637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200) { 90148ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[0], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-0", 0 ); 90248ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[1], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-1", 1 ); 90348ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[2], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-2", 2 ); 90448ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[3], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-3", 3 ); 90548ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[4], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-4", 4 ); 90648ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[5], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-5", 5 ); 9078b9a5cfce0065d6e32d3a882b6ee9f94bf2634ffRoland Scheidegger for (i = 0; i < 6; i++) 9080f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->kernel_mm) { 909ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger rmesa->hw.cube[i].emit = cube_emit_cs; 9100f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.cube[i].check = check_tex_cube_cs; 9110f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } else 912ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger rmesa->hw.cube[i].emit = cube_emit; 913bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl } 914bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl else { 915bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl ALLOC_STATE( cube[0], never, CUBE_STATE_SIZE, "CUBE/tex-0", 0 ); 916bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl ALLOC_STATE( cube[1], never, CUBE_STATE_SIZE, "CUBE/tex-1", 1 ); 91748ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[2], never, CUBE_STATE_SIZE, "CUBE/tex-2", 2 ); 91848ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[3], never, CUBE_STATE_SIZE, "CUBE/tex-3", 3 ); 91948ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[4], never, CUBE_STATE_SIZE, "CUBE/tex-4", 4 ); 92048ccaf200940613032dfaaafe71382947f398004Roland Scheidegger ALLOC_STATE( cube[5], never, CUBE_STATE_SIZE, "CUBE/tex-5", 5 ); 921bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl } 922674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 9234637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsVertexProgram) { 92498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( pvs, tcl_vp, PVS_STATE_SIZE, "PVS/pvscntl", 0 ); 9250f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->kernel_mm) { 9260f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpi[0], tcl_vp_add4, VPI_STATE_SIZE, "VP/vertexprog-0", 0 ); 9270f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpi[1], tcl_vp_size_add4, VPI_STATE_SIZE, "VP/vertexprog-1", 1 ); 9280f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpp[0], tcl_vp_add4, VPP_STATE_SIZE, "VPP/vertexparam-0", 0 ); 9290f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpp[1], tcl_vpp_size_add4, VPP_STATE_SIZE, "VPP/vertexparam-1", 1 ); 9300f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } else { 9310f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpi[0], tcl_vp, VPI_STATE_SIZE, "VP/vertexprog-0", 0 ); 9320f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpi[1], tcl_vp_size, VPI_STATE_SIZE, "VP/vertexprog-1", 1 ); 9330f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpp[0], tcl_vp, VPP_STATE_SIZE, "VPP/vertexparam-0", 0 ); 9340f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( vpp[1], tcl_vpp_size, VPP_STATE_SIZE, "VPP/vertexparam-1", 1 ); 9350f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 93698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger } 93798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger else { 93898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( pvs, never, PVS_STATE_SIZE, "PVS/pvscntl", 0 ); 93998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpi[0], never, VPI_STATE_SIZE, "VP/vertexprog-0", 0 ); 94098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpi[1], never, VPI_STATE_SIZE, "VP/vertexprog-1", 1 ); 94198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpp[0], never, VPP_STATE_SIZE, "VPP/vertexparam-0", 0 ); 94298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( vpp[1], never, VPP_STATE_SIZE, "VPP/vertexparam-1", 1 ); 94398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger } 94498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger /* FIXME: this atom has two commands, we need only one (ucp_vert_blend) for vp */ 94598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( tcl, tcl_or_vp, TCL_STATE_SIZE, "TCL/tcl", 0 ); 946adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msl, tcl, MSL_STATE_SIZE, "MSL/matrix-select", 0 ); 947adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( tcg, tcl, TCG_STATE_SIZE, "TCG/texcoordgen", 0 ); 9480f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->kernel_mm) { 9490f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mtl[0], tcl_lighting_add6, MTL_STATE_SIZE, "MTL0/material0", 0 ); 9500f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mtl[1], tcl_lighting_add6, MTL_STATE_SIZE, "MTL1/material1", 1 ); 9510f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( grd, tcl_or_vp_add2, GRD_STATE_SIZE, "GRD/guard-band", 0 ); 9520f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( fog, tcl_fog_add4, FOG_STATE_SIZE, "FOG/fog", 0 ); 9530f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( glt, tcl_lighting_add4, GLT_STATE_SIZE, "GLT/light-global", 0 ); 9540f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( eye, tcl_lighting_add4, EYE_STATE_SIZE, "EYE/eye-vector", 0 ); 9550f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_MV], tcl_add4, MAT_STATE_SIZE, "MAT/modelview", 0 ); 9560f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_IMV], tcl_add4, MAT_STATE_SIZE, "MAT/it-modelview", 0 ); 9570f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_MVP], tcl_add4, MAT_STATE_SIZE, "MAT/modelproject", 0 ); 9580f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX0], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat0", 0 ); 9590f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX1], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat1", 1 ); 9600f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX2], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat2", 2 ); 9610f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX3], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat3", 3 ); 9620f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX4], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat4", 4 ); 9630f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX5], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat5", 5 ); 9640f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[0], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-0", 0 ); 9650f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[1], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-1", 1 ); 9660f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[2], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-2", 2 ); 9670f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[3], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-3", 3 ); 9680f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[4], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-4", 4 ); 9690f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[5], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-5", 5 ); 9700f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[0], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-0", 0 ); 9710f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[1], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-1", 1 ); 9720f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[2], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-2", 2 ); 9730f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[3], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-3", 3 ); 9740f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[4], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-4", 4 ); 9750f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[5], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-5", 5 ); 9760f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[6], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-6", 6 ); 9770f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[7], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-7", 7 ); 978dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen ALLOC_STATE( sci, rrb, SCI_STATE_SIZE, "SCI/scissor", 0 ); 9790f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } else { 9800f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mtl[0], tcl_lighting, MTL_STATE_SIZE, "MTL0/material0", 0 ); 9810f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mtl[1], tcl_lighting, MTL_STATE_SIZE, "MTL1/material1", 1 ); 9820f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( grd, tcl_or_vp, GRD_STATE_SIZE, "GRD/guard-band", 0 ); 9830f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( fog, tcl_fog, FOG_STATE_SIZE, "FOG/fog", 0 ); 9840f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( glt, tcl_lighting, GLT_STATE_SIZE, "GLT/light-global", 0 ); 9850f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( eye, tcl_lighting, EYE_STATE_SIZE, "EYE/eye-vector", 0 ); 9860f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_MV], tcl, MAT_STATE_SIZE, "MAT/modelview", 0 ); 9870f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_IMV], tcl, MAT_STATE_SIZE, "MAT/it-modelview", 0 ); 9880f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_MVP], tcl, MAT_STATE_SIZE, "MAT/modelproject", 0 ); 9890f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX0], tcl_tex, MAT_STATE_SIZE, "MAT/texmat0", 0 ); 9900f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX1], tcl_tex, MAT_STATE_SIZE, "MAT/texmat1", 1 ); 9910f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX2], tcl_tex, MAT_STATE_SIZE, "MAT/texmat2", 2 ); 9920f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX3], tcl_tex, MAT_STATE_SIZE, "MAT/texmat3", 3 ); 9930f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX4], tcl_tex, MAT_STATE_SIZE, "MAT/texmat4", 4 ); 9940f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( mat[R200_MTX_TEX5], tcl_tex, MAT_STATE_SIZE, "MAT/texmat5", 5 ); 9950f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[0], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-0", 0 ); 9960f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[1], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-1", 1 ); 9970f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[2], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-2", 2 ); 9980f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[3], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-3", 3 ); 9990f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[4], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-4", 4 ); 10000f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ucp[5], tcl_ucp, UCP_STATE_SIZE, "UCP/userclip-5", 5 ); 10010f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[0], tcl_light, LIT_STATE_SIZE, "LIT/light-0", 0 ); 10020f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[1], tcl_light, LIT_STATE_SIZE, "LIT/light-1", 1 ); 10030f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[2], tcl_light, LIT_STATE_SIZE, "LIT/light-2", 2 ); 10040f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[3], tcl_light, LIT_STATE_SIZE, "LIT/light-3", 3 ); 10050f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[4], tcl_light, LIT_STATE_SIZE, "LIT/light-4", 4 ); 10060f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[5], tcl_light, LIT_STATE_SIZE, "LIT/light-5", 5 ); 10070f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[6], tcl_light, LIT_STATE_SIZE, "LIT/light-6", 6 ); 10080f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( lit[7], tcl_light, LIT_STATE_SIZE, "LIT/light-7", 7 ); 1009dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen ALLOC_STATE( sci, never, SCI_STATE_SIZE, "SCI/scissor", 0 ); 10100f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 1011f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( pix[0], pix_zero, PIX_STATE_SIZE, "PIX/pixstage-0", 0 ); 101236603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[1], texenv, PIX_STATE_SIZE, "PIX/pixstage-1", 1 ); 101336603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[2], texenv, PIX_STATE_SIZE, "PIX/pixstage-2", 2 ); 101436603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[3], texenv, PIX_STATE_SIZE, "PIX/pixstage-3", 3 ); 101536603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[4], texenv, PIX_STATE_SIZE, "PIX/pixstage-4", 4 ); 101636603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[5], texenv, PIX_STATE_SIZE, "PIX/pixstage-5", 5 ); 10174637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsTriPerf) { 1018fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger ALLOC_STATE( prf, always, PRF_STATE_SIZE, "PRF/performance-tri", 0 ); 1019fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger } 1020fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger else { 1021fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger ALLOC_STATE( prf, never, PRF_STATE_SIZE, "PRF/performance-tri", 0 ); 1022fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger } 10234637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsPointSprites) { 102444dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger ALLOC_STATE( spr, always, SPR_STATE_SIZE, "SPR/pointsprite", 0 ); 10250f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rmesa->radeon.radeonScreen->kernel_mm) 10260f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ptp, tcl_add8, PTP_STATE_SIZE, "PTP/pointparams", 0 ); 10270f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen else 10280f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen ALLOC_STATE( ptp, tcl, PTP_STATE_SIZE, "PTP/pointparams", 0 ); 1029cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger } 1030cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger else { 103144dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger ALLOC_STATE (spr, never, SPR_STATE_SIZE, "SPR/pointsprite", 0 ); 1032cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger ALLOC_STATE (ptp, never, PTP_STATE_SIZE, "PTP/pointparams", 0 ); 1033cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger } 1034adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 10350c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt r200SetUpAtomList( rmesa ); 1036adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1037adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Fill in the packet headers: 1038adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 1039474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_MISC); 1040474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CNTL); 1041474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_2] = cmdpkt(rmesa, RADEON_EMIT_RB3D_COLORPITCH); 10424637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) 1043474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_3] = cmdpkt(rmesa, R200_EMIT_RB3D_BLENDCOLOR); 1044474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lin.cmd[LIN_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RE_LINE_PATTERN); 1045474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lin.cmd[LIN_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_SE_LINE_WIDTH); 1046474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msk.cmd[MSK_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RB3D_STENCILREFMASK); 1047474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); 1048474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.set.cmd[SET_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_CNTL); 1049474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msc.cmd[MSC_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RE_MISC); 1050474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CNTL_X); 1051474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_1] = cmdpkt(rmesa, R200_EMIT_RB3D_DEPTHXY_OFFSET); 1052474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_2] = cmdpkt(rmesa, R200_EMIT_RE_AUX_SCISSOR_CNTL); 1053474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_3] = cmdpkt(rmesa, R200_EMIT_RE_SCISSOR_TL_0); 1054474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_4] = cmdpkt(rmesa, R200_EMIT_SE_VAP_CNTL_STATUS); 1055474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_5] = cmdpkt(rmesa, R200_EMIT_RE_POINTSIZE); 1056474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_6] = cmdpkt(rmesa, R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0); 1057474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tam.cmd[TAM_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TAM_DEBUG3); 1058474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tf.cmd[TF_CMD_0] = cmdpkt(rmesa, R200_EMIT_TFACTOR_0); 10594637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsFragShader) { 1060474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.atf.cmd[ATF_CMD_0] = cmdpkt(rmesa, R200_EMIT_ATF_TFACTOR); 1061474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_0); 1062474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_0); 1063474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_1); 1064474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_1); 1065474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_2); 1066474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_2); 1067474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_3); 1068474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_3); 1069474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_4); 1070474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_4); 1071474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_5); 1072474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_5); 1073f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } else { 1074474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_0); 1075474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_0); 1076474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_1); 1077474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_1); 1078474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_2); 1079474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_2); 1080474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_3); 1081474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_3); 1082474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_4); 1083474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_4); 1084474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXFILTER_5); 1085474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_1_OLDDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_5); 1086474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 1087474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.afs[0].cmd[AFS_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_AFS_0); 1088474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.afs[1].cmd[AFS_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_AFS_1); 1089474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pvs.cmd[PVS_CMD_0] = cmdpkt(rmesa, R200_EMIT_VAP_PVS_CNTL); 1090474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[0].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_0); 1091474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_0); 1092474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[1].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_1); 1093474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_1); 1094474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[2].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_2); 1095474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_2); 1096474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[3].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_3); 1097474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[3].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_3); 1098474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[4].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_4); 1099474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[4].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_4); 1100474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[5].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_5); 1101474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[5].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_5); 1102474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[0].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_0); 1103474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[1].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_1); 1104474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[2].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_2); 1105474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[3].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_3); 1106474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[4].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_4); 1107474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[5].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_5); 1108474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.zbs.cmd[ZBS_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_ZBIAS_FACTOR); 1109474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcl.cmd[TCL_CMD_0] = cmdpkt(rmesa, R200_EMIT_TCL_LIGHT_MODEL_CTL_0); 1110474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcl.cmd[TCL_CMD_1] = cmdpkt(rmesa, R200_EMIT_TCL_UCP_VERT_BLEND_CTL); 1111474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcg.cmd[TCG_CMD_0] = cmdpkt(rmesa, R200_EMIT_TEX_PROC_CTL_2); 1112474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msl.cmd[MSL_CMD_0] = cmdpkt(rmesa, R200_EMIT_MATRIX_SELECT_0); 1113474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vap.cmd[VAP_CMD_0] = cmdpkt(rmesa, R200_EMIT_VAP_CTL); 1114474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_0] = cmdpkt(rmesa, R200_EMIT_VTX_FMT_0); 1115474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_1] = cmdpkt(rmesa, R200_EMIT_OUTPUT_VTX_COMP_SEL); 1116474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_2] = cmdpkt(rmesa, R200_EMIT_SE_VTX_STATE_CNTL); 1117474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vte.cmd[VTE_CMD_0] = cmdpkt(rmesa, R200_EMIT_VTE_CNTL); 1118474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.prf.cmd[PRF_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TRI_PERF_CNTL); 1119474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.spr.cmd[SPR_CMD_0] = cmdpkt(rmesa, R200_EMIT_TCL_POINT_SPRITE_CNTL); 1120dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen 1121dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.sci.cmd[SCI_CMD_0] = CP_PACKET0(R200_RE_AUX_SCISSOR_CNTL, 0); 1122dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.sci.cmd[SCI_CMD_1] = CP_PACKET0(R200_RE_TOP_LEFT, 0); 1123dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.sci.cmd[SCI_CMD_2] = CP_PACKET0(R200_RE_WIDTH_HEIGHT, 0); 1124dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen 1125474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) { 11267d361537661b93a501c9533271458a41b965ea79Dave Airlie 11277d361537661b93a501c9533271458a41b965ea79Dave Airlie rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0); 11287d361537661b93a501c9533271458a41b965ea79Dave Airlie rmesa->hw.stp.cmd[STP_DATA_0] = 0; 11297d361537661b93a501c9533271458a41b965ea79Dave Airlie rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31); 11307d361537661b93a501c9533271458a41b965ea79Dave Airlie 11310f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.mtl[0].emit = mtl_emit; 11320f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.mtl[1].emit = mtl_emit; 11330f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 11340f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.vpi[0].emit = veclinear_emit; 11350f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.vpi[1].emit = veclinear_emit; 11360f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.vpp[0].emit = veclinear_emit; 11370f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.vpp[1].emit = veclinear_emit; 11380f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 11390f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.grd.emit = scl_emit; 11400f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.fog.emit = vec_emit; 11410f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.glt.emit = vec_emit; 11420f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rmesa->hw.eye.emit = vec_emit; 1143474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 1144474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie for (i = R200_MTX_MV; i <= R200_MTX_TEX5; i++) 1145474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.mat[i].emit = vec_emit; 1146474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 1147474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie for (i = 0; i < 8; i++) 1148474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lit[i].emit = lit_emit; 1149474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 1150474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie for (i = 0; i < 6; i++) 1151474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ucp[i].emit = vec_emit; 1152474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 1153474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ptp.emit = ptp_emit; 1154f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 1155474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 1156474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 1157474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 1158adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mtl[0].cmd[MTL_CMD_0] = 1159adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MAT_0_EMISS, 1, 16 ); 1160adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mtl[0].cmd[MTL_CMD_1] = 1161adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl2( R200_SS_MAT_0_SHININESS, 1, 1 ); 1162a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger rmesa->hw.mtl[1].cmd[MTL_CMD_0] = 1163a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger cmdvec( R200_VS_MAT_1_EMISS, 1, 16 ); 1164a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger rmesa->hw.mtl[1].cmd[MTL_CMD_1] = 1165a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger cmdscl2( R200_SS_MAT_1_SHININESS, 1, 1 ); 1166a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger 116798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpi[0].cmd[VPI_CMD_0] = 116898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PROG0, 64 ); 116998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpi[1].cmd[VPI_CMD_0] = 117098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PROG1, 64 ); 117198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpp[0].cmd[VPP_CMD_0] = 117298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PARAM0, 96 ); 117398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpp[1].cmd[VPP_CMD_0] = 117498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PARAM1, 96 ); 117598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 1176adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_CMD_0] = 1177adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl( R200_SS_VERT_GUARD_CLIP_ADJ_ADDR, 1, 4 ); 1178adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.fog.cmd[FOG_CMD_0] = 1179adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_FOG_PARAM_ADDR, 1, 4 ); 1180adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.glt.cmd[GLT_CMD_0] = 1181adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_GLOBAL_AMBIENT_ADDR, 1, 4 ); 1182adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_CMD_0] = 1183adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_EYE_VECTOR_ADDR, 1, 4 ); 1184adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1185adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_MV].cmd[MAT_CMD_0] = 1186adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_0_MV, 1, 16); 1187adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_IMV].cmd[MAT_CMD_0] = 1188adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_1_INV_MV, 1, 16); 1189adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_MVP].cmd[MAT_CMD_0] = 1190adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_2_MVP, 1, 16); 1191adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_TEX0].cmd[MAT_CMD_0] = 1192adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_3_TEX0, 1, 16); 1193adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_TEX1].cmd[MAT_CMD_0] = 1194adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_4_TEX1, 1, 16); 119548ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX2].cmd[MAT_CMD_0] = 119648ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_5_TEX2, 1, 16); 119748ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX3].cmd[MAT_CMD_0] = 119848ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_6_TEX3, 1, 16); 119948ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX4].cmd[MAT_CMD_0] = 120048ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_7_TEX4, 1, 16); 120148ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX5].cmd[MAT_CMD_0] = 120248ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_8_TEX5, 1, 16); 1203adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1204adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 8; i++) { 1205adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lit[i].cmd[LIT_CMD_0] = 1206adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_LIGHT_AMBIENT_ADDR + i, 8, 24 ); 1207adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lit[i].cmd[LIT_CMD_1] = 1208adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl( R200_SS_LIGHT_DCD_ADDR + i, 8, 7 ); 1209adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1210adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1211adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 6; i++) { 1212adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ucp[i].cmd[UCP_CMD_0] = 1213adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_UCP_ADDR + i, 1, 4 ); 1214adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1215adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1216cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CMD_0] = 1217cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger cmdvec( R200_VS_PNT_SPRITE_VPORT_SCALE, 1, 4 ); 1218cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CMD_1] = 1219cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger cmdvec( R200_VS_PNT_SPRITE_ATT_CONST, 1, 12 ); 1220cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger 1221adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Initial Harware state: 1222adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 1223adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_MISC] = (R200_ALPHA_TEST_PASS 1224adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* | R200_RIGHT_HAND_CUBE_OGL*/); 1225adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1226adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] = (R200_FOG_VERTEX | 1227adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FOG_USE_SPEC_ALPHA); 1228adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1229adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RE_SOLID_COLOR] = 0x00000000; 1230adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1231adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 1232033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 1233033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 1234033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger 12354637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) { 1236033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = 0x00000000; 1237033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 1238033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 1239033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 1240033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_CBLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 1241033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 1242033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 1243033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger } 1244adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1245adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHOFFSET] = 12464637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->depthOffset + rmesa->radeon.radeonScreen->fbLocation; 1247adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1248adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] = 12494637235183b80963536f2364e4d50fcb894886ddDave Airlie ((rmesa->radeon.radeonScreen->depthPitch & 1250adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DEPTHPITCH_MASK) | 1251adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DEPTH_ENDIAN_NO_SWAP); 1252b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger 1253b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger if (rmesa->using_hyperz) 1254b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] |= R200_DEPTH_HYPERZ; 1255adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1256e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] = (R200_Z_TEST_LESS | 1257adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_TEST_ALWAYS | 1258adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_FAIL_KEEP | 1259adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_ZPASS_KEEP | 1260adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_ZFAIL_KEEP | 1261adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_Z_WRITE_ENABLE); 1262adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1263b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger if (rmesa->using_hyperz) { 1264b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= R200_Z_COMPRESSION_ENABLE | 1265b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger R200_Z_DECOMPRESSION_ENABLE; 12664637235183b80963536f2364e4d50fcb894886ddDave Airlie/* if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) 1267b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_HIERARCHY_ENABLE;*/ 1268b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger } 1269b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger 1270adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_CNTL] = (R200_ANTI_ALIAS_NONE 1271adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell | R200_TEX_BLEND_0_ENABLE); 1272adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 12734637235183b80963536f2364e4d50fcb894886ddDave Airlie switch ( driQueryOptioni( &rmesa->radeon.optionCache, "dither_mode" ) ) { 1274273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane case DRI_CONF_DITHER_XERRORDIFFRESET: 1275273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_INIT; 1276273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane break; 1277273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane case DRI_CONF_DITHER_ORDERED: 1278273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_SCALE_DITHER_ENABLE; 1279273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane break; 1280273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane } 12814637235183b80963536f2364e4d50fcb894886ddDave Airlie if ( driQueryOptioni( &rmesa->radeon.optionCache, "round_mode" ) == 1282273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane DRI_CONF_ROUND_ROUND ) 1283d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.roundEnable = R200_ROUND_ENABLE; 1284273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane else 1285d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.roundEnable = 0; 12864637235183b80963536f2364e4d50fcb894886ddDave Airlie if ( driQueryOptioni (&rmesa->radeon.optionCache, "color_reduction" ) == 1287273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane DRI_CONF_COLOR_REDUCTION_DITHER ) 1288273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_ENABLE; 1289273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane else 1290d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->radeon.state.color.roundEnable; 1291273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane 1292fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger rmesa->hw.prf.cmd[PRF_PP_TRI_PERF] = R200_TRI_CUTOFF_MASK - R200_TRI_CUTOFF_MASK * 12934637235183b80963536f2364e4d50fcb894886ddDave Airlie driQueryOptionf (&rmesa->radeon.optionCache,"texture_blend_quality"); 1294fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger rmesa->hw.prf.cmd[PRF_PP_PERF_CNTL] = 0; 1295fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger 1296adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.set.cmd[SET_SE_CNTL] = (R200_FFACE_CULL_CCW | 1297adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_BFACE_SOLID | 1298adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FFACE_SOLID | 1299adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FLAT_SHADE_VTX_LAST | 1300adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DIFFUSE_SHADE_GOURAUD | 1301adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ALPHA_SHADE_GOURAUD | 1302adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_SPECULAR_SHADE_GOURAUD | 1303adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FOG_SHADE_GOURAUD | 1304cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger R200_DISC_FOG_SHADE_GOURAUD | 1305adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_PIX_CENTER_OGL | 1306adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ROUND_MODE_TRUNC | 1307adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ROUND_PREC_8TH_PIX); 1308adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1309adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.set.cmd[SET_RE_CNTL] = (R200_PERSPECTIVE_ENABLE | 1310adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_SCISSOR_ENABLE); 1311adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1312adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] = ((1 << 16) | 0xffff); 1313adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1314adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_RE_LINE_STATE] = 1315adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_LINE_CURRENT_PTR_SHIFT) | 1316adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_LINE_CURRENT_COUNT_SHIFT)); 1317adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1318adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_SE_LINE_WIDTH] = (1 << 4); 1319adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1320adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] = 1321adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0x00 << R200_STENCIL_REF_SHIFT) | 1322adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0xff << R200_STENCIL_MASK_SHIFT) | 1323adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0xff << R200_STENCIL_WRITEMASK_SHIFT)); 1324adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1325adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = R200_ROP_COPY; 1326adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK] = 0xffffffff; 1327adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1328adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tam.cmd[TAM_DEBUG3] = 0; 1329adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1330adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msc.cmd[MSC_RE_MISC] = 1331adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_STIPPLE_X_OFFSET_SHIFT) | 1332adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0 << R200_STIPPLE_Y_OFFSET_SHIFT) | 1333adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STIPPLE_BIG_BIT_ORDER); 1334adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1335adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1336adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0; 1337adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RB3D_DEPTHXY_OFFSET] = 0; 1338adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_AUX_SCISSOR_CNTL] = 0x0; 1339adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_SCISSOR_TL_0] = 0; 1340adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_SCISSOR_BR_0] = 0; 1341adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] = 1342adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#ifdef MESA_BIG_ENDIAN 1343adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VC_32BIT_SWAP; 1344adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#else 1345adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VC_NO_SWAP; 1346adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#endif 134710095c9024efb1767fb3df0b59672299c090ad10Eric Anholt 13484637235183b80963536f2364e4d50fcb894886ddDave Airlie if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) { 134910095c9024efb1767fb3df0b59672299c090ad10Eric Anholt /* Bypass TCL */ 135010095c9024efb1767fb3df0b59672299c090ad10Eric Anholt rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] |= (1<<8); 135110095c9024efb1767fb3df0b59672299c090ad10Eric Anholt } 135210095c9024efb1767fb3df0b59672299c090ad10Eric Anholt 135344dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger rmesa->hw.cst.cmd[CST_RE_POINTSIZE] = 135444dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger (((GLuint)(ctx->Const.MaxPointSize * 16.0)) << R200_MAXPOINTSIZE_SHIFT) | 0x10; 1355adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_0] = 1356adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0 << R200_VERTEX_POSITION_ADDR__SHIFT); 1357adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_1] = 1358adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x02 << R200_VTX_COLOR_0_ADDR__SHIFT) | 1359adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x03 << R200_VTX_COLOR_1_ADDR__SHIFT); 1360adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_2] = 1361adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x06 << R200_VTX_TEX_0_ADDR__SHIFT) | 1362adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x07 << R200_VTX_TEX_1_ADDR__SHIFT) | 1363adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x08 << R200_VTX_TEX_2_ADDR__SHIFT) | 1364adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x09 << R200_VTX_TEX_3_ADDR__SHIFT); 1365adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_3] = 1366adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0A << R200_VTX_TEX_4_ADDR__SHIFT) | 1367adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0B << R200_VTX_TEX_5_ADDR__SHIFT); 1368adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1369adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1370adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; 1371adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; 1372adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; 1373adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; 1374adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; 1375adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000; 1376adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1377adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for ( i = 0 ; i < ctx->Const.MaxTextureUnits ; i++ ) { 1378adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFILTER] = R200_BORDER_MODE_OGL; 1379adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT] = 1380adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((i << R200_TXFORMAT_ST_ROUTE_SHIFT) | /* <-- note i */ 1381adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TXFORMAT_WIDTH_SHIFT) | 1382adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TXFORMAT_HEIGHT_SHIFT)); 1383adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0; 1384adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] = 1385adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (/* R200_TEXCOORD_PROJ | */ 1386adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 0x100000); /* Small default bias */ 13874637235183b80963536f2364e4d50fcb894886ddDave Airlie if (rmesa->radeon.radeonScreen->drmSupportsFragShader) { 1388f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_NEWDRM] = 13894637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1390f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_CUBIC_FACES] = 0; 1391f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_TXMULTI_CTL] = 0; 1392f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 1393f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger else { 1394f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_OLDDRM] = 13954637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1396f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 1397adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1398adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0; 1399067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F1] = 14004637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1401067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F2] = 14024637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1403067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F3] = 14044637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1405067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F4] = 14064637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1407067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F5] = 14084637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1409adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 14101bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND] = 14111bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger (R200_TXC_ARG_A_ZERO | 14121bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_ARG_B_ZERO | 14131bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_ARG_C_DIFFUSE_COLOR | 14141bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_OP_MADD); 14151bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 14161bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND2] = 14171bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger ((i << R200_TXC_TFACTOR_SEL_SHIFT) | 14181bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_SCALE_1X | 14191bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_CLAMP_0_1 | 14201bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_OUTPUT_REG_R0); 14211bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 14221bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXABLEND] = 14231bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger (R200_TXA_ARG_A_ZERO | 14241bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_ARG_B_ZERO | 14251bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_ARG_C_DIFFUSE_ALPHA | 14261bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_OP_MADD); 14271bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 14281bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXABLEND2] = 14291bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger ((i << R200_TXA_TFACTOR_SEL_SHIFT) | 14301bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_SCALE_1X | 14311bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_CLAMP_0_1 | 14321bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_OUTPUT_REG_R0); 14331bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger } 1434adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1435adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_0] = 0; 1436adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_1] = 0; 1437adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_2] = 0; 1438adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_3] = 0; 1439adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_4] = 0; 1440adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_5] = 0; 1441adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1442adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] = 1443adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VAP_TCL_ENABLE | 1444adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x9 << R200_VAP_VF_MAX_VTX_NUM__SHIFT)); 1445adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1446adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] = 1447adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VPORT_X_SCALE_ENA | 1448adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Y_SCALE_ENA | 1449adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Z_SCALE_ENA | 1450adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_X_OFFSET_ENA | 1451adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Y_OFFSET_ENA | 1452adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Z_OFFSET_ENA | 1453adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* FIXME: Turn on for tex rect only */ 1454adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_ST_DENORMALIZED | 1455adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_W0_FMT); 1456adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1457adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1458adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_VTXFMT_0] = 0; 1459adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_VTXFMT_1] = 0; 1460adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_0] = 1461adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_VTX_Z0 | R200_VTX_W0 | 1462adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VTX_FP_RGBA << R200_VTX_COLOR_0_SHIFT))); 1463adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] = 0; 1464adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] = (R200_OUTPUT_XYZW); 1465adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_STATE_CNTL] = R200_VSC_UPDATE_USER_COLOR_0_ENABLE; 1466adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1467adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1468adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Matrix selection */ 1469adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_0] = 1470adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_MV << R200_MODELVIEW_0_SHIFT); 1471adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1472adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_1] = 1473adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_IMV << R200_IT_MODELVIEW_0_SHIFT); 1474adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1475adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_2] = 1476adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_MVP << R200_MODELPROJECT_0_SHIFT); 1477adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1478adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_3] = 1479adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_MTX_TEX0 << R200_TEXMAT_0_SHIFT) | 1480adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX1 << R200_TEXMAT_1_SHIFT) | 1481adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX2 << R200_TEXMAT_2_SHIFT) | 1482adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX3 << R200_TEXMAT_3_SHIFT)); 1483adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1484adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_4] = 1485adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_MTX_TEX4 << R200_TEXMAT_4_SHIFT) | 1486adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX5 << R200_TEXMAT_5_SHIFT)); 1487adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1488adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1489adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* General TCL state */ 1490adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0] = 1491adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_SPECULAR_LIGHTS | 1492adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DIFFUSE_SPECULAR_COMBINE | 1493a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LOCAL_LIGHT_VEC_GL | 1494a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LM0_SOURCE_MATERIAL_0 << R200_FRONT_SHININESS_SOURCE_SHIFT | 1495a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LM0_SOURCE_MATERIAL_1 << R200_BACK_SHININESS_SOURCE_SHIFT); 1496adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1497adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_1] = 1498a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger ((R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_EMISSIVE_SOURCE_SHIFT) | 1499a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_AMBIENT_SOURCE_SHIFT) | 1500a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_DIFFUSE_SOURCE_SHIFT) | 1501a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_SPECULAR_SOURCE_SHIFT) | 1502a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_EMISSIVE_SOURCE_SHIFT) | 1503a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_AMBIENT_SOURCE_SHIFT) | 1504a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_DIFFUSE_SOURCE_SHIFT) | 1505a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_SPECULAR_SOURCE_SHIFT)); 1506adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1507adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_0] = 0; /* filled in via callbacks */ 1508adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_1] = 0; 1509adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_2] = 0; 1510adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_3] = 0; 1511adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1512adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = 1513adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_UCP_IN_CLIP_SPACE | 1514adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_CULL_FRONT_IS_CCW); 1515adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1516adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Texgen/Texmat state */ 1517b1ebd306bf4fdc4076d3d3daa410b08f477cb4c4Eric Anholt rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_2] = 0x00ffffff; 1518adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_3] = 1519adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_TEXGEN_0_INPUT_TEX_SHIFT) | 1520adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_TEXGEN_1_INPUT_TEX_SHIFT) | 1521adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TEXGEN_2_INPUT_TEX_SHIFT) | 1522adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (3 << R200_TEXGEN_3_INPUT_TEX_SHIFT) | 1523adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (4 << R200_TEXGEN_4_INPUT_TEX_SHIFT) | 1524adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (5 << R200_TEXGEN_5_INPUT_TEX_SHIFT)); 1525adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_0] = 0; 1526adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_1] = 1527adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_TEXGEN_0_INPUT_SHIFT) | 1528adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_TEXGEN_1_INPUT_SHIFT) | 1529adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TEXGEN_2_INPUT_SHIFT) | 1530adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (3 << R200_TEXGEN_3_INPUT_SHIFT) | 1531adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (4 << R200_TEXGEN_4_INPUT_SHIFT) | 1532adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (5 << R200_TEXGEN_5_INPUT_SHIFT)); 1533adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_CYL_WRAP_CTL] = 0; 1534adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1535adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1536adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 8; i++) { 1537adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct gl_light *l = &ctx->Light.Light[i]; 1538adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLenum p = GL_LIGHT0 + i; 1539adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell *(float *)&(rmesa->hw.lit[i].cmd[LIT_RANGE_CUTOFF]) = FLT_MAX; 1540adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1541adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_AMBIENT, l->Ambient ); 1542adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_DIFFUSE, l->Diffuse ); 1543adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPECULAR, l->Specular ); 15440846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Lightfv( ctx, p, GL_POSITION, NULL ); 15450846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Lightfv( ctx, p, GL_SPOT_DIRECTION, NULL ); 1546adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPOT_EXPONENT, &l->SpotExponent ); 1547adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPOT_CUTOFF, &l->SpotCutoff ); 1548adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_CONSTANT_ATTENUATION, 1549adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell &l->ConstantAttenuation ); 1550adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_LINEAR_ATTENUATION, 1551adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell &l->LinearAttenuation ); 1552adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_QUADRATIC_ATTENUATION, 1553bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl &l->QuadraticAttenuation ); 15545d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer *(float *)&(rmesa->hw.lit[i].cmd[LIT_ATTEN_XXX]) = 0.0; 1555adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1556adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1557adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.LightModelfv( ctx, GL_LIGHT_MODEL_AMBIENT, 1558adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Light.Model.Ambient ); 1559adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1560adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell TNL_CONTEXT(ctx)->Driver.NotifyMaterialChange( ctx ); 1561adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1562adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 6; i++) { 1563adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.ClipPlane( ctx, GL_CLIP_PLANE0 + i, NULL ); 1564adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1565adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 15660846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Fogfv( ctx, GL_FOG_MODE, NULL ); 1567adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); 1568adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); 1569adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); 1570adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); 15710846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Fogfv( ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL ); 1572adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1573adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_VERT_GUARD_CLIP_ADJ] = IEEE_ONE; 1574adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_VERT_GUARD_DISCARD_ADJ] = IEEE_ONE; 1575adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_HORZ_GUARD_CLIP_ADJ] = IEEE_ONE; 1576adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_HORZ_GUARD_DISCARD_ADJ] = IEEE_ONE; 1577adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1578adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_X] = 0; 1579adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_Y] = 0; 1580adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE; 1581adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE; 1582adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1583cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] = 1584cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger R200_PS_SE_SEL_STATE | R200_PS_MULT_CONST; 1585cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger 1586cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger /* ptp_eye is presumably used to calculate the attenuation wrt a different 1587cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger location? In any case, since point attenuation triggers _needeyecoords, 1588cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger it is constant. Probably ignored as long as R200_PS_USE_MODEL_EYE_VEC 1589cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger isn't set */ 1590cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_X] = 0; 1591cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_Y] = 0; 1592cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_Z] = IEEE_ONE | 0x80000000; /* -1.0 */ 1593cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_3] = 0; 1594cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger /* no idea what the ptp_vport_scale values are good for, except the 1595cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger PTSIZE one - hopefully doesn't matter */ 1596cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_0] = IEEE_ONE; 1597cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_1] = IEEE_ONE; 1598cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_PTSIZE] = IEEE_ONE; 1599cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_3] = IEEE_ONE; 1600cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_QUAD] = 0; 1601cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_LIN] = 0; 1602cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_CON] = IEEE_ONE; 1603cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_3] = 0; 1604cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_MIN] = IEEE_ONE; 1605cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_MAX] = 0x44ffe000; /* 2047 */ 1606cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_2] = 0; 1607cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_3] = 0; 160844dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger 1609adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell r200LightingSpaceChange( ctx ); 161044dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger 1611b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie if (rmesa->radeon.radeonScreen->kernel_mm) { 1612b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie radeon_init_query_stateobj(&rmesa->radeon, R200_QUERYOBJ_CMDSIZE); 1613b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie rmesa->radeon.query.queryobj.cmd[R200_QUERYOBJ_CMD_0] = CP_PACKET0(RADEON_RB3D_ZPASS_DATA, 0); 1614b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie rmesa->radeon.query.queryobj.cmd[R200_QUERYOBJ_DATA_0] = 0; 1615b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie } 1616b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie 16171090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rmesa->radeon.hw.all_dirty = GL_TRUE; 1618ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 16191090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rcommonInitCmdBuf(&rmesa->radeon); 1620adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 1621