r200_state_init.c revision c080202db5363a18a759a9a7c82b40ac558c8abe
1adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* 2adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellCopyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 3adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 4adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe Weather Channel (TM) funded Tungsten Graphics to develop the 5adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellinitial release of the Radeon 8500 driver under the XFree86 license. 6adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThis notice must be preserved. 7adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 8adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellPermission is hereby granted, free of charge, to any person obtaining 9adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwella copy of this software and associated documentation files (the 10adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell"Software"), to deal in the Software without restriction, including 11adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellwithout limitation the rights to use, copy, modify, merge, publish, 12adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwelldistribute, sublicense, and/or sell copies of the Software, and to 13adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellpermit persons to whom the Software is furnished to do so, subject to 14adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellthe following conditions: 15adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 16adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellThe above copyright notice and this permission notice (including the 17adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellnext paragraph) shall be included in all copies or substantial 18adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellportions of the Software. 19adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 20adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26adbec39bbf671ad80f6c557801e274cac0d305faKeith WhitwellWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell*/ 28adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 29adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* 30adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Authors: 31adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * Keith Whitwell <keith@tungstengraphics.com> 32adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 33adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 34ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/glheader.h" 35ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/imports.h" 36ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/enums.h" 37ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/colormac.h" 38ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/api_arrayelt.h" 39adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 40adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "swrast/swrast.h" 4180c88304fc9d09531b2530b74973821e47b46753Keith Whitwell#include "vbo/vbo.h" 42adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "tnl/t_pipeline.h" 43adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "swrast_setup/swrast_setup.h" 44adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 458cb16e6daff40bbfd7b63a43da72862226a4a164Dave Airlie#include "radeon_common.h" 4661bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie#include "radeon_mipmap_tree.h" 47adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_context.h" 48adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_ioctl.h" 49adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#include "r200_state.h" 50b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie#include "radeon_queryobj.h" 51adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 52273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane#include "xmlpool.h" 53273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane 54ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie/* New (1.3) state mechanism. 3 commands (packet, scalar, vector) in 55ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie * 1.3 cmdbuffers allow all previous state to be updated as well as 56ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie * the tcl scalar and vector areas. 57ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie */ 58ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airliestatic struct { 59ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie int start; 60ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie int len; 61ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie const char *name; 62ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} packet[RADEON_MAX_STATE_PACKETS] = { 63ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_MISC, 7, "RADEON_PP_MISC"}, 64ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CNTL, 3, "RADEON_PP_CNTL"}, 65ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RB3D_COLORPITCH, 1, "RADEON_RB3D_COLORPITCH"}, 66ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RE_LINE_PATTERN, 2, "RADEON_RE_LINE_PATTERN"}, 67ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_LINE_WIDTH, 1, "RADEON_SE_LINE_WIDTH"}, 68ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_LUM_MATRIX, 1, "RADEON_PP_LUM_MATRIX"}, 69ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_ROT_MATRIX_0, 2, "RADEON_PP_ROT_MATRIX_0"}, 70ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RB3D_STENCILREFMASK, 3, "RADEON_RB3D_STENCILREFMASK"}, 71ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_VPORT_XSCALE, 6, "RADEON_SE_VPORT_XSCALE"}, 72ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_CNTL, 2, "RADEON_SE_CNTL"}, 73ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_CNTL_STATUS, 1, "RADEON_SE_CNTL_STATUS"}, 74ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_RE_MISC, 1, "RADEON_RE_MISC"}, 75ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_0, 6, "RADEON_PP_TXFILTER_0"}, 76ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_0, 1, "RADEON_PP_BORDER_COLOR_0"}, 77ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_1, 6, "RADEON_PP_TXFILTER_1"}, 78ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_1, 1, "RADEON_PP_BORDER_COLOR_1"}, 79ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TXFILTER_2, 6, "RADEON_PP_TXFILTER_2"}, 80ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_BORDER_COLOR_2, 1, "RADEON_PP_BORDER_COLOR_2"}, 81ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_ZBIAS_FACTOR, 2, "RADEON_SE_ZBIAS_FACTOR"}, 82ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_TCL_OUTPUT_VTX_FMT, 11, "RADEON_SE_TCL_OUTPUT_VTX_FMT"}, 83ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED, 17, 84ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED"}, 85ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0"}, 86ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1"}, 87ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2"}, 88ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3"}, 89ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4"}, 90ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5"}, 91ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6"}, 92ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7"}, 93ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0"}, 94ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0"}, 95ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0"}, 96ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL"}, 97ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0"}, 98ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2"}, 99ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL"}, 100ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0"}, 101ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1"}, 102ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2"}, 103ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3"}, 104ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4"}, 105ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5"}, 106ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0"}, 107ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1"}, 108ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2"}, 109ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3"}, 110ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4"}, 111ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5"}, 112ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL"}, 113ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, 114ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "R200_SE_TCL_OUTPUT_VTX_COMP_SEL"}, 115ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3"}, 116ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CNTL_X, 1, "R200_PP_CNTL_X"}, 117ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET"}, 118ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL"}, 119ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0"}, 120ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1"}, 121ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2"}, 122ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS"}, 123ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL"}, 124ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE"}, 125ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, 126ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0"}, 127ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0"}, /* 61 */ 128ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0"}, /* 62 */ 129ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1"}, 130ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1"}, 131ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2"}, 132ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2"}, 133ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3"}, 134ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3"}, 135ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4"}, 136ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4"}, 137ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5"}, 138ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5"}, 139ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0"}, 140ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1"}, 141ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2"}, 142ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR"}, 143ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_SE_TCL_POINT_SPRITE_CNTL, 1, "R200_SE_TCL_POINT_SPRITE_CNTL"}, 144ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_0, 1, "RADEON_PP_CUBIC_FACES_0"}, 145ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T0_0, 5, "RADEON_PP_CUBIC_OFFSET_T0_0"}, 146ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"}, 147ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"}, 148ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"}, 149ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, 150ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"}, 151ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_8, 32, "R200_PP_AFS_0"}, /* 85 */ 152ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXCBLEND_0, 32, "R200_PP_AFS_1"}, 153ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TFACTOR_0, 8, "R200_ATF_TFACTOR"}, 154ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_0, 8, "R200_PP_TXCTLALL_0"}, 155ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_1, 8, "R200_PP_TXCTLALL_1"}, 156ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_2, 8, "R200_PP_TXCTLALL_2"}, 157ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"}, 158ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"}, 159ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"}, 160ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie {R200_VAP_PVS_CNTL_1, 2, "R200_VAP_PVS_CNTL"}, 161ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie}; 162ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 163adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* ============================================================= 164adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell * State initialization 165adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 166474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airliestatic int cmdpkt( r200ContextPtr rmesa, int id ) 167adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 1684a2f00889ba481c117057da5fac7585327458cc3Eric Anholt return CP_PACKET0(packet[id].start, packet[id].len - 1); 169adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 170adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 171adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdvec( int offset, int stride, int count ) 172adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 173ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 174adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 175adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.cmd_type = RADEON_CMD_VECTORS; 176adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.offset = offset; 177adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.stride = stride; 178adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.vectors.count = count; 179adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 180adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 181adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 18298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger/* warning: the count here is divided by 4 compared to other cmds 18398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger (so it doesn't exceed the char size)! */ 18498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheideggerstatic int cmdveclinear( int offset, int count ) 18598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger{ 18698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger drm_radeon_cmd_header_t h; 18798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.i = 0; 18898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.cmd_type = RADEON_CMD_VECLINEAR; 18998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.addr_lo = offset & 0xff; 19098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.addr_hi = (offset & 0xff00) >> 8; 19198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger h.veclinear.count = count; 19298c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger return h.i; 19398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 19498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 195adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdscl( int offset, int stride, int count ) 196adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 197ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 198adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 199adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.cmd_type = RADEON_CMD_SCALARS; 200adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.offset = offset; 201adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.stride = stride; 202adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.count = count; 203adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 204adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 205adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 206adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellstatic int cmdscl2( int offset, int stride, int count ) 207adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 208ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_cmd_header_t h; 209adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.i = 0; 210adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.cmd_type = RADEON_CMD_SCALARS2; 211adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.offset = offset - 0x100; 212adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.stride = stride; 213adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell h.scalars.count = count; 214adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell return h.i; 215adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 216adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2170f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen/** 2180f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen * Check functions are used to check if state is active. 2190f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen * If it is active check function returns maximum emit size. 2200f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen */ 2210f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define CHECK( NM, FLAG, ADD ) \ 222f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_##NM( struct gl_context *ctx, struct radeon_state_atom *atom) \ 223adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ \ 22436603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 22536603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger (void) rmesa; \ 2260f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (FLAG) ? atom->cmd_size + (ADD) : 0; \ 227adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 228adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2290f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define TCL_CHECK( NM, FLAG, ADD ) \ 230f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_##NM( struct gl_context *ctx, struct radeon_state_atom *atom) \ 2314637235183b80963536f2364e4d50fcb894886ddDave Airlie{ \ 2324637235183b80963536f2364e4d50fcb894886ddDave Airlie r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2330f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (!rmesa->radeon.TclFallback && !ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \ 23498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 23598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 2360f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define TCL_OR_VP_CHECK( NM, FLAG, ADD ) \ 237f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_##NM( struct gl_context *ctx, struct radeon_state_atom *atom ) \ 23898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger{ \ 23998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2400f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size + (ADD) : 0; \ 241adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 242adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2430f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen#define VP_CHECK( NM, FLAG, ADD ) \ 244f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_##NM( struct gl_context *ctx, struct radeon_state_atom *atom ) \ 2454637235183b80963536f2364e4d50fcb894886ddDave Airlie{ \ 2464637235183b80963536f2364e4d50fcb894886ddDave Airlie r200ContextPtr rmesa = R200_CONTEXT(ctx); \ 2474637235183b80963536f2364e4d50fcb894886ddDave Airlie (void) atom; \ 2480f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return (!rmesa->radeon.TclFallback && ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \ 24998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger} 250adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 2510f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( always, GL_TRUE, 0 ) 2520f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( always_add4, GL_TRUE, 4 ) 2530f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( never, GL_FALSE, 0 ) 2540f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( tex_any, ctx->Texture._EnabledUnits, 0 ) 2550f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( tf, (ctx->Texture._EnabledUnits && !ctx->ATIFragmentShader._Enabled), 0 ); 2560f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( pix_zero, !ctx->ATIFragmentShader._Enabled, 0 ) 2570f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen CHECK( texenv, (rmesa->state.envneeded & (1 << (atom->idx)) && !ctx->ATIFragmentShader._Enabled), 0 ) 2580f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( afs_pass1, (ctx->ATIFragmentShader._Enabled && (ctx->ATIFragmentShader.Current->NumPasses > 1)), 0 ) 2590f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( afs, ctx->ATIFragmentShader._Enabled, 0 ) 2600f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenCHECK( tex_cube, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT, 3 + 3*5 - CUBE_STATE_SIZE ) 26197aa3d553f73d955a5c3eced33384348158307a7Dave AirlieCHECK( tex_cube_cs, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT, 2 + 4*5 - CUBE_STATE_SIZE ) 2620f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_fog_add4, ctx->Fog.Enabled, 4 ) 2630f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl, GL_TRUE, 0 ) 2640f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_add8, GL_TRUE, 8 ) 2650f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_add4, GL_TRUE, 4 ) 2660f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_tex_add4, rmesa->state.texture.unit[atom->idx].unitneeded, 4 ) 2670f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_lighting_add4, ctx->Light.Enabled, 4 ) 2680f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_lighting_add6, ctx->Light.Enabled, 6 ) 2690f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_CHECK( tcl_light_add8, ctx->Light.Enabled && ctx->Light.Light[atom->idx].Enabled, 8 ) 2700f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_OR_VP_CHECK( tcl_ucp_add4, (ctx->Transform.ClipPlanesEnabled & (1 << (atom->idx))), 4 ) 2710f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_OR_VP_CHECK( tcl_or_vp, GL_TRUE, 0 ) 2720f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenTCL_OR_VP_CHECK( tcl_or_vp_add2, GL_TRUE, 2 ) 2730f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vp, GL_TRUE, 0 ) 2740f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vp_add4, GL_TRUE, 4 ) 2750f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vp_size_add4, ctx->VertexProgram.Current->Base.NumNativeInstructions > 64, 4 ) 2760f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli NieminenVP_CHECK( tcl_vpp_size_add4, ctx->VertexProgram.Current->Base.NumNativeParameters > 96, 4 ) 277adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 278474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_VEC(hdr, data) do { \ 279474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 280474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 281474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_SE_TCL_STATE_FLUSH, 0)); \ 282474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); \ 283474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_VECTOR_INDX_REG, 0)); \ 284474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(h.vectors.offset | (h.vectors.stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); \ 285474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_VECTOR_DATA_REG, h.vectors.count - 1)); \ 286474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.vectors.count); \ 287474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 288474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 2891570bde279362d95a58d120e42e68cb307d00ddeDave Airlie#define OUT_VECLINEAR(hdr, data) do { \ 2901570bde279362d95a58d120e42e68cb307d00ddeDave Airlie drm_radeon_cmd_header_t h; \ 2911570bde279362d95a58d120e42e68cb307d00ddeDave Airlie uint32_t _start, _sz; \ 292474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 2931570bde279362d95a58d120e42e68cb307d00ddeDave Airlie _start = h.veclinear.addr_lo | (h.veclinear.addr_hi << 8); \ 2941570bde279362d95a58d120e42e68cb307d00ddeDave Airlie _sz = h.veclinear.count * 4; \ 2954a2f00889ba481c117057da5fac7585327458cc3Eric Anholt if (_sz) { \ 2968308bf9ee155b405ad42e6621daf33a108330418Jerome Glisse BEGIN_BATCH_NO_AUTOSTATE(dwords); \ 297474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_SE_TCL_STATE_FLUSH, 0)); \ 298474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(0); \ 299474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_VECTOR_INDX_REG, 0)); \ 300474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(_start | (1 << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); \ 301474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_VECTOR_DATA_REG, _sz - 1)); \ 302474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), _sz); \ 3038308bf9ee155b405ad42e6621daf33a108330418Jerome Glisse END_BATCH(); \ 3048308bf9ee155b405ad42e6621daf33a108330418Jerome Glisse } \ 305474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 306474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 307474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_SCL(hdr, data) do { \ 308474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 309474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 310474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_SCALAR_INDX_REG, 0)); \ 311474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH((h.scalars.offset) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 312474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 313474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.scalars.count); \ 314474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 315474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 316474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie#define OUT_SCL2(hdr, data) do { \ 317474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie drm_radeon_cmd_header_t h; \ 318474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie h.i = hdr; \ 319474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(R200_SE_TCL_SCALAR_INDX_REG, 0)); \ 320474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH((h.scalars.offset + 0x100) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 321474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 322474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((data), h.scalars.count); \ 323474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } while(0) 324f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_rrb(struct gl_context *ctx, struct radeon_state_atom *atom) 325dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen{ 326dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 327dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen struct radeon_renderbuffer *rrb; 328dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rrb = radeon_get_colorbuffer(&r200->radeon); 329dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen if (!rrb || !rrb->bo) 330dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen return 0; 331dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen return atom->cmd_size; 332dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen} 333474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 334f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_polygon_stipple(struct gl_context *ctx, 3356785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen struct radeon_state_atom *atom) 3366785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen{ 3376785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 3386785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen if (r200->hw.set.cmd[SET_RE_CNTL] & R200_STIPPLE_ENABLE) 3396785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen return atom->cmd_size; 3406785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen return 0; 3416785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen} 3426785a8aaf4bff5f607731fdc6f19189c1088112fPauli Nieminen 343f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void mtl_emit(struct gl_context *ctx, struct radeon_state_atom *atom) 344474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 345474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 346474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3470f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 348474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 349474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 350474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[MTL_CMD_0], (atom->cmd+1)); 351474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_SCL2(atom->cmd[MTL_CMD_1], (atom->cmd + 18)); 352474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 353474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 354474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 355f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void lit_emit(struct gl_context *ctx, struct radeon_state_atom *atom) 356474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 357474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 358474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3590f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 360474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 361474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 362474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[LIT_CMD_0], atom->cmd+1); 363474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[LIT_CMD_1], atom->cmd+LIT_CMD_1+1); 364474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 365474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 366474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 367f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void ptp_emit(struct gl_context *ctx, struct radeon_state_atom *atom) 368474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 369474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 370474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3710f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 372474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 373474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 374474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[PTP_CMD_0], atom->cmd+1); 375474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[PTP_CMD_1], atom->cmd+PTP_CMD_1+1); 376474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 377474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 378474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 379f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void veclinear_emit(struct gl_context *ctx, struct radeon_state_atom *atom) 380474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 381474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 382474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3830f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 384474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 385474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VECLINEAR(atom->cmd[0], atom->cmd+1); 386474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 387474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 388f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void scl_emit(struct gl_context *ctx, struct radeon_state_atom *atom) 389474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 390474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 391474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 3920f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 393474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 394474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 395474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_SCL(atom->cmd[0], atom->cmd+1); 396474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 397474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 398474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 399474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 400f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void vec_emit(struct gl_context *ctx, struct radeon_state_atom *atom) 401474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 402474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 403474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 4040f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 405474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 406474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 407474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_VEC(atom->cmd[0], atom->cmd+1); 408474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 409474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie} 410adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 411f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_always_ctx( struct gl_context *ctx, struct radeon_state_atom *atom) 4120f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 4130f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 4140f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen struct radeon_renderbuffer *rrb, *drb; 4150f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords; 4160f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 4170f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen rrb = radeon_get_colorbuffer(&r200->radeon); 4180f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!rrb || !rrb->bo) { 4190f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 4200f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen } 4210f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 4220f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen drb = radeon_get_depthbuffer(&r200->radeon); 4230f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 4240f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords = 10; 4250f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (drb) 4260f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords += 6; 4270f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (rrb) 4280f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords += 8; 4290f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) 4300f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords += 4; 4310f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 4320f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 4330f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return dwords; 4340f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 4350f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 436f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom) 437474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie{ 438474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 439474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BATCH_LOCALS(&r200->radeon); 440474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie struct radeon_renderbuffer *rrb, *drb; 441474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t cbpitch = 0; 442474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie uint32_t zbpitch = 0; 4430f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 444e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie uint32_t depth_fmt; 445474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 446e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rrb = radeon_get_colorbuffer(&r200->radeon); 447e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (!rrb || !rrb->bo) { 448e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie return; 449474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 450e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 451e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10); 452e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->cpp == 4) 453e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; 454c080202db5363a18a759a9a7c82b40ac558c8abeBrian Paul else switch (rrb->base.Base.Format) { 45545e76d2665b38ba3787548310efc59e969124c01Brian Paul case MESA_FORMAT_RGB565: 456e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; 45733f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer break; 45845e76d2665b38ba3787548310efc59e969124c01Brian Paul case MESA_FORMAT_ARGB4444: 45933f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB4444; 46033f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer break; 46145e76d2665b38ba3787548310efc59e969124c01Brian Paul case MESA_FORMAT_ARGB1555: 46233f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB1555; 46333f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer break; 46445e76d2665b38ba3787548310efc59e969124c01Brian Paul default: 46545e76d2665b38ba3787548310efc59e969124c01Brian Paul _mesa_problem(ctx, "Unexpected format in ctx_emit_cs"); 46633f56b4612e506999a2be8391ba82c0174afa1b3Michel Dänzer } 467e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 468e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie cbpitch = (rrb->pitch / rrb->cpp); 469e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 470474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie cbpitch |= R200_COLOR_TILE_ENABLE; 47181a715605af97f12e8907dba3d1de27addf5335fDave Airlie if (rrb->bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 47281a715605af97f12e8907dba3d1de27addf5335fDave Airlie cbpitch |= R200_COLOR_MICROTILE_ENABLE; 47381a715605af97f12e8907dba3d1de27addf5335fDave Airlie 474e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie 475e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie drb = radeon_get_depthbuffer(&r200->radeon); 476e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (drb) { 477e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie zbpitch = (drb->pitch / drb->cpp); 478e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie if (drb->cpp == 4) 479e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; 480e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie else 481e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; 482e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_DEPTH_FORMAT_MASK; 483e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie atom->cmd[CTX_RB3D_ZSTENCILCNTL] |= depth_fmt; 484474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 485474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 486474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie /* output the first 7 bytes of context */ 487474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 488474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 489474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie /* In the CS case we need to split this up */ 490474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(packet[0].start, 3)); 491474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((atom->cmd + 1), 4); 492474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 493474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (drb) { 494474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_DEPTHOFFSET, 0)); 495eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie OUT_BATCH_RELOC(0, drb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); 496474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 497474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_DEPTHPITCH, 0)); 498474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(zbpitch); 499474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 500474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 501474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZSTENCILCNTL, 0)); 502474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_ZSTENCILCNTL]); 503474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_PP_CNTL, 1)); 504474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_PP_CNTL]); 505474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(atom->cmd[CTX_RB3D_CNTL]); 506474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 507474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 508474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (rrb) { 509474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLOROFFSET, 0)); 510f7bab47e6c7cf877acf6d9bb85453851e5aa7f19Dave Airlie OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); 511474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 512474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0)); 513ac3de85eb6af680f2884194b40ada7b3e1edda8aDave Airlie OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0); 514474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 515474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 516474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) { 517474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie OUT_BATCH_TABLE((atom->cmd + 14), 4); 518474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie } 519474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 520474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie END_BATCH(); 521ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} 522ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 523f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int get_tex_mm_size(struct gl_context* ctx, struct radeon_state_atom *atom) 524eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie{ 525eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie r200ContextPtr r200 = R200_CONTEXT(ctx); 5260f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->cmd_size + 2; 5270f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen int hastexture = 1; 528eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie int i = atom->idx; 529eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie radeonTexObj *t = r200->state.texture.unit[i].texobj; 530eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (!t) 531eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie hastexture = 0; 532eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie else { 533eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (!t->mt && !t->bo) 534eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie hastexture = 0; 535eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } 536b074aacdb2a9e3520ccd6cfd892b60599ad0d1d8Dave Airlie 5370f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!hastexture) 5380f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords -= 4; 5390f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return dwords; 5400f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 5410f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 542f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_tex_pair_mm(struct gl_context* ctx, struct radeon_state_atom *atom) 5430f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 5440f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 5450f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen /** XOR is bit flip operation so use it for finding pair */ 5460f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(r200->state.texture.unit[atom->idx].unitneeded | r200->state.texture.unit[atom->idx ^ 1].unitneeded)) 5470f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 5480f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 5490f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return get_tex_mm_size(ctx, atom); 5500f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 5510f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 552f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic int check_tex_mm(struct gl_context* ctx, struct radeon_state_atom *atom) 5530f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 5540f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 5550f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(r200->state.texture.unit[atom->idx].unitneeded)) 5560f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return 0; 5570f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 5580f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen return get_tex_mm_size(ctx, atom); 5590f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen} 5600f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 5610f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 562f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void tex_emit_mm(struct gl_context *ctx, struct radeon_state_atom *atom) 5630f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen{ 5640f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen r200ContextPtr r200 = R200_CONTEXT(ctx); 5650f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen BATCH_LOCALS(&r200->radeon); 5660f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 5670f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen int i = atom->idx; 5680f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen radeonTexObj *t = r200->state.texture.unit[i].texobj; 5692cf8164065b8704e2f32d77af14cde9e7979435cRoland Scheidegger 5702cf8164065b8704e2f32d77af14cde9e7979435cRoland Scheidegger if (!r200->state.texture.unit[i].unitneeded && !(dwords <= atom->cmd_size)) 5710f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords -= 4; 572eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie BEGIN_BATCH_NO_AUTOSTATE(dwords); 573eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 57439ef33708c1a048863a1956cd99782013791ca92Jerome Glisse OUT_BATCH(CP_PACKET0(R200_PP_TXFILTER_0 + (32 * i), 7)); 575b074aacdb2a9e3520ccd6cfd892b60599ad0d1d8Dave Airlie OUT_BATCH_TABLE((atom->cmd + 1), 8); 576eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie 5770f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (dwords > atom->cmd_size) { 578eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie OUT_BATCH(CP_PACKET0(R200_PP_TXOFFSET_0 + (24 * i), 0)); 579eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (t->mt && !t->image_override) { 5805f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0, 5815f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 582eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } else { 583eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie if (t->bo) 584eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie OUT_BATCH_RELOC(t->tile_bits, t->bo, 0, 585eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 586eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } 587eba8008916503cea47c557398b009e2e2b546cb1Dave Airlie } 58861bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie END_BATCH(); 589ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie} 590ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 591f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergstatic void cube_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom) 592ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger{ 593ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger r200ContextPtr r200 = R200_CONTEXT(ctx); 594ffae82da4cf5a969d699c7f5bdcd4dae6c27a1caRoland Scheidegger BATCH_LOCALS(&r200->radeon); 5950f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen uint32_t dwords = atom->check(ctx, atom); 5965f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger int i = atom->idx, j; 597674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie radeonTexObj *t = r200->state.texture.unit[i].texobj; 5985f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger radeon_mipmap_level *lvl; 5990f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen if (!(t && !t->image_override)) 6000f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen dwords = 2; 601674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 6020f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen BEGIN_BATCH_NO_AUTOSTATE(dwords); 603acf086ebfa95b77bb221c15acf6776439063c0b7Dave Airlie OUT_BATCH_TABLE(atom->cmd, 2); 604674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 605674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie if (t && !t->image_override) { 6065f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger lvl = &t->mt->levels[0]; 6075f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger for (j = 1; j <= 5; j++) { 608acf086ebfa95b77bb221c15acf6776439063c0b7Dave Airlie OUT_BATCH(CP_PACKET0(R200_PP_CUBIC_OFFSET_F1_0 + (24*i) + (4 * (j-1)), 0)); 6095f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset, 61097aa3d553f73d955a5c3eced33384348158307a7Dave Airlie RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 6115f8381724e81b594d6f11bb2d59964fbdbf22e90Roland Scheidegger } 612674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie } 613674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie END_BATCH(); 614674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie} 615ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 616adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* Initialize the context's hardware state. 617adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 618adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwellvoid r200InitState( r200ContextPtr rmesa ) 619adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell{ 620f9995b30756140724f41daf963fa06167912be7fKristian Høgsberg struct gl_context *ctx = rmesa->radeon.glCtx; 621e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie GLuint i; 622adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 623d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.clear = 0x00000000; 624adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 625adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell switch ( ctx->Visual.depthBits ) { 626adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell case 16: 627d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.clear = 0x0000ffff; 628d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.stencil.clear = 0x00000000; 629adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell break; 630adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell case 24: 631a03a4dd524b97f43356b830c21df05f82795fe0bDave Airlie default: 632d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.depth.clear = 0x00ffffff; 633d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.stencil.clear = 0xffff0000; 634adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell break; 635adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 636adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 6374637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.Fallback = 0; 638adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 6391090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rmesa->radeon.hw.max_state_size = 0; 640adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 641adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#define ALLOC_STATE( ATOM, CHK, SZ, NM, IDX ) \ 642adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell do { \ 643adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.cmd_size = SZ; \ 6444637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 6454637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 646adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.name = NM; \ 647adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ATOM.idx = IDX; \ 648dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen if (check_##CHK != check_never) { \ 649dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.ATOM.check = check_##CHK; \ 650dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->radeon.hw.max_state_size += SZ * sizeof(int); \ 651dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen } else { \ 652dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.ATOM.check = NULL; \ 653dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen } \ 6540c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt rmesa->hw.ATOM.dirty = GL_FALSE; \ 655adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } while (0) 656f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 657f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger 658adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Allocate state buffers: 659adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 66056d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( ctx, always_add4, CTX_STATE_SIZE_NEWDRM, "CTX/context", 0 ); 661ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 6624a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.ctx.emit = ctx_emit_cs; 6634a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.ctx.check = check_always_ctx; 664adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( set, always, SET_STATE_SIZE, "SET/setup", 0 ); 665adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( lin, always, LIN_STATE_SIZE, "LIN/line", 0 ); 666adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msk, always, MSK_STATE_SIZE, "MSK/mask", 0 ); 667adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); 668adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vtx, always, VTX_STATE_SIZE, "VTX/vertex", 0 ); 669adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vap, always, VAP_STATE_SIZE, "VAP/vap", 0 ); 670adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( vte, always, VTE_STATE_SIZE, "VTE/vte", 0 ); 671adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msc, always, MSC_STATE_SIZE, "MSC/misc", 0 ); 672adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( cst, always, CST_STATE_SIZE, "CST/constant", 0 ); 673adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( zbs, always, ZBS_STATE_SIZE, "ZBS/zbias", 0 ); 674f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( tf, tf, TF_STATE_SIZE, "TF/tfactor", 0 ); 6750f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen { 6760f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen int state_size = TEX_STATE_SIZE_NEWDRM; 67756d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) { 67856d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie /* make sure texture units 0/1 are emitted pair-wise for r200 t0 hang workaround */ 67956d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[0], tex_pair_mm, state_size, "TEX/tex-0", 0 ); 68056d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[1], tex_pair_mm, state_size, "TEX/tex-1", 1 ); 68156d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tam, tex_any, TAM_STATE_SIZE, "TAM/tam", 0 ); 682f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 68356d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie else { 68456d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[0], tex_mm, state_size, "TEX/tex-0", 0 ); 68556d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[1], tex_mm, state_size, "TEX/tex-1", 1 ); 68656d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tam, never, TAM_STATE_SIZE, "TAM/tam", 0 ); 687f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger } 68856d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[2], tex_mm, state_size, "TEX/tex-2", 2 ); 68956d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[3], tex_mm, state_size, "TEX/tex-3", 3 ); 69056d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[4], tex_mm, state_size, "TEX/tex-4", 4 ); 69156d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( tex[5], tex_mm, state_size, "TEX/tex-5", 5 ); 69256d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( atf, afs, ATF_STATE_SIZE, "ATF/tfactor", 0 ); 69356d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( afs[0], afs_pass1, AFS_STATE_SIZE, "AFS/afsinst-0", 0 ); 69456d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( afs[1], afs, AFS_STATE_SIZE, "AFS/afsinst-1", 1 ); 69548ccaf200940613032dfaaafe71382947f398004Roland Scheidegger } 6962b5618fc5bdcbee3434f8b5aa3a31eb06fb479c0Alex Deucher 6974a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( stp, polygon_stipple, STP_STATE_SIZE, "STP/stp", 0 ); 69861bb82636f7b1681b5509e1a9038bbcc1feea35cDave Airlie 6998b9a5cfce0065d6e32d3a882b6ee9f94bf2634ffRoland Scheidegger for (i = 0; i < 6; i++) 7004a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.tex[i].emit = tex_emit_mm; 70156d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( cube[0], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-0", 0 ); 70256d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( cube[1], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-1", 1 ); 70356d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( cube[2], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-2", 2 ); 70456d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( cube[3], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-3", 3 ); 70556d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( cube[4], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-4", 4 ); 70656d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( cube[5], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-5", 5 ); 70756d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie for (i = 0; i < 6; i++) { 70856d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.cube[i].emit = cube_emit_cs; 70956d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.cube[i].check = check_tex_cube_cs; 710bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl } 711674b204ba7c4854fec92a0c939de5012fecb6d87Dave Airlie 71256d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( pvs, tcl_vp, PVS_STATE_SIZE, "PVS/pvscntl", 0 ); 71356d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( vpi[0], tcl_vp_add4, VPI_STATE_SIZE, "VP/vertexprog-0", 0 ); 71456d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( vpi[1], tcl_vp_size_add4, VPI_STATE_SIZE, "VP/vertexprog-1", 1 ); 71556d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( vpp[0], tcl_vp_add4, VPP_STATE_SIZE, "VPP/vertexparam-0", 0 ); 71656d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( vpp[1], tcl_vpp_size_add4, VPP_STATE_SIZE, "VPP/vertexparam-1", 1 ); 71756d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie 71898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger /* FIXME: this atom has two commands, we need only one (ucp_vert_blend) for vp */ 71998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger ALLOC_STATE( tcl, tcl_or_vp, TCL_STATE_SIZE, "TCL/tcl", 0 ); 720adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( msl, tcl, MSL_STATE_SIZE, "MSL/matrix-select", 0 ); 721adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ALLOC_STATE( tcg, tcl, TCG_STATE_SIZE, "TCG/texcoordgen", 0 ); 7224a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mtl[0], tcl_lighting_add6, MTL_STATE_SIZE, "MTL0/material0", 0 ); 7234a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mtl[1], tcl_lighting_add6, MTL_STATE_SIZE, "MTL1/material1", 1 ); 7244a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( grd, tcl_or_vp_add2, GRD_STATE_SIZE, "GRD/guard-band", 0 ); 7254a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( fog, tcl_fog_add4, FOG_STATE_SIZE, "FOG/fog", 0 ); 7264a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( glt, tcl_lighting_add4, GLT_STATE_SIZE, "GLT/light-global", 0 ); 7274a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( eye, tcl_lighting_add4, EYE_STATE_SIZE, "EYE/eye-vector", 0 ); 7284a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_MV], tcl_add4, MAT_STATE_SIZE, "MAT/modelview", 0 ); 7294a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_IMV], tcl_add4, MAT_STATE_SIZE, "MAT/it-modelview", 0 ); 7304a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_MVP], tcl_add4, MAT_STATE_SIZE, "MAT/modelproject", 0 ); 7314a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_TEX0], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat0", 0 ); 7324a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_TEX1], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat1", 1 ); 7334a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_TEX2], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat2", 2 ); 7344a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_TEX3], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat3", 3 ); 7354a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_TEX4], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat4", 4 ); 7364a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( mat[R200_MTX_TEX5], tcl_tex_add4, MAT_STATE_SIZE, "MAT/texmat5", 5 ); 7374a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( ucp[0], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-0", 0 ); 7384a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( ucp[1], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-1", 1 ); 7394a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( ucp[2], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-2", 2 ); 7404a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( ucp[3], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-3", 3 ); 7414a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( ucp[4], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-4", 4 ); 7424a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( ucp[5], tcl_ucp_add4, UCP_STATE_SIZE, "UCP/userclip-5", 5 ); 7434a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[0], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-0", 0 ); 7444a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[1], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-1", 1 ); 7454a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[2], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-2", 2 ); 7464a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[3], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-3", 3 ); 7474a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[4], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-4", 4 ); 7484a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[5], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-5", 5 ); 7494a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[6], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-6", 6 ); 7504a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( lit[7], tcl_light_add8, LIT_STATE_SIZE, "LIT/light-7", 7 ); 7514a2f00889ba481c117057da5fac7585327458cc3Eric Anholt ALLOC_STATE( sci, rrb, SCI_STATE_SIZE, "SCI/scissor", 0 ); 752f20917de5bd2b1fc152e74304d3649a1f6042422Roland Scheidegger ALLOC_STATE( pix[0], pix_zero, PIX_STATE_SIZE, "PIX/pixstage-0", 0 ); 75336603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[1], texenv, PIX_STATE_SIZE, "PIX/pixstage-1", 1 ); 75436603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[2], texenv, PIX_STATE_SIZE, "PIX/pixstage-2", 2 ); 75536603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[3], texenv, PIX_STATE_SIZE, "PIX/pixstage-3", 3 ); 75636603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[4], texenv, PIX_STATE_SIZE, "PIX/pixstage-4", 4 ); 75736603539ccdb1c507724d8a1c314e6c9cc9863d9Roland Scheidegger ALLOC_STATE( pix[5], texenv, PIX_STATE_SIZE, "PIX/pixstage-5", 5 ); 75856d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( prf, always, PRF_STATE_SIZE, "PRF/performance-tri", 0 ); 75956d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( spr, always, SPR_STATE_SIZE, "SPR/pointsprite", 0 ); 76056d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie ALLOC_STATE( ptp, tcl_add8, PTP_STATE_SIZE, "PTP/pointparams", 0 ); 761adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 7620c8f8d3dc9d60ed34eeca7f3606651420a81753cEric Anholt r200SetUpAtomList( rmesa ); 763adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 764adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Fill in the packet headers: 765adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 766474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_MISC); 767474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CNTL); 768474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.ctx.cmd[CTX_CMD_2] = cmdpkt(rmesa, RADEON_EMIT_RB3D_COLORPITCH); 76956d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.ctx.cmd[CTX_CMD_3] = cmdpkt(rmesa, R200_EMIT_RB3D_BLENDCOLOR); 770474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lin.cmd[LIN_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RE_LINE_PATTERN); 771474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.lin.cmd[LIN_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_SE_LINE_WIDTH); 772474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msk.cmd[MSK_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RB3D_STENCILREFMASK); 773474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); 774474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.set.cmd[SET_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_CNTL); 775474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msc.cmd[MSC_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_RE_MISC); 776474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CNTL_X); 777474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_1] = cmdpkt(rmesa, R200_EMIT_RB3D_DEPTHXY_OFFSET); 778474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_2] = cmdpkt(rmesa, R200_EMIT_RE_AUX_SCISSOR_CNTL); 779474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_3] = cmdpkt(rmesa, R200_EMIT_RE_SCISSOR_TL_0); 780474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_4] = cmdpkt(rmesa, R200_EMIT_SE_VAP_CNTL_STATUS); 781474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_5] = cmdpkt(rmesa, R200_EMIT_RE_POINTSIZE); 782474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cst.cmd[CST_CMD_6] = cmdpkt(rmesa, R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0); 783474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tam.cmd[TAM_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TAM_DEBUG3); 784474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tf.cmd[TF_CMD_0] = cmdpkt(rmesa, R200_EMIT_TFACTOR_0); 78556d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.atf.cmd[ATF_CMD_0] = cmdpkt(rmesa, R200_EMIT_ATF_TFACTOR); 78656d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_0); 78756d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[0].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_0); 78856d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_1); 78956d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[1].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_1); 79056d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_2); 79156d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[2].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_2); 79256d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_3); 79356d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[3].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_3); 79456d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_4); 79556d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[4].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_4); 79656d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_5); 79756d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[5].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(rmesa, R200_EMIT_PP_TXOFFSET_5); 798474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.afs[0].cmd[AFS_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_AFS_0); 799474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.afs[1].cmd[AFS_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_AFS_1); 800474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pvs.cmd[PVS_CMD_0] = cmdpkt(rmesa, R200_EMIT_VAP_PVS_CNTL); 801474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[0].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_0); 802474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_0); 803474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[1].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_1); 804474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_1); 805474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[2].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_2); 806474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_2); 807474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[3].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_3); 808474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[3].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_3); 809474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[4].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_4); 810474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[4].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_4); 811474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[5].cmd[CUBE_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_FACES_5); 812474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.cube[5].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_5); 813474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[0].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_0); 814474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[1].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_1); 815474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[2].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_2); 816474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[3].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_3); 817474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[4].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_4); 818474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.pix[5].cmd[PIX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCBLEND_5); 819474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.zbs.cmd[ZBS_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_ZBIAS_FACTOR); 820474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcl.cmd[TCL_CMD_0] = cmdpkt(rmesa, R200_EMIT_TCL_LIGHT_MODEL_CTL_0); 821474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcl.cmd[TCL_CMD_1] = cmdpkt(rmesa, R200_EMIT_TCL_UCP_VERT_BLEND_CTL); 822474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.tcg.cmd[TCG_CMD_0] = cmdpkt(rmesa, R200_EMIT_TEX_PROC_CTL_2); 823474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.msl.cmd[MSL_CMD_0] = cmdpkt(rmesa, R200_EMIT_MATRIX_SELECT_0); 824474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vap.cmd[VAP_CMD_0] = cmdpkt(rmesa, R200_EMIT_VAP_CTL); 825474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_0] = cmdpkt(rmesa, R200_EMIT_VTX_FMT_0); 826474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_1] = cmdpkt(rmesa, R200_EMIT_OUTPUT_VTX_COMP_SEL); 827474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vtx.cmd[VTX_CMD_2] = cmdpkt(rmesa, R200_EMIT_SE_VTX_STATE_CNTL); 828474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.vte.cmd[VTE_CMD_0] = cmdpkt(rmesa, R200_EMIT_VTE_CNTL); 829474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.prf.cmd[PRF_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TRI_PERF_CNTL); 830474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie rmesa->hw.spr.cmd[SPR_CMD_0] = cmdpkt(rmesa, R200_EMIT_TCL_POINT_SPRITE_CNTL); 831dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen 832dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.sci.cmd[SCI_CMD_0] = CP_PACKET0(R200_RE_AUX_SCISSOR_CNTL, 0); 833dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.sci.cmd[SCI_CMD_1] = CP_PACKET0(R200_RE_TOP_LEFT, 0); 834dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen rmesa->hw.sci.cmd[SCI_CMD_2] = CP_PACKET0(R200_RE_WIDTH_HEIGHT, 0); 835dbf59de6d2f8be526e97af6c768622e6ca3cf6b1Pauli Nieminen 8362b5618fc5bdcbee3434f8b5aa3a31eb06fb479c0Alex Deucher rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0); 8372b5618fc5bdcbee3434f8b5aa3a31eb06fb479c0Alex Deucher rmesa->hw.stp.cmd[STP_DATA_0] = 0; 8382b5618fc5bdcbee3434f8b5aa3a31eb06fb479c0Alex Deucher rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31); 8397d361537661b93a501c9533271458a41b965ea79Dave Airlie 8404a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.mtl[0].emit = mtl_emit; 8414a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.mtl[1].emit = mtl_emit; 8420f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 8434a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.vpi[0].emit = veclinear_emit; 8444a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.vpi[1].emit = veclinear_emit; 8454a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.vpp[0].emit = veclinear_emit; 8464a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.vpp[1].emit = veclinear_emit; 8470f41259eff62e341e9bfe6ec39f2a7fb8f1c7656Pauli Nieminen 8484a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.grd.emit = scl_emit; 8494a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.fog.emit = vec_emit; 8504a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.glt.emit = vec_emit; 8514a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.eye.emit = vec_emit; 852474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 8534a2f00889ba481c117057da5fac7585327458cc3Eric Anholt for (i = R200_MTX_MV; i <= R200_MTX_TEX5; i++) 8544a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.mat[i].emit = vec_emit; 855474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 8564a2f00889ba481c117057da5fac7585327458cc3Eric Anholt for (i = 0; i < 8; i++) 8574a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.lit[i].emit = lit_emit; 858474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 8594a2f00889ba481c117057da5fac7585327458cc3Eric Anholt for (i = 0; i < 6; i++) 8604a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.ucp[i].emit = vec_emit; 861474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 8624a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->hw.ptp.emit = ptp_emit; 863474d282a1d5435e7b5de40538d65f54e32ce4713Dave Airlie 864adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mtl[0].cmd[MTL_CMD_0] = 865adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MAT_0_EMISS, 1, 16 ); 866adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mtl[0].cmd[MTL_CMD_1] = 867adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl2( R200_SS_MAT_0_SHININESS, 1, 1 ); 868a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger rmesa->hw.mtl[1].cmd[MTL_CMD_0] = 869a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger cmdvec( R200_VS_MAT_1_EMISS, 1, 16 ); 870a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger rmesa->hw.mtl[1].cmd[MTL_CMD_1] = 871a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger cmdscl2( R200_SS_MAT_1_SHININESS, 1, 1 ); 872a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger 87398c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpi[0].cmd[VPI_CMD_0] = 87498c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PROG0, 64 ); 87598c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpi[1].cmd[VPI_CMD_0] = 87698c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PROG1, 64 ); 87798c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpp[0].cmd[VPP_CMD_0] = 87898c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PARAM0, 96 ); 87998c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger rmesa->hw.vpp[1].cmd[VPP_CMD_0] = 88098c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger cmdveclinear( R200_PVS_PARAM1, 96 ); 88198c791b543c4ba86b8bb54488bd872b33b10b1aaRoland Scheidegger 882adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_CMD_0] = 883adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl( R200_SS_VERT_GUARD_CLIP_ADJ_ADDR, 1, 4 ); 884adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.fog.cmd[FOG_CMD_0] = 885adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_FOG_PARAM_ADDR, 1, 4 ); 886adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.glt.cmd[GLT_CMD_0] = 887adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_GLOBAL_AMBIENT_ADDR, 1, 4 ); 888adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_CMD_0] = 889adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_EYE_VECTOR_ADDR, 1, 4 ); 890adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 891adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_MV].cmd[MAT_CMD_0] = 892adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_0_MV, 1, 16); 893adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_IMV].cmd[MAT_CMD_0] = 894adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_1_INV_MV, 1, 16); 895adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_MVP].cmd[MAT_CMD_0] = 896adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_2_MVP, 1, 16); 897adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_TEX0].cmd[MAT_CMD_0] = 898adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_3_TEX0, 1, 16); 899adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.mat[R200_MTX_TEX1].cmd[MAT_CMD_0] = 900adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_MATRIX_4_TEX1, 1, 16); 90148ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX2].cmd[MAT_CMD_0] = 90248ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_5_TEX2, 1, 16); 90348ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX3].cmd[MAT_CMD_0] = 90448ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_6_TEX3, 1, 16); 90548ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX4].cmd[MAT_CMD_0] = 90648ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_7_TEX4, 1, 16); 90748ccaf200940613032dfaaafe71382947f398004Roland Scheidegger rmesa->hw.mat[R200_MTX_TEX5].cmd[MAT_CMD_0] = 90848ccaf200940613032dfaaafe71382947f398004Roland Scheidegger cmdvec( R200_VS_MATRIX_8_TEX5, 1, 16); 909adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 910adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 8; i++) { 911adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lit[i].cmd[LIT_CMD_0] = 912adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_LIGHT_AMBIENT_ADDR + i, 8, 24 ); 913adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lit[i].cmd[LIT_CMD_1] = 914adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdscl( R200_SS_LIGHT_DCD_ADDR + i, 8, 7 ); 915adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 916adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 917adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 6; i++) { 918adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ucp[i].cmd[UCP_CMD_0] = 919adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell cmdvec( R200_VS_UCP_ADDR + i, 1, 4 ); 920adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 921adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 922cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CMD_0] = 923cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger cmdvec( R200_VS_PNT_SPRITE_VPORT_SCALE, 1, 4 ); 924cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CMD_1] = 925cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger cmdvec( R200_VS_PNT_SPRITE_ATT_CONST, 1, 12 ); 926cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger 927adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Initial Harware state: 928adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell */ 929adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_MISC] = (R200_ALPHA_TEST_PASS 930adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* | R200_RIGHT_HAND_CUBE_OGL*/); 931adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 932adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] = (R200_FOG_VERTEX | 933adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FOG_USE_SPEC_ALPHA); 934adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 935adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RE_SOLID_COLOR] = 0x00000000; 936adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 937adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 938033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 939033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 940033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger 94156d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = 0x00000000; 94256d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 943033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 944033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 94556d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_CBLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP | 946033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) | 947033728555cb2f39d8c77f228e1eccc45329bb40aRoland Scheidegger (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT)); 948adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 949adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHOFFSET] = 9504637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->depthOffset + rmesa->radeon.radeonScreen->fbLocation; 951adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 952adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] = 9534637235183b80963536f2364e4d50fcb894886ddDave Airlie ((rmesa->radeon.radeonScreen->depthPitch & 954adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DEPTHPITCH_MASK) | 955adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DEPTH_ENDIAN_NO_SWAP); 956b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger 957b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger if (rmesa->using_hyperz) 958b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] |= R200_DEPTH_HYPERZ; 959adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 960e267a090ab7be5dbd9a40887726e6ae696bc7be3Dave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] = (R200_Z_TEST_LESS | 961adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_TEST_ALWAYS | 962adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_FAIL_KEEP | 963adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_ZPASS_KEEP | 964adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STENCIL_ZFAIL_KEEP | 965adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_Z_WRITE_ENABLE); 966adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 967b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger if (rmesa->using_hyperz) { 968b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= R200_Z_COMPRESSION_ENABLE | 969b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger R200_Z_DECOMPRESSION_ENABLE; 9704637235183b80963536f2364e4d50fcb894886ddDave Airlie/* if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) 971b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_HIERARCHY_ENABLE;*/ 972b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger } 973b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger 974adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.ctx.cmd[CTX_PP_CNTL] = (R200_ANTI_ALIAS_NONE 975adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell | R200_TEX_BLEND_0_ENABLE); 976adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 9774637235183b80963536f2364e4d50fcb894886ddDave Airlie switch ( driQueryOptioni( &rmesa->radeon.optionCache, "dither_mode" ) ) { 978273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane case DRI_CONF_DITHER_XERRORDIFFRESET: 979273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_INIT; 980273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane break; 981273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane case DRI_CONF_DITHER_ORDERED: 982273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_SCALE_DITHER_ENABLE; 983273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane break; 984273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane } 9854637235183b80963536f2364e4d50fcb894886ddDave Airlie if ( driQueryOptioni( &rmesa->radeon.optionCache, "round_mode" ) == 986273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane DRI_CONF_ROUND_ROUND ) 987d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.roundEnable = R200_ROUND_ENABLE; 988273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane else 989d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->radeon.state.color.roundEnable = 0; 9904637235183b80963536f2364e4d50fcb894886ddDave Airlie if ( driQueryOptioni (&rmesa->radeon.optionCache, "color_reduction" ) == 991273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane DRI_CONF_COLOR_REDUCTION_DITHER ) 992273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_ENABLE; 993273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane else 994d29e96bf33e91d071770b86d87ffc4ef4dfc2f70Dave Airlie rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->radeon.state.color.roundEnable; 995273e52f86fa41564f573c8e84d013f995e01a8f0Alan Hourihane 996fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger rmesa->hw.prf.cmd[PRF_PP_TRI_PERF] = R200_TRI_CUTOFF_MASK - R200_TRI_CUTOFF_MASK * 9974637235183b80963536f2364e4d50fcb894886ddDave Airlie driQueryOptionf (&rmesa->radeon.optionCache,"texture_blend_quality"); 998fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger rmesa->hw.prf.cmd[PRF_PP_PERF_CNTL] = 0; 999fbe5296d1463e1052590b744f3d62ebb9e5d5dd4Roland Scheidegger 1000adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.set.cmd[SET_SE_CNTL] = (R200_FFACE_CULL_CCW | 1001adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_BFACE_SOLID | 1002adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FFACE_SOLID | 1003adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FLAT_SHADE_VTX_LAST | 1004adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DIFFUSE_SHADE_GOURAUD | 1005adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ALPHA_SHADE_GOURAUD | 1006adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_SPECULAR_SHADE_GOURAUD | 1007adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_FOG_SHADE_GOURAUD | 1008cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger R200_DISC_FOG_SHADE_GOURAUD | 1009adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_PIX_CENTER_OGL | 1010adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ROUND_MODE_TRUNC | 1011adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_ROUND_PREC_8TH_PIX); 1012adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1013adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.set.cmd[SET_RE_CNTL] = (R200_PERSPECTIVE_ENABLE | 1014adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_SCISSOR_ENABLE); 1015adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1016adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] = ((1 << 16) | 0xffff); 1017adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1018adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_RE_LINE_STATE] = 1019adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_LINE_CURRENT_PTR_SHIFT) | 1020adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_LINE_CURRENT_COUNT_SHIFT)); 1021adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1022adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.lin.cmd[LIN_SE_LINE_WIDTH] = (1 << 4); 1023adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1024adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] = 1025adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0x00 << R200_STENCIL_REF_SHIFT) | 1026adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0xff << R200_STENCIL_MASK_SHIFT) | 1027adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0xff << R200_STENCIL_WRITEMASK_SHIFT)); 1028adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1029adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = R200_ROP_COPY; 1030adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK] = 0xffffffff; 1031adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1032adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tam.cmd[TAM_DEBUG3] = 0; 1033adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1034adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msc.cmd[MSC_RE_MISC] = 1035adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_STIPPLE_X_OFFSET_SHIFT) | 1036adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0 << R200_STIPPLE_Y_OFFSET_SHIFT) | 1037adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_STIPPLE_BIG_BIT_ORDER); 1038adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1039adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1040adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0; 1041adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RB3D_DEPTHXY_OFFSET] = 0; 1042adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_AUX_SCISSOR_CNTL] = 0x0; 1043adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_SCISSOR_TL_0] = 0; 1044adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_RE_SCISSOR_BR_0] = 0; 1045adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] = 1046adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#ifdef MESA_BIG_ENDIAN 1047adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VC_32BIT_SWAP; 1048adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#else 1049adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VC_NO_SWAP; 1050adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell#endif 105110095c9024efb1767fb3df0b59672299c090ad10Eric Anholt 10524637235183b80963536f2364e4d50fcb894886ddDave Airlie if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) { 105310095c9024efb1767fb3df0b59672299c090ad10Eric Anholt /* Bypass TCL */ 105410095c9024efb1767fb3df0b59672299c090ad10Eric Anholt rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] |= (1<<8); 105510095c9024efb1767fb3df0b59672299c090ad10Eric Anholt } 105610095c9024efb1767fb3df0b59672299c090ad10Eric Anholt 105744dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger rmesa->hw.cst.cmd[CST_RE_POINTSIZE] = 105844dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger (((GLuint)(ctx->Const.MaxPointSize * 16.0)) << R200_MAXPOINTSIZE_SHIFT) | 0x10; 1059adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_0] = 1060adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0 << R200_VERTEX_POSITION_ADDR__SHIFT); 1061adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_1] = 1062adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x02 << R200_VTX_COLOR_0_ADDR__SHIFT) | 1063adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x03 << R200_VTX_COLOR_1_ADDR__SHIFT); 1064adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_2] = 1065adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x06 << R200_VTX_TEX_0_ADDR__SHIFT) | 1066adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x07 << R200_VTX_TEX_1_ADDR__SHIFT) | 1067adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x08 << R200_VTX_TEX_2_ADDR__SHIFT) | 1068adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x09 << R200_VTX_TEX_3_ADDR__SHIFT); 1069adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cst.cmd[CST_SE_TCL_INPUT_VTX_3] = 1070adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0A << R200_VTX_TEX_4_ADDR__SHIFT) | 1071adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x0B << R200_VTX_TEX_5_ADDR__SHIFT); 1072adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1073adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1074adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; 1075adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; 1076adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; 1077adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; 1078adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; 1079adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000; 1080adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1081adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for ( i = 0 ; i < ctx->Const.MaxTextureUnits ; i++ ) { 1082adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFILTER] = R200_BORDER_MODE_OGL; 1083adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT] = 1084adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((i << R200_TXFORMAT_ST_ROUTE_SHIFT) | /* <-- note i */ 1085adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TXFORMAT_WIDTH_SHIFT) | 1086adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TXFORMAT_HEIGHT_SHIFT)); 1087adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0; 1088adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] = 1089adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (/* R200_TEXCOORD_PROJ | */ 109076a9831b2b20d59c49b5f25ba5275f17b4e2067bPauli Nieminen R200_LOD_BIAS_CORRECTION); /* Small default bias */ 109156d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_NEWDRM] = 10924637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 109356d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[i].cmd[TEX_PP_CUBIC_FACES] = 0; 109456d30bb00d40cd391d7a469604792a27ddcc459cDave Airlie rmesa->hw.tex[i].cmd[TEX_PP_TXMULTI_CTL] = 0; 1095adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1096adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0; 1097067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F1] = 10984637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1099067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F2] = 11004637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1101067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F3] = 11024637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1103067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F4] = 11044637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1105067603db91072fc3b02e1583195641972f81168fMichel Dänzer rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F5] = 11064637235183b80963536f2364e4d50fcb894886ddDave Airlie rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; 1107adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 11081bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND] = 11091bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger (R200_TXC_ARG_A_ZERO | 11101bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_ARG_B_ZERO | 11111bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_ARG_C_DIFFUSE_COLOR | 11121bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_OP_MADD); 11131bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 11141bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND2] = 11151bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger ((i << R200_TXC_TFACTOR_SEL_SHIFT) | 11161bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_SCALE_1X | 11171bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_CLAMP_0_1 | 11181bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXC_OUTPUT_REG_R0); 11191bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 11201bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXABLEND] = 11211bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger (R200_TXA_ARG_A_ZERO | 11221bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_ARG_B_ZERO | 11231bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_ARG_C_DIFFUSE_ALPHA | 11241bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_OP_MADD); 11251bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger 11261bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger rmesa->hw.pix[i].cmd[PIX_PP_TXABLEND2] = 11271bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger ((i << R200_TXA_TFACTOR_SEL_SHIFT) | 11281bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_SCALE_1X | 11291bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_CLAMP_0_1 | 11301bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger R200_TXA_OUTPUT_REG_R0); 11311bf9499ee172b25a9021e7b00b766e97faa34ad4Roland Scheidegger } 1132adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1133adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_0] = 0; 1134adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_1] = 0; 1135adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_2] = 0; 1136adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_3] = 0; 1137adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_4] = 0; 1138adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tf.cmd[TF_TFACTOR_5] = 0; 1139adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1140adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] = 1141adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VAP_TCL_ENABLE | 1142adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (0x9 << R200_VAP_VF_MAX_VTX_NUM__SHIFT)); 1143adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1144adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] = 1145adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VPORT_X_SCALE_ENA | 1146adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Y_SCALE_ENA | 1147adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Z_SCALE_ENA | 1148adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_X_OFFSET_ENA | 1149adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Y_OFFSET_ENA | 1150adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VPORT_Z_OFFSET_ENA | 1151adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell/* FIXME: Turn on for tex rect only */ 1152adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_ST_DENORMALIZED | 1153adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_VTX_W0_FMT); 1154adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1155adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1156adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_VTXFMT_0] = 0; 1157adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_VTXFMT_1] = 0; 1158adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_0] = 1159adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_VTX_Z0 | R200_VTX_W0 | 1160adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_VTX_FP_RGBA << R200_VTX_COLOR_0_SHIFT))); 1161adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] = 0; 1162adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] = (R200_OUTPUT_XYZW); 1163adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.vtx.cmd[VTX_STATE_CNTL] = R200_VSC_UPDATE_USER_COLOR_0_ENABLE; 1164adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1165adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1166adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Matrix selection */ 1167adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_0] = 1168adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_MV << R200_MODELVIEW_0_SHIFT); 1169adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1170adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_1] = 1171adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_IMV << R200_IT_MODELVIEW_0_SHIFT); 1172adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1173adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_2] = 1174adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_MVP << R200_MODELPROJECT_0_SHIFT); 1175adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1176adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_3] = 1177adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_MTX_TEX0 << R200_TEXMAT_0_SHIFT) | 1178adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX1 << R200_TEXMAT_1_SHIFT) | 1179adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX2 << R200_TEXMAT_2_SHIFT) | 1180adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX3 << R200_TEXMAT_3_SHIFT)); 1181adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1182adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.msl.cmd[MSL_MATRIX_SELECT_4] = 1183adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((R200_MTX_TEX4 << R200_TEXMAT_4_SHIFT) | 1184adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_MTX_TEX5 << R200_TEXMAT_5_SHIFT)); 1185adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1186adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1187adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* General TCL state */ 1188adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0] = 1189adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_SPECULAR_LIGHTS | 1190adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_DIFFUSE_SPECULAR_COMBINE | 1191a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LOCAL_LIGHT_VEC_GL | 1192a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LM0_SOURCE_MATERIAL_0 << R200_FRONT_SHININESS_SOURCE_SHIFT | 1193a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger R200_LM0_SOURCE_MATERIAL_1 << R200_BACK_SHININESS_SOURCE_SHIFT); 1194adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1195adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_1] = 1196a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger ((R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_EMISSIVE_SOURCE_SHIFT) | 1197a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_AMBIENT_SOURCE_SHIFT) | 1198a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_DIFFUSE_SOURCE_SHIFT) | 1199a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_0 << R200_FRONT_SPECULAR_SOURCE_SHIFT) | 1200a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_EMISSIVE_SOURCE_SHIFT) | 1201a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_AMBIENT_SOURCE_SHIFT) | 1202a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_DIFFUSE_SOURCE_SHIFT) | 1203a1b9b1a4409729fa8b6714e5847544576fcee404Roland Scheidegger (R200_LM1_SOURCE_MATERIAL_1 << R200_BACK_SPECULAR_SOURCE_SHIFT)); 1204adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1205adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_0] = 0; /* filled in via callbacks */ 1206adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_1] = 0; 1207adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_2] = 0; 1208adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_PER_LIGHT_CTL_3] = 0; 1209adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1210adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = 1211adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (R200_UCP_IN_CLIP_SPACE | 1212adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell R200_CULL_FRONT_IS_CCW); 1213adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1214adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell /* Texgen/Texmat state */ 1215b1ebd306bf4fdc4076d3d3daa410b08f477cb4c4Eric Anholt rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_2] = 0x00ffffff; 1216adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_3] = 1217adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_TEXGEN_0_INPUT_TEX_SHIFT) | 1218adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_TEXGEN_1_INPUT_TEX_SHIFT) | 1219adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TEXGEN_2_INPUT_TEX_SHIFT) | 1220adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (3 << R200_TEXGEN_3_INPUT_TEX_SHIFT) | 1221adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (4 << R200_TEXGEN_4_INPUT_TEX_SHIFT) | 1222adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (5 << R200_TEXGEN_5_INPUT_TEX_SHIFT)); 1223adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_0] = 0; 1224adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_1] = 1225adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ((0 << R200_TEXGEN_0_INPUT_SHIFT) | 1226adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (1 << R200_TEXGEN_1_INPUT_SHIFT) | 1227adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (2 << R200_TEXGEN_2_INPUT_SHIFT) | 1228adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (3 << R200_TEXGEN_3_INPUT_SHIFT) | 1229adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (4 << R200_TEXGEN_4_INPUT_SHIFT) | 1230adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell (5 << R200_TEXGEN_5_INPUT_SHIFT)); 1231adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.tcg.cmd[TCG_TEX_CYL_WRAP_CTL] = 0; 1232adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1233adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1234adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 8; i++) { 1235adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell struct gl_light *l = &ctx->Light.Light[i]; 1236adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell GLenum p = GL_LIGHT0 + i; 1237adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell *(float *)&(rmesa->hw.lit[i].cmd[LIT_RANGE_CUTOFF]) = FLT_MAX; 1238adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1239adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_AMBIENT, l->Ambient ); 1240adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_DIFFUSE, l->Diffuse ); 1241adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPECULAR, l->Specular ); 12420846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Lightfv( ctx, p, GL_POSITION, NULL ); 12430846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Lightfv( ctx, p, GL_SPOT_DIRECTION, NULL ); 1244adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPOT_EXPONENT, &l->SpotExponent ); 1245adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_SPOT_CUTOFF, &l->SpotCutoff ); 1246adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_CONSTANT_ATTENUATION, 1247adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell &l->ConstantAttenuation ); 1248adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_LINEAR_ATTENUATION, 1249adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell &l->LinearAttenuation ); 1250adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Lightfv( ctx, p, GL_QUADRATIC_ATTENUATION, 1251bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl &l->QuadraticAttenuation ); 12525d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer *(float *)&(rmesa->hw.lit[i].cmd[LIT_ATTEN_XXX]) = 0.0; 1253adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1254adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1255adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.LightModelfv( ctx, GL_LIGHT_MODEL_AMBIENT, 1256adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Light.Model.Ambient ); 1257adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1258adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell TNL_CONTEXT(ctx)->Driver.NotifyMaterialChange( ctx ); 1259adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1260adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell for (i = 0 ; i < 6; i++) { 1261adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.ClipPlane( ctx, GL_CLIP_PLANE0 + i, NULL ); 1262adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell } 1263adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 12640846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Fogfv( ctx, GL_FOG_MODE, NULL ); 1265adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); 1266adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); 1267adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); 1268adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); 12690846e52d46b36c411f79908df010072e03bb6437Brian Paul ctx->Driver.Fogfv( ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL ); 1270adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1271adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_VERT_GUARD_CLIP_ADJ] = IEEE_ONE; 1272adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_VERT_GUARD_DISCARD_ADJ] = IEEE_ONE; 1273adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_HORZ_GUARD_CLIP_ADJ] = IEEE_ONE; 1274adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.grd.cmd[GRD_HORZ_GUARD_DISCARD_ADJ] = IEEE_ONE; 1275adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1276adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_X] = 0; 1277adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_Y] = 0; 1278adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE; 1279adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE; 1280adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell 1281cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] = 1282cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger R200_PS_SE_SEL_STATE | R200_PS_MULT_CONST; 1283cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger 1284cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger /* ptp_eye is presumably used to calculate the attenuation wrt a different 1285cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger location? In any case, since point attenuation triggers _needeyecoords, 1286cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger it is constant. Probably ignored as long as R200_PS_USE_MODEL_EYE_VEC 1287cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger isn't set */ 1288cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_X] = 0; 1289cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_Y] = 0; 1290cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_Z] = IEEE_ONE | 0x80000000; /* -1.0 */ 1291cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_EYE_3] = 0; 1292cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger /* no idea what the ptp_vport_scale values are good for, except the 1293cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger PTSIZE one - hopefully doesn't matter */ 1294cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_0] = IEEE_ONE; 1295cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_1] = IEEE_ONE; 1296cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_PTSIZE] = IEEE_ONE; 1297cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_VPORT_SCALE_3] = IEEE_ONE; 1298cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_QUAD] = 0; 1299cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_LIN] = 0; 1300cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_CON] = IEEE_ONE; 1301cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_ATT_CONST_3] = 0; 1302cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_MIN] = IEEE_ONE; 1303cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_MAX] = 0x44ffe000; /* 2047 */ 1304cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_2] = 0; 1305cb977ae5f4c9fab5753c04bfdd8736978ad4feeeRoland Scheidegger rmesa->hw.ptp.cmd[PTP_CLAMP_3] = 0; 130644dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger 1307adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell r200LightingSpaceChange( ctx ); 130844dace86eaf9eded8e6465adfadf6345658686ddRoland Scheidegger 13094a2f00889ba481c117057da5fac7585327458cc3Eric Anholt radeon_init_query_stateobj(&rmesa->radeon, R200_QUERYOBJ_CMDSIZE); 13104a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->radeon.query.queryobj.cmd[R200_QUERYOBJ_CMD_0] = CP_PACKET0(RADEON_RB3D_ZPASS_DATA, 0); 13114a2f00889ba481c117057da5fac7585327458cc3Eric Anholt rmesa->radeon.query.queryobj.cmd[R200_QUERYOBJ_DATA_0] = 0; 1312b6df23d8b3e70d86433ba9fc4d87338e1063fe39Dave Airlie 13131090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rmesa->radeon.hw.all_dirty = GL_TRUE; 1314ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 13151090d206de011a67d236d8c4ae32d2d42b2f6337Dave Airlie rcommonInitCmdBuf(&rmesa->radeon); 1316adbec39bbf671ad80f6c557801e274cac0d305faKeith Whitwell} 1317