radeon_context.c revision 43bb78f2bb6c851d989903e7eb996e87113d878c 
1/**************************************************************************
2
3Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4                     VA Linux Systems Inc., Fremont, California.
5
6All Rights Reserved.
7
8Permission is hereby granted, free of charge, to any person obtaining
9a copy of this software and associated documentation files (the
10"Software"), to deal in the Software without restriction, including
11without limitation the rights to use, copy, modify, merge, publish,
12distribute, sublicense, and/or sell copies of the Software, and to
13permit persons to whom the Software is furnished to do so, subject to
14the following conditions:
15
16The above copyright notice and this permission notice (including the
17next paragraph) shall be included in all copies or substantial
18portions of the Software.
19
20THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28**************************************************************************/
29
30/*
31 * Authors:
32 *   Kevin E. Martin <martin@valinux.com>
33 *   Gareth Hughes <gareth@valinux.com>
34 *   Keith Whitwell <keith@tungstengraphics.com>
35 */
36
37#include "main/glheader.h"
38#include "main/api_arrayelt.h"
39#include "main/context.h"
40#include "main/simple_list.h"
41#include "main/imports.h"
42#include "main/matrix.h"
43#include "main/extensions.h"
44#include "main/framebuffer.h"
45#include "main/state.h"
46
47#include "swrast/swrast.h"
48#include "swrast_setup/swrast_setup.h"
49#include "vbo/vbo.h"
50
51#include "tnl/tnl.h"
52#include "tnl/t_pipeline.h"
53
54#include "drivers/common/driverfuncs.h"
55
56#include "radeon_context.h"
57#include "radeon_ioctl.h"
58#include "radeon_state.h"
59#include "radeon_span.h"
60#include "radeon_tex.h"
61#include "radeon_swtcl.h"
62#include "radeon_tcl.h"
63#include "radeon_maos.h"
64
65#define need_GL_EXT_blend_minmax
66#define need_GL_EXT_fog_coord
67#define need_GL_EXT_secondary_color
68#include "extension_helper.h"
69
70#define DRIVER_DATE	"20061018"
71
72#include "vblank.h"
73#include "utils.h"
74#include "xmlpool.h" /* for symbolic values of enum-type options */
75#ifndef RADEON_DEBUG
76int RADEON_DEBUG = (0);
77#endif
78
79
80/* Return various strings for glGetString().
81 */
82static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
83{
84   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
85   static char buffer[128];
86   unsigned   offset;
87   GLuint agp_mode = (rmesa->radeonScreen->card_type==RADEON_CARD_PCI) ? 0 :
88      rmesa->radeonScreen->AGPMode;
89
90   switch ( name ) {
91   case GL_VENDOR:
92      return (GLubyte *)"Tungsten Graphics, Inc.";
93
94   case GL_RENDERER:
95      offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
96				     agp_mode );
97
98      sprintf( & buffer[ offset ], " %sTCL",
99	       !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
100	       ? "" : "NO-" );
101
102      return (GLubyte *)buffer;
103
104   default:
105      return NULL;
106   }
107}
108
109
110/* Extension strings exported by the R100 driver.
111 */
112const struct dri_extension card_extensions[] =
113{
114    { "GL_ARB_multitexture",               NULL },
115    { "GL_ARB_texture_border_clamp",       NULL },
116    { "GL_ARB_texture_env_add",            NULL },
117    { "GL_ARB_texture_env_combine",        NULL },
118    { "GL_ARB_texture_env_crossbar",       NULL },
119    { "GL_ARB_texture_env_dot3",           NULL },
120    { "GL_ARB_texture_mirrored_repeat",    NULL },
121    { "GL_EXT_blend_logic_op",             NULL },
122    { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
123    { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
124    { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
125    { "GL_EXT_stencil_wrap",               NULL },
126    { "GL_EXT_texture_edge_clamp",         NULL },
127    { "GL_EXT_texture_env_combine",        NULL },
128    { "GL_EXT_texture_env_dot3",           NULL },
129    { "GL_EXT_texture_filter_anisotropic", NULL },
130    { "GL_EXT_texture_lod_bias",           NULL },
131    { "GL_EXT_texture_mirror_clamp",       NULL },
132    { "GL_ATI_texture_env_combine3",       NULL },
133    { "GL_ATI_texture_mirror_once",        NULL },
134    { "GL_MESA_ycbcr_texture",             NULL },
135    { "GL_NV_blend_square",                NULL },
136    { "GL_SGIS_generate_mipmap",           NULL },
137    { NULL,                                NULL }
138};
139
140extern const struct tnl_pipeline_stage _radeon_render_stage;
141extern const struct tnl_pipeline_stage _radeon_tcl_stage;
142
143static const struct tnl_pipeline_stage *radeon_pipeline[] = {
144
145   /* Try and go straight to t&l
146    */
147   &_radeon_tcl_stage,
148
149   /* Catch any t&l fallbacks
150    */
151   &_tnl_vertex_transform_stage,
152   &_tnl_normal_transform_stage,
153   &_tnl_lighting_stage,
154   &_tnl_fog_coordinate_stage,
155   &_tnl_texgen_stage,
156   &_tnl_texture_transform_stage,
157
158   &_radeon_render_stage,
159   &_tnl_render_stage,		/* FALLBACK:  */
160   NULL,
161};
162
163
164
165/* Initialize the driver's misc functions.
166 */
167static void radeonInitDriverFuncs( struct dd_function_table *functions )
168{
169    functions->GetString	= radeonGetString;
170}
171
172static const struct dri_debug_control debug_control[] =
173{
174    { "fall",  DEBUG_FALLBACKS },
175    { "tex",   DEBUG_TEXTURE },
176    { "ioctl", DEBUG_IOCTL },
177    { "prim",  DEBUG_PRIMS },
178    { "vert",  DEBUG_VERTS },
179    { "state", DEBUG_STATE },
180    { "code",  DEBUG_CODEGEN },
181    { "vfmt",  DEBUG_VFMT },
182    { "vtxf",  DEBUG_VFMT },
183    { "verb",  DEBUG_VERBOSE },
184    { "dri",   DEBUG_DRI },
185    { "dma",   DEBUG_DMA },
186    { "san",   DEBUG_SANITY },
187    { "sync",  DEBUG_SYNC },
188    { NULL,    0 }
189};
190
191
192/* Create the device specific context.
193 */
194GLboolean
195radeonCreateContext( const __GLcontextModes *glVisual,
196                     __DRIcontextPrivate *driContextPriv,
197                     void *sharedContextPrivate)
198{
199   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
200   radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
201   struct dd_function_table functions;
202   radeonContextPtr rmesa;
203   GLcontext *ctx, *shareCtx;
204   int i;
205   int tcl_mode, fthrottle_mode;
206
207   assert(glVisual);
208   assert(driContextPriv);
209   assert(screen);
210
211   /* Allocate the Radeon context */
212   rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
213   if ( !rmesa )
214      return GL_FALSE;
215
216   /* init exp fog table data */
217   radeonInitStaticFogData();
218
219   /* Parse configuration files.
220    * Do this here so that initialMaxAnisotropy is set before we create
221    * the default textures.
222    */
223   driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
224			screen->driScreen->myNum, "radeon");
225   rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
226                                                 "def_max_anisotropy");
227
228   if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
229      if ( sPriv->drm_version.minor < 13 )
230	 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
231			  "disabling.\n", sPriv->drm_version.minor );
232      else
233	 rmesa->using_hyperz = GL_TRUE;
234   }
235
236   if ( sPriv->drm_version.minor >= 15 )
237      rmesa->texmicrotile = GL_TRUE;
238
239   /* Init default driver functions then plug in our Radeon-specific functions
240    * (the texture functions are especially important)
241    */
242   _mesa_init_driver_functions( &functions );
243   radeonInitDriverFuncs( &functions );
244   radeonInitTextureFuncs( &functions );
245
246   /* Allocate the Mesa context */
247   if (sharedContextPrivate)
248      shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
249   else
250      shareCtx = NULL;
251   rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
252                                       &functions, (void *) rmesa);
253   if (!rmesa->glCtx) {
254      FREE(rmesa);
255      return GL_FALSE;
256   }
257   driContextPriv->driverPrivate = rmesa;
258
259   /* Init radeon context data */
260   rmesa->dri.context = driContextPriv;
261   rmesa->dri.screen = sPriv;
262   rmesa->dri.drawable = NULL;
263   rmesa->dri.readable = NULL;
264   rmesa->dri.hwContext = driContextPriv->hHWContext;
265   rmesa->dri.hwLock = &sPriv->pSAREA->lock;
266   rmesa->dri.fd = sPriv->fd;
267   rmesa->dri.drmMinor = sPriv->drm_version.minor;
268
269   rmesa->radeonScreen = screen;
270   rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
271				       screen->sarea_priv_offset);
272
273
274   rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
275
276   (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
277   make_empty_list( & rmesa->swapped );
278
279   rmesa->nr_heaps = screen->numTexHeaps;
280   for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
281      rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
282	    screen->texSize[i],
283	    12,
284	    RADEON_NR_TEX_REGIONS,
285	    (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
286	    & rmesa->sarea->tex_age[i],
287	    & rmesa->swapped,
288	    sizeof( radeonTexObj ),
289	    (destroy_texture_object_t *) radeonDestroyTexObj );
290
291      driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
292					& rmesa->c_textureSwaps );
293   }
294   rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
295					   "texture_depth");
296   if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
297      rmesa->texture_depth = ( screen->cpp == 4 ) ?
298	 DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
299
300   rmesa->swtcl.RenderIndex = ~0;
301   rmesa->hw.all_dirty = GL_TRUE;
302
303   /* Set the maximum texture size small enough that we can guarentee that
304    * all texture units can bind a maximal texture and have all of them in
305    * texturable memory at once. Depending on the allow_large_textures driconf
306    * setting allow larger textures.
307    */
308
309   ctx = rmesa->glCtx;
310   ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->optionCache,
311						 "texture_units");
312   ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
313   ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
314
315   i = driQueryOptioni( &rmesa->optionCache, "allow_large_textures");
316
317   driCalculateMaxTextureLevels( rmesa->texture_heaps,
318				 rmesa->nr_heaps,
319				 & ctx->Const,
320				 4,
321				 11, /* max 2D texture size is 2048x2048 */
322				 8,  /* 256^3 */
323				 9,  /* \todo: max cube texture size seems to be 512x512(x6) */
324				 11, /* max rect texture size is 2048x2048. */
325				 12,
326				 GL_FALSE,
327				 i );
328
329
330   ctx->Const.MaxTextureMaxAnisotropy = 16.0;
331
332   /* No wide points.
333    */
334   ctx->Const.MinPointSize = 1.0;
335   ctx->Const.MinPointSizeAA = 1.0;
336   ctx->Const.MaxPointSize = 1.0;
337   ctx->Const.MaxPointSizeAA = 1.0;
338
339   ctx->Const.MinLineWidth = 1.0;
340   ctx->Const.MinLineWidthAA = 1.0;
341   ctx->Const.MaxLineWidth = 10.0;
342   ctx->Const.MaxLineWidthAA = 10.0;
343   ctx->Const.LineWidthGranularity = 0.0625;
344
345   /* Set maxlocksize (and hence vb size) small enough to avoid
346    * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
347    * fit in a single dma buffer for indexed rendering of quad strips,
348    * etc.
349    */
350   ctx->Const.MaxArrayLockSize =
351      MIN2( ctx->Const.MaxArrayLockSize,
352 	    RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
353
354   rmesa->boxes = 0;
355
356   ctx->Const.MaxDrawBuffers = 1;
357
358   _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
359
360   /* Initialize the software rasterizer and helper modules.
361    */
362   _swrast_CreateContext( ctx );
363   _vbo_CreateContext( ctx );
364   _tnl_CreateContext( ctx );
365   _swsetup_CreateContext( ctx );
366   _ae_create_context( ctx );
367
368   /* Install the customized pipeline:
369    */
370   _tnl_destroy_pipeline( ctx );
371   _tnl_install_pipeline( ctx, radeon_pipeline );
372
373   /* Try and keep materials and vertices separate:
374    */
375/*    _tnl_isolate_materials( ctx, GL_TRUE ); */
376
377   /* Configure swrast and T&L to match hardware characteristics:
378    */
379   _swrast_allow_pixel_fog( ctx, GL_FALSE );
380   _swrast_allow_vertex_fog( ctx, GL_TRUE );
381   _tnl_allow_pixel_fog( ctx, GL_FALSE );
382   _tnl_allow_vertex_fog( ctx, GL_TRUE );
383
384
385   for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) {
386      _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
387      _math_matrix_ctr( &rmesa->tmpmat[i] );
388      _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
389      _math_matrix_set_identity( &rmesa->tmpmat[i] );
390   }
391
392   driInitExtensions( ctx, card_extensions, GL_TRUE );
393   if (rmesa->radeonScreen->drmSupportsCubeMapsR100)
394      _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
395   if (rmesa->glCtx->Mesa_DXTn) {
396      _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
397      _mesa_enable_extension( ctx, "GL_S3_s3tc" );
398   }
399   else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
400      _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
401   }
402
403   if (rmesa->dri.drmMinor >= 9)
404      _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
405
406   /* XXX these should really go right after _mesa_init_driver_functions() */
407   radeonInitIoctlFuncs( ctx );
408   radeonInitStateFuncs( ctx );
409   radeonInitSpanFuncs( ctx );
410   radeonInitState( rmesa );
411   radeonInitSwtcl( ctx );
412
413   _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
414			 ctx->Const.MaxArrayLockSize, 32 );
415
416   fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
417   rmesa->iw.irq_seq = -1;
418   rmesa->irqsEmitted = 0;
419   rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
420		     fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
421
422   rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
423
424   (*sPriv->systemTime->getUST)( & rmesa->swap_ust );
425
426
427#if DO_DEBUG
428   RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
429				       debug_control );
430#endif
431
432   tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
433   if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
434      fprintf(stderr, "disabling 3D acceleration\n");
435      FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
436   } else if (tcl_mode == DRI_CONF_TCL_SW ||
437	      !(rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
438      if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
439	 rmesa->radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
440	 fprintf(stderr, "Disabling HW TCL support\n");
441      }
442      TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
443   }
444
445   if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
446/*       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
447   }
448   return GL_TRUE;
449}
450
451
452/* Destroy the device specific context.
453 */
454/* Destroy the Mesa and driver specific context data.
455 */
456void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
457{
458   GET_CURRENT_CONTEXT(ctx);
459   radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
460   radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
461
462   /* check if we're deleting the currently bound context */
463   if (rmesa == current) {
464      RADEON_FIREVERTICES( rmesa );
465      _mesa_make_current(NULL, NULL, NULL);
466   }
467
468   /* Free radeon context resources */
469   assert(rmesa); /* should never be null */
470   if ( rmesa ) {
471      GLboolean   release_texture_heaps;
472
473
474      release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
475      _swsetup_DestroyContext( rmesa->glCtx );
476      _tnl_DestroyContext( rmesa->glCtx );
477      _vbo_DestroyContext( rmesa->glCtx );
478      _swrast_DestroyContext( rmesa->glCtx );
479
480      radeonDestroySwtcl( rmesa->glCtx );
481      radeonReleaseArrays( rmesa->glCtx, ~0 );
482      if (rmesa->dma.current.buf) {
483	 radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
484	 radeonFlushCmdBuf( rmesa, __FUNCTION__ );
485      }
486
487      _mesa_vector4f_free( &rmesa->tcl.ObjClean );
488
489      if (rmesa->state.scissor.pClipRects) {
490	 FREE(rmesa->state.scissor.pClipRects);
491	 rmesa->state.scissor.pClipRects = NULL;
492      }
493
494      if ( release_texture_heaps ) {
495         /* This share group is about to go away, free our private
496          * texture object data.
497          */
498         int i;
499
500         for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
501	    driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
502	    rmesa->texture_heaps[ i ] = NULL;
503         }
504
505	 assert( is_empty_list( & rmesa->swapped ) );
506      }
507
508      /* free the Mesa context */
509      rmesa->glCtx->DriverCtx = NULL;
510      _mesa_destroy_context( rmesa->glCtx );
511
512      /* free the option cache */
513      driDestroyOptionCache (&rmesa->optionCache);
514
515      FREE( rmesa );
516   }
517}
518
519
520
521
522void
523radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
524{
525
526   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
527      radeonContextPtr rmesa;
528      GLcontext *ctx;
529      rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
530      ctx = rmesa->glCtx;
531      if (ctx->Visual.doubleBufferMode) {
532         _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
533
534         if ( rmesa->doPageFlip ) {
535            radeonPageFlip( dPriv );
536         }
537         else {
538	     radeonCopyBuffer( dPriv, NULL );
539         }
540      }
541   }
542   else {
543      /* XXX this shouldn't be an error but we can't handle it for now */
544      _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
545   }
546}
547
548void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv,
549			 int x, int y, int w, int h )
550{
551    if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
552	radeonContextPtr radeon;
553	GLcontext *ctx;
554
555	radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
556	ctx = radeon->glCtx;
557
558	if (ctx->Visual.doubleBufferMode) {
559	    drm_clip_rect_t rect;
560	    rect.x1 = x + dPriv->x;
561	    rect.y1 = (dPriv->h - y - h) + dPriv->y;
562	    rect.x2 = rect.x1 + w;
563	    rect.y2 = rect.y1 + h;
564	    _mesa_notifySwapBuffers(ctx);	/* flush pending rendering comands */
565	    radeonCopyBuffer(dPriv, &rect);
566	}
567    } else {
568	/* XXX this shouldn't be an error but we can't handle it for now */
569	_mesa_problem(NULL, "%s: drawable has no context!",
570		      __FUNCTION__);
571    }
572}
573
574/* Make context `c' the current context and bind it to the given
575 * drawing and reading surfaces.
576 */
577GLboolean
578radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
579                   __DRIdrawablePrivate *driDrawPriv,
580                   __DRIdrawablePrivate *driReadPriv )
581{
582   if ( driContextPriv ) {
583      radeonContextPtr newCtx =
584	 (radeonContextPtr) driContextPriv->driverPrivate;
585
586      if (RADEON_DEBUG & DEBUG_DRI)
587	 fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
588
589      newCtx->dri.readable = driReadPriv;
590
591      if ( (newCtx->dri.drawable != driDrawPriv) ||
592           newCtx->lastStamp != driDrawPriv->lastStamp ) {
593	 if (driDrawPriv->swap_interval == (unsigned)-1) {
594	    driDrawPriv->vblFlags = (newCtx->radeonScreen->irq != 0)
595	       ? driGetDefaultVBlankFlags(&newCtx->optionCache)
596	       : VBLANK_FLAG_NO_IRQ;
597
598	    driDrawableInitVBlank( driDrawPriv );
599	 }
600
601	 newCtx->dri.drawable = driDrawPriv;
602
603	 radeonSetCliprects(newCtx);
604	 radeonUpdateViewportOffset( newCtx->glCtx );
605      }
606
607      _mesa_make_current( newCtx->glCtx,
608			  (GLframebuffer *) driDrawPriv->driverPrivate,
609			  (GLframebuffer *) driReadPriv->driverPrivate );
610
611      _mesa_update_state( newCtx->glCtx );
612   } else {
613      if (RADEON_DEBUG & DEBUG_DRI)
614	 fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
615      _mesa_make_current( NULL, NULL, NULL );
616   }
617
618   if (RADEON_DEBUG & DEBUG_DRI)
619      fprintf(stderr, "End %s\n", __FUNCTION__);
620   return GL_TRUE;
621}
622
623/* Force the context `c' to be unbound from its buffer.
624 */
625GLboolean
626radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
627{
628   radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
629
630   if (RADEON_DEBUG & DEBUG_DRI)
631      fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
632
633   return GL_TRUE;
634}
635