radeon_context.h revision 1090d206de011a67d236d8c4ae32d2d42b2f6337
1/************************************************************************** 2 3Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 4 VA Linux Systems Inc., Fremont, California. 5Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 6 7The Weather Channel (TM) funded Tungsten Graphics to develop the 8initial release of the Radeon 8500 driver under the XFree86 license. 9This notice must be preserved. 10 11All Rights Reserved. 12 13Permission is hereby granted, free of charge, to any person obtaining 14a copy of this software and associated documentation files (the 15"Software"), to deal in the Software without restriction, including 16without limitation the rights to use, copy, modify, merge, publish, 17distribute, sublicense, and/or sell copies of the Software, and to 18permit persons to whom the Software is furnished to do so, subject to 19the following conditions: 20 21The above copyright notice and this permission notice (including the 22next paragraph) shall be included in all copies or substantial 23portions of the Software. 24 25THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 28IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 29LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 30OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 31WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 32 33**************************************************************************/ 34 35/* 36 * Authors: 37 * Gareth Hughes <gareth@valinux.com> 38 * Keith Whitwell <keith@tungstengraphics.com> 39 * Kevin E. Martin <martin@valinux.com> 40 * Nicolai Haehnle <prefect_@gmx.net> 41 */ 42 43#ifndef __RADEON_CONTEXT_H__ 44#define __RADEON_CONTEXT_H__ 45 46#include "tnl/t_vertex.h" 47#include "dri_util.h" 48#include "drm.h" 49#include "radeon_drm.h" 50#include "texmem.h" 51#include "main/macros.h" 52#include "main/mtypes.h" 53#include "main/colormac.h" 54#include "radeon_screen.h" 55 56#include "common_context.h" 57#include "common_misc.h" 58 59 60struct r100_context; 61typedef struct r100_context r100ContextRec; 62typedef struct r100_context *r100ContextPtr; 63 64#include "radeon_lock.h" 65 66 67 68#define R100_TEX_ALL 0x7 69 70/* used for both tcl_vtx and vc_frmt tex bits (they are identical) */ 71#define RADEON_ST_BIT(unit) \ 72(unit == 0 ? RADEON_CP_VC_FRMT_ST0 : (RADEON_CP_VC_FRMT_ST1 >> 2) << (2 * unit)) 73 74#define RADEON_Q_BIT(unit) \ 75(unit == 0 ? RADEON_CP_VC_FRMT_Q0 : (RADEON_CP_VC_FRMT_Q1 >> 2) << (2 * unit)) 76 77struct radeon_texture_env_state { 78 radeonTexObjPtr texobj; 79 GLenum format; 80 GLenum envMode; 81}; 82 83struct radeon_texture_state { 84 struct radeon_texture_env_state unit[RADEON_MAX_TEXTURE_UNITS]; 85}; 86 87/* Trying to keep these relatively short as the variables are becoming 88 * extravagently long. Drop the driver name prefix off the front of 89 * everything - I think we know which driver we're in by now, and keep the 90 * prefix to 3 letters unless absolutely impossible. 91 */ 92 93#define CTX_CMD_0 0 94#define CTX_PP_MISC 1 95#define CTX_PP_FOG_COLOR 2 96#define CTX_RE_SOLID_COLOR 3 97#define CTX_RB3D_BLENDCNTL 4 98#define CTX_RB3D_DEPTHOFFSET 5 99#define CTX_RB3D_DEPTHPITCH 6 100#define CTX_RB3D_ZSTENCILCNTL 7 101#define CTX_CMD_1 8 102#define CTX_PP_CNTL 9 103#define CTX_RB3D_CNTL 10 104#define CTX_RB3D_COLOROFFSET 11 105#define CTX_CMD_2 12 106#define CTX_RB3D_COLORPITCH 13 107#define CTX_STATE_SIZE 14 108 109#define SET_CMD_0 0 110#define SET_SE_CNTL 1 111#define SET_SE_COORDFMT 2 112#define SET_CMD_1 3 113#define SET_SE_CNTL_STATUS 4 114#define SET_STATE_SIZE 5 115 116#define LIN_CMD_0 0 117#define LIN_RE_LINE_PATTERN 1 118#define LIN_RE_LINE_STATE 2 119#define LIN_CMD_1 3 120#define LIN_SE_LINE_WIDTH 4 121#define LIN_STATE_SIZE 5 122 123#define MSK_CMD_0 0 124#define MSK_RB3D_STENCILREFMASK 1 125#define MSK_RB3D_ROPCNTL 2 126#define MSK_RB3D_PLANEMASK 3 127#define MSK_STATE_SIZE 4 128 129#define VPT_CMD_0 0 130#define VPT_SE_VPORT_XSCALE 1 131#define VPT_SE_VPORT_XOFFSET 2 132#define VPT_SE_VPORT_YSCALE 3 133#define VPT_SE_VPORT_YOFFSET 4 134#define VPT_SE_VPORT_ZSCALE 5 135#define VPT_SE_VPORT_ZOFFSET 6 136#define VPT_STATE_SIZE 7 137 138#define MSC_CMD_0 0 139#define MSC_RE_MISC 1 140#define MSC_STATE_SIZE 2 141 142#define TEX_CMD_0 0 143#define TEX_PP_TXFILTER 1 144#define TEX_PP_TXFORMAT 2 145#define TEX_PP_TXOFFSET 3 146#define TEX_PP_TXCBLEND 4 147#define TEX_PP_TXABLEND 5 148#define TEX_PP_TFACTOR 6 149#define TEX_CMD_1 7 150#define TEX_PP_BORDER_COLOR 8 151#define TEX_STATE_SIZE 9 152 153#define TXR_CMD_0 0 /* rectangle textures */ 154#define TXR_PP_TEX_SIZE 1 /* 0x1d04, 0x1d0c for NPOT! */ 155#define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */ 156#define TXR_STATE_SIZE 3 157 158#define CUBE_CMD_0 0 159#define CUBE_PP_CUBIC_FACES 1 160#define CUBE_CMD_1 2 161#define CUBE_PP_CUBIC_OFFSET_0 3 162#define CUBE_PP_CUBIC_OFFSET_1 4 163#define CUBE_PP_CUBIC_OFFSET_2 5 164#define CUBE_PP_CUBIC_OFFSET_3 6 165#define CUBE_PP_CUBIC_OFFSET_4 7 166#define CUBE_STATE_SIZE 8 167 168#define ZBS_CMD_0 0 169#define ZBS_SE_ZBIAS_FACTOR 1 170#define ZBS_SE_ZBIAS_CONSTANT 2 171#define ZBS_STATE_SIZE 3 172 173#define TCL_CMD_0 0 174#define TCL_OUTPUT_VTXFMT 1 175#define TCL_OUTPUT_VTXSEL 2 176#define TCL_MATRIX_SELECT_0 3 177#define TCL_MATRIX_SELECT_1 4 178#define TCL_UCP_VERT_BLEND_CTL 5 179#define TCL_TEXTURE_PROC_CTL 6 180#define TCL_LIGHT_MODEL_CTL 7 181#define TCL_PER_LIGHT_CTL_0 8 182#define TCL_PER_LIGHT_CTL_1 9 183#define TCL_PER_LIGHT_CTL_2 10 184#define TCL_PER_LIGHT_CTL_3 11 185#define TCL_STATE_SIZE 12 186 187#define MTL_CMD_0 0 188#define MTL_EMMISSIVE_RED 1 189#define MTL_EMMISSIVE_GREEN 2 190#define MTL_EMMISSIVE_BLUE 3 191#define MTL_EMMISSIVE_ALPHA 4 192#define MTL_AMBIENT_RED 5 193#define MTL_AMBIENT_GREEN 6 194#define MTL_AMBIENT_BLUE 7 195#define MTL_AMBIENT_ALPHA 8 196#define MTL_DIFFUSE_RED 9 197#define MTL_DIFFUSE_GREEN 10 198#define MTL_DIFFUSE_BLUE 11 199#define MTL_DIFFUSE_ALPHA 12 200#define MTL_SPECULAR_RED 13 201#define MTL_SPECULAR_GREEN 14 202#define MTL_SPECULAR_BLUE 15 203#define MTL_SPECULAR_ALPHA 16 204#define MTL_SHININESS 17 205#define MTL_STATE_SIZE 18 206 207#define VTX_CMD_0 0 208#define VTX_SE_COORD_FMT 1 209#define VTX_STATE_SIZE 2 210 211#define MAT_CMD_0 0 212#define MAT_ELT_0 1 213#define MAT_STATE_SIZE 17 214 215#define GRD_CMD_0 0 216#define GRD_VERT_GUARD_CLIP_ADJ 1 217#define GRD_VERT_GUARD_DISCARD_ADJ 2 218#define GRD_HORZ_GUARD_CLIP_ADJ 3 219#define GRD_HORZ_GUARD_DISCARD_ADJ 4 220#define GRD_STATE_SIZE 5 221 222/* position changes frequently when lighting in modelpos - separate 223 * out to new state item? 224 */ 225#define LIT_CMD_0 0 226#define LIT_AMBIENT_RED 1 227#define LIT_AMBIENT_GREEN 2 228#define LIT_AMBIENT_BLUE 3 229#define LIT_AMBIENT_ALPHA 4 230#define LIT_DIFFUSE_RED 5 231#define LIT_DIFFUSE_GREEN 6 232#define LIT_DIFFUSE_BLUE 7 233#define LIT_DIFFUSE_ALPHA 8 234#define LIT_SPECULAR_RED 9 235#define LIT_SPECULAR_GREEN 10 236#define LIT_SPECULAR_BLUE 11 237#define LIT_SPECULAR_ALPHA 12 238#define LIT_POSITION_X 13 239#define LIT_POSITION_Y 14 240#define LIT_POSITION_Z 15 241#define LIT_POSITION_W 16 242#define LIT_DIRECTION_X 17 243#define LIT_DIRECTION_Y 18 244#define LIT_DIRECTION_Z 19 245#define LIT_DIRECTION_W 20 246#define LIT_ATTEN_QUADRATIC 21 247#define LIT_ATTEN_LINEAR 22 248#define LIT_ATTEN_CONST 23 249#define LIT_ATTEN_XXX 24 250#define LIT_CMD_1 25 251#define LIT_SPOT_DCD 26 252#define LIT_SPOT_EXPONENT 27 253#define LIT_SPOT_CUTOFF 28 254#define LIT_SPECULAR_THRESH 29 255#define LIT_RANGE_CUTOFF 30 /* ? */ 256#define LIT_ATTEN_CONST_INV 31 257#define LIT_STATE_SIZE 32 258 259/* Fog 260 */ 261#define FOG_CMD_0 0 262#define FOG_R 1 263#define FOG_C 2 264#define FOG_D 3 265#define FOG_PAD 4 266#define FOG_STATE_SIZE 5 267 268/* UCP 269 */ 270#define UCP_CMD_0 0 271#define UCP_X 1 272#define UCP_Y 2 273#define UCP_Z 3 274#define UCP_W 4 275#define UCP_STATE_SIZE 5 276 277/* GLT - Global ambient 278 */ 279#define GLT_CMD_0 0 280#define GLT_RED 1 281#define GLT_GREEN 2 282#define GLT_BLUE 3 283#define GLT_ALPHA 4 284#define GLT_STATE_SIZE 5 285 286/* EYE 287 */ 288#define EYE_CMD_0 0 289#define EYE_X 1 290#define EYE_Y 2 291#define EYE_Z 3 292#define EYE_RESCALE_FACTOR 4 293#define EYE_STATE_SIZE 5 294 295#define SHN_CMD_0 0 296#define SHN_SHININESS 1 297#define SHN_STATE_SIZE 2 298 299struct r100_hw_state { 300 /* Hardware state, stored as cmdbuf commands: 301 * -- Need to doublebuffer for 302 * - eliding noop statechange loops? (except line stipple count) 303 */ 304 struct radeon_state_atom ctx; 305 struct radeon_state_atom set; 306 struct radeon_state_atom lin; 307 struct radeon_state_atom msk; 308 struct radeon_state_atom vpt; 309 struct radeon_state_atom tcl; 310 struct radeon_state_atom msc; 311 struct radeon_state_atom tex[3]; 312 struct radeon_state_atom cube[3]; 313 struct radeon_state_atom zbs; 314 struct radeon_state_atom mtl; 315 struct radeon_state_atom mat[6]; 316 struct radeon_state_atom lit[8]; /* includes vec, scl commands */ 317 struct radeon_state_atom ucp[6]; 318 struct radeon_state_atom eye; /* eye pos */ 319 struct radeon_state_atom grd; /* guard band clipping */ 320 struct radeon_state_atom fog; 321 struct radeon_state_atom glt; 322 struct radeon_state_atom txr[3]; /* for NPOT */ 323 324}; 325 326 327struct r100_state { 328 struct radeon_stipple_state stipple; 329 struct radeon_texture_state texture; 330}; 331 332#define RADEON_CMD_BUF_SZ (8*1024) 333#define R200_ELT_BUF_SZ (8*1024) 334/* radeon_tcl.c 335 */ 336struct radeon_tcl_info { 337 GLuint vertex_format; 338 GLuint hw_primitive; 339 340 /* Temporary for cases where incoming vertex data is incompatible 341 * with maos code. 342 */ 343 GLvector4f ObjClean; 344 345 struct radeon_aos aos[8]; 346 GLuint nr_aos_components; 347 348 GLuint *Elts; 349 350 struct radeon_bo *indexed_bo; 351 352 int elt_cmd_offset; /** Offset into the cmdbuf */ 353 int elt_cmd_start; 354 int elt_used; 355}; 356 357/* radeon_swtcl.c 358 */ 359struct r100_swtcl_info { 360 GLuint vertex_format; 361 362 GLubyte *verts; 363 364 /* Fallback rasterization functions 365 */ 366 radeon_point_func draw_point; 367 radeon_line_func draw_line; 368 radeon_tri_func draw_tri; 369 370 /** 371 * Offset of the 4UB color data within a hardware (swtcl) vertex. 372 */ 373 GLuint coloroffset; 374 375 /** 376 * Offset of the 3UB specular color data within a hardware (swtcl) vertex. 377 */ 378 GLuint specoffset; 379 380 GLboolean needproj; 381}; 382 383 384 385/* A maximum total of 20 elements per vertex: 3 floats for position, 3 386 * floats for normal, 4 floats for color, 4 bytes for secondary color, 387 * 3 floats for each texture unit (9 floats total). 388 * 389 * The position data is never actually stored here, so 3 elements could be 390 * trimmed out of the buffer. This number is only valid for vtxfmt! 391 */ 392#define RADEON_MAX_VERTEX_SIZE 20 393 394struct r100_context { 395 struct radeon_context radeon; 396 397 /* Driver and hardware state management 398 */ 399 struct r100_hw_state hw; 400 struct r100_state state; 401 402 /* Vertex buffers 403 */ 404 struct radeon_ioctl ioctl; 405 struct radeon_store store; 406 407 /* TCL stuff 408 */ 409 GLmatrix TexGenMatrix[RADEON_MAX_TEXTURE_UNITS]; 410 GLboolean recheck_texgen[RADEON_MAX_TEXTURE_UNITS]; 411 GLboolean TexGenNeedNormals[RADEON_MAX_TEXTURE_UNITS]; 412 GLuint TexGenEnabled; 413 GLuint NeedTexMatrix; 414 GLuint TexMatColSwap; 415 GLmatrix tmpmat[RADEON_MAX_TEXTURE_UNITS]; 416 GLuint last_ReallyEnabled; 417 418 /* radeon_tcl.c 419 */ 420 struct radeon_tcl_info tcl; 421 422 /* radeon_swtcl.c 423 */ 424 struct r100_swtcl_info swtcl; 425 426 GLboolean using_hyperz; 427 GLboolean texmicrotile; 428 429 /* Performance counters 430 */ 431 GLuint boxes; /* Draw performance boxes */ 432 GLuint hardwareWentIdle; 433 GLuint c_clears; 434 GLuint c_drawWaits; 435 GLuint c_textureSwaps; 436 GLuint c_textureBytes; 437 GLuint c_vertexBuffers; 438 439}; 440 441#define R100_CONTEXT(ctx) ((r100ContextPtr)(ctx->DriverCtx)) 442 443 444#define RADEON_OLD_PACKETS 1 445 446extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv); 447extern GLboolean radeonCreateContext(const __GLcontextModes * glVisual, 448 __DRIcontextPrivate * driContextPriv, 449 void *sharedContextPrivate); 450extern GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, 451 __DRIdrawablePrivate * driDrawPriv, 452 __DRIdrawablePrivate * driReadPriv); 453extern GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv); 454 455 456 457#endif /* __RADEON_CONTEXT_H__ */ 458