radeon_screen.c revision 350a1676357301f3d103b6d16d01c766644bf872 
1/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.7 2003/03/26 20:43:51 tsi Exp $ */
2/**************************************************************************
3
4Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5                     VA Linux Systems Inc., Fremont, California.
6
7All Rights Reserved.
8
9Permission is hereby granted, free of charge, to any person obtaining
10a copy of this software and associated documentation files (the
11"Software"), to deal in the Software without restriction, including
12without limitation the rights to use, copy, modify, merge, publish,
13distribute, sublicense, and/or sell copies of the Software, and to
14permit persons to whom the Software is furnished to do so, subject to
15the following conditions:
16
17The above copyright notice and this permission notice (including the
18next paragraph) shall be included in all copies or substantial
19portions of the Software.
20
21THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28
29**************************************************************************/
30
31/**
32 * \file radeon_screen.c
33 * Screen initialization functions for the Radeon driver.
34 *
35 * \author Kevin E. Martin <martin@valinux.com>
36 * \author  Gareth Hughes <gareth@valinux.com>
37 */
38
39#include "glheader.h"
40#include "imports.h"
41#include "mtypes.h"
42#include "framebuffer.h"
43#include "renderbuffer.h"
44
45#define STANDALONE_MMIO
46#include "radeon_context.h"
47#include "radeon_screen.h"
48#include "radeon_macros.h"
49#include "radeon_span.h"
50
51#include "utils.h"
52#include "context.h"
53#include "vblank.h"
54#include "drirenderbuffer.h"
55
56#include "GL/internal/dri_interface.h"
57
58/* Radeon configuration
59 */
60#include "xmlpool.h"
61
62PUBLIC const char __driConfigOptions[] =
63DRI_CONF_BEGIN
64    DRI_CONF_SECTION_PERFORMANCE
65        DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
66        DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
67        DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
68        DRI_CONF_HYPERZ(false)
69    DRI_CONF_SECTION_END
70    DRI_CONF_SECTION_QUALITY
71        DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
72        DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
73        DRI_CONF_NO_NEG_LOD_BIAS(false)
74        DRI_CONF_FORCE_S3TC_ENABLE(false)
75        DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
76        DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
77        DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
78        DRI_CONF_TEXTURE_LEVEL_HACK(false)
79    DRI_CONF_SECTION_END
80    DRI_CONF_SECTION_DEBUG
81        DRI_CONF_NO_RAST(false)
82    DRI_CONF_SECTION_END
83DRI_CONF_END;
84static const GLuint __driNConfigOptions = 13;
85
86extern const struct dri_extension card_extensions[];
87
88#if 1
89/* Including xf86PciInfo.h introduces a bunch of errors...
90 */
91#define PCI_CHIP_RADEON_QD	0x5144
92#define PCI_CHIP_RADEON_QE	0x5145
93#define PCI_CHIP_RADEON_QF	0x5146
94#define PCI_CHIP_RADEON_QG	0x5147
95
96#define PCI_CHIP_RADEON_QY	0x5159
97#define PCI_CHIP_RADEON_QZ	0x515A
98
99#define PCI_CHIP_RN50_515E	0x515E
100#define PCI_CHIP_RN50_5969	0x5969
101
102#define PCI_CHIP_RADEON_LW	0x4C57 /* mobility 7 - has tcl */
103#define PCI_CHIP_RADEON_LX	0x4C58 /* mobility FireGL 7800 m7 */
104
105#define PCI_CHIP_RADEON_LY	0x4C59
106#define PCI_CHIP_RADEON_LZ	0x4C5A
107
108#define PCI_CHIP_RV200_QW	0x5157 /* Radeon 7500 - not an R200 at all */
109#define PCI_CHIP_RV200_QX	0x5158
110
111/* IGP Chipsets */
112#define PCI_CHIP_RS100_4136     0x4136
113#define PCI_CHIP_RS200_4137     0x4137
114#define PCI_CHIP_RS250_4237     0x4237
115#define PCI_CHIP_RS100_4336     0x4336
116#define PCI_CHIP_RS200_4337     0x4337
117#define PCI_CHIP_RS250_4437     0x4437
118#endif
119
120
121static int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
122
123static __GLcontextModes *
124radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
125		 unsigned stencil_bits, GLboolean have_back_buffer )
126{
127    __GLcontextModes * modes;
128    __GLcontextModes * m;
129    unsigned num_modes;
130    unsigned depth_buffer_factor;
131    unsigned back_buffer_factor;
132    GLenum fb_format;
133    GLenum fb_type;
134
135    /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
136     * enough to add support.  Basically, if a context is created with an
137     * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
138     * will never be used.
139     */
140    static const GLenum back_buffer_modes[] = {
141	GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
142    };
143
144    u_int8_t depth_bits_array[2];
145    u_int8_t stencil_bits_array[2];
146
147
148    depth_bits_array[0] = depth_bits;
149    depth_bits_array[1] = depth_bits;
150
151    /* Just like with the accumulation buffer, always provide some modes
152     * with a stencil buffer.  It will be a sw fallback, but some apps won't
153     * care about that.
154     */
155    stencil_bits_array[0] = 0;
156    stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
157
158    depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
159    back_buffer_factor  = (have_back_buffer) ? 2 : 1;
160
161    num_modes = depth_buffer_factor * back_buffer_factor * 4;
162
163    if ( pixel_bits == 16 ) {
164        fb_format = GL_RGB;
165        fb_type = GL_UNSIGNED_SHORT_5_6_5;
166    }
167    else {
168        fb_format = GL_BGRA;
169        fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
170    }
171
172    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
173    m = modes;
174    if ( ! driFillInModes( & m, fb_format, fb_type,
175			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
176			   back_buffer_modes, back_buffer_factor,
177			   GLX_TRUE_COLOR ) ) {
178	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
179		 __func__, __LINE__ );
180	return NULL;
181    }
182
183    if ( ! driFillInModes( & m, fb_format, fb_type,
184			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
185			   back_buffer_modes, back_buffer_factor,
186			   GLX_DIRECT_COLOR ) ) {
187	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
188		 __func__, __LINE__ );
189	return NULL;
190    }
191
192    /* Mark the visual as slow if there are "fake" stencil bits.
193     */
194    for ( m = modes ; m != NULL ; m = m->next ) {
195	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
196	    m->visualRating = GLX_SLOW_CONFIG;
197	}
198    }
199
200    return modes;
201}
202
203
204/* Create the device specific screen private data struct.
205 */
206radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
207{
208   radeonScreenPtr screen;
209   RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
210   unsigned char *RADEONMMIO;
211   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
212     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
213   void * const psc = sPriv->psc->screenConfigs;
214
215   if (sPriv->devPrivSize != sizeof(RADEONDRIRec)) {
216      fprintf(stderr,"\nERROR!  sizeof(RADEONDRIRec) does not match passed size from device driver\n");
217      return GL_FALSE;
218   }
219
220   /* Allocate the private area */
221   screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
222   if ( !screen ) {
223      __driUtilMessage("%s: Could not allocate memory for screen structure",
224		       __FUNCTION__);
225      return NULL;
226   }
227
228   /* parse information in __driConfigOptions */
229   driParseOptionInfo (&screen->optionCache,
230		       __driConfigOptions, __driNConfigOptions);
231
232   /* This is first since which regions we map depends on whether or
233    * not we are using a PCI card.
234    */
235   screen->IsPCI = dri_priv->IsPCI;
236
237   {
238      int ret;
239      drm_radeon_getparam_t gp;
240
241      gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
242      gp.value = &screen->gart_buffer_offset;
243
244      ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM,
245				 &gp, sizeof(gp));
246      if (ret) {
247	 FREE( screen );
248	 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
249	 return NULL;
250      }
251
252      if (sPriv->drmMinor >= 6) {
253	 gp.param = RADEON_PARAM_IRQ_NR;
254	 gp.value = &screen->irq;
255
256	 ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM,
257				    &gp, sizeof(gp));
258	 if (ret) {
259	    FREE( screen );
260	    fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
261	    return NULL;
262	 }
263      }
264   }
265
266   screen->mmio.handle = dri_priv->registerHandle;
267   screen->mmio.size   = dri_priv->registerSize;
268   if ( drmMap( sPriv->fd,
269		screen->mmio.handle,
270		screen->mmio.size,
271		&screen->mmio.map ) ) {
272      FREE( screen );
273      __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
274      return NULL;
275   }
276
277   RADEONMMIO = screen->mmio.map;
278
279   screen->status.handle = dri_priv->statusHandle;
280   screen->status.size   = dri_priv->statusSize;
281   if ( drmMap( sPriv->fd,
282		screen->status.handle,
283		screen->status.size,
284		&screen->status.map ) ) {
285      drmUnmap( screen->mmio.map, screen->mmio.size );
286      FREE( screen );
287      __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
288      return NULL;
289   }
290   screen->scratch = (__volatile__ u_int32_t *)
291      ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
292
293   screen->buffers = drmMapBufs( sPriv->fd );
294   if ( !screen->buffers ) {
295      drmUnmap( screen->status.map, screen->status.size );
296      drmUnmap( screen->mmio.map, screen->mmio.size );
297      FREE( screen );
298      __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
299      return NULL;
300   }
301
302   if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
303      screen->gartTextures.handle = dri_priv->gartTexHandle;
304      screen->gartTextures.size   = dri_priv->gartTexMapSize;
305      if ( drmMap( sPriv->fd,
306		   screen->gartTextures.handle,
307		   screen->gartTextures.size,
308		   (drmAddressPtr)&screen->gartTextures.map ) ) {
309	 drmUnmapBufs( screen->buffers );
310	 drmUnmap( screen->status.map, screen->status.size );
311	 drmUnmap( screen->mmio.map, screen->mmio.size );
312	 FREE( screen );
313	 __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
314	 return NULL;
315      }
316
317      screen->gart_texture_offset = dri_priv->gartTexOffset + ( screen->IsPCI
318		? INREG( RADEON_AIC_LO_ADDR )
319		: ( ( INREG( RADEON_MC_AGP_LOCATION ) & 0x0ffffU ) << 16 ) );
320   }
321
322   screen->chipset = 0;
323   switch ( dri_priv->deviceID ) {
324   default:
325      fprintf(stderr, "unknown chip id, assuming full radeon support\n");
326   case PCI_CHIP_RADEON_QD:
327   case PCI_CHIP_RADEON_QE:
328   case PCI_CHIP_RADEON_QF:
329   case PCI_CHIP_RADEON_QG:
330      /* all original radeons (7200) presumably have a stencil op bug */
331      screen->chipset |= RADEON_CHIPSET_BROKEN_STENCIL;
332   case PCI_CHIP_RV200_QW:
333   case PCI_CHIP_RV200_QX:
334   case PCI_CHIP_RADEON_LW:
335   case PCI_CHIP_RADEON_LX:
336      screen->chipset |= RADEON_CHIPSET_TCL;
337   case PCI_CHIP_RADEON_QY:
338   case PCI_CHIP_RADEON_QZ:
339   case PCI_CHIP_RN50_515E:
340   case PCI_CHIP_RN50_5969:
341   case PCI_CHIP_RADEON_LY:
342   case PCI_CHIP_RADEON_LZ:
343   case PCI_CHIP_RS100_4136: /* IGPs don't have TCL */
344   case PCI_CHIP_RS200_4137:
345   case PCI_CHIP_RS250_4237:
346   case PCI_CHIP_RS100_4336:
347   case PCI_CHIP_RS200_4337:
348   case PCI_CHIP_RS250_4437:
349      break;
350   }
351
352   screen->cpp = dri_priv->bpp / 8;
353   screen->AGPMode = dri_priv->AGPMode;
354
355   screen->fbLocation	= ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
356
357   if ( sPriv->drmMinor >= 10 ) {
358      drm_radeon_setparam_t sp;
359
360      sp.param = RADEON_SETPARAM_FB_LOCATION;
361      sp.value = screen->fbLocation;
362
363      drmCommandWrite( sPriv->fd, DRM_RADEON_SETPARAM,
364		       &sp, sizeof( sp ) );
365   }
366
367   screen->frontOffset	= dri_priv->frontOffset;
368   screen->frontPitch	= dri_priv->frontPitch;
369   screen->backOffset	= dri_priv->backOffset;
370   screen->backPitch	= dri_priv->backPitch;
371   screen->depthOffset	= dri_priv->depthOffset;
372   screen->depthPitch	= dri_priv->depthPitch;
373
374   /* Check if ddx has set up a surface reg to cover depth buffer */
375   screen->depthHasSurface = ((sPriv->ddxMajor > 4) &&
376      (screen->chipset & RADEON_CHIPSET_TCL));
377
378   screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
379				       + screen->fbLocation;
380   screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
381   screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
382      dri_priv->log2TexGran;
383
384   if ( !screen->gartTextures.map
385	|| getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) {
386      screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
387      screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
388      screen->texSize[RADEON_GART_TEX_HEAP] = 0;
389      screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
390   } else {
391      screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
392      screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset;
393      screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize;
394      screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
395	 dri_priv->log2GARTTexGran;
396   }
397
398   if ( glx_enable_extension != NULL ) {
399      if ( screen->irq != 0 ) {
400	 (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
401	 (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
402	 (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
403      }
404
405      (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
406   }
407
408   screen->driScreen = sPriv;
409   screen->sarea_priv_offset = dri_priv->sarea_priv_offset;
410   return screen;
411}
412
413/* Destroy the device specific screen private data struct.
414 */
415void radeonDestroyScreen( __DRIscreenPrivate *sPriv )
416{
417   radeonScreenPtr screen = (radeonScreenPtr)sPriv->private;
418
419   if (!screen)
420      return;
421
422   if ( screen->gartTextures.map ) {
423      drmUnmap( screen->gartTextures.map, screen->gartTextures.size );
424   }
425   drmUnmapBufs( screen->buffers );
426   drmUnmap( screen->status.map, screen->status.size );
427   drmUnmap( screen->mmio.map, screen->mmio.size );
428
429   /* free all option information */
430   driDestroyOptionInfo (&screen->optionCache);
431
432   FREE( screen );
433   sPriv->private = NULL;
434}
435
436
437/* Initialize the driver specific screen private data.
438 */
439static GLboolean
440radeonInitDriver( __DRIscreenPrivate *sPriv )
441{
442   sPriv->private = (void *) radeonCreateScreen( sPriv );
443   if ( !sPriv->private ) {
444      radeonDestroyScreen( sPriv );
445      return GL_FALSE;
446   }
447
448   return GL_TRUE;
449}
450
451
452/**
453 * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
454 *
455 * \todo This function (and its interface) will need to be updated to support
456 * pbuffers.
457 */
458static GLboolean
459radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv,
460                    __DRIdrawablePrivate *driDrawPriv,
461                    const __GLcontextModes *mesaVis,
462                    GLboolean isPixmap )
463{
464   radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private;
465
466   if (isPixmap) {
467      return GL_FALSE; /* not implemented */
468   }
469   else {
470      const GLboolean swDepth = GL_FALSE;
471      const GLboolean swAlpha = GL_FALSE;
472      const GLboolean swAccum = mesaVis->accumRedBits > 0;
473      const GLboolean swStencil = mesaVis->stencilBits > 0 &&
474         mesaVis->depthBits != 24;
475      struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
476
477      /* front color renderbuffer */
478      {
479         driRenderbuffer *frontRb
480            = driNewRenderbuffer(GL_RGBA, screen->cpp,
481                                 screen->frontOffset, screen->frontPitch);
482         radeonSetSpanFunctions(frontRb, mesaVis);
483         _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
484      }
485
486      /* back color renderbuffer */
487      if (mesaVis->doubleBufferMode) {
488         driRenderbuffer *backRb
489            = driNewRenderbuffer(GL_RGBA, screen->cpp,
490                                 screen->backOffset, screen->backPitch);
491         radeonSetSpanFunctions(backRb, mesaVis);
492         _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
493      }
494
495      /* depth renderbuffer */
496      if (mesaVis->depthBits == 16) {
497         driRenderbuffer *depthRb
498            = driNewRenderbuffer(GL_DEPTH_COMPONENT16, screen->cpp,
499                                 screen->depthOffset, screen->depthPitch);
500         radeonSetSpanFunctions(depthRb, mesaVis);
501         _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
502	 depthRb->depthHasSurface = screen->depthHasSurface;
503      }
504      else if (mesaVis->depthBits == 24) {
505         driRenderbuffer *depthRb
506            = driNewRenderbuffer(GL_DEPTH_COMPONENT24, screen->cpp,
507                                 screen->depthOffset, screen->depthPitch);
508         radeonSetSpanFunctions(depthRb, mesaVis);
509         _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
510	 depthRb->depthHasSurface = screen->depthHasSurface;
511      }
512
513      /* stencil renderbuffer */
514      if (mesaVis->stencilBits > 0 && !swStencil) {
515         driRenderbuffer *stencilRb
516            = driNewRenderbuffer(GL_STENCIL_INDEX8_EXT, screen->cpp,
517                                 screen->depthOffset, screen->depthPitch);
518         radeonSetSpanFunctions(stencilRb, mesaVis);
519         _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencilRb->Base);
520	 stencilRb->depthHasSurface = screen->depthHasSurface;
521      }
522
523      _mesa_add_soft_renderbuffers(fb,
524                                   GL_FALSE, /* color */
525                                   swDepth,
526                                   swStencil,
527                                   swAccum,
528                                   swAlpha,
529                                   GL_FALSE /* aux */);
530      driDrawPriv->driverPrivate = (void *) fb;
531
532      return (driDrawPriv->driverPrivate != NULL);
533   }
534}
535
536
537static void
538radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
539{
540   _mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->driverPrivate));
541}
542
543static struct __DriverAPIRec radeonAPI = {
544   .InitDriver      = radeonInitDriver,
545   .DestroyScreen   = radeonDestroyScreen,
546   .CreateContext   = radeonCreateContext,
547   .DestroyContext  = radeonDestroyContext,
548   .CreateBuffer    = radeonCreateBuffer,
549   .DestroyBuffer   = radeonDestroyBuffer,
550   .SwapBuffers     = radeonSwapBuffers,
551   .MakeCurrent     = radeonMakeCurrent,
552   .UnbindContext   = radeonUnbindContext,
553   .GetSwapInfo     = getSwapInfo,
554   .GetMSC          = driGetMSC32,
555   .WaitForMSC      = driWaitForMSC32,
556   .WaitForSBC      = NULL,
557   .SwapBuffersMSC  = NULL
558};
559
560
561/**
562 * This is the bootstrap function for the driver.  libGL supplies all of the
563 * requisite information about the system, and the driver initializes itself.
564 * This routine also fills in the linked list pointed to by \c driver_modes
565 * with the \c __GLcontextModes that the driver can support for windows or
566 * pbuffers.
567 *
568 * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
569 *         failure.
570 */
571PUBLIC
572void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
573			     const __GLcontextModes * modes,
574			     const __DRIversion * ddx_version,
575			     const __DRIversion * dri_version,
576			     const __DRIversion * drm_version,
577			     const __DRIframebuffer * frame_buffer,
578			     drmAddress pSAREA, int fd,
579			     int internal_api_version,
580			     const __DRIinterfaceMethods * interface,
581			     __GLcontextModes ** driver_modes )
582
583{
584   __DRIscreenPrivate *psp;
585   static const __DRIutilversion2 ddx_expected = { 4, 5, 0, 0 };
586   static const __DRIversion dri_expected = { 4, 0, 0 };
587   static const __DRIversion drm_expected = { 1, 3, 0 };
588
589   dri_interface = interface;
590
591   if ( ! driCheckDriDdxDrmVersions3( "Radeon",
592				      dri_version, & dri_expected,
593				      ddx_version, & ddx_expected,
594				      drm_version, & drm_expected ) ) {
595      return NULL;
596   }
597
598   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
599				  ddx_version, dri_version, drm_version,
600				  frame_buffer, pSAREA, fd,
601				  internal_api_version, &radeonAPI);
602   if ( psp != NULL ) {
603      RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
604      *driver_modes = radeonFillInModes( dri_priv->bpp,
605					 (dri_priv->bpp == 16) ? 16 : 24,
606					 (dri_priv->bpp == 16) ? 0  : 8,
607					 (dri_priv->backOffset != dri_priv->depthOffset) );
608
609      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
610       * enable the extensions.  It just makes sure that all the dispatch offsets for all
611       * the extensions that *might* be enables are known.  This is needed because the
612       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
613       * enable the extensions until we have a context pointer.
614       *
615       * Hello chicken.  Hello egg.  How are you two today?
616       */
617      driInitExtensions( NULL, card_extensions, GL_FALSE );
618   }
619
620   return (void *) psp;
621}
622
623
624/**
625 * Get information about previous buffer swaps.
626 */
627static int
628getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
629{
630   radeonContextPtr  rmesa;
631
632   if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL)
633	|| (dPriv->driContextPriv->driverPrivate == NULL)
634	|| (sInfo == NULL) ) {
635      return -1;
636   }
637
638   rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
639   sInfo->swap_count = rmesa->swap_count;
640   sInfo->swap_ust = rmesa->swap_ust;
641   sInfo->swap_missed_count = rmesa->swap_missed_count;
642
643   sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
644       ? driCalculateSwapUsage( dPriv, 0, rmesa->swap_missed_ust )
645       : 0.0;
646
647   return 0;
648}
649