radeon_screen.c revision d09209f5530e8bba78e4e0ec62b2027c588cc8f3 
1/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.7 2003/03/26 20:43:51 tsi Exp $ */
2/**************************************************************************
3
4Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5                     VA Linux Systems Inc., Fremont, California.
6
7All Rights Reserved.
8
9Permission is hereby granted, free of charge, to any person obtaining
10a copy of this software and associated documentation files (the
11"Software"), to deal in the Software without restriction, including
12without limitation the rights to use, copy, modify, merge, publish,
13distribute, sublicense, and/or sell copies of the Software, and to
14permit persons to whom the Software is furnished to do so, subject to
15the following conditions:
16
17The above copyright notice and this permission notice (including the
18next paragraph) shall be included in all copies or substantial
19portions of the Software.
20
21THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28
29**************************************************************************/
30
31/**
32 * \file radeon_screen.c
33 * Screen initialization functions for the Radeon driver.
34 *
35 * \author Kevin E. Martin <martin@valinux.com>
36 * \author  Gareth Hughes <gareth@valinux.com>
37 */
38
39#include "glheader.h"
40#include "imports.h"
41
42#define STANDALONE_MMIO
43#include "radeon_context.h"
44#include "radeon_screen.h"
45#include "radeon_macros.h"
46
47#include "utils.h"
48#include "context.h"
49#include "vblank.h"
50
51#include "GL/internal/dri_interface.h"
52
53/* Radeon configuration
54 */
55#include "xmlpool.h"
56
57const char __driConfigOptions[] =
58DRI_CONF_BEGIN
59    DRI_CONF_SECTION_PERFORMANCE
60        DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
61        DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
62        DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
63    DRI_CONF_SECTION_END
64    DRI_CONF_SECTION_QUALITY
65        DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
66        DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
67        DRI_CONF_NO_NEG_LOD_BIAS(false)
68        DRI_CONF_FORCE_S3TC_ENABLE(false)
69        DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
70        DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
71        DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
72    DRI_CONF_SECTION_END
73    DRI_CONF_SECTION_DEBUG
74        DRI_CONF_NO_RAST(false)
75    DRI_CONF_SECTION_END
76DRI_CONF_END;
77static const GLuint __driNConfigOptions = 11;
78
79#if 1
80/* Including xf86PciInfo.h introduces a bunch of errors...
81 */
82#define PCI_CHIP_RADEON_QD	0x5144
83#define PCI_CHIP_RADEON_QE	0x5145
84#define PCI_CHIP_RADEON_QF	0x5146
85#define PCI_CHIP_RADEON_QG	0x5147
86
87#define PCI_CHIP_RADEON_QY	0x5159
88#define PCI_CHIP_RADEON_QZ	0x515A
89
90#define PCI_CHIP_RADEON_LW	0x4C57 /* mobility 7 - has tcl */
91
92#define PCI_CHIP_RADEON_LY	0x4C59
93#define PCI_CHIP_RADEON_LZ	0x4C5A
94
95#define PCI_CHIP_RV200_QW	0x5157 /* Radeon 7500 - not an R200 at all */
96/* IGP Chipsets */
97#define PCI_CHIP_RS100_4136     0x4136
98#define PCI_CHIP_RS200_4137     0x4137
99#define PCI_CHIP_RS250_4237     0x4237
100#define PCI_CHIP_RS100_4336     0x4336
101#define PCI_CHIP_RS200_4337     0x4337
102#define PCI_CHIP_RS250_4437     0x4437
103#endif
104
105#ifdef USE_NEW_INTERFACE
106static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
107#endif /* USE_NEW_INTERFACE */
108
109static int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
110
111#ifdef USE_NEW_INTERFACE
112static __GLcontextModes *
113radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
114		 unsigned stencil_bits, GLboolean have_back_buffer )
115{
116    __GLcontextModes * modes;
117    __GLcontextModes * m;
118    unsigned num_modes;
119    unsigned depth_buffer_factor;
120    unsigned back_buffer_factor;
121    GLenum fb_format;
122    GLenum fb_type;
123
124    /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
125     * enough to add support.  Basically, if a context is created with an
126     * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
127     * will never be used.
128     */
129    static const GLenum back_buffer_modes[] = {
130	GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
131    };
132
133    uint8_t depth_bits_array[2];
134    uint8_t stencil_bits_array[2];
135
136
137    depth_bits_array[0] = depth_bits;
138    depth_bits_array[1] = depth_bits;
139
140    /* Just like with the accumulation buffer, always provide some modes
141     * with a stencil buffer.  It will be a sw fallback, but some apps won't
142     * care about that.
143     */
144    stencil_bits_array[0] = 0;
145    stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
146
147    depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
148    back_buffer_factor  = (have_back_buffer) ? 2 : 1;
149
150    num_modes = depth_buffer_factor * back_buffer_factor * 4;
151
152    if ( pixel_bits == 16 ) {
153        fb_format = GL_RGB;
154        fb_type = GL_UNSIGNED_SHORT_5_6_5;
155    }
156    else {
157        fb_format = GL_BGRA;
158        fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
159    }
160
161    modes = (*create_context_modes)( num_modes, sizeof( __GLcontextModes ) );
162    m = modes;
163    if ( ! driFillInModes( & m, fb_format, fb_type,
164			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
165			   back_buffer_modes, back_buffer_factor,
166			   GLX_TRUE_COLOR ) ) {
167	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
168		 __func__, __LINE__ );
169	return NULL;
170    }
171
172    if ( ! driFillInModes( & m, fb_format, fb_type,
173			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
174			   back_buffer_modes, back_buffer_factor,
175			   GLX_DIRECT_COLOR ) ) {
176	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
177		 __func__, __LINE__ );
178	return NULL;
179    }
180
181    /* Mark the visual as slow if there are "fake" stencil bits.
182     */
183    for ( m = modes ; m != NULL ; m = m->next ) {
184	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
185	    m->visualRating = GLX_SLOW_CONFIG;
186	}
187    }
188
189    return modes;
190}
191#endif /* USE_NEW_INTERFACE */
192
193/* Create the device specific screen private data struct.
194 */
195radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
196{
197   radeonScreenPtr screen;
198   RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
199   unsigned char *RADEONMMIO;
200
201
202   /* Allocate the private area */
203   screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
204   if ( !screen ) {
205      __driUtilMessage("%s: Could not allocate memory for screen structure",
206		       __FUNCTION__);
207      return NULL;
208   }
209
210   /* parse information in __driConfigOptions */
211   driParseOptionInfo (&screen->optionCache,
212		       __driConfigOptions, __driNConfigOptions);
213
214   /* This is first since which regions we map depends on whether or
215    * not we are using a PCI card.
216    */
217   screen->IsPCI = dri_priv->IsPCI;
218
219   {
220      int ret;
221      drm_radeon_getparam_t gp;
222
223      gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
224      gp.value = &screen->gart_buffer_offset;
225
226      ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM,
227				 &gp, sizeof(gp));
228      if (ret) {
229	 FREE( screen );
230	 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
231	 return NULL;
232      }
233
234      if (sPriv->drmMinor >= 6) {
235	 gp.param = RADEON_PARAM_IRQ_NR;
236	 gp.value = &screen->irq;
237
238	 ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM,
239				    &gp, sizeof(gp));
240	 if (ret) {
241	    FREE( screen );
242	    fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
243	    return NULL;
244	 }
245      }
246   }
247
248   screen->mmio.handle = dri_priv->registerHandle;
249   screen->mmio.size   = dri_priv->registerSize;
250   if ( drmMap( sPriv->fd,
251		screen->mmio.handle,
252		screen->mmio.size,
253		&screen->mmio.map ) ) {
254      FREE( screen );
255      __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
256      return NULL;
257   }
258
259   RADEONMMIO = screen->mmio.map;
260
261   screen->status.handle = dri_priv->statusHandle;
262   screen->status.size   = dri_priv->statusSize;
263   if ( drmMap( sPriv->fd,
264		screen->status.handle,
265		screen->status.size,
266		&screen->status.map ) ) {
267      drmUnmap( screen->mmio.map, screen->mmio.size );
268      FREE( screen );
269      __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
270      return NULL;
271   }
272   screen->scratch = (__volatile__ uint32_t *)
273      ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
274
275   screen->buffers = drmMapBufs( sPriv->fd );
276   if ( !screen->buffers ) {
277      drmUnmap( screen->status.map, screen->status.size );
278      drmUnmap( screen->mmio.map, screen->mmio.size );
279      FREE( screen );
280      __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
281      return NULL;
282   }
283
284   if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
285      screen->gartTextures.handle = dri_priv->gartTexHandle;
286      screen->gartTextures.size   = dri_priv->gartTexMapSize;
287      if ( drmMap( sPriv->fd,
288		   screen->gartTextures.handle,
289		   screen->gartTextures.size,
290		   (drmAddressPtr)&screen->gartTextures.map ) ) {
291	 drmUnmapBufs( screen->buffers );
292	 drmUnmap( screen->status.map, screen->status.size );
293	 drmUnmap( screen->mmio.map, screen->mmio.size );
294	 FREE( screen );
295	 __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
296	 return NULL;
297      }
298
299      screen->gart_texture_offset = dri_priv->gartTexOffset + ( screen->IsPCI
300		? INREG( RADEON_AIC_LO_ADDR )
301		: ( ( INREG( RADEON_MC_AGP_LOCATION ) & 0x0ffffU ) << 16 ) );
302   }
303
304   screen->chipset = 0;
305   switch ( dri_priv->deviceID ) {
306   default:
307      fprintf(stderr, "unknown chip id, assuming full radeon support\n");
308   case PCI_CHIP_RADEON_QD:
309   case PCI_CHIP_RADEON_QE:
310   case PCI_CHIP_RADEON_QF:
311   case PCI_CHIP_RADEON_QG:
312   case PCI_CHIP_RV200_QW:
313   case PCI_CHIP_RADEON_LW:
314      screen->chipset |= RADEON_CHIPSET_TCL;
315   case PCI_CHIP_RADEON_QY:
316   case PCI_CHIP_RADEON_QZ:
317   case PCI_CHIP_RADEON_LY:
318   case PCI_CHIP_RADEON_LZ:
319   case PCI_CHIP_RS100_4136: /* IGPs don't have TCL */
320   case PCI_CHIP_RS200_4137:
321   case PCI_CHIP_RS250_4237:
322   case PCI_CHIP_RS100_4336:
323   case PCI_CHIP_RS200_4337:
324   case PCI_CHIP_RS250_4437:
325      break;
326   }
327
328   screen->cpp = dri_priv->bpp / 8;
329   screen->AGPMode = dri_priv->AGPMode;
330
331   screen->fbLocation	= ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
332
333   if ( sPriv->drmMinor >= 10 ) {
334      drm_radeon_setparam_t sp;
335
336      sp.param = RADEON_SETPARAM_FB_LOCATION;
337      sp.value = screen->fbLocation;
338
339      drmCommandWrite( sPriv->fd, DRM_RADEON_SETPARAM,
340		       &sp, sizeof( sp ) );
341   }
342
343   screen->frontOffset	= dri_priv->frontOffset;
344   screen->frontPitch	= dri_priv->frontPitch;
345   screen->backOffset	= dri_priv->backOffset;
346   screen->backPitch	= dri_priv->backPitch;
347   screen->depthOffset	= dri_priv->depthOffset;
348   screen->depthPitch	= dri_priv->depthPitch;
349
350   screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
351				       + screen->fbLocation;
352   screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
353   screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
354      dri_priv->log2TexGran;
355
356   if ( !screen->gartTextures.map
357	|| getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) {
358      screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
359      screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
360      screen->texSize[RADEON_GART_TEX_HEAP] = 0;
361      screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
362   } else {
363      screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
364      screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset;
365      screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize;
366      screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
367	 dri_priv->log2GARTTexGran;
368   }
369
370   if ( driCompareGLXAPIVersion( 20030813 ) >= 0 ) {
371      PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
372          (PFNGLXSCRENABLEEXTENSIONPROC) glXGetProcAddress( (const GLubyte *) "__glXScrEnableExtension" );
373      void * const psc = sPriv->psc->screenConfigs;
374
375      if ( glx_enable_extension != NULL ) {
376	 if ( screen->irq != 0 ) {
377	    (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
378	    (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
379	    (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
380	 }
381
382	 (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
383
384         if ( driCompareGLXAPIVersion( 20030915 ) >= 0 ) {
385	    (*glx_enable_extension)( psc, "GLX_SGIX_fbconfig" );
386	    (*glx_enable_extension)( psc, "GLX_OML_swap_method" );
387	 }
388
389      }
390   }
391
392   screen->driScreen = sPriv;
393   screen->sarea_priv_offset = dri_priv->sarea_priv_offset;
394   return screen;
395}
396
397/* Destroy the device specific screen private data struct.
398 */
399void radeonDestroyScreen( __DRIscreenPrivate *sPriv )
400{
401   radeonScreenPtr screen = (radeonScreenPtr)sPriv->private;
402
403   if (!screen)
404      return;
405
406   if ( screen->gartTextures.map ) {
407      drmUnmap( screen->gartTextures.map, screen->gartTextures.size );
408   }
409   drmUnmapBufs( screen->buffers );
410   drmUnmap( screen->status.map, screen->status.size );
411   drmUnmap( screen->mmio.map, screen->mmio.size );
412
413   /* free all option information */
414   driDestroyOptionInfo (&screen->optionCache);
415
416   FREE( screen );
417   sPriv->private = NULL;
418}
419
420
421/* Initialize the driver specific screen private data.
422 */
423static GLboolean
424radeonInitDriver( __DRIscreenPrivate *sPriv )
425{
426   sPriv->private = (void *) radeonCreateScreen( sPriv );
427   if ( !sPriv->private ) {
428      radeonDestroyScreen( sPriv );
429      return GL_FALSE;
430   }
431
432   return GL_TRUE;
433}
434
435
436
437/**
438 * Create and initialize the Mesa and driver specific pixmap buffer
439 * data.
440 *
441 * \todo This function (and its interface) will need to be updated to support
442 * pbuffers.
443 */
444static GLboolean
445radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv,
446                    __DRIdrawablePrivate *driDrawPriv,
447                    const __GLcontextModes *mesaVis,
448                    GLboolean isPixmap )
449{
450   if (isPixmap) {
451      return GL_FALSE; /* not implemented */
452   }
453   else {
454      const GLboolean swDepth = GL_FALSE;
455      const GLboolean swAlpha = GL_FALSE;
456      const GLboolean swAccum = mesaVis->accumRedBits > 0;
457      const GLboolean swStencil = mesaVis->stencilBits > 0 &&
458         mesaVis->depthBits != 24;
459      driDrawPriv->driverPrivate = (void *)
460         _mesa_create_framebuffer( mesaVis,
461                                   swDepth,
462                                   swStencil,
463                                   swAccum,
464                                   swAlpha );
465      return (driDrawPriv->driverPrivate != NULL);
466   }
467}
468
469
470static void
471radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
472{
473   _mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->driverPrivate));
474}
475
476static struct __DriverAPIRec radeonAPI = {
477   .InitDriver      = radeonInitDriver,
478   .DestroyScreen   = radeonDestroyScreen,
479   .CreateContext   = radeonCreateContext,
480   .DestroyContext  = radeonDestroyContext,
481   .CreateBuffer    = radeonCreateBuffer,
482   .DestroyBuffer   = radeonDestroyBuffer,
483   .SwapBuffers     = radeonSwapBuffers,
484   .MakeCurrent     = radeonMakeCurrent,
485   .UnbindContext   = radeonUnbindContext,
486   .GetSwapInfo     = getSwapInfo,
487   .GetMSC          = driGetMSC32,
488   .WaitForMSC      = driWaitForMSC32,
489   .WaitForSBC      = NULL,
490   .SwapBuffersMSC  = NULL
491};
492
493
494/*
495 * This is the bootstrap function for the driver.
496 * The __driCreateScreen name is the symbol that libGL.so fetches.
497 * Return:  pointer to a __DRIscreenPrivate.
498 */
499#if !defined(DRI_NEW_INTERFACE_ONLY)
500void *__driCreateScreen(Display *dpy, int scrn, __DRIscreen *psc,
501                        int numConfigs, __GLXvisualConfig *config)
502{
503   __DRIscreenPrivate *psp;
504   psp = __driUtilCreateScreen(dpy, scrn, psc, numConfigs, config, &radeonAPI);
505   return (void *) psp;
506}
507#endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
508
509/**
510 * This is the bootstrap function for the driver.  libGL supplies all of the
511 * requisite information about the system, and the driver initializes itself.
512 * This routine also fills in the linked list pointed to by \c driver_modes
513 * with the \c __GLcontextModes that the driver can support for windows or
514 * pbuffers.
515 *
516 * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
517 *         failure.
518 */
519#ifdef USE_NEW_INTERFACE
520void * __driCreateNewScreen( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
521			     const __GLcontextModes * modes,
522			     const __DRIversion * ddx_version,
523			     const __DRIversion * dri_version,
524			     const __DRIversion * drm_version,
525			     const __DRIframebuffer * frame_buffer,
526			     drmAddress pSAREA, int fd,
527			     int internal_api_version,
528			     __GLcontextModes ** driver_modes )
529
530{
531   __DRIscreenPrivate *psp;
532   static const __DRIversion ddx_expected = { 4, 0, 0 };
533   static const __DRIversion dri_expected = { 4, 0, 0 };
534   static const __DRIversion drm_expected = { 1, 3, 0 };
535
536   if ( ! driCheckDriDdxDrmVersions2( "Radeon",
537				      dri_version, & dri_expected,
538				      ddx_version, & ddx_expected,
539				      drm_version, & drm_expected ) ) {
540      return NULL;
541   }
542
543   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
544				  ddx_version, dri_version, drm_version,
545				  frame_buffer, pSAREA, fd,
546				  internal_api_version, &radeonAPI);
547   if ( psp != NULL ) {
548      create_context_modes = (PFNGLXCREATECONTEXTMODES)
549	  glXGetProcAddress( (const GLubyte *) "__glXCreateContextModes" );
550      if ( create_context_modes != NULL ) {
551	 RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
552	 *driver_modes = radeonFillInModes( dri_priv->bpp,
553					    (dri_priv->bpp == 16) ? 16 : 24,
554					    (dri_priv->bpp == 16) ? 0  : 8,
555					    (dri_priv->backOffset != dri_priv->depthOffset) );
556      }
557   }
558
559   return (void *) psp;
560}
561#endif /* USE_NEW_INTERFACE */
562
563/**
564 * Get information about previous buffer swaps.
565 */
566static int
567getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
568{
569   radeonContextPtr  rmesa;
570
571   if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL)
572	|| (dPriv->driContextPriv->driverPrivate == NULL)
573	|| (sInfo == NULL) ) {
574      return -1;
575   }
576
577   rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
578   sInfo->swap_count = rmesa->swap_count;
579   sInfo->swap_ust = rmesa->swap_ust;
580   sInfo->swap_missed_count = rmesa->swap_missed_count;
581
582   sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
583       ? driCalculateSwapUsage( dPriv, 0, rmesa->swap_missed_ust )
584       : 0.0;
585
586   return 0;
587}
588