radeon_swtcl.c revision 2dc621f3fdb585f23013aa3e220f2148f9405538
1906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_swtcl.c,v 1.6 2003/05/06 23:52:08 daenzer Exp $ */ 2cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe/************************************************************************** 3906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe 4ebac4655dd3624f3296ff83be48e0cdc02852f1Jens AxboeCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 5ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe VA Linux Systems Inc., Fremont, California. 6ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 7ebac4655dd3624f3296ff83be48e0cdc02852f1Jens AxboeAll Rights Reserved. 8ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 9ebac4655dd3624f3296ff83be48e0cdc02852f1Jens AxboePermission is hereby granted, free of charge, to any person obtaining 10ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboea copy of this software and associated documentation files (the 11b46928282e0a890f49250e79b81af773a2b7108fJens Axboe"Software"), to deal in the Software without restriction, including 12b46928282e0a890f49250e79b81af773a2b7108fJens Axboewithout limitation the rights to use, copy, modify, merge, publish, 13ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboedistribute, sublicense, and/or sell copies of the Software, and to 14ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboepermit persons to whom the Software is furnished to do so, subject to 15ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboethe following conditions: 16ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 17ebac4655dd3624f3296ff83be48e0cdc02852f1Jens AxboeThe above copyright notice and this permission notice (including the 18ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboenext paragraph) shall be included in all copies or substantial 19cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboeportions of the Software. 20ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 21ee738499877bb1ee913e839cb4a8d4edad2d52adJens AxboeTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 22ebac4655dd3624f3296ff83be48e0cdc02852f1Jens AxboeEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 23e1f365035a952233463d85d659bd960ba78f012eJens AxboeMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 24e1f365035a952233463d85d659bd960ba78f012eJens AxboeIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 25b46928282e0a890f49250e79b81af773a2b7108fJens AxboeLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 26b46928282e0a890f49250e79b81af773a2b7108fJens AxboeOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 27b46928282e0a890f49250e79b81af773a2b7108fJens AxboeWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 28b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 29e1f365035a952233463d85d659bd960ba78f012eJens Axboe**************************************************************************/ 3034cfcdafa994a0a75120e498c51eda08bde5df72Jens Axboe 31e1f365035a952233463d85d659bd960ba78f012eJens Axboe/* 32e1f365035a952233463d85d659bd960ba78f012eJens Axboe * Authors: 3334cfcdafa994a0a75120e498c51eda08bde5df72Jens Axboe * Keith Whitwell <keith@tungstengraphics.com> 34e1f365035a952233463d85d659bd960ba78f012eJens Axboe */ 35e1f365035a952233463d85d659bd960ba78f012eJens Axboe 36e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "glheader.h" 37ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe#include "mtypes.h" 38ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe#include "colormac.h" 39ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe#include "enums.h" 40e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "imports.h" 41e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "macros.h" 42e1f365035a952233463d85d659bd960ba78f012eJens Axboe 43e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "swrast_setup/swrast_setup.h" 44e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "math/m_translate.h" 4561697c37566a211ad3fd70f46397d9b7675b0fc2Jens Axboe#include "tnl/tnl.h" 4661697c37566a211ad3fd70f46397d9b7675b0fc2Jens Axboe#include "tnl/t_context.h" 4761697c37566a211ad3fd70f46397d9b7675b0fc2Jens Axboe#include "tnl/t_pipeline.h" 4861697c37566a211ad3fd70f46397d9b7675b0fc2Jens Axboe#include "tnl/t_vtx_api.h" /* for _tnl_FlushVertices */ 4961697c37566a211ad3fd70f46397d9b7675b0fc2Jens Axboe 5061697c37566a211ad3fd70f46397d9b7675b0fc2Jens Axboe#include "radeon_context.h" 51e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "radeon_ioctl.h" 52e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "radeon_state.h" 53e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "radeon_swtcl.h" 54fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe#include "radeon_tcl.h" 55e1f365035a952233463d85d659bd960ba78f012eJens Axboe 56e1f365035a952233463d85d659bd960ba78f012eJens Axboe/*********************************************************************** 57e1f365035a952233463d85d659bd960ba78f012eJens Axboe * Build render functions from dd templates * 58e1f365035a952233463d85d659bd960ba78f012eJens Axboe ***********************************************************************/ 59e1f365035a952233463d85d659bd960ba78f012eJens Axboe 60fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 61e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define RADEON_XYZW_BIT 0x01 62e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define RADEON_RGBA_BIT 0x02 63e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define RADEON_SPEC_BIT 0x04 64e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define RADEON_TEX0_BIT 0x08 65e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define RADEON_TEX1_BIT 0x10 66fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe#define RADEON_PTEX_BIT 0x20 67e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define RADEON_MAX_SETUP 0x40 68e1f365035a952233463d85d659bd960ba78f012eJens Axboe 69e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic void flush_last_swtcl_prim( radeonContextPtr rmesa ); 70e1f365035a952233463d85d659bd960ba78f012eJens Axboe 71e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic struct { 7215f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe void (*emit)( GLcontext *, GLuint, GLuint, void *, GLuint ); 73ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe interp_func interp; 7415f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe copy_pv_func copy_pv; 7515f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe GLboolean (*check_tex_sizes)( GLcontext *ctx ); 76e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint vertex_size; 77e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint vertex_format; 78e1f365035a952233463d85d659bd960ba78f012eJens Axboe} setup_tab[RADEON_MAX_SETUP]; 79e1f365035a952233463d85d659bd960ba78f012eJens Axboe 80e1f365035a952233463d85d659bd960ba78f012eJens Axboe 8115f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe#define TINY_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 82ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe RADEON_CP_VC_FRMT_Z | \ 8315f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe RADEON_CP_VC_FRMT_PKCOLOR) 84a4f4fdd7c9e46a50bc33ecef44d9f06036580ad4Jens Axboe 85e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define NOTEX_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 86e1f365035a952233463d85d659bd960ba78f012eJens Axboe RADEON_CP_VC_FRMT_Z | \ 8703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_W0 | \ 8803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_PKCOLOR | \ 8903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_PKSPEC) 9003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 9103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TEX0_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 9203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_Z | \ 9303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_W0 | \ 94e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe RADEON_CP_VC_FRMT_PKCOLOR | \ 95e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe RADEON_CP_VC_FRMT_PKSPEC | \ 96e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe RADEON_CP_VC_FRMT_ST0) 97e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe 98e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe#define TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 99e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe RADEON_CP_VC_FRMT_Z | \ 10003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_W0 | \ 10103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_PKCOLOR | \ 10203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_PKSPEC | \ 10303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_ST0 | \ 10403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_ST1) 10503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 10603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define PROJ_TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 10703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_Z | \ 10803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_W0 | \ 10903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_PKCOLOR | \ 11003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_PKSPEC | \ 11103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_ST0 | \ 11203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_Q0 | \ 11303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_ST1 | \ 11403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_CP_VC_FRMT_Q1) 11503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 11603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TEX2_VERTEX_FORMAT 0 11703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TEX3_VERTEX_FORMAT 0 11803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define PROJ_TEX3_VERTEX_FORMAT 0 11903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 12003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_XYZW (IND & RADEON_XYZW_BIT) 12103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_RGBA (IND & RADEON_RGBA_BIT) 12203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_SPEC (IND & RADEON_SPEC_BIT) 12303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_FOG (IND & RADEON_SPEC_BIT) 12403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_TEX0 (IND & RADEON_TEX0_BIT) 12503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_TEX1 (IND & RADEON_TEX1_BIT) 12603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_TEX2 0 12703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_TEX3 0 12803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define DO_PTEX (IND & RADEON_PTEX_BIT) 12903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 13003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define VERTEX radeonVertex 13103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define VERTEX_COLOR radeon_color_t 13203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define GET_VIEWPORT_MAT() 0 13303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define GET_TEXSOURCE(n) n 13403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define GET_VERTEX_FORMAT() RADEON_CONTEXT(ctx)->swtcl.vertex_format 13503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define GET_VERTEX_STORE() RADEON_CONTEXT(ctx)->swtcl.verts 13603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define GET_VERTEX_SIZE() RADEON_CONTEXT(ctx)->swtcl.vertex_size * sizeof(GLuint) 13703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 13803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_HW_VIEWPORT 1 13903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe/* Tiny vertices don't seem to work atm - haven't looked into why. 14003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe */ 14103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_HW_DIVIDE (IND & ~(RADEON_XYZW_BIT|RADEON_RGBA_BIT)) 14203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_TINY_VERTICES 1 14303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_RGBA_COLOR 1 14403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_NOTEX_VERTICES 1 14503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_TEX0_VERTICES 1 14603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_TEX1_VERTICES 1 14703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_TEX2_VERTICES 0 14803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_TEX3_VERTICES 0 14903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define HAVE_PTEX_VERTICES 1 15003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 15103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define CHECK_HW_DIVIDE (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE| \ 15203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe DD_TRI_UNFILLED))) 15303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 15403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define INTERP_VERTEX setup_tab[RADEON_CONTEXT(ctx)->swtcl.SetupIndex].interp 15503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define COPY_PV_VERTEX setup_tab[RADEON_CONTEXT(ctx)->swtcl.SetupIndex].copy_pv 15603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 15703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 15803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe/*********************************************************************** 15903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe * Generate pv-copying and translation functions * 16003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe ***********************************************************************/ 16103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 16203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) radeon_##x 16303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND ~0 16403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vb.c" 16503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#undef IND 16676a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe 16776a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe 16876a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe/*********************************************************************** 16976a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe * Generate vertex emit and interp functions * 17076a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe ***********************************************************************/ 17176a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe 17276a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT) 17376a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe#define TAG(x) x##_wg 17476a43db448f9fd5e9f1397428a433466d98e0d5dJens Axboe#include "tnl_dd/t_dd_vbtmp.h" 17503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 17603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT) 17703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgt0 17803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 17903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 18003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_PTEX_BIT) 18103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgpt0 18203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 18303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 18403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT) 18503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgt0t1 18603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 18703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 18803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT|\ 18903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_PTEX_BIT) 19003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgpt0t1 19103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 19203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 19303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT) 19403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgfs 19503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 19603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 19703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 19803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_TEX0_BIT) 19903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgfst0 20003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 20103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 20203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 20303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_TEX0_BIT|RADEON_PTEX_BIT) 20403b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgfspt0 20503b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 20603b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 20703b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 20803b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_TEX0_BIT|RADEON_TEX1_BIT) 20903b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define TAG(x) x##_wgfst0t1 21003b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#include "tnl_dd/t_dd_vbtmp.h" 21103b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe 21203b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 21303b74b3ec5268e731ed7fcaef31c8c0655acd530Jens Axboe RADEON_TEX0_BIT|RADEON_TEX1_BIT|RADEON_PTEX_BIT) 214e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define TAG(x) x##_wgfspt0t1 215e1f365035a952233463d85d659bd960ba78f012eJens Axboe#include "tnl_dd/t_dd_vbtmp.h" 216e1f365035a952233463d85d659bd960ba78f012eJens Axboe 21715f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe 218ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe/*********************************************************************** 21915f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe * Initialization 220e1f365035a952233463d85d659bd960ba78f012eJens Axboe ***********************************************************************/ 221e1f365035a952233463d85d659bd960ba78f012eJens Axboe 222e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic void init_setup_tab( void ) 223e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 224e1f365035a952233463d85d659bd960ba78f012eJens Axboe init_wg(); 22515f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe init_wgt0(); 226ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe init_wgpt0(); 22715f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe init_wgt0t1(); 228e1f365035a952233463d85d659bd960ba78f012eJens Axboe init_wgpt0t1(); 229e1f365035a952233463d85d659bd960ba78f012eJens Axboe init_wgfs(); 230e1f365035a952233463d85d659bd960ba78f012eJens Axboe init_wgfst0(); 231076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe init_wgfspt0(); 232076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe init_wgfst0t1(); 233fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe init_wgfspt0t1(); 234e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 235e1f365035a952233463d85d659bd960ba78f012eJens Axboe 236076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe 237e1f365035a952233463d85d659bd960ba78f012eJens Axboe 238076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboevoid radeonPrintSetupFlags(char *msg, GLuint flags ) 239fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe{ 240e1f365035a952233463d85d659bd960ba78f012eJens Axboe fprintf(stderr, "%s(%x): %s%s%s%s%s%s\n", 241e1f365035a952233463d85d659bd960ba78f012eJens Axboe msg, 242e1f365035a952233463d85d659bd960ba78f012eJens Axboe (int)flags, 243e1f365035a952233463d85d659bd960ba78f012eJens Axboe (flags & RADEON_XYZW_BIT) ? " xyzw," : "", 244e1f365035a952233463d85d659bd960ba78f012eJens Axboe (flags & RADEON_RGBA_BIT) ? " rgba," : "", 245fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe (flags & RADEON_SPEC_BIT) ? " spec/fog," : "", 246e1f365035a952233463d85d659bd960ba78f012eJens Axboe (flags & RADEON_TEX0_BIT) ? " tex-0," : "", 247e1f365035a952233463d85d659bd960ba78f012eJens Axboe (flags & RADEON_TEX1_BIT) ? " tex-1," : "", 248e1f365035a952233463d85d659bd960ba78f012eJens Axboe (flags & RADEON_PTEX_BIT) ? " proj-tex," : ""); 249e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 250e1f365035a952233463d85d659bd960ba78f012eJens Axboe 251fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 252e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic void radeonRenderStart( GLcontext *ctx ) 253e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 254e1f365035a952233463d85d659bd960ba78f012eJens Axboe TNLcontext *tnl = TNL_CONTEXT(ctx); 255e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 256e1f365035a952233463d85d659bd960ba78f012eJens Axboe 257e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (!setup_tab[rmesa->swtcl.SetupIndex].check_tex_sizes(ctx)) { 258fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe GLuint ind = rmesa->swtcl.SetupIndex |= (RADEON_PTEX_BIT|RADEON_RGBA_BIT); 259e1f365035a952233463d85d659bd960ba78f012eJens Axboe 260e1f365035a952233463d85d659bd960ba78f012eJens Axboe /* Projective textures are handled nicely; just have to change 261e1f365035a952233463d85d659bd960ba78f012eJens Axboe * up to the new vertex format. 262e1f365035a952233463d85d659bd960ba78f012eJens Axboe */ 263e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (setup_tab[ind].vertex_format != rmesa->swtcl.vertex_format) { 264e1f365035a952233463d85d659bd960ba78f012eJens Axboe RADEON_NEWPRIM(rmesa); 265fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe rmesa->swtcl.vertex_format = setup_tab[ind].vertex_format; 266ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe rmesa->swtcl.vertex_size = setup_tab[ind].vertex_size; 267e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 268e1f365035a952233463d85d659bd960ba78f012eJens Axboe 269e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { 270e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.Interp = setup_tab[rmesa->swtcl.SetupIndex].interp; 271e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.CopyPV = setup_tab[rmesa->swtcl.SetupIndex].copy_pv; 272fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe } 273ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe } 274e1f365035a952233463d85d659bd960ba78f012eJens Axboe 275e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (rmesa->dma.flush != 0 && 276e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->dma.flush != flush_last_swtcl_prim) 277e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->dma.flush( rmesa ); 278e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 279fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 280ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 281e1f365035a952233463d85d659bd960ba78f012eJens Axboevoid radeonBuildVertices( GLcontext *ctx, GLuint start, GLuint count, 282e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint newinputs ) 283e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 284e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 285e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint stride = rmesa->swtcl.vertex_size * sizeof(int); 286ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe GLubyte *v = ((GLubyte *)rmesa->swtcl.verts + (start * stride)); 287ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 288e1f365035a952233463d85d659bd960ba78f012eJens Axboe newinputs |= rmesa->swtcl.SetupNewInputs; 289e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.SetupNewInputs = 0; 290e1f365035a952233463d85d659bd960ba78f012eJens Axboe 291e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (!newinputs) 292e1f365035a952233463d85d659bd960ba78f012eJens Axboe return; 293ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 294fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe setup_tab[rmesa->swtcl.SetupIndex].emit( ctx, start, count, v, stride ); 295ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe} 296e1f365035a952233463d85d659bd960ba78f012eJens Axboe 297e1f365035a952233463d85d659bd960ba78f012eJens Axboevoid radeonChooseVertexState( GLcontext *ctx ) 298e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 299e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 300e1f365035a952233463d85d659bd960ba78f012eJens Axboe TNLcontext *tnl = TNL_CONTEXT(ctx); 301ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe GLuint ind = (RADEON_XYZW_BIT | RADEON_RGBA_BIT); 302fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 303ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe if (!rmesa->TclFallback || rmesa->Fallback) 304e1f365035a952233463d85d659bd960ba78f012eJens Axboe return; 305e1f365035a952233463d85d659bd960ba78f012eJens Axboe 306e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (ctx->Fog.Enabled || (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)) 307e1f365035a952233463d85d659bd960ba78f012eJens Axboe ind |= RADEON_SPEC_BIT; 308e1f365035a952233463d85d659bd960ba78f012eJens Axboe 309fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe if (ctx->Texture._EnabledUnits & 0x2) 31015f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe /* unit 1 enabled */ 311ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe ind |= RADEON_TEX0_BIT|RADEON_TEX1_BIT; 312ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe else if (ctx->Texture._EnabledUnits & 0x1) 313e1f365035a952233463d85d659bd960ba78f012eJens Axboe /* unit 0 enabled */ 314e1f365035a952233463d85d659bd960ba78f012eJens Axboe ind |= RADEON_TEX0_BIT; 315e1f365035a952233463d85d659bd960ba78f012eJens Axboe 316e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.SetupIndex = ind; 317e1f365035a952233463d85d659bd960ba78f012eJens Axboe 318e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)) { 319fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe tnl->Driver.Render.Interp = radeon_interp_extras; 32015f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe tnl->Driver.Render.CopyPV = radeon_copy_pv_extras; 32115f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe } 322e1f365035a952233463d85d659bd960ba78f012eJens Axboe else { 323e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.Interp = setup_tab[ind].interp; 324e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.CopyPV = setup_tab[ind].copy_pv; 325e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 326e1f365035a952233463d85d659bd960ba78f012eJens Axboe 327fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe if (setup_tab[ind].vertex_format != rmesa->swtcl.vertex_format) { 32815f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe RADEON_NEWPRIM(rmesa); 32915f7918ff432d5da2b2abc84a50c685bde5e72efJens Axboe rmesa->swtcl.vertex_format = setup_tab[ind].vertex_format; 330e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.vertex_size = setup_tab[ind].vertex_size; 331e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 332e1f365035a952233463d85d659bd960ba78f012eJens Axboe 333e1f365035a952233463d85d659bd960ba78f012eJens Axboe { 334e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint se_coord_fmt, needproj; 3351304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe 3365fa0f817d41211f45c04809dfe6c324f916fbcb4Jens Axboe /* HW perspective divide is a win, but tiny vertex formats are a 337ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe * bigger one. 338e1f365035a952233463d85d659bd960ba78f012eJens Axboe */ 339e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (setup_tab[ind].vertex_format == TINY_VERTEX_FORMAT || 34048097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { 34148097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe needproj = GL_TRUE; 34248097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | 34348097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe RADEON_VTX_Z_PRE_MULT_1_OVER_W0 | 34448097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe RADEON_TEX1_W_ROUTING_USE_Q1); 34548097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe } 34648097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe else { 3479c1f7434526606fc8a4296190a2dea5de2651266Jens Axboe needproj = GL_FALSE; 3489c1f7434526606fc8a4296190a2dea5de2651266Jens Axboe se_coord_fmt = (RADEON_VTX_W0_IS_NOT_1_OVER_W0 | 3491304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe RADEON_TEX1_W_ROUTING_USE_Q1); 350fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe } 351ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 3529c1f7434526606fc8a4296190a2dea5de2651266Jens Axboe if ( se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT] ) { 3539c1f7434526606fc8a4296190a2dea5de2651266Jens Axboe RADEON_STATECHANGE( rmesa, set ); 354e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt; 355e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 3561304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe _tnl_need_projected_coords( ctx, needproj ); 357fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe } 358e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 359e1f365035a952233463d85d659bd960ba78f012eJens Axboe 360e1f365035a952233463d85d659bd960ba78f012eJens Axboe 361e1f365035a952233463d85d659bd960ba78f012eJens Axboe/* Flush vertices in the current dma region. 3621304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe */ 363fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboestatic void flush_last_swtcl_prim( radeonContextPtr rmesa ) 364e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 365e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (RADEON_DEBUG & DEBUG_IOCTL) 366e1f365035a952233463d85d659bd960ba78f012eJens Axboe fprintf(stderr, "%s\n", __FUNCTION__); 367e1f365035a952233463d85d659bd960ba78f012eJens Axboe 3681304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe rmesa->dma.flush = 0; 3696da1fa7f0a8d7e588dc0ea40a5e175edded9a8acJens Axboe 370ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe if (rmesa->dma.current.buf) { 371e1f365035a952233463d85d659bd960ba78f012eJens Axboe struct radeon_dma_region *current = &rmesa->dma.current; 372e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint current_offset = (rmesa->radeonScreen->gart_buffer_offset + 373e1f365035a952233463d85d659bd960ba78f012eJens Axboe current->buf->buf->idx * RADEON_BUFFER_SIZE + 37413335ddb0e304efa0fc96593dd1fd995ec6f68d7Jens Axboe current->start); 3751304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe 376fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe assert (!(rmesa->swtcl.hw_primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND)); 377ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 378e1f365035a952233463d85d659bd960ba78f012eJens Axboe assert (current->start + 379e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 380e1f365035a952233463d85d659bd960ba78f012eJens Axboe current->ptr); 38113335ddb0e304efa0fc96593dd1fd995ec6f68d7Jens Axboe 3821304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe if (rmesa->dma.current.start != rmesa->dma.current.ptr) { 383fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe radeonEmitVertexAOS( rmesa, 384ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe rmesa->swtcl.vertex_size, 385e1f365035a952233463d85d659bd960ba78f012eJens Axboe current_offset); 386e1f365035a952233463d85d659bd960ba78f012eJens Axboe 387e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonEmitVbufPrim( rmesa, 388e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.vertex_format, 3891304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe rmesa->swtcl.hw_primitive, 390ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe rmesa->swtcl.numverts); 391ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe } 392e1f365035a952233463d85d659bd960ba78f012eJens Axboe 393e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.numverts = 0; 394e1f365035a952233463d85d659bd960ba78f012eJens Axboe current->start = current->ptr; 39513335ddb0e304efa0fc96593dd1fd995ec6f68d7Jens Axboe } 3961304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe} 397fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 398ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 399e1f365035a952233463d85d659bd960ba78f012eJens Axboe/* Alloc space in the current dma region. 400e1f365035a952233463d85d659bd960ba78f012eJens Axboe */ 401e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic __inline void *radeonAllocDmaLowVerts( radeonContextPtr rmesa, 40213335ddb0e304efa0fc96593dd1fd995ec6f68d7Jens Axboe int nverts, int vsize ) 4031304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe{ 404fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe GLuint bytes = vsize * nverts; 405ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 406e1f365035a952233463d85d659bd960ba78f012eJens Axboe if ( rmesa->dma.current.ptr + bytes > rmesa->dma.current.end ) 407e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonRefillCurrentDmaRegion( rmesa ); 408e1f365035a952233463d85d659bd960ba78f012eJens Axboe 409e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (!rmesa->dma.flush) { 4101304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe rmesa->glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; 411fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe rmesa->dma.flush = flush_last_swtcl_prim; 412e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 413e1f365035a952233463d85d659bd960ba78f012eJens Axboe 414e1f365035a952233463d85d659bd960ba78f012eJens Axboe assert( vsize == rmesa->swtcl.vertex_size * 4 ); 415e1f365035a952233463d85d659bd960ba78f012eJens Axboe assert( rmesa->dma.flush == flush_last_swtcl_prim ); 4161304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe assert (rmesa->dma.current.start + 417fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 418e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->dma.current.ptr); 419e1f365035a952233463d85d659bd960ba78f012eJens Axboe 420e1f365035a952233463d85d659bd960ba78f012eJens Axboe 421e1f365035a952233463d85d659bd960ba78f012eJens Axboe { 422e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLubyte *head = (GLubyte *)(rmesa->dma.current.address + rmesa->dma.current.ptr); 423e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->dma.current.ptr += bytes; 424fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe rmesa->swtcl.numverts += nverts; 425e1f365035a952233463d85d659bd960ba78f012eJens Axboe return head; 426e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 427e1f365035a952233463d85d659bd960ba78f012eJens Axboe 428e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 42913335ddb0e304efa0fc96593dd1fd995ec6f68d7Jens Axboe 4301304923a76e2e7f8c283240b3c6eb13ddd71db7aJens Axboe 431fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 432ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 433e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic void *radeon_emit_contiguous_verts( GLcontext *ctx, 434e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint start, 435e1f365035a952233463d85d659bd960ba78f012eJens Axboe GLuint count, 43613335ddb0e304efa0fc96593dd1fd995ec6f68d7Jens Axboe void *dest) 437e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 438ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 439e545a6ce0f0f3e6881e997bf2af8969fc6dd7082Jens Axboe GLuint stride = rmesa->swtcl.vertex_size * 4; 440e1f365035a952233463d85d659bd960ba78f012eJens Axboe setup_tab[rmesa->swtcl.SetupIndex].emit( ctx, start, count, dest, stride ); 441e1f365035a952233463d85d659bd960ba78f012eJens Axboe return (void *)((char *)dest + stride * (count - start)); 442e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 443e1f365035a952233463d85d659bd960ba78f012eJens Axboe 444e1f365035a952233463d85d659bd960ba78f012eJens Axboe 445fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 446e1f365035a952233463d85d659bd960ba78f012eJens Axboevoid radeon_emit_indexed_verts( GLcontext *ctx, GLuint start, GLuint count ) 447e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 448e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 449e1f365035a952233463d85d659bd960ba78f012eJens Axboe 450e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonAllocDmaRegionVerts( rmesa, 451fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe &rmesa->swtcl.indexed_verts, 452e1f365035a952233463d85d659bd960ba78f012eJens Axboe count - start, 453e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.vertex_size * 4, 454e1f365035a952233463d85d659bd960ba78f012eJens Axboe 64); 455e1f365035a952233463d85d659bd960ba78f012eJens Axboe 456d9bb3b809d80cc3226d1c603e87fc90b6680320bJens Axboe setup_tab[rmesa->swtcl.SetupIndex].emit( 457fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe ctx, start, count, 458e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.indexed_verts.address + rmesa->swtcl.indexed_verts.start, 459e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.vertex_size * 4 ); 460e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 461e1f365035a952233463d85d659bd960ba78f012eJens Axboe 462e1f365035a952233463d85d659bd960ba78f012eJens Axboe 463fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe/* 464e1f365035a952233463d85d659bd960ba78f012eJens Axboe * Render unclipped vertex buffers by emitting vertices directly to 465e1f365035a952233463d85d659bd960ba78f012eJens Axboe * dma buffers. Use strip/fan hardware primitives where possible. 466e1f365035a952233463d85d659bd960ba78f012eJens Axboe * Try to simulate missing primitives with indexed vertices. 467e1f365035a952233463d85d659bd960ba78f012eJens Axboe */ 468e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define HAVE_POINTS 1 469fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe#define HAVE_LINES 1 470e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define HAVE_LINE_STRIPS 1 471e1f365035a952233463d85d659bd960ba78f012eJens Axboe#define HAVE_TRIANGLES 1 47256bb17f297c50b2832c845b0f6cdde5063748b34Jens Axboe#define HAVE_TRI_STRIPS 1 47356bb17f297c50b2832c845b0f6cdde5063748b34Jens Axboe#define HAVE_TRI_STRIP_1 0 47456bb17f297c50b2832c845b0f6cdde5063748b34Jens Axboe#define HAVE_TRI_FANS 1 475fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe#define HAVE_QUADS 0 476ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe#define HAVE_QUAD_STRIPS 0 47756bb17f297c50b2832c845b0f6cdde5063748b34Jens Axboe#define HAVE_POLYGONS 0 47856bb17f297c50b2832c845b0f6cdde5063748b34Jens Axboe#define HAVE_ELTS 1 479e1f365035a952233463d85d659bd960ba78f012eJens Axboe 480e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic const GLuint hw_prim[GL_POLYGON+1] = { 481e1f365035a952233463d85d659bd960ba78f012eJens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 482e1f365035a952233463d85d659bd960ba78f012eJens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 483b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 0, 484b46928282e0a890f49250e79b81af773a2b7108fJens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP, 485b46928282e0a890f49250e79b81af773a2b7108fJens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 486b46928282e0a890f49250e79b81af773a2b7108fJens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP, 487b46928282e0a890f49250e79b81af773a2b7108fJens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN, 488b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 0, 489b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 0, 490b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 0 491b46928282e0a890f49250e79b81af773a2b7108fJens Axboe}; 492b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 493b46928282e0a890f49250e79b81af773a2b7108fJens Axboestatic __inline void radeonDmaPrimitive( radeonContextPtr rmesa, GLenum prim ) 494b46928282e0a890f49250e79b81af773a2b7108fJens Axboe{ 495b46928282e0a890f49250e79b81af773a2b7108fJens Axboe RADEON_NEWPRIM( rmesa ); 496b46928282e0a890f49250e79b81af773a2b7108fJens Axboe rmesa->swtcl.hw_primitive = hw_prim[prim]; 497b46928282e0a890f49250e79b81af773a2b7108fJens Axboe assert(rmesa->dma.current.ptr == rmesa->dma.current.start); 498b46928282e0a890f49250e79b81af773a2b7108fJens Axboe} 499b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 500b46928282e0a890f49250e79b81af773a2b7108fJens Axboestatic __inline void radeonEltPrimitive( radeonContextPtr rmesa, GLenum prim ) 501b46928282e0a890f49250e79b81af773a2b7108fJens Axboe{ 502b46928282e0a890f49250e79b81af773a2b7108fJens Axboe RADEON_NEWPRIM( rmesa ); 503b46928282e0a890f49250e79b81af773a2b7108fJens Axboe rmesa->swtcl.hw_primitive = hw_prim[prim] | RADEON_CP_VC_CNTL_PRIM_WALK_IND; 504b46928282e0a890f49250e79b81af773a2b7108fJens Axboe} 505b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 506b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 507b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 508b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 509b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx) 510b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define ELTS_VARS( buf ) GLushort *dest = buf 511b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define INIT( prim ) radeonDmaPrimitive( rmesa, prim ) 512b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define ELT_INIT(prim) radeonEltPrimitive( rmesa, prim ) 513b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define FLUSH() RADEON_NEWPRIM( rmesa ) 514b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define GET_CURRENT_VB_MAX_VERTS() \ 515b46928282e0a890f49250e79b81af773a2b7108fJens Axboe (((int)rmesa->dma.current.end - (int)rmesa->dma.current.ptr) / (rmesa->swtcl.vertex_size*4)) 516b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define GET_SUBSEQUENT_VB_MAX_VERTS() \ 517b46928282e0a890f49250e79b81af773a2b7108fJens Axboe ((RADEON_BUFFER_SIZE) / (rmesa->swtcl.vertex_size*4)) 518b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 519b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#if RADEON_OLD_PACKETS 520b46928282e0a890f49250e79b81af773a2b7108fJens Axboe# define GET_CURRENT_VB_MAX_ELTS() \ 521b46928282e0a890f49250e79b81af773a2b7108fJens Axboe ((RADEON_CMD_BUF_SZ - (rmesa->store.cmd_used + 24)) / 2) 522b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#else 523fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe# define GET_CURRENT_VB_MAX_ELTS() \ 524fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe ((RADEON_CMD_BUF_SZ - (rmesa->store.cmd_used + 16)) / 2) 525fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe#endif 526fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe#define GET_SUBSEQUENT_VB_MAX_ELTS() \ 527fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe ((RADEON_CMD_BUF_SZ - 1024) / 2) 528fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 529fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe 530fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboestatic void *radeon_alloc_elts( radeonContextPtr rmesa, int nr ) 531fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe{ 532fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe if (rmesa->dma.flush == radeonFlushElts && 533b46928282e0a890f49250e79b81af773a2b7108fJens Axboe rmesa->store.cmd_used + nr*2 < RADEON_CMD_BUF_SZ) { 534b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 535b46928282e0a890f49250e79b81af773a2b7108fJens Axboe rmesa->store.cmd_used += nr*2; 536b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 537ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe return (void *)(rmesa->store.cmd_buf + rmesa->store.cmd_used); 538972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe } 5395cd033bbb08dbdd2241a0eac09ef34a59a5d8f52Jens Axboe else { 540ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (rmesa->dma.flush) { 541972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe rmesa->dma.flush( rmesa ); 542ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } 543ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 544ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonEmitVertexAOS( rmesa, 545ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe rmesa->swtcl.vertex_size, 546ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe (rmesa->radeonScreen->gart_buffer_offset + 547ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe rmesa->swtcl.indexed_verts.buf->buf->idx * 548c6ae0a5b8123ea9af2ce70319081fbd5d65c8093Jens Axboe RADEON_BUFFER_SIZE + 549c04f7ec3ecb8ce780bde6ad3515f003e6015c62aJens Axboe rmesa->swtcl.indexed_verts.start)); 550eb8bbf48e79a8c6afd3c84e3d64263d10ee45daaJens Axboe 551eb8bbf48e79a8c6afd3c84e3d64263d10ee45daaJens Axboe return (void *) radeonAllocEltsOpenEnded( rmesa, 552ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe rmesa->swtcl.vertex_format, 553ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe rmesa->swtcl.hw_primitive, 554bb3884d855100fa8fa6a1d2aac79e867dfd47bf9Jens Axboe nr ); 555ec94ec567cae47f91fa31a18250c2a7a0029d2adJens Axboe } 556906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe} 557906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe 558906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe#define ALLOC_ELTS(nr) radeon_alloc_elts(rmesa, nr) 559ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 560ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#ifdef MESA_BIG_ENDIAN 561ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */ 562ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define EMIT_ELT(offset, x) do { \ 563ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 ); \ 564ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 ); \ 565ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x); } while (0) 566ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#else 567ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define EMIT_ELT(offset, x) (dest)[offset] = (GLushort) (x) 568ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#endif 569ddaeaa5ab1e3f1cb6f35a9f4a18ee932151a0ab8Jens Axboe#define EMIT_TWO_ELTS(offset, x, y) *(GLuint *)(dest+offset) = ((y)<<16)|(x); 570ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define INCR_ELTS( nr ) dest += nr 571ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define ELTPTR dest 572ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define RELEASE_ELT_VERTS() \ 573ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, __FUNCTION__ ) 574ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define EMIT_INDEXED_VERTS( ctx, start, count ) \ 575ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeon_emit_indexed_verts( ctx, start, count ) 576ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 577549577a728fc3bacbfea8978c4f514cef5b073dcJens Axboe 578549577a728fc3bacbfea8978c4f514cef5b073dcJens Axboe#define ALLOC_VERTS( nr ) \ 579549577a728fc3bacbfea8978c4f514cef5b073dcJens Axboe radeonAllocDmaLowVerts( rmesa, nr, rmesa->swtcl.vertex_size * 4 ) 58016edf25dba269ee9e8239130e75b690440b1e120Jens Axboe#define EMIT_VERTS( ctx, j, nr, buf ) \ 58116edf25dba269ee9e8239130e75b690440b1e120Jens Axboe radeon_emit_contiguous_verts(ctx, j, (j)+(nr), buf) 58216edf25dba269ee9e8239130e75b690440b1e120Jens Axboe 583ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define TAG(x) radeon_dma_##x 584ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#include "tnl_dd/t_dd_dmatmp.h" 585ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 586ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 587dad915e36819e74c4540db19faae488ede963ee4Jens Axboe/**********************************************************************/ 588dad915e36819e74c4540db19faae488ede963ee4Jens Axboe/* Render pipeline stage */ 589dad915e36819e74c4540db19faae488ede963ee4Jens Axboe/**********************************************************************/ 590dad915e36819e74c4540db19faae488ede963ee4Jens Axboe 591e1f365035a952233463d85d659bd960ba78f012eJens Axboe 592e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic GLboolean radeon_run_render( GLcontext *ctx, 593e1f365035a952233463d85d659bd960ba78f012eJens Axboe struct tnl_pipeline_stage *stage ) 594e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 595dad915e36819e74c4540db19faae488ede963ee4Jens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 596076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe TNLcontext *tnl = TNL_CONTEXT(ctx); 597076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe struct vertex_buffer *VB = &tnl->vb; 598076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe render_func *tab = TAG(render_tab_verts); 599076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe GLuint i; 600076efc7c60c351df783960a646e7fe8fba29dc19Jens Axboe 60116b462aeb47996111ee6aa516c9226708db7c248Jens Axboe if (rmesa->swtcl.indexed_verts.buf && (!VB->Elts || stage->changed_inputs)) 60216b462aeb47996111ee6aa516c9226708db7c248Jens Axboe RELEASE_ELT_VERTS(); 60316b462aeb47996111ee6aa516c9226708db7c248Jens Axboe 60416b462aeb47996111ee6aa516c9226708db7c248Jens Axboe if (rmesa->swtcl.RenderIndex != 0 || 60516b462aeb47996111ee6aa516c9226708db7c248Jens Axboe !radeon_dma_validate_render( ctx, VB )) 60616b462aeb47996111ee6aa516c9226708db7c248Jens Axboe return GL_TRUE; 60716b462aeb47996111ee6aa516c9226708db7c248Jens Axboe 60816b462aeb47996111ee6aa516c9226708db7c248Jens Axboe tnl->Driver.Render.Start( ctx ); 60916b462aeb47996111ee6aa516c9226708db7c248Jens Axboe 61016b462aeb47996111ee6aa516c9226708db7c248Jens Axboe if (VB->Elts) { 61116b462aeb47996111ee6aa516c9226708db7c248Jens Axboe tab = TAG(render_tab_elts); 61216b462aeb47996111ee6aa516c9226708db7c248Jens Axboe if (!rmesa->swtcl.indexed_verts.buf) { 61316b462aeb47996111ee6aa516c9226708db7c248Jens Axboe if (VB->Count > GET_SUBSEQUENT_VB_MAX_VERTS()) 61416b462aeb47996111ee6aa516c9226708db7c248Jens Axboe return GL_TRUE; 61516b462aeb47996111ee6aa516c9226708db7c248Jens Axboe EMIT_INDEXED_VERTS(ctx, 0, VB->Count); 61616b462aeb47996111ee6aa516c9226708db7c248Jens Axboe } 61716b462aeb47996111ee6aa516c9226708db7c248Jens Axboe } 61816b462aeb47996111ee6aa516c9226708db7c248Jens Axboe 61916b462aeb47996111ee6aa516c9226708db7c248Jens Axboe for (i = 0 ; i < VB->PrimitiveCount ; i++) 62016b462aeb47996111ee6aa516c9226708db7c248Jens Axboe { 621a00735e66f9ec42549da94eba3170e543b542904Jens Axboe GLuint prim = VB->Primitive[i].mode; 622a00735e66f9ec42549da94eba3170e543b542904Jens Axboe GLuint start = VB->Primitive[i].start; 623a00735e66f9ec42549da94eba3170e543b542904Jens Axboe GLuint length = VB->Primitive[i].count; 624a00735e66f9ec42549da94eba3170e543b542904Jens Axboe 625a00735e66f9ec42549da94eba3170e543b542904Jens Axboe if (!length) 62675e6f36fae06978f29296fce76a7f00ca0df7b56Jens Axboe continue; 627a00735e66f9ec42549da94eba3170e543b542904Jens Axboe 62875e6f36fae06978f29296fce76a7f00ca0df7b56Jens Axboe if (RADEON_DEBUG & DEBUG_PRIMS) 629a00735e66f9ec42549da94eba3170e543b542904Jens Axboe fprintf(stderr, "radeon_render.c: prim %s %d..%d\n", 630a00735e66f9ec42549da94eba3170e543b542904Jens Axboe _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), 631a00735e66f9ec42549da94eba3170e543b542904Jens Axboe start, start+length); 63216b462aeb47996111ee6aa516c9226708db7c248Jens Axboe 63316b462aeb47996111ee6aa516c9226708db7c248Jens Axboe if (length) 634bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim ); 635bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe } 636bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe 637bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe tnl->Driver.Render.Finish( ctx ); 638bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe 639690adba373bb8c97a365c67da369e265953c4b4cJens Axboe return GL_FALSE; /* finished the pipe */ 640690adba373bb8c97a365c67da369e265953c4b4cJens Axboe} 641e0a223354342cc45a916b669343718b80a20c2eaJens Axboe 642e0a223354342cc45a916b669343718b80a20c2eaJens Axboe 643e0a223354342cc45a916b669343718b80a20c2eaJens Axboe 644e0a223354342cc45a916b669343718b80a20c2eaJens Axboestatic void radeon_check_render( GLcontext *ctx, 645e0a223354342cc45a916b669343718b80a20c2eaJens Axboe struct tnl_pipeline_stage *stage ) 646e0a223354342cc45a916b669343718b80a20c2eaJens Axboe{ 64748097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0; 64848097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe 64948097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe if (ctx->RenderMode == GL_RENDER) { 65048097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) 65148097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe inputs |= VERT_BIT_COLOR1; 65248097d5c61aa1718e6dd4b3b647ea2eb6f00fcfbJens Axboe 653e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe if (ctx->Texture.Unit[0]._ReallyEnabled) 654e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe inputs |= VERT_BIT_TEX0; 655e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe 656e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe if (ctx->Texture.Unit[1]._ReallyEnabled) 657e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe inputs |= VERT_BIT_TEX1; 658e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe 659e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe if (ctx->Fog.Enabled) 660e916b390684ec1ca6247f98138fa9c1682701d29Jens Axboe inputs |= VERT_BIT_FOG; 661e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 662e1f365035a952233463d85d659bd960ba78f012eJens Axboe 663906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe stage->inputs = inputs; 664f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe} 665f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 666f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 667f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboestatic void dtr( struct tnl_pipeline_stage *stage ) 668f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe{ 669f3502ba2dd72d846a388c774a01c6bb833871248Jens Axboe (void)stage; 670f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe} 671f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 672245142ff7554290cf666e3ef6b7b57512bf17d75Jens Axboe 673f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboeconst struct tnl_pipeline_stage _radeon_render_stage = 674f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe{ 675f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe "radeon render", 676f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe (_DD_NEW_SEPARATE_SPECULAR | 677f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe _NEW_TEXTURE| 678245142ff7554290cf666e3ef6b7b57512bf17d75Jens Axboe _NEW_FOG| 679f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe _NEW_RENDERMODE), /* re-check (new inputs) */ 680f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 0, /* re-run (always runs) */ 681f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe GL_TRUE, /* active */ 682f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 0, 0, /* inputs (set in check_render), outputs */ 683f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 0, 0, /* changed_inputs, private */ 684f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe dtr, /* destructor */ 685906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe radeon_check_render, /* check - initially set to alloc data */ 686906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe radeon_run_render /* run */ 687906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe}; 688906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe 689751548451d969148529b642c05e7544726ec3b64Jens Axboe 690ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/**************************************************************************/ 6913c9b60c1fb144950ca51220ffa18f485672c3ba6Jens Axboe 6923c9b60c1fb144950ca51220ffa18f485672c3ba6Jens Axboe/* Radeon texture rectangle expects coords in 0..1 range, not 0..dimension 693ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe * as in the extension spec. Need to translate here. 69453cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe * 69553cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe * Note that swrast expects 0..dimension, so if a fallback is active, 696ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe * don't do anything. (Maybe need to configure swrast to match hw) 697ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe */ 698ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboestruct texrect_stage_data { 699ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLvector4f texcoord[MAX_TEXTURE_UNITS]; 700ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe}; 701ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 702ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define TEXRECT_STAGE_DATA(stage) ((struct texrect_stage_data *)stage->privatePtr) 703ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe 704df64119de537aba99c85d1dc80190b354589f8b9Jens Axboe 705690adba373bb8c97a365c67da369e265953c4b4cJens Axboestatic GLboolean run_texrect_stage( GLcontext *ctx, 706690adba373bb8c97a365c67da369e265953c4b4cJens Axboe struct tnl_pipeline_stage *stage ) 707690adba373bb8c97a365c67da369e265953c4b4cJens Axboe{ 708ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 709890df538b3645d9310a3527513195773130d1d7fJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 7100af7b542b69af5ab2400a9960a5bcde82c05723fJens Axboe TNLcontext *tnl = TNL_CONTEXT(ctx); 7110af7b542b69af5ab2400a9960a5bcde82c05723fJens Axboe struct vertex_buffer *VB = &tnl->vb; 7120af7b542b69af5ab2400a9960a5bcde82c05723fJens Axboe GLuint i; 7130af7b542b69af5ab2400a9960a5bcde82c05723fJens Axboe 7140af7b542b69af5ab2400a9960a5bcde82c05723fJens Axboe if (rmesa->Fallback) 715ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe return GL_TRUE; 716e0a223354342cc45a916b669343718b80a20c2eaJens Axboe 717e0a223354342cc45a916b669343718b80a20c2eaJens Axboe for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) { 71813f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe if (!(ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_RECT_BIT)) 71913f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe continue; 72013f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe 72113f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe if (stage->changed_inputs & VERT_BIT_TEX(i)) { 72213f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe struct gl_texture_object *texObj = ctx->Texture.Unit[i].CurrentRect; 72313f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe struct gl_texture_image *texImage = texObj->Image[texObj->BaseLevel]; 724e9c047a0d8dfc32634b896e1600c6f1aa4174378Jens Axboe const GLfloat iw = 1.0/texImage->Width; 72553cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe const GLfloat ih = 1.0/texImage->Height; 726e9c047a0d8dfc32634b896e1600c6f1aa4174378Jens Axboe GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data; 72716edf25dba269ee9e8239130e75b690440b1e120Jens Axboe GLint instride = VB->TexCoordPtr[i]->stride; 72816edf25dba269ee9e8239130e75b690440b1e120Jens Axboe GLfloat (*out)[4] = store->texcoord[i].data; 72916edf25dba269ee9e8239130e75b690440b1e120Jens Axboe GLint j; 73016edf25dba269ee9e8239130e75b690440b1e120Jens Axboe 73116edf25dba269ee9e8239130e75b690440b1e120Jens Axboe for (j = 0 ; j < VB->Count ; j++) { 73216edf25dba269ee9e8239130e75b690440b1e120Jens Axboe out[j][0] = in[0] * iw; 73316edf25dba269ee9e8239130e75b690440b1e120Jens Axboe out[j][1] = in[1] * ih; 73416edf25dba269ee9e8239130e75b690440b1e120Jens Axboe in = (GLfloat *)((GLubyte *)in + instride); 73516edf25dba269ee9e8239130e75b690440b1e120Jens Axboe } 73616edf25dba269ee9e8239130e75b690440b1e120Jens Axboe } 7378aeebd5570ac4fccbcdd48f2e6f1cf1577f3c08dJens Axboe 73816edf25dba269ee9e8239130e75b690440b1e120Jens Axboe VB->TexCoordPtr[i] = &store->texcoord[i]; 739ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } 74053cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe 74153cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe return GL_TRUE; 74253cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe} 74353cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe 74453cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe 74553cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe/* Called the first time stage->run() is invoked. 74613f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe */ 74713f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboestatic GLboolean alloc_texrect_data( GLcontext *ctx, 74813f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe struct tnl_pipeline_stage *stage ) 74913f8e2d2e3e5ec7d8c18b70fb2a2e2a026190020Jens Axboe{ 75053cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; 75153cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe struct texrect_stage_data *store; 75253cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe GLuint i; 75353cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe 75453cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe stage->privatePtr = CALLOC(sizeof(*store)); 75553cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe store = TEXRECT_STAGE_DATA(stage); 75653cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe if (!store) 75753cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe return GL_FALSE; 75853cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe 75953cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) 76053cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe _mesa_vector4f_alloc( &store->texcoord[i], 0, VB->Size, 32 ); 76153cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe 76253cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe /* Now run the stage. 76353cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe */ 76453cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe stage->run = run_texrect_stage; 76553cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe return stage->run( ctx, stage ); 76653cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe} 767bbfd6b00dea4daee05133c8cb991b78d091df9aeJens Axboe 768ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 769079ad09b1ef22fa0d47c2cd2673908c5619aa41aJens Axboestatic void check_texrect( GLcontext *ctx, 770079ad09b1ef22fa0d47c2cd2673908c5619aa41aJens Axboe struct tnl_pipeline_stage *stage ) 771079ad09b1ef22fa0d47c2cd2673908c5619aa41aJens Axboe{ 772ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLuint flags = 0; 773ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 774ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_RECT_BIT) 775ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe flags |= VERT_BIT_TEX0; 776ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 777ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (ctx->Texture.Unit[1]._ReallyEnabled & TEXTURE_RECT_BIT) 778ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe flags |= VERT_BIT_TEX1; 779ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 780ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe stage->inputs = flags; 781ec94ec567cae47f91fa31a18250c2a7a0029d2adJens Axboe stage->outputs = flags; 782079ad09b1ef22fa0d47c2cd2673908c5619aa41aJens Axboe stage->active = (flags != 0); 783079ad09b1ef22fa0d47c2cd2673908c5619aa41aJens Axboe} 784ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 785ec94ec567cae47f91fa31a18250c2a7a0029d2adJens Axboe 786079ad09b1ef22fa0d47c2cd2673908c5619aa41aJens Axboestatic void free_texrect_data( struct tnl_pipeline_stage *stage ) 787ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe{ 788b46928282e0a890f49250e79b81af773a2b7108fJens Axboe struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 789b46928282e0a890f49250e79b81af773a2b7108fJens Axboe GLuint i; 79001452055af61d6f5de543575dba3ebb0c9e55fabJens Axboe 7913d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe if (store) { 792751548451d969148529b642c05e7544726ec3b64Jens Axboe for (i = 0 ; i < MAX_TEXTURE_UNITS ; i++) 793c6ae0a5b8123ea9af2ce70319081fbd5d65c8093Jens Axboe if (store->texcoord[i].data) 794b990b5c06801d6d25e3fcc5415efbbe7bb23341eJens Axboe _mesa_vector4f_free( &store->texcoord[i] ); 7952866c82d598e30604d8a92723c664ee6ced90fb0Jens Axboe FREE( store ); 796b990b5c06801d6d25e3fcc5415efbbe7bb23341eJens Axboe stage->privatePtr = 0; 797f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe } 798f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe} 799f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 800f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 801f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboeconst struct tnl_pipeline_stage _radeon_texrect_stage = 802f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe{ 803f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe "radeon texrect stage", /* name */ 804f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe _NEW_TEXTURE, /* check_state */ 805d56cbab065c01e1a177bc1b8d85a8f5d78df1548Jens Axboe _NEW_TEXTURE, /* run_state */ 806f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe GL_TRUE, /* active? */ 807f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 0, /* inputs */ 808f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 0, /* outputs */ 809f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe 0, /* changed_inputs */ 810f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe NULL, /* private data */ 811f8977ee606bc51138a77f6a1b653df00faa77742Jens Axboe free_texrect_data, /* destructor */ 812b990b5c06801d6d25e3fcc5415efbbe7bb23341eJens Axboe check_texrect, /* check */ 813c6ae0a5b8123ea9af2ce70319081fbd5d65c8093Jens Axboe alloc_texrect_data, /* run -- initially set to init */ 814c6ae0a5b8123ea9af2ce70319081fbd5d65c8093Jens Axboe}; 815ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 816ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 817ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/**************************************************************************/ 818ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 819ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 820ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboestatic const GLuint reduced_hw_prim[GL_POLYGON+1] = { 821ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 822ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 823ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 824ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 825ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 826ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 827ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 828ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 829751548451d969148529b642c05e7544726ec3b64Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 830ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST 831751548451d969148529b642c05e7544726ec3b64Jens Axboe}; 832ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 833ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboestatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ); 834ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboestatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ); 835ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboestatic void radeonResetLineStipple( GLcontext *ctx ); 836ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 837ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 838ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/*********************************************************************** 839ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe * Emit primitives as inline vertices * 840906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe ***********************************************************************/ 841906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe 842906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe#undef LOCAL_VARS 843906c8d75eef9247c02d1f1f6771b6fa2338329faJens Axboe#undef ALLOC_VERTS 844ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define CTX_ARG radeonContextPtr rmesa 845ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define CTX_ARG2 rmesa 846a6ccc7be771650f903ea77ace2a1af593622c0f4Jens Axboe#define GET_VERTEX_DWORDS() rmesa->swtcl.vertex_size 84753cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe#define ALLOC_VERTS( n, size ) radeonAllocDmaLowVerts( rmesa, n, size * 4 ) 8480ab8db8943acc6b9ea778735563bfad2a79e8dddJens Axboe#undef LOCAL_VARS 849ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define LOCAL_VARS \ 850f48b467cba78af0843c7320caf841e2bee72fb1eJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 851f48b467cba78af0843c7320caf841e2bee72fb1eJens Axboe const char *radeonverts = (char *)rmesa->swtcl.verts; 852f48b467cba78af0843c7320caf841e2bee72fb1eJens Axboe#define VERT(x) (radeonVertex *)(radeonverts + (x * vertsize * sizeof(int))) 8531ac267bb7dd678fa12bb3573c29cff5238ef9ccfJens Axboe#define VERTEX radeonVertex 854ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#undef TAG 855ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define TAG(x) radeon_##x 856ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#include "tnl_dd/t_dd_triemit.h" 857ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 858ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 859a6ccc7be771650f903ea77ace2a1af593622c0f4Jens Axboe/*********************************************************************** 860ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe * Macros for t_dd_tritmp.h to draw basic primitives * 861ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe ***********************************************************************/ 862ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 863ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define QUAD( a, b, c, d ) radeon_quad( rmesa, a, b, c, d ) 864ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define TRI( a, b, c ) radeon_triangle( rmesa, a, b, c ) 865ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define LINE( a, b ) radeon_line( rmesa, a, b ) 866ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define POINT( a ) radeon_point( rmesa, a ) 8676dfd46b99af38cc1e5f702f53c59212129fe615eJens Axboe 8686dfd46b99af38cc1e5f702f53c59212129fe615eJens Axboe/*********************************************************************** 8696dfd46b99af38cc1e5f702f53c59212129fe615eJens Axboe * Build render functions from dd templates * 870ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe ***********************************************************************/ 871ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 872ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define RADEON_TWOSIDE_BIT 0x01 873ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define RADEON_UNFILLED_BIT 0x02 8749ebc27e1352b905fe3396ce2350a7765fe9c57b8Jens Axboe#define RADEON_MAX_TRIFUNC 0x08 8752f073b09812255edca0f5854d36720418db88912Jens Axboe 876ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 877bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboestatic struct { 878bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe points_func points; 879a4a81712f0bd76cbde8898c0b87faedbaa1d2da1Jens Axboe line_func line; 880c7c280ed2e4f836bd8e9e125d55d097539b70e21Jens Axboe triangle_func triangle; 881bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe quad_func quad; 882bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe} rast_tab[RADEON_MAX_TRIFUNC]; 883bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe 884bb8895e07c6d6417410545f45d34b1b7916cd90aJens Axboe 88553cdc6864f7471b28cc9b40a5314ab43e5b1cb5eJens Axboe#define DO_FALLBACK 0 886ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_OFFSET 0 8876dfd46b99af38cc1e5f702f53c59212129fe615eJens Axboe#define DO_UNFILLED (IND & RADEON_UNFILLED_BIT) 888ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_TWOSIDE (IND & RADEON_TWOSIDE_BIT) 889ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_FLAT 0 890ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_TRI 1 891ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_QUAD 1 892ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_LINE 1 893ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_POINTS 1 894ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DO_FULL_QUAD 1 895ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 896ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define HAVE_RGBA 1 897ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define HAVE_SPEC 1 898ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define HAVE_INDEX 0 899ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define HAVE_BACK_COLORS 0 900ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define HAVE_HW_FLATSHADE 1 901ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define TAB rast_tab 902ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 903ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define DEPTH_SCALE 1.0 904ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define UNFILLED_TRI unfilled_tri 905ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define UNFILLED_QUAD unfilled_quad 906ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define VERT_X(_v) _v->v.x 907ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define VERT_Y(_v) _v->v.y 908ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define VERT_Z(_v) _v->v.z 909ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define AREA_IS_CCW( a ) (a < 0) 910ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define GET_VERTEX(e) (rmesa->swtcl.verts + (e * rmesa->swtcl.vertex_size * sizeof(int))) 911ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 9125cc2da300b3fc30e00b79b4ddb3f372df3b2fe93Ingo Molnar#define VERT_SET_RGBA( v, c ) \ 9135cc2da300b3fc30e00b79b4ddb3f372df3b2fe93Ingo Molnardo { \ 914ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeon_color_t *color = (radeon_color_t *)&((v)->ui[coloroffset]); \ 915ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe UNCLAMPED_FLOAT_TO_UBYTE(color->red, (c)[0]); \ 916ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe UNCLAMPED_FLOAT_TO_UBYTE(color->green, (c)[1]); \ 917ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe UNCLAMPED_FLOAT_TO_UBYTE(color->blue, (c)[2]); \ 918ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe UNCLAMPED_FLOAT_TO_UBYTE(color->alpha, (c)[3]); \ 919ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe} while (0) 920ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 921b46928282e0a890f49250e79b81af773a2b7108fJens Axboe#define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset] 922ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 923cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe#define VERT_SET_SPEC( v0, c ) \ 924cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboedo { \ 925ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (havespec) { \ 926ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.red, (c)[0]); \ 927ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.green, (c)[1]); \ 928ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.blue, (c)[2]); \ 929ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } \ 930ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe} while (0) 931ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define VERT_COPY_SPEC( v0, v1 ) \ 932ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboedo { \ 933ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (havespec) { \ 934ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe v0->v.specular.red = v1->v.specular.red; \ 935ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe v0->v.specular.green = v1->v.specular.green; \ 936ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe v0->v.specular.blue = v1->v.specular.blue; \ 937ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } \ 938ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe} while (0) 939ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 940ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/* These don't need LE32_TO_CPU() as they used to save and restore 9413d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe * colors which are already in the correct format. 9421e97cce9f5a87a67293a05ec4533ed6968698b2eJens Axboe */ 9433d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe#define VERT_SAVE_RGBA( idx ) color[idx] = v[idx]->ui[coloroffset] 9443d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe#define VERT_RESTORE_RGBA( idx ) v[idx]->ui[coloroffset] = color[idx] 9453d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe#define VERT_SAVE_SPEC( idx ) if (havespec) spec[idx] = v[idx]->ui[5] 9463d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe#define VERT_RESTORE_SPEC( idx ) if (havespec) v[idx]->ui[5] = spec[idx] 9471e97cce9f5a87a67293a05ec4533ed6968698b2eJens Axboe 9483d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe#undef LOCAL_VARS 9493d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe#undef TAG 9503d60d1ed78b663659967e04cc92e1359bd50fb3aJens Axboe#undef INIT 951ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 952ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define LOCAL_VARS(n) \ 9533b70d7e51e0b672a8b337c57c8faf865c0b7f415Jens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 954ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLuint color[n], spec[n]; \ 955ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLuint coloroffset = (rmesa->swtcl.vertex_size == 4 ? 3 : 4); \ 956ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLboolean havespec = (rmesa->swtcl.vertex_size > 4); \ 957b46928282e0a890f49250e79b81af773a2b7108fJens Axboe (void) color; (void) spec; (void) coloroffset; (void) havespec; 958ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 959cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe/*********************************************************************** 960cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe * Helpers for rendering unfilled primitives * 961ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe ***********************************************************************/ 962ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 963ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define RASTERIZE(x) radeonRasterPrimitive( ctx, reduced_hw_prim[x] ) 964ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define RENDER_PRIMITIVE rmesa->swtcl.render_primitive 965ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#undef TAG 966ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define TAG(x) x 967ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#include "tnl_dd/t_dd_unfilled.h" 968ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#undef IND 969ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 970ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 971ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/*********************************************************************** 9723b70d7e51e0b672a8b337c57c8faf865c0b7f415Jens Axboe * Generate GL render functions * 973ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe ***********************************************************************/ 974ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 975ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 976313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define IND (0) 977313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define TAG(x) x 978313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#include "tnl_dd/t_dd_tritmp.h" 979313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe 980313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define IND (RADEON_TWOSIDE_BIT) 981313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define TAG(x) x##_twoside 982313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#include "tnl_dd/t_dd_tritmp.h" 983313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe 984313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define IND (RADEON_UNFILLED_BIT) 985313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define TAG(x) x##_unfilled 986313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#include "tnl_dd/t_dd_tritmp.h" 987313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe 988313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT) 989313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define TAG(x) x##_twoside_unfilled 990313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#include "tnl_dd/t_dd_tritmp.h" 991313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe 992b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 993ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboestatic void init_rast_tab( void ) 994cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe{ 995cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe init(); 996ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe init_twoside(); 997ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe init_unfilled(); 998ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe init_twoside_unfilled(); 999d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe} 1000d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe 1001d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe/**********************************************************************/ 1002d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe/* Render unclipped begin/end objects */ 1003d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe/**********************************************************************/ 1004313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe 1005313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define VERT(x) (radeonVertex *)(radeonverts + (x * vertsize * sizeof(int))) 1006d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe#define RENDER_POINTS( start, count ) \ 1007d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe for ( ; start < count ; start++) \ 1008d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe radeon_point( rmesa, VERT(start) ) 1009d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe#define RENDER_LINE( v0, v1 ) \ 1010d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe radeon_line( rmesa, VERT(v0), VERT(v1) ) 1011d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe#define RENDER_TRI( v0, v1, v2 ) \ 1012d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe radeon_triangle( rmesa, VERT(v0), VERT(v1), VERT(v2) ) 1013d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe#define RENDER_QUAD( v0, v1, v2, v3 ) \ 1014d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe radeon_quad( rmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) ) 1015d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe#undef INIT 1016ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define INIT(x) do { \ 1017313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe radeonRenderPrimitive( ctx, x ); \ 1018313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe} while (0) 1019313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#undef LOCAL_VARS 1020313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe#define LOCAL_VARS \ 1021313cb206ffc6e50c089314d322ebf1c523f37531Jens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 1022ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe const GLuint vertsize = rmesa->swtcl.vertex_size; \ 1023ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe const char *radeonverts = (char *)rmesa->swtcl.verts; \ 102474b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \ 102574b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe const GLboolean stipple = ctx->Line.StippleFlag; \ 102674b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe (void) elt; (void) stipple; 102774b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe#define RESET_STIPPLE if ( stipple ) radeonResetLineStipple( ctx ); 102874b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe#define RESET_OCCLUSION 102974b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe#define PRESERVE_VB_DEFS 103074b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe#define ELT(x) (x) 103174b025b071b5bfbffa7ad7682b66b749e8d1f955Jens Axboe#define TAG(x) radeon_##x##_verts 10320268b8ba7b2c79c669323cb1fcc0b045b84313f1Jens Axboe#include "tnl/t_vb_rendertmp.h" 10330268b8ba7b2c79c669323cb1fcc0b045b84313f1Jens Axboe#undef ELT 10340268b8ba7b2c79c669323cb1fcc0b045b84313f1Jens Axboe#undef TAG 1035ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define TAG(x) radeon_##x##_elts 1036ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe#define ELT(x) elt[x] 1037d0bdaf49eb3f4faa941d02274f2bd875a187e7d7Jens Axboe#include "tnl/t_vb_rendertmp.h" 1038ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1039ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1040ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1041b46928282e0a890f49250e79b81af773a2b7108fJens Axboe/**********************************************************************/ 1042ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/* Choose render functions */ 1043cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe/**********************************************************************/ 1044cb2c86fdf03241fee32fd2e2caff43af1022403cJens Axboe 10452866c82d598e30604d8a92723c664ee6ced90fb0Jens Axboevoid radeonChooseRenderState( GLcontext *ctx ) 10462866c82d598e30604d8a92723c664ee6ced90fb0Jens Axboe{ 1047b990b5c06801d6d25e3fcc5415efbbe7bb23341eJens Axboe TNLcontext *tnl = TNL_CONTEXT(ctx); 1048ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 104908aae9a0d5f3d24152abd7515984439bbfd3c05dJens Axboe GLuint index = 0; 10505f350952eff89948bfbf1eb6ac4d3d08a9109581Jens Axboe GLuint flags = ctx->_TriangleCaps; 1051ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1052ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (!rmesa->TclFallback || rmesa->Fallback) 1053ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe return; 1054e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1055e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (flags & DD_TRI_LIGHT_TWOSIDE) index |= RADEON_TWOSIDE_BIT; 1056e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (flags & DD_TRI_UNFILLED) index |= RADEON_UNFILLED_BIT; 1057e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1058e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (index != rmesa->swtcl.RenderIndex) { 1059e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.Points = rast_tab[index].points; 106034cfcdafa994a0a75120e498c51eda08bde5df72Jens Axboe tnl->Driver.Render.Line = rast_tab[index].line; 1061e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.ClippedLine = rast_tab[index].line; 1062e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.Triangle = rast_tab[index].triangle; 1063e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.Quad = rast_tab[index].quad; 1064e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1065e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (index == 0) { 1066e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.PrimTabVerts = radeon_render_tab_verts; 1067e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.PrimTabElts = radeon_render_tab_elts; 1068e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.ClippedPolygon = radeon_fast_clipped_poly; 1069e1f365035a952233463d85d659bd960ba78f012eJens Axboe } else { 1070e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts; 1071e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts; 1072e1f365035a952233463d85d659bd960ba78f012eJens Axboe tnl->Driver.Render.ClippedPolygon = _tnl_RenderClippedPolygon; 1073e1f365035a952233463d85d659bd960ba78f012eJens Axboe } 1074e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1075e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.RenderIndex = index; 107634cfcdafa994a0a75120e498c51eda08bde5df72Jens Axboe } 1077e1f365035a952233463d85d659bd960ba78f012eJens Axboe} 1078e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1079e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1080e1f365035a952233463d85d659bd960ba78f012eJens Axboe/**********************************************************************/ 1081e1f365035a952233463d85d659bd960ba78f012eJens Axboe/* High level hooks for t_vb_render.c */ 1082e1f365035a952233463d85d659bd960ba78f012eJens Axboe/**********************************************************************/ 1083e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1084e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1085e1f365035a952233463d85d659bd960ba78f012eJens Axboestatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ) 1086e1f365035a952233463d85d659bd960ba78f012eJens Axboe{ 1087e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 1088e1f365035a952233463d85d659bd960ba78f012eJens Axboe 1089e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (rmesa->swtcl.hw_primitive != hwprim) { 1090e1f365035a952233463d85d659bd960ba78f012eJens Axboe RADEON_NEWPRIM( rmesa ); 1091e1f365035a952233463d85d659bd960ba78f012eJens Axboe rmesa->swtcl.hw_primitive = hwprim; 1092072619835aa805f3335dca9d72f4d4eb1009aecdJens Axboe } 1093072619835aa805f3335dca9d72f4d4eb1009aecdJens Axboe} 1094072619835aa805f3335dca9d72f4d4eb1009aecdJens Axboe 10951e97cce9f5a87a67293a05ec4533ed6968698b2eJens Axboestatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ) 1096ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe{ 1097e1f365035a952233463d85d659bd960ba78f012eJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 1098ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe rmesa->swtcl.render_primitive = prim; 1099fee3bb48f748afe5cf10f8505e1efd36b87c627eJens Axboe if (prim < GL_TRIANGLES || !(ctx->_TriangleCaps & DD_TRI_UNFILLED)) 1100ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonRasterPrimitive( ctx, reduced_hw_prim[prim] ); 1101ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe} 1102ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 11030c7e37a04aa04ba22e812f8de7971fcef46b8191Jens Axboestatic void radeonRenderFinish( GLcontext *ctx ) 1104ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe{ 1105ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe} 1106ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1107aea47d444b02bd7c622f82bb73151fd7136a499fJens Axboestatic void radeonResetLineStipple( GLcontext *ctx ) 1108ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe{ 1109ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 1110ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe RADEON_STATECHANGE( rmesa, lin ); 1111ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe} 1112ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1113fee3bb48f748afe5cf10f8505e1efd36b87c627eJens Axboe 1114ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/**********************************************************************/ 11150c7e37a04aa04ba22e812f8de7971fcef46b8191Jens Axboe/* Transition to/from hardware rasterization. */ 11167c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe/**********************************************************************/ 11177c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe 11187c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboestatic const char * const fallbackStrings[] = { 111945410acb636e526575d62a037f81ade7916b738cJens Axboe "Texture mode", 1120ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe "glDrawBuffer(GL_FRONT_AND_BACK)", 1121ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe "glEnable(GL_STENCIL) without hw stencil buffer", 1122fee3bb48f748afe5cf10f8505e1efd36b87c627eJens Axboe "glRenderMode(selection or feedback)", 1123ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe "glBlendEquation", 1124ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe "glBlendFunc", 1125ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe "RADEON_NO_RAST", 1126ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe "Mixing GL_CLAMP_TO_BORDER and GL_CLAMP (or GL_MIRROR_CLAMP_ATI)" 1127ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe}; 1128ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1129ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 113045410acb636e526575d62a037f81ade7916b738cJens Axboestatic const char *getFallbackString(GLuint bit) 113145410acb636e526575d62a037f81ade7916b738cJens Axboe{ 113245410acb636e526575d62a037f81ade7916b738cJens Axboe int i = 0; 113345410acb636e526575d62a037f81ade7916b738cJens Axboe while (bit > 1) { 1134ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe i++; 1135972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe bit >>= 1; 1136972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe } 1137972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe return fallbackStrings[i]; 1138f94819192600fe35d03ebed26a803abdc2b9864cJens Axboe} 1139972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe 1140972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe 1141972cfd2546081c0397447ca9243ea419b1ff579aJens Axboevoid radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode ) 1142972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe{ 1143ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 1144ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe TNLcontext *tnl = TNL_CONTEXT(ctx); 1145ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLuint oldfallback = rmesa->Fallback; 1146ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1147e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (mode) { 1148b6754f9d3f719627d8aae4c3e8f39212d9405f99Jens Axboe rmesa->Fallback |= bit; 11497c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe if (oldfallback == 0) { 11507c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe RADEON_FIREVERTICES( rmesa ); 11517c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_TRUE ); 11527c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe _swsetup_Wakeup( ctx ); 11534ae3f76333bf2382e516db0b5c202b8982b1170fJens Axboe _tnl_need_projected_coords( ctx, GL_TRUE ); 1154aea47d444b02bd7c622f82bb73151fd7136a499fJens Axboe rmesa->swtcl.RenderIndex = ~0; 1155e1f365035a952233463d85d659bd960ba78f012eJens Axboe if (RADEON_DEBUG & DEBUG_FALLBACKS) { 1156ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe fprintf(stderr, "Radeon begin rasterization fallback: 0x%x %s\n", 115745410acb636e526575d62a037f81ade7916b738cJens Axboe bit, getFallbackString(bit)); 115845410acb636e526575d62a037f81ade7916b738cJens Axboe } 115945410acb636e526575d62a037f81ade7916b738cJens Axboe } 116045410acb636e526575d62a037f81ade7916b738cJens Axboe } 116145410acb636e526575d62a037f81ade7916b738cJens Axboe else { 11627c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe rmesa->Fallback &= ~bit; 1163ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (oldfallback == bit) { 1164ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe _swrast_flush( ctx ); 116545410acb636e526575d62a037f81ade7916b738cJens Axboe tnl->Driver.Render.Start = radeonRenderStart; 116645410acb636e526575d62a037f81ade7916b738cJens Axboe tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 116745410acb636e526575d62a037f81ade7916b738cJens Axboe tnl->Driver.Render.Finish = radeonRenderFinish; 1168b1508cf9ead36dc789a4e289f7522a070e57058cJens Axboe tnl->Driver.Render.BuildVertices = radeonBuildVertices; 1169b1508cf9ead36dc789a4e289f7522a070e57058cJens Axboe tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 1170b1508cf9ead36dc789a4e289f7522a070e57058cJens Axboe TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_FALSE ); 117145410acb636e526575d62a037f81ade7916b738cJens Axboe if (rmesa->TclFallback) { 11727c124ac153eebf48bc85f9033ae06fd7152e4216Jens Axboe /* These are already done if rmesa->TclFallback goes to 1173ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe * zero above. But not if it doesn't (RADEON_NO_TCL for 1174ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe * example?) 1175ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe */ 1176ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonChooseVertexState( ctx ); 117745410acb636e526575d62a037f81ade7916b738cJens Axboe radeonChooseRenderState( ctx ); 1178ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } 1179ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe if (RADEON_DEBUG & DEBUG_FALLBACKS) { 1180ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe fprintf(stderr, "Radeon end rasterization fallback: 0x%x %s\n", 1181ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe bit, getFallbackString(bit)); 1182ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } 1183ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } 1184ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe } 1185ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe} 1186ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1187ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1188ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboevoid radeonFlushVertices( GLcontext *ctx, GLuint flags ) 1189ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe{ 1190ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe _tnl_FlushVertices( ctx, flags ); 1191ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1192ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe if (flags & FLUSH_STORED_VERTICES) 1193ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe RADEON_NEWPRIM( RADEON_CONTEXT( ctx ) ); 1194972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe} 1195ec94ec567cae47f91fa31a18250c2a7a0029d2adJens Axboe 1196ec94ec567cae47f91fa31a18250c2a7a0029d2adJens Axboe/**********************************************************************/ 1197ee738499877bb1ee913e839cb4a8d4edad2d52adJens Axboe/* Initialization. */ 1198ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe/**********************************************************************/ 1199ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1200ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboevoid radeonInitSwtcl( GLcontext *ctx ) 1201ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe{ 1202ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe TNLcontext *tnl = TNL_CONTEXT(ctx); 1203ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 1204ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe GLuint size = TNL_CONTEXT(ctx)->vb.Size; 12050ab8db8943acc6b9ea778735563bfad2a79e8dddJens Axboe static int firsttime = 1; 12064785f99523f5c69635eb4bd826f25cd2e264cda7Jens Axboe 12074785f99523f5c69635eb4bd826f25cd2e264cda7Jens Axboe if (firsttime) { 1208b46928282e0a890f49250e79b81af773a2b7108fJens Axboe init_rast_tab(); 1209b46928282e0a890f49250e79b81af773a2b7108fJens Axboe init_setup_tab(); 1210b46928282e0a890f49250e79b81af773a2b7108fJens Axboe firsttime = 0; 1211b46928282e0a890f49250e79b81af773a2b7108fJens Axboe } 1212b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 1213b46928282e0a890f49250e79b81af773a2b7108fJens Axboe tnl->Driver.Render.Start = radeonRenderStart; 1214fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe tnl->Driver.Render.Finish = radeonRenderFinish; 1215fd28ca4948aa67b76585c6c23d7f70a2cdc7a0d5Jens Axboe tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 12164785f99523f5c69635eb4bd826f25cd2e264cda7Jens Axboe tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 12174785f99523f5c69635eb4bd826f25cd2e264cda7Jens Axboe tnl->Driver.Render.BuildVertices = radeonBuildVertices; 1218972cfd2546081c0397447ca9243ea419b1ff579aJens Axboe 1219ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe rmesa->swtcl.verts = (GLubyte *)ALIGN_MALLOC( size * 16 * 4, 32 ); 1220b46928282e0a890f49250e79b81af773a2b7108fJens Axboe rmesa->swtcl.RenderIndex = ~0; 1221c2b1e753ca7abaca7f177cb1ca5087ca3971542bJens Axboe rmesa->swtcl.render_primitive = GL_TRIANGLES; 1222ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe rmesa->swtcl.hw_primitive = 0; 1223b46928282e0a890f49250e79b81af773a2b7108fJens Axboe} 1224ebac4655dd3624f3296ff83be48e0cdc02852f1Jens Axboe 1225b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 1226b46928282e0a890f49250e79b81af773a2b7108fJens Axboevoid radeonDestroySwtcl( GLcontext *ctx ) 1227b46928282e0a890f49250e79b81af773a2b7108fJens Axboe{ 1228b46928282e0a890f49250e79b81af773a2b7108fJens Axboe radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 1229b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 1230b46928282e0a890f49250e79b81af773a2b7108fJens Axboe if (rmesa->swtcl.indexed_verts.buf) 1231b46928282e0a890f49250e79b81af773a2b7108fJens Axboe radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, 1232b46928282e0a890f49250e79b81af773a2b7108fJens Axboe __FUNCTION__ ); 1233b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 1234b46928282e0a890f49250e79b81af773a2b7108fJens Axboe if (rmesa->swtcl.verts) { 1235b46928282e0a890f49250e79b81af773a2b7108fJens Axboe ALIGN_FREE(rmesa->swtcl.verts); 1236b46928282e0a890f49250e79b81af773a2b7108fJens Axboe rmesa->swtcl.verts = 0; 1237b46928282e0a890f49250e79b81af773a2b7108fJens Axboe } 1238b46928282e0a890f49250e79b81af773a2b7108fJens Axboe 1239b46928282e0a890f49250e79b81af773a2b7108fJens Axboe} 1240b46928282e0a890f49250e79b81af773a2b7108fJens Axboe