radeon_swtcl.c revision 3f9839a52b6152d349b5c6279cd7a3d3106b3999
1bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_swtcl.c,v 1.6 2003/05/06 23:52:08 daenzer Exp $ */ 25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/************************************************************************** 35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 55df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VA Linux Systems Inc., Fremont, California. 65df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 75df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved. 85df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 95df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining 105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the 115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including 125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish, 135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to 145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to 155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions: 165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the 185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial 195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software. 205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/ 305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Authors: 335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Keith Whitwell <keith@tungstengraphics.com> 345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "glheader.h" 375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "mtypes.h" 385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "colormac.h" 395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "enums.h" 405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "imports.h" 415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "macros.h" 425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "swrast_setup/swrast_setup.h" 445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "math/m_translate.h" 455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/tnl.h" 465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_context.h" 475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_pipeline.h" 4857c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell#include "tnl/t_vtx_api.h" /* for _tnl_FlushVertices */ 495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_context.h" 515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_ioctl.h" 525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_state.h" 535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_swtcl.h" 545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_tcl.h" 555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim( radeonContextPtr rmesa ); 585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 598a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt/* R100: xyzw, c0, c1/fog, stq[0..2] = 4+1+1+3*3 = 15 right? */ 608a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt/* R200: xyzw, c0, c1/fog, strq[0..5] = 4+1+1+4*6 = 30 */ 618a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define RADEON_MAX_TNL_VERTEX_SIZE (15 * sizeof(GLfloat)) /* for mesa _tnl stage */ 625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 648a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * Initialization 655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 678a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define EMIT_ATTR( ATTR, STYLE, F0 ) \ 688a1df968627de01d04f3d692fd81108ba6492c18Eric Anholtdo { \ 698a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].attrib = (ATTR); \ 708a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].format = (STYLE); \ 718a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attr_count++; \ 728a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt fmt_0 |= F0; \ 738a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt} while (0) 745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 758a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define EMIT_PAD( N ) \ 768a1df968627de01d04f3d692fd81108ba6492c18Eric Anholtdo { \ 778a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].attrib = 0; \ 788a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].format = EMIT_PAD; \ 798a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].offset = (N); \ 808a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attr_count++; \ 818a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt} while (0) 825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 838a1df968627de01d04f3d692fd81108ba6492c18Eric Anholtstatic GLuint radeon_cp_vc_frmts[3][2] = 848a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt{ 858a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt { RADEON_CP_VC_FRMT_ST0, RADEON_CP_VC_FRMT_ST0 | RADEON_CP_VC_FRMT_Q0 }, 868a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt { RADEON_CP_VC_FRMT_ST1, RADEON_CP_VC_FRMT_ST1 | RADEON_CP_VC_FRMT_Q1 }, 878a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt { RADEON_CP_VC_FRMT_ST2, RADEON_CP_VC_FRMT_ST2 | RADEON_CP_VC_FRMT_Q2 }, 888a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt}; 895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 908a1df968627de01d04f3d692fd81108ba6492c18Eric Anholtstatic void radeonSetVertexFormat( GLcontext *ctx ) 918a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt{ 928a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 938a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt TNLcontext *tnl = TNL_CONTEXT(ctx); 948a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt struct vertex_buffer *VB = &tnl->vb; 958a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt GLuint index = tnl->render_inputs; 968a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt int fmt_0 = 0; 978a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt int offset = 0; 985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1008a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt /* Important: 1018a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt */ 1028a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if ( VB->NdcPtr != NULL ) { 1038a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr; 1048a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1058a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt else { 1068a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt VB->AttribPtr[VERT_ATTRIB_POS] = VB->ClipPtr; 1078a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1098a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt assert( VB->AttribPtr[VERT_ATTRIB_POS] != NULL ); 1108a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attr_count = 0; 1118a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 1128a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt /* EMIT_ATTR's must be in order as they tell t_vertex.c how to 1138a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * build up a hardware vertex. 1148a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt */ 1158a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if ( !rmesa->swtcl.needproj || 1168a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt (index & _TNL_BITS_TEX_ANY)) { /* for projtex */ 1178a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F, 1188a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_Z | RADEON_CP_VC_FRMT_W0 ); 1198a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt offset = 4; 1208a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1218a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt else { 1228a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F, 1238a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_Z ); 1248a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt offset = 3; 1258a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1278a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.coloroffset = offset; 1288a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#if MESA_LITTLE_ENDIAN 1298a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_RGBA, 1308a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_PKCOLOR ); 1318a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#else 1328a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_ABGR, 1338a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_PKCOLOR ); 1348a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#endif 1358a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt offset += 1; 1365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1378a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.specoffset = 0; 1388a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { 1395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1408a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#if MESA_LITTLE_ENDIAN 1418a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (index & _TNL_BIT_COLOR1) { 1428a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.specoffset = offset; 1438a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_RGB, 1448a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_PKSPEC ); 1458a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1468a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt else { 1478a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_PAD( 3 ); 1488a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1508a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (index & _TNL_BIT_FOG) { 1518a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, 1528a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_PKSPEC ); 1538a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1548a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt else { 1558a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_PAD( 1 ); 1568a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1578a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#else 1588a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (index & _TNL_BIT_FOG) { 1598a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, 1608a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_PKSPEC ); 1618a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1628a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt else { 1638a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_PAD( 1 ); 1648a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1668a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (index & _TNL_BIT_COLOR1) { 1678a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.specoffset = offset; 1688a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, 1698a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_CP_VC_FRMT_PKSPEC ); 1708a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1718a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt else { 1728a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_PAD( 3 ); 1738a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1748a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#endif 1758a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1778a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (index & _TNL_BITS_TEX_ANY) { 1788a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt int i; 1798a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 1808a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { 1818a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (index & _TNL_BIT_TEX(i)) { 1828a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt GLuint sz = VB->TexCoordPtr[i]->size; 1838a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 1848a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt switch (sz) { 1858a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt case 1: 1868a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt case 2: 1878a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt case 3: 1888a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_2F, 1898a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt radeon_cp_vc_frmts[i][0] ); 1908a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt break; 1918a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt case 4: 1928a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F_XYW, 1938a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt radeon_cp_vc_frmts[i][1] ); 1948a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt break; 1958a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt default: 1968a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt continue; 1978a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt }; 1988a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 1998a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 2008a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 2015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2028a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if ( rmesa->tnl_index != index || 2038a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt fmt_0 != rmesa->swtcl.vertex_format) { 2048a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_NEWPRIM(rmesa); 2058a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_format = fmt_0; 2068a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_size = 2078a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt _tnl_install_attrs( ctx, 2088a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attrs, 2098a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_attr_count, 2108a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt NULL, 0 ); 2118a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.vertex_size /= 4; 2128a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->tnl_index = index; 2138a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (RADEON_DEBUG & DEBUG_VERTS) 2148a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt fprintf( stderr, "%s: vertex_size= %d floats\n", 2158a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt __FUNCTION__, rmesa->swtcl.vertex_size); 2168a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt } 2175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderStart( GLcontext *ctx ) 2215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 2235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2248a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt radeonSetVertexFormat( ctx ); 2255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.flush != 0 && 2275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush != flush_last_swtcl_prim) 2285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush( rmesa ); 2295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2328a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt/** 2338a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * Set vertex state for SW TCL. The primary purpose of this function is to 2348a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * determine in advance whether or not the hardware can / should do the 2358a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * projection divide or Mesa should do it. 2368a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt */ 2375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonChooseVertexState( GLcontext *ctx ) 2385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 2405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 2415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2428a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt GLuint se_coord_fmt; 2435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2443f9839a52b6152d349b5c6279cd7a3d3106b3999Eric Anholt /* We must ensure that we don't do _tnl_need_projected_coords while in a 2453f9839a52b6152d349b5c6279cd7a3d3106b3999Eric Anholt * rasterization fallback. As this function will be called again when we 2463f9839a52b6152d349b5c6279cd7a3d3106b3999Eric Anholt * leave a rasterization fallback, we can just skip it for now. 2473f9839a52b6152d349b5c6279cd7a3d3106b3999Eric Anholt */ 2483f9839a52b6152d349b5c6279cd7a3d3106b3999Eric Anholt if (rmesa->Fallback != 0) 2493f9839a52b6152d349b5c6279cd7a3d3106b3999Eric Anholt return; 2503f9839a52b6152d349b5c6279cd7a3d3106b3999Eric Anholt 2518a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt /* HW perspective divide is a win, but tiny vertex formats are a 2528a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * bigger one. 2538a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt */ 2545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2558a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if ( ((tnl->render_inputs & (_TNL_BITS_TEX_ANY|_TNL_BIT_COLOR1) ) == 0) 2568a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt || (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { 2578a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.needproj = GL_TRUE; 2588a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | 2598a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_VTX_Z_PRE_MULT_1_OVER_W0 | 2608a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_TEX1_W_ROUTING_USE_Q1); 2615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 2638a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.needproj = GL_FALSE; 2648a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt se_coord_fmt = (RADEON_VTX_W0_IS_NOT_1_OVER_W0 | 2658a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_TEX1_W_ROUTING_USE_Q1); 2665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2688a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt _tnl_need_projected_coords( ctx, rmesa->swtcl.needproj ); 2695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2708a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if ( se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT] ) { 2718a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_STATECHANGE( rmesa, set ); 2728a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt; 2735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Flush vertices in the current dma region. 2785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim( radeonContextPtr rmesa ) 2805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_IOCTL) 2825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "%s\n", __FUNCTION__); 2835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2842c28dd892cfb43445d7e54df8b6a8331192f4e99Brian Paul rmesa->dma.flush = NULL; 2855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.current.buf) { 2875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct radeon_dma_region *current = &rmesa->dma.current; 288bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl GLuint current_offset = (rmesa->radeonScreen->gart_buffer_offset + 2895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->buf->buf->idx * RADEON_BUFFER_SIZE + 2905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start); 2915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (!(rmesa->swtcl.hw_primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND)); 2935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (current->start + 2955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 2965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->ptr); 2975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.current.start != rmesa->dma.current.ptr) { 2996f3cc6a5226fd4b5d44cca91e2f76216ecaff831Eric Anholt radeonEnsureCmdBufSpace( rmesa, VERT_AOS_BUFSZ + 3006f3cc6a5226fd4b5d44cca91e2f76216ecaff831Eric Anholt rmesa->hw.max_state_size + VBUF_BUFSZ ); 3012962f88189c46e0bfe3fc33a1d46be9409cb9c10Eric Anholt 3025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonEmitVertexAOS( rmesa, 3035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size, 3045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current_offset); 3055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonEmitVbufPrim( rmesa, 3075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format, 3085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive, 3095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts); 3105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts = 0; 3135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start = current->ptr; 3145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 3165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Alloc space in the current dma region. 3195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 3205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void *radeonAllocDmaLowVerts( radeonContextPtr rmesa, 3215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int nverts, int vsize ) 3225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 3235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint bytes = vsize * nverts; 3245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( rmesa->dma.current.ptr + bytes > rmesa->dma.current.end ) 3265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRefillCurrentDmaRegion( rmesa ); 3275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->dma.flush) { 3295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; 330bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl rmesa->dma.flush = flush_last_swtcl_prim; 3315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert( vsize == rmesa->swtcl.vertex_size * 4 ); 334bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl assert( rmesa->dma.flush == flush_last_swtcl_prim ); 3355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (rmesa->dma.current.start + 3365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 3375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.current.ptr); 3385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 341bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl GLubyte *head = (GLubyte *)(rmesa->dma.current.address + rmesa->dma.current.ptr); 3425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.current.ptr += bytes; 3435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts += nverts; 3445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return head; 3455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 3485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 3515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Render unclipped vertex buffers by emitting vertices directly to 3525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * dma buffers. Use strip/fan hardware primitives where possible. 3535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Try to simulate missing primitives with indexed vertices. 3545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 3555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_POINTS 1 3565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_LINES 1 3575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_LINE_STRIPS 1 3585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRIANGLES 1 3595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_STRIPS 1 3605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_STRIP_1 0 3615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_FANS 1 3625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_QUADS 0 3635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_QUAD_STRIPS 0 3645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_POLYGONS 0 3658a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt/* \todo: is it possible to make "ELTS" work with t_vertex code ? */ 3668a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define HAVE_ELTS 0 3675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const GLuint hw_prim[GL_POLYGON+1] = { 3695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 3705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 3715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 3725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP, 3735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 3745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP, 3755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN, 3765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 3775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 3785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0 3795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 3805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void radeonDmaPrimitive( radeonContextPtr rmesa, GLenum prim ) 3825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 3835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 3845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hw_prim[prim]; 3855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert(rmesa->dma.current.ptr == rmesa->dma.current.start); 3865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 3875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3888a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx); (void)rmesa 3895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INIT( prim ) radeonDmaPrimitive( rmesa, prim ) 3902dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define FLUSH() RADEON_NEWPRIM( rmesa ) 3915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_CURRENT_VB_MAX_VERTS() \ 3925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (((int)rmesa->dma.current.end - (int)rmesa->dma.current.ptr) / (rmesa->swtcl.vertex_size*4)) 3935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_SUBSEQUENT_VB_MAX_VERTS() \ 3945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_BUFFER_SIZE) / (rmesa->swtcl.vertex_size*4)) 3952dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define ALLOC_VERTS( nr ) \ 3962dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell radeonAllocDmaLowVerts( rmesa, nr, rmesa->swtcl.vertex_size * 4 ) 3972dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define EMIT_VERTS( ctx, j, nr, buf ) \ 3988a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf) 3992dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell 4005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_dma_##x 4015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_dmatmp.h" 4025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 4055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Render pipeline stage */ 4065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 4075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean radeon_run_render( GLcontext *ctx, 41057c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell struct tnl_pipeline_stage *stage ) 4115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 4135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 4145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &tnl->vb; 4153d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_render_func *tab = TAG(render_tab_verts); 4168592ba94b85b3f0f93ae875eece259b4626a6759Keith Whitwell GLuint i; 4175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 418bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell if (rmesa->swtcl.indexed_verts.buf) 4195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RELEASE_ELT_VERTS(); 4205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4212dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell if (rmesa->swtcl.RenderIndex != 0 || 4222dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell !radeon_dma_validate_render( ctx, VB )) 4235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 4245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start( ctx ); 4265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 42757c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell for (i = 0 ; i < VB->PrimitiveCount ; i++) 4285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 42957c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell GLuint prim = VB->Primitive[i].mode; 43057c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell GLuint start = VB->Primitive[i].start; 43157c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell GLuint length = VB->Primitive[i].count; 43257c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell 43357c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell if (!length) 43457c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell continue; 4355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_PRIMS) 4372dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell fprintf(stderr, "radeon_render.c: prim %s %d..%d\n", 43857c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), 43957c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell start, start+length); 4405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (length) 4428592ba94b85b3f0f93ae875eece259b4626a6759Keith Whitwell tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim ); 4435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish( ctx ); 4465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; /* finished the pipe */ 4485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 45357c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwellconst struct tnl_pipeline_stage _radeon_render_stage = 4545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "radeon render", 456bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 457bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 458bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 459bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 4605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_run_render /* run */ 4615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 4625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**************************************************************************/ 4655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Radeon texture rectangle expects coords in 0..1 range, not 0..dimension 4675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * as in the extension spec. Need to translate here. 4685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * 4695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Note that swrast expects 0..dimension, so if a fallback is active, 4705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * don't do anything. (Maybe need to configure swrast to match hw) 4715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct texrect_stage_data { 4735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLvector4f texcoord[MAX_TEXTURE_UNITS]; 4745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 4755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEXRECT_STAGE_DATA(stage) ((struct texrect_stage_data *)stage->privatePtr) 4775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean run_texrect_stage( GLcontext *ctx, 48057c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell struct tnl_pipeline_stage *stage ) 4815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 4835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 4845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 4855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &tnl->vb; 4865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 4875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->Fallback) 4895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 4905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) { 492bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell if (ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_RECT_BIT) { 4935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_texture_object *texObj = ctx->Texture.Unit[i].CurrentRect; 49418fa367ac6e035341f5eb86ecc4231124b2921e3Keith Whitwell struct gl_texture_image *texImage = texObj->Image[0][texObj->BaseLevel]; 4955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLfloat iw = 1.0/texImage->Width; 4965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLfloat ih = 1.0/texImage->Height; 4975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data; 4985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLint instride = VB->TexCoordPtr[i]->stride; 4995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLfloat (*out)[4] = store->texcoord[i].data; 5005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLint j; 5015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (j = 0 ; j < VB->Count ; j++) { 5035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul out[j][0] = in[0] * iw; 5045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul out[j][1] = in[1] * ih; 5055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul in = (GLfloat *)((GLubyte *)in + instride); 5065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 5075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5088a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt VB->AttribPtr[VERT_ATTRIB_TEX0+i] = VB->TexCoordPtr[i] = &store->texcoord[i]; 509bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell } 5105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 5115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 5135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Called the first time stage->run() is invoked. 5175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 5185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean alloc_texrect_data( GLcontext *ctx, 51957c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell struct tnl_pipeline_stage *stage ) 5205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; 5225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store; 5235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 5245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->privatePtr = CALLOC(sizeof(*store)); 5265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul store = TEXRECT_STAGE_DATA(stage); 5275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!store) 5285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; 5295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) 5315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_vector4f_alloc( &store->texcoord[i], 0, VB->Size, 32 ); 5325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 533bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell return GL_TRUE; 5345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 53657c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwellstatic void free_texrect_data( struct tnl_pipeline_stage *stage ) 5375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 5395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 5405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (store) { 5425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < MAX_TEXTURE_UNITS ; i++) 5435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (store->texcoord[i].data) 5445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_vector4f_free( &store->texcoord[i] ); 5455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( store ); 5462c28dd892cfb43445d7e54df8b6a8331192f4e99Brian Paul stage->privatePtr = NULL; 5475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 5485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 55057c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwellconst struct tnl_pipeline_stage _radeon_texrect_stage = 5515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "radeon texrect stage", /* name */ 553bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 554bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell alloc_texrect_data, 555bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell free_texrect_data, 556bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 557bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell run_texrect_stage 5585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 5595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**************************************************************************/ 5625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const GLuint reduced_hw_prim[GL_POLYGON+1] = { 5655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 5665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 5675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 5685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 5695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 5705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 5715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 5725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 5735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 5745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST 5755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 5765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ); 5785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ); 5795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonResetLineStipple( GLcontext *ctx ); 5805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 5835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Emit primitives as inline vertices * 5845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 5855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 5872dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#undef ALLOC_VERTS 5885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_ARG radeonContextPtr rmesa 5895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_DWORDS() rmesa->swtcl.vertex_size 5908a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define ALLOC_VERTS( n, size ) radeonAllocDmaLowVerts( rmesa, n, (size) * 4 ) 5915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 5925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS \ 5935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 5945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const char *radeonverts = (char *)rmesa->swtcl.verts; 5958a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define VERT(x) (radeonVertex *)(radeonverts + ((x) * (vertsize) * sizeof(int))) 5965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERTEX radeonVertex 5975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 5985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x 5995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_triemit.h" 6005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 6035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Macros for t_dd_tritmp.h to draw basic primitives * 6045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 6055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define QUAD( a, b, c, d ) radeon_quad( rmesa, a, b, c, d ) 6075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TRI( a, b, c ) radeon_triangle( rmesa, a, b, c ) 6085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LINE( a, b ) radeon_line( rmesa, a, b ) 6095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define POINT( a ) radeon_point( rmesa, a ) 6105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 6125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Build render functions from dd templates * 6135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 6145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_TWOSIDE_BIT 0x01 6165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_UNFILLED_BIT 0x02 6175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_MAX_TRIFUNC 0x08 6185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic struct { 6213d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_points_func points; 6223d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_line_func line; 6233d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_triangle_func triangle; 6243d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_quad_func quad; 6255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} rast_tab[RADEON_MAX_TRIFUNC]; 6265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FALLBACK 0 629bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl#define DO_OFFSET 0 6305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_UNFILLED (IND & RADEON_UNFILLED_BIT) 6315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TWOSIDE (IND & RADEON_TWOSIDE_BIT) 6325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FLAT 0 6335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TRI 1 6345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_QUAD 1 6355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_LINE 1 6365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_POINTS 1 6375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FULL_QUAD 1 6385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_RGBA 1 6405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_SPEC 1 6415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_BACK_COLORS 0 6425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_HW_FLATSHADE 1 6435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAB rast_tab 6445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DEPTH_SCALE 1.0 6465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UNFILLED_TRI unfilled_tri 6475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UNFILLED_QUAD unfilled_quad 6485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_X(_v) _v->v.x 6495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_Y(_v) _v->v.y 6505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_Z(_v) _v->v.z 6515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define AREA_IS_CCW( a ) (a < 0) 6528a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define GET_VERTEX(e) (rmesa->swtcl.verts + ((e) * rmesa->swtcl.vertex_size * sizeof(int))) 6535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 654c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_SET_RGBA( v, c ) \ 655c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwelldo { \ 656c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell radeon_color_t *color = (radeon_color_t *)&((v)->ui[coloroffset]); \ 657c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->red, (c)[0]); \ 658c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->green, (c)[1]); \ 659c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->blue, (c)[2]); \ 660c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->alpha, (c)[3]); \ 661c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell} while (0) 662c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell 6635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset] 664c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell 6658a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define VERT_SET_SPEC( v, c ) \ 666c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwelldo { \ 6678a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (specoffset) { \ 6688a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt radeon_color_t *spec = (radeon_color_t *)&((v)->ui[specoffset]); \ 6698a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt UNCLAMPED_FLOAT_TO_UBYTE(spec->red, (c)[0]); \ 6708a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt UNCLAMPED_FLOAT_TO_UBYTE(spec->green, (c)[1]); \ 6718a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt UNCLAMPED_FLOAT_TO_UBYTE(spec->blue, (c)[2]); \ 672c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell } \ 673c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell} while (0) 674c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_COPY_SPEC( v0, v1 ) \ 675c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwelldo { \ 6768a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt if (specoffset) { \ 6778a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt radeon_color_t *spec0 = (radeon_color_t *)&((v0)->ui[specoffset]); \ 6788a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt radeon_color_t *spec1 = (radeon_color_t *)&((v1)->ui[specoffset]); \ 6798a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt spec0->red = spec1->red; \ 6808a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt spec0->green = spec1->green; \ 6818a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt spec0->blue = spec1->blue; \ 682c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell } \ 683c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell} while (0) 684c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell 685c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell/* These don't need LE32_TO_CPU() as they used to save and restore 686c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell * colors which are already in the correct format. 687c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell */ 688c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_SAVE_RGBA( idx ) color[idx] = v[idx]->ui[coloroffset] 689c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_RESTORE_RGBA( idx ) v[idx]->ui[coloroffset] = color[idx] 6908a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define VERT_SAVE_SPEC( idx ) if (specoffset) spec[idx] = v[idx]->ui[specoffset] 6918a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#define VERT_RESTORE_SPEC( idx ) if (specoffset) v[idx]->ui[specoffset] = spec[idx] 6925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 6945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 6955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef INIT 6965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS(n) \ 6985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 6995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint color[n], spec[n]; \ 7008a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt GLuint coloroffset = rmesa->swtcl.coloroffset; \ 7018a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt GLuint specoffset = rmesa->swtcl.specoffset; \ 7028a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt (void) color; (void) spec; (void) coloroffset; (void) specoffset; 7035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 7055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Helpers for rendering unfilled primitives * 7065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 7075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RASTERIZE(x) radeonRasterPrimitive( ctx, reduced_hw_prim[x] ) 7095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_PRIMITIVE rmesa->swtcl.render_primitive 7105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 7115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x 7125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_unfilled.h" 7135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef IND 7145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 7175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Generate GL render functions * 7185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 7195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (0) 7225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x 7235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 7245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT) 7265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside 7275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 7285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_UNFILLED_BIT) 7305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_unfilled 7315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 7325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT) 7345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside_unfilled 7355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 7365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void init_rast_tab( void ) 7395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init(); 7415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside(); 7425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_unfilled(); 7435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside_unfilled(); 7445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 7475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Render unclipped begin/end objects */ 7485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 7495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_POINTS( start, count ) \ 7515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for ( ; start < count ; start++) \ 7525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_point( rmesa, VERT(start) ) 7535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_LINE( v0, v1 ) \ 7545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_line( rmesa, VERT(v0), VERT(v1) ) 7555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_TRI( v0, v1, v2 ) \ 7565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_triangle( rmesa, VERT(v0), VERT(v1), VERT(v2) ) 7575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_QUAD( v0, v1, v2, v3 ) \ 7585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_quad( rmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) ) 7595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef INIT 7605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INIT(x) do { \ 7615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRenderPrimitive( ctx, x ); \ 7625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} while (0) 7635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 7645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS \ 7655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 7662dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell const GLuint vertsize = rmesa->swtcl.vertex_size; \ 7675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const char *radeonverts = (char *)rmesa->swtcl.verts; \ 7685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \ 7695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLboolean stipple = ctx->Line.StippleFlag; \ 7705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (void) elt; (void) stipple; 7715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RESET_STIPPLE if ( stipple ) radeonResetLineStipple( ctx ); 7725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RESET_OCCLUSION 7735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PRESERVE_VB_DEFS 7745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT(x) (x) 7755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x##_verts 7765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_vb_rendertmp.h" 7775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef ELT 7785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 7795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x##_elts 7805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT(x) elt[x] 7815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_vb_rendertmp.h" 7825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 7865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Choose render functions */ 7875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 7885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonChooseRenderState( GLcontext *ctx ) 7905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 7925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 7935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint index = 0; 7945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint flags = ctx->_TriangleCaps; 7955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->TclFallback || rmesa->Fallback) 7975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 7985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & DD_TRI_LIGHT_TWOSIDE) index |= RADEON_TWOSIDE_BIT; 8005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & DD_TRI_UNFILLED) index |= RADEON_UNFILLED_BIT; 8015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (index != rmesa->swtcl.RenderIndex) { 8035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Points = rast_tab[index].points; 8045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Line = rast_tab[index].line; 8055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedLine = rast_tab[index].line; 8065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Triangle = rast_tab[index].triangle; 8075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Quad = rast_tab[index].quad; 8085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (index == 0) { 8105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabVerts = radeon_render_tab_verts; 8115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabElts = radeon_render_tab_elts; 8125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedPolygon = radeon_fast_clipped_poly; 8135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } else { 8145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts; 8155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts; 8165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedPolygon = _tnl_RenderClippedPolygon; 8175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = index; 8205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 8255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* High level hooks for t_vb_render.c */ 8265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 8275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ) 8305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 8325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.hw_primitive != hwprim) { 8345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 8355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hwprim; 8365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ) 8405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 8425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.render_primitive = prim; 8435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (prim < GL_TRIANGLES || !(ctx->_TriangleCaps & DD_TRI_UNFILLED)) 8445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRasterPrimitive( ctx, reduced_hw_prim[prim] ); 8455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderFinish( GLcontext *ctx ) 8485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonResetLineStipple( GLcontext *ctx ) 8525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 8545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_STATECHANGE( rmesa, lin ); 8555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 8595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Transition to/from hardware rasterization. */ 8605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 8615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const char * const fallbackStrings[] = { 8635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "Texture mode", 8645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glDrawBuffer(GL_FRONT_AND_BACK)", 8655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glEnable(GL_STENCIL) without hw stencil buffer", 8665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glRenderMode(selection or feedback)", 8675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glBlendEquation", 8685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glBlendFunc", 8695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "RADEON_NO_RAST", 8705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "Mixing GL_CLAMP_TO_BORDER and GL_CLAMP (or GL_MIRROR_CLAMP_ATI)" 8715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 8725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const char *getFallbackString(GLuint bit) 8755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int i = 0; 8775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul while (bit > 1) { 8785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul i++; 8795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit >>= 1; 8805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return fallbackStrings[i]; 8825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode ) 8865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 8885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 8895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint oldfallback = rmesa->Fallback; 8905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (mode) { 8925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->Fallback |= bit; 8935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (oldfallback == 0) { 8945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_FIREVERTICES( rmesa ); 8955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_TRUE ); 8965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _swsetup_Wakeup( ctx ); 8975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = ~0; 8985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_FALLBACKS) { 8995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "Radeon begin rasterization fallback: 0x%x %s\n", 9005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit, getFallbackString(bit)); 9015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 9055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->Fallback &= ~bit; 9065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (oldfallback == bit) { 9075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _swrast_flush( ctx ); 9085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start = radeonRenderStart; 9095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 9105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish = radeonRenderFinish; 9118a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 9128a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt tnl->Driver.Render.BuildVertices = _tnl_build_vertices; 9138a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt tnl->Driver.Render.CopyPV = _tnl_copy_pv; 9148a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt tnl->Driver.Render.Interp = _tnl_interp; 9158a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 9165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 9175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_FALSE ); 9185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->TclFallback) { 9195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* These are already done if rmesa->TclFallback goes to 9205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * zero above. But not if it doesn't (RADEON_NO_TCL for 9215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * example?) 9225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 9235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonChooseVertexState( ctx ); 9245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonChooseRenderState( ctx ); 9255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_FALLBACKS) { 9275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "Radeon end rasterization fallback: 0x%x %s\n", 9285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit, getFallbackString(bit)); 9295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 9335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonFlushVertices( GLcontext *ctx, GLuint flags ) 9365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 93757c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell _tnl_FlushVertices( ctx, flags ); 9385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & FLUSH_STORED_VERTICES) 9405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( RADEON_CONTEXT( ctx ) ); 9415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 9425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 9445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Initialization. */ 9455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 9465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonInitSwtcl( GLcontext *ctx ) 9485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 9495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 9505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 9515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul static int firsttime = 1; 9525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (firsttime) { 9545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_rast_tab(); 9555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul firsttime = 0; 9565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 9575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start = radeonRenderStart; 9595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish = radeonRenderFinish; 9605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 9615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 9628a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt tnl->Driver.Render.BuildVertices = _tnl_build_vertices; 9638a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt tnl->Driver.Render.CopyPV = _tnl_copy_pv; 9648a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt tnl->Driver.Render.Interp = _tnl_interp; 9655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9668a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, 9678a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt RADEON_MAX_TNL_VERTEX_SIZE); 9688a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 9698a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt rmesa->swtcl.verts = (GLubyte *)tnl->clipspace.vertex_buf; 9705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = ~0; 9715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.render_primitive = GL_TRIANGLES; 9725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = 0; 9735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 9745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonDestroySwtcl( GLcontext *ctx ) 9775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 9785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 9795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.indexed_verts.buf) 9815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, 9825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __FUNCTION__ ); 9835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 984