radeon_swtcl.c revision 5df82c82bd53db90eb72c5aad4dd20cf6f1116b1
15df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* $XFree86$ */ 25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/************************************************************************** 35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 55df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VA Linux Systems Inc., Fremont, California. 65df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 75df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved. 85df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 95df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining 105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the 115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including 125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish, 135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to 145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to 155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions: 165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the 185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial 195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software. 205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/ 305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Authors: 335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Keith Whitwell <keith@tungstengraphics.com> 345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "glheader.h" 375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "mtypes.h" 385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "colormac.h" 395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "enums.h" 405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "imports.h" 415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "macros.h" 425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "swrast_setup/swrast_setup.h" 445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "math/m_translate.h" 455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/tnl.h" 465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_context.h" 475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_imm_exec.h" 485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_pipeline.h" 495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_context.h" 515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_ioctl.h" 525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_state.h" 535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_swtcl.h" 545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_tcl.h" 555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Build render functions from dd templates * 585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_XYZW_BIT 0x01 625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_RGBA_BIT 0x02 635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_SPEC_BIT 0x04 645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_TEX0_BIT 0x08 655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_TEX1_BIT 0x10 665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_PTEX_BIT 0x20 675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_MAX_SETUP 0x40 685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim( radeonContextPtr rmesa ); 705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim_compat( radeonContextPtr rmesa ); 715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic struct { 735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul void (*emit)( GLcontext *, GLuint, GLuint, void *, GLuint ); 745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul interp_func interp; 755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul copy_pv_func copy_pv; 765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLboolean (*check_tex_sizes)( GLcontext *ctx ); 775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint vertex_size; 785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint vertex_stride_shift; 795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint vertex_format; 805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} setup_tab[RADEON_MAX_SETUP]; 815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TINY_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR) 865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define NOTEX_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC) 925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX0_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC | \ 985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST0) 995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 1015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 1025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 1035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 1045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC | \ 1055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST0 | \ 1065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST1) 1075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PROJ_TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 1095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 1105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 1115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 1125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC | \ 1135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST0 | \ 1145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Q0 | \ 1155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST1 | \ 1165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Q1) 1175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX2_VERTEX_FORMAT 0 1195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX3_VERTEX_FORMAT 0 1205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PROJ_TEX3_VERTEX_FORMAT 0 1215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_XYZW (IND & RADEON_XYZW_BIT) 1235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_RGBA (IND & RADEON_RGBA_BIT) 1245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_SPEC (IND & RADEON_SPEC_BIT) 1255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FOG (IND & RADEON_SPEC_BIT) 1265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX0 (IND & RADEON_TEX0_BIT) 1275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX1 (IND & RADEON_TEX1_BIT) 1285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX2 0 1295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX3 0 1305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_PTEX (IND & RADEON_PTEX_BIT) 1315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERTEX radeonVertex 1335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERTEX_COLOR radeon_color_t 1345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VIEWPORT_MAT() 0 1355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_TEXSOURCE(n) n 1365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_FORMAT() RADEON_CONTEXT(ctx)->swtcl.vertex_format 1375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_STORE() RADEON_CONTEXT(ctx)->swtcl.verts 1385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_STRIDE_SHIFT() RADEON_CONTEXT(ctx)->swtcl.vertex_stride_shift 1395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_UBYTE_COLOR_STORE() &RADEON_CONTEXT(ctx)->UbyteColor 1405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_UBYTE_SPEC_COLOR_STORE() &RADEON_CONTEXT(ctx)->UbyteSecondaryColor 1415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_HW_VIEWPORT 1 1435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Tiny vertices don't seem to work atm - haven't looked into why. 1445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 1455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_HW_DIVIDE (IND & ~(RADEON_XYZW_BIT|RADEON_RGBA_BIT)) 1465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TINY_VERTICES 1 1475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_RGBA_COLOR 1 1485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_NOTEX_VERTICES 1 1495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX0_VERTICES 1 1505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX1_VERTICES 1 1515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX2_VERTICES 0 1525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX3_VERTICES 0 1535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_PTEX_VERTICES 1 1545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CHECK_HW_DIVIDE (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE| \ 1565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul DD_TRI_UNFILLED))) 1575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IMPORT_QUALIFIER 1595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IMPORT_FLOAT_COLORS radeon_import_float_colors 1605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IMPORT_FLOAT_SPEC_COLORS radeon_import_float_spec_colors 1615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INTERP_VERTEX setup_tab[RADEON_CONTEXT(ctx)->swtcl.SetupIndex].interp 1635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define COPY_PV_VERTEX setup_tab[RADEON_CONTEXT(ctx)->swtcl.SetupIndex].copy_pv 1645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 1675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Generate pv-copying and translation functions * 1685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 1695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x 1715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND ~0 1725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vb.c" 1735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef IND 1745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 1775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Generate vertex emit and interp functions * 1785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 1795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT) 1815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wg 1825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT) 1855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgt0 1865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_PTEX_BIT) 1895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgpt0 1905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT) 1935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgt0t1 1945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT|\ 1975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_PTEX_BIT) 1985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgpt0t1 1995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT) 2025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfs 2035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 2065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT) 2075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfst0 2085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 2115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT|RADEON_PTEX_BIT) 2125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfspt0 2135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 2165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT|RADEON_TEX1_BIT) 2175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfst0t1 2185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 2215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT|RADEON_TEX1_BIT|RADEON_PTEX_BIT) 2225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfspt0t1 2235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 2275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Initialization 2285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 2295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void init_setup_tab( void ) 2315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wg(); 2335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgt0(); 2345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgpt0(); 2355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgt0t1(); 2365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgpt0t1(); 2375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfs(); 2385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfst0(); 2395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfspt0(); 2405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfst0t1(); 2415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfspt0t1(); 2425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonPrintSetupFlags(char *msg, GLuint flags ) 2475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "%s(%x): %s%s%s%s%s%s\n", 2495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul msg, 2505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (int)flags, 2515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_XYZW_BIT) ? " xyzw," : "", 2525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_RGBA_BIT) ? " rgba," : "", 2535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_SPEC_BIT) ? " spec/fog," : "", 2545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_TEX0_BIT) ? " tex-0," : "", 2555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_TEX1_BIT) ? " tex-1," : "", 2565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_PTEX_BIT) ? " proj-tex," : ""); 2575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderStart( GLcontext *ctx ) 2615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 2635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 2645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!setup_tab[rmesa->swtcl.SetupIndex].check_tex_sizes(ctx)) { 2665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint ind = rmesa->swtcl.SetupIndex |= (RADEON_PTEX_BIT|RADEON_RGBA_BIT); 2675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* Projective textures are handled nicely; just have to change 2695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * up to the new vertex format. 2705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (setup_tab[ind].vertex_format != rmesa->swtcl.vertex_format) { 2725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM(rmesa); 2735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format = setup_tab[ind].vertex_format; 2745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size = setup_tab[ind].vertex_size; 2755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_stride_shift = setup_tab[ind].vertex_stride_shift; 2765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { 2795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Interp = setup_tab[rmesa->swtcl.SetupIndex].interp; 2805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.CopyPV = setup_tab[rmesa->swtcl.SetupIndex].copy_pv; 2815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.flush != 0 && 2855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush != flush_last_swtcl_prim_compat && 2865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush != flush_last_swtcl_prim) 2875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush( rmesa ); 2885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonBuildVertices( GLcontext *ctx, GLuint start, GLuint count, 2925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint newinputs ) 2935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 2955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLubyte *v = ((GLubyte *)rmesa->swtcl.verts + 2965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (start << rmesa->swtcl.vertex_stride_shift)); 2975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint stride = 1 << rmesa->swtcl.vertex_stride_shift; 2985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul newinputs |= rmesa->swtcl.SetupNewInputs; 3005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.SetupNewInputs = 0; 3015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!newinputs) 3035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 3045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul setup_tab[rmesa->swtcl.SetupIndex].emit( ctx, start, count, v, stride ); 3065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 3075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonChooseVertexState( GLcontext *ctx ) 3095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 3105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 3115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 3125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint ind = (RADEON_XYZW_BIT | RADEON_RGBA_BIT); 3135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->TclFallback || rmesa->Fallback) 3155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 3165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Fog.Enabled || (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)) 3185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ind |= RADEON_SPEC_BIT; 3195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Texture._EnabledUnits & 0x2) 3215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* unit 1 enabled */ 3225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ind |= RADEON_TEX0_BIT|RADEON_TEX1_BIT; 3235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else if (ctx->Texture._EnabledUnits & 0x1) 3245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* unit 0 enabled */ 3255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ind |= RADEON_TEX0_BIT; 3265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.SetupIndex = ind; 3285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)) { 3305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Interp = radeon_interp_extras; 3315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.CopyPV = radeon_copy_pv_extras; 3325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 3345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Interp = setup_tab[ind].interp; 3355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.CopyPV = setup_tab[ind].copy_pv; 3365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (setup_tab[ind].vertex_format != rmesa->swtcl.vertex_format) { 3395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM(rmesa); 3405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format = setup_tab[ind].vertex_format; 3415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size = setup_tab[ind].vertex_size; 3425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_stride_shift = setup_tab[ind].vertex_stride_shift; 3435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 3465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint se_coord_fmt, needproj; 3475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* HW perspective divide is a win, but tiny vertex formats are a 3495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * bigger one. 3505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 3515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (setup_tab[ind].vertex_format == TINY_VERTEX_FORMAT || 3525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { 3535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul needproj = GL_TRUE; 3545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | 3555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_VTX_Z_PRE_MULT_1_OVER_W0 | 3565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX1_W_ROUTING_USE_Q1); 3575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 3595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul needproj = GL_FALSE; 3605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul se_coord_fmt = (RADEON_VTX_W0_IS_NOT_1_OVER_W0 | 3615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX1_W_ROUTING_USE_Q1); 3625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT] ) { 3655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_STATECHANGE( rmesa, set ); 3665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt; 3675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _tnl_need_projected_coords( ctx, needproj ); 3695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 3715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Flush vertices in the current dma region. 3745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 3755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim( radeonContextPtr rmesa ) 3765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 3775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_IOCTL) 3785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "%s\n", __FUNCTION__); 3795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush = 0; 3815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.current.buf) { 3835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct radeon_dma_region *current = &rmesa->dma.current; 3845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint current_offset = (rmesa->radeonScreen->agp_buffer_offset + 3855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->buf->buf->idx * RADEON_BUFFER_SIZE + 3865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start); 3875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (!(rmesa->swtcl.hw_primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND)); 3895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (current->start + 3915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 3925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->ptr); 3935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.current.start != rmesa->dma.current.ptr) { 3955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonEmitVertexAOS( rmesa, 3965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size, 3975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current_offset); 3985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonEmitVbufPrim( rmesa, 4005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format, 4015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive, 4025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts); 4035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts = 0; 4065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start = current->ptr; 4075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim_compat( radeonContextPtr rmesa ) 4125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct radeon_dma_region *current = &rmesa->dma.current; 4145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_IOCTL) 4165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "%s buf %p start %d ptr %d\n", 4175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __FUNCTION__, 4185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->buf, 4195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start, 4205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->ptr); 4215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (!(rmesa->swtcl.hw_primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND)); 4235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (current->start + 4245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 4255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->ptr); 4265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (current->start == 0); 4275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush = 0; 4295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (current->ptr && current->buf) { 4315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (current->buf->refcount == 1); 4325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonCompatEmitPrimitive( rmesa, 4345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format, 4355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive, 4365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts); 4375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* The buffer has been released: 4395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE(current->buf); 4415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->buf = 0; 4425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start = 0; 4435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->ptr = current->end; 4445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts = 0; 4485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Alloc space in the current dma region. 4525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void *radeonAllocDmaLowVerts( radeonContextPtr rmesa, 4545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int nverts, int vsize ) 4555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint bytes = vsize * nverts; 4575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( rmesa->dma.current.ptr + bytes > rmesa->dma.current.end ) 4595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRefillCurrentDmaRegion( rmesa ); 4605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->dma.flush) { 4625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; 4635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dri.drmMinor == 1) 4645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush = flush_last_swtcl_prim_compat; 4655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else 4665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush = flush_last_swtcl_prim; 4675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert( vsize == rmesa->swtcl.vertex_size * 4 ); 4705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert( rmesa->dma.flush == flush_last_swtcl_prim || 4715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush == flush_last_swtcl_prim_compat); 4725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (rmesa->dma.current.start + 4735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 4745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.current.ptr); 4755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 4785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul char *head = rmesa->dma.current.address + rmesa->dma.current.ptr; 4795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.current.ptr += bytes; 4805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts += nverts; 4815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return head; 4825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeon_emit_contiguous_verts( GLcontext *ctx, GLuint start, GLuint count ) 4905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 4925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint vertex_size = rmesa->swtcl.vertex_size * 4; 4935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul CARD32 *dest = radeonAllocDmaLowVerts( rmesa, count-start, vertex_size ); 4945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul setup_tab[rmesa->swtcl.SetupIndex].emit( ctx, start, count, dest, 4955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul vertex_size ); 4965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeon_emit_indexed_verts( GLcontext *ctx, GLuint start, GLuint count ) 5015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 5035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonAllocDmaRegionVerts( rmesa, 5055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul &rmesa->swtcl.indexed_verts, 5065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul count - start, 5075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size * 4, 5085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 64); 5095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul setup_tab[rmesa->swtcl.SetupIndex].emit( 5115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ctx, start, count, 5125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.indexed_verts.address + rmesa->swtcl.indexed_verts.start, 5135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size * 4 ); 5145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 5185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Render unclipped vertex buffers by emitting vertices directly to 5195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * dma buffers. Use strip/fan hardware primitives where possible. 5205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Try to simulate missing primitives with indexed vertices. 5215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 5225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_POINTS 1 5235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_LINES 1 5245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_LINE_STRIPS 1 5255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRIANGLES 1 5265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_STRIPS 1 5275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_STRIP_1 0 5285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_FANS 1 5295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_QUADS 0 5305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_QUAD_STRIPS 0 5315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_POLYGONS 0 5325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_ELTS 1 5335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const GLuint hw_prim[GL_POLYGON+1] = { 5355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 5365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 5375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 5385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP, 5395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 5405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP, 5415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN, 5425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 5435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 5445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0 5455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 5465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void radeonDmaPrimitive( radeonContextPtr rmesa, GLenum prim ) 5485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 5505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hw_prim[prim]; 5515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert(rmesa->dma.current.ptr == rmesa->dma.current.start); 5525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void radeonEltPrimitive( radeonContextPtr rmesa, GLenum prim ) 5555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 5575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hw_prim[prim] | RADEON_CP_VC_CNTL_PRIM_WALK_IND; 5585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void VERT_FALLBACK( GLcontext *ctx, 5625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint start, 5635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint count, 5645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint flags ) 5655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 5675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK ); 5685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 ); 5695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabVerts[flags&PRIM_MODE_MASK]( ctx, start, count, flags ); 5705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CONTEXT(ctx)->swtcl.SetupNewInputs = VERT_BIT_CLIP; 5715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void ELT_FALLBACK( GLcontext *ctx, 5745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint start, 5755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint count, 5765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint flags ) 5775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 5795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK ); 5805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 ); 5815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabElts[flags&PRIM_MODE_MASK]( ctx, start, count, flags ); 5825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CONTEXT(ctx)->swtcl.SetupNewInputs = VERT_BIT_CLIP; 5835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx) 5875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELTS_VARS GLushort *dest 5885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INIT( prim ) radeonDmaPrimitive( rmesa, prim ) 5895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT_INIT(prim) radeonEltPrimitive( rmesa, prim ) 5905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define NEW_PRIMITIVE() RADEON_NEWPRIM( rmesa ) 5915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define NEW_BUFFER() radeonRefillCurrentDmaRegion( rmesa ) 5925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_CURRENT_VB_MAX_VERTS() \ 5935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (((int)rmesa->dma.current.end - (int)rmesa->dma.current.ptr) / (rmesa->swtcl.vertex_size*4)) 5945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_SUBSEQUENT_VB_MAX_VERTS() \ 5955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_BUFFER_SIZE) / (rmesa->swtcl.vertex_size*4)) 5965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#if RADEON_OLD_PACKETS 5985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul# define GET_CURRENT_VB_MAX_ELTS() \ 5995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_CMD_BUF_SZ - (rmesa->store.cmd_used + 24)) / 2) 6005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#else 6015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul# define GET_CURRENT_VB_MAX_ELTS() \ 6025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_CMD_BUF_SZ - (rmesa->store.cmd_used + 16)) / 2) 6035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif 6045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_SUBSEQUENT_VB_MAX_ELTS() \ 6055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_CMD_BUF_SZ - 1024) / 2) 6065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* How do you extend an existing primitive? 6105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 6115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ALLOC_ELTS(nr) \ 6125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldo { \ 6135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.flush == radeonFlushElts && \ 6145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->store.cmd_used + nr*2 < RADEON_CMD_BUF_SZ) { \ 6155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul \ 6165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul dest = (GLushort *)(rmesa->store.cmd_buf + \ 6175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->store.cmd_used); \ 6185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->store.cmd_used += nr*2; \ 6195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } \ 6205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { \ 6215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.flush) { \ 6225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush( rmesa ); \ 6235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } \ 6245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul \ 6255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonEmitVertexAOS( rmesa, \ 6265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size, \ 6275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (rmesa->radeonScreen->agp_buffer_offset + \ 6285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.indexed_verts.buf->buf->idx * \ 6295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_BUFFER_SIZE + \ 6305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.indexed_verts.start)); \ 6315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul \ 6325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul dest = radeonAllocEltsOpenEnded( rmesa, \ 6335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format, \ 6345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive, \ 6355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul nr ); \ 6365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } \ 6375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} while (0) 6385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ALLOC_ELTS_NEW_PRIMITIVE(nr) ALLOC_ELTS( nr ) 6405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#ifdef MESA_BIG_ENDIAN 6425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */ 6435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_ELT(offset, x) do { \ 6445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 ); \ 6455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 ); \ 6465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x); } while (0) 6475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#else 6485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_ELT(offset, x) (dest)[offset] = (GLushort) (x) 6495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif 6505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_TWO_ELTS(offset, x, y) *(GLuint *)(dest+offset) = ((y)<<16)|(x); 6515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INCR_ELTS( nr ) dest += nr 6525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RELEASE_ELT_VERTS() \ 6535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, __FUNCTION__ ) 6545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_VERTS( ctx, j, nr ) \ 6555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_emit_contiguous_verts(ctx, j, (j)+(nr)) 6565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_INDEXED_VERTS( ctx, start, count ) \ 6575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_emit_indexed_verts( ctx, start, count ) 6585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_dma_##x 6615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_dmatmp.h" 6625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 6655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Render pipeline stage */ 6665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 6675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean radeon_run_render( GLcontext *ctx, 6705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_pipeline_stage *stage ) 6715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 6725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 6735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 6745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &tnl->vb; 6755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i, length, flags = 0; 6765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul render_func *tab = TAG(render_tab_verts); 6775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.indexed_verts.buf && (!VB->Elts || stage->changed_inputs)) 6795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RELEASE_ELT_VERTS(); 6805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (VB->ClipOrMask || /* No clipping */ 6825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex != 0 || /* No per-vertex manipulations */ 6835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ctx->Line.StippleFlag) /* GH: THIS IS A HACK!!! */ 6845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 6855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dri.drmMinor < 3) { 6875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* drm 1.1 doesn't support vertex primitives starting in the 6885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * middle of a buffer. It doesn't support sane indexed vertices 6895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * either. drm 1.2 fixes both of these problems, but we don't have a 6905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * compatibility layer to that version yet. 6915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 6925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 6935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 6945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start( ctx ); 6965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (VB->Elts) { 6985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tab = TAG(render_tab_elts); 6995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->swtcl.indexed_verts.buf) 7005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!TAG(emit_elt_verts)(ctx, 0, VB->Count)) 7015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; /* too many vertices */ 7025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 7035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; !(flags & PRIM_LAST) ; i += length) 7055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 7065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul flags = VB->Primitive[i]; 7075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul length = VB->PrimitiveLength[i]; 7085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_PRIMS) 7105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "radeon_render.c: prim %s %d..%d\n", 7115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_lookup_enum_by_nr(flags & PRIM_MODE_MASK), 7125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul i, i+length); 7135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (length) 7155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tab[flags & PRIM_MODE_MASK]( ctx, i, i + length, flags ); 7165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 7175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish( ctx ); 7195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; /* finished the pipe */ 7215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeon_check_render( GLcontext *ctx, 7265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_pipeline_stage *stage ) 7275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint inputs = VERT_BIT_POS | VERT_BIT_CLIP | VERT_BIT_COLOR0; 7295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->RenderMode == GL_RENDER) { 7315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) 7325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul inputs |= VERT_BIT_COLOR1; 7335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Texture.Unit[0]._ReallyEnabled) 7355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul inputs |= VERT_BIT_TEX0; 7365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Texture.Unit[1]._ReallyEnabled) 7385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul inputs |= VERT_BIT_TEX1; 7395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Fog.Enabled) 7415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul inputs |= VERT_BIT_FOG; 7425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 7435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->inputs = inputs; 7455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void dtr( struct gl_pipeline_stage *stage ) 7495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (void)stage; 7515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulconst struct gl_pipeline_stage _radeon_render_stage = 7555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "radeon render", 7575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (_DD_NEW_SEPARATE_SPECULAR | 7585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _NEW_TEXTURE| 7595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _NEW_FOG| 7605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _NEW_RENDERMODE), /* re-check (new inputs) */ 7615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, /* re-run (always runs) */ 7625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GL_TRUE, /* active */ 7635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 0, /* inputs (set in check_render), outputs */ 7645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 0, /* changed_inputs, private */ 7655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul dtr, /* destructor */ 7665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_check_render, /* check - initially set to alloc data */ 7675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_run_render /* run */ 7685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 7695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**************************************************************************/ 7725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Radeon texture rectangle expects coords in 0..1 range, not 0..dimension 7745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * as in the extension spec. Need to translate here. 7755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * 7765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Note that swrast expects 0..dimension, so if a fallback is active, 7775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * don't do anything. (Maybe need to configure swrast to match hw) 7785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 7795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct texrect_stage_data { 7805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLvector4f texcoord[MAX_TEXTURE_UNITS]; 7815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 7825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEXRECT_STAGE_DATA(stage) ((struct texrect_stage_data *)stage->privatePtr) 7845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean run_texrect_stage( GLcontext *ctx, 7875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_pipeline_stage *stage ) 7885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 7905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 7915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 7925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &tnl->vb; 7935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 7945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->Fallback) 7965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 7975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) { 7995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!(ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_RECT_BIT)) 8005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul continue; 8015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (stage->changed_inputs & VERT_BIT_TEX(i)) { 8035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_texture_object *texObj = ctx->Texture.Unit[i].CurrentRect; 8045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_texture_image *texImage = texObj->Image[texObj->BaseLevel]; 8055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLfloat iw = 1.0/texImage->Width; 8065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLfloat ih = 1.0/texImage->Height; 8075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data; 8085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLint instride = VB->TexCoordPtr[i]->stride; 8095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLfloat (*out)[4] = store->texcoord[i].data; 8105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLint j; 8115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (j = 0 ; j < VB->Count ; j++) { 8135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul out[j][0] = in[0] * iw; 8145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul out[j][1] = in[1] * ih; 8155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul in = (GLfloat *)((GLubyte *)in + instride); 8165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VB->TexCoordPtr[i] = &store->texcoord[i]; 8205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 8235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Called the first time stage->run() is invoked. 8275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 8285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean alloc_texrect_data( GLcontext *ctx, 8295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_pipeline_stage *stage ) 8305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; 8325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store; 8335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 8345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->privatePtr = CALLOC(sizeof(*store)); 8365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul store = TEXRECT_STAGE_DATA(stage); 8375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!store) 8385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; 8395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) 8415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_vector4f_alloc( &store->texcoord[i], 0, VB->Size, 32 ); 8425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* Now run the stage. 8445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 8455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->run = run_texrect_stage; 8465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return stage->run( ctx, stage ); 8475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void check_texrect( GLcontext *ctx, 8515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_pipeline_stage *stage ) 8525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint flags = 0; 8545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_RECT_BIT) 8565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul flags |= VERT_BIT_TEX0; 8575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Texture.Unit[1]._ReallyEnabled & TEXTURE_RECT_BIT) 8595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul flags |= VERT_BIT_TEX1; 8605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->inputs = flags; 8625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->outputs = flags; 8635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->active = (flags != 0); 8645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void free_texrect_data( struct gl_pipeline_stage *stage ) 8685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 8705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 8715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (store) { 8735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < MAX_TEXTURE_UNITS ; i++) 8745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (store->texcoord[i].data) 8755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_vector4f_free( &store->texcoord[i] ); 8765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( store ); 8775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->privatePtr = 0; 8785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 8795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 8805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulconst struct gl_pipeline_stage _radeon_texrect_stage = 8835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 8845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "radeon texrect stage", /* name */ 8855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _NEW_TEXTURE, /* check_state */ 8865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _NEW_TEXTURE, /* run_state */ 8875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GL_TRUE, /* active? */ 8885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, /* inputs */ 8895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, /* outputs */ 8905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, /* changed_inputs */ 8915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul NULL, /* private data */ 8925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul free_texrect_data, /* destructor */ 8935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul check_texrect, /* check */ 8945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul alloc_texrect_data, /* run -- initially set to init */ 8955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 8965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**************************************************************************/ 8995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const GLuint reduced_hw_prim[GL_POLYGON+1] = { 9025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 9035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 9045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 9055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 9065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 9075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 9085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 9095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 9105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 9115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST 9125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 9135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ); 9155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ); 9165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonResetLineStipple( GLcontext *ctx ); 9175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 9205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Emit primitives as inline vertices * 9215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 9225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 9245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_ARG radeonContextPtr rmesa 9255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_ARG2 rmesa 9265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_DWORDS() rmesa->swtcl.vertex_size 9275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ALLOC_VERTS( n, size ) radeonAllocDmaLowVerts( rmesa, n, size * 4 ) 9285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 9295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS \ 9305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 9315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLuint shift = rmesa->swtcl.vertex_stride_shift; \ 9325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const char *radeonverts = (char *)rmesa->swtcl.verts; 9335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT(x) (radeonVertex *)(radeonverts + (x << shift)) 9345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERTEX radeonVertex 9355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 9365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x 9375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_triemit.h" 9385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 9415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Macros for t_dd_tritmp.h to draw basic primitives * 9425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 9435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define QUAD( a, b, c, d ) radeon_quad( rmesa, a, b, c, d ) 9455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TRI( a, b, c ) radeon_triangle( rmesa, a, b, c ) 9465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LINE( a, b ) radeon_line( rmesa, a, b ) 9475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define POINT( a ) radeon_point( rmesa, a ) 9485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 9505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Build render functions from dd templates * 9515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 9525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_TWOSIDE_BIT 0x01 9545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_UNFILLED_BIT 0x02 9555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_OFFSET_BIT 0x04 /* drmMinor == 1 */ 9565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_MAX_TRIFUNC 0x08 9575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic struct { 9605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul points_func points; 9615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul line_func line; 9625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul triangle_func triangle; 9635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul quad_func quad; 9645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} rast_tab[RADEON_MAX_TRIFUNC]; 9655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FALLBACK 0 9685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_OFFSET (IND & RADEON_OFFSET_BIT) 9695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_UNFILLED (IND & RADEON_UNFILLED_BIT) 9705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TWOSIDE (IND & RADEON_TWOSIDE_BIT) 9715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FLAT 0 9725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TRI 1 9735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_QUAD 1 9745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_LINE 1 9755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_POINTS 1 9765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FULL_QUAD 1 9775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_RGBA 1 9795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_SPEC 1 9805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_INDEX 0 9815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_BACK_COLORS 0 9825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_HW_FLATSHADE 1 9835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAB rast_tab 9845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DEPTH_SCALE 1.0 9865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UNFILLED_TRI unfilled_tri 9875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UNFILLED_QUAD unfilled_quad 9885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_X(_v) _v->v.x 9895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_Y(_v) _v->v.y 9905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_Z(_v) _v->v.z 9915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define AREA_IS_CCW( a ) (a < 0) 9925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX(e) (rmesa->swtcl.verts + (e<<rmesa->swtcl.vertex_stride_shift)) 9935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_SET_RGBA( v, c ) v->ui[coloroffset] = LE32_TO_CPU(*(GLuint *)c) 9955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset] 9965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_SAVE_RGBA( idx ) color[idx] = CPU_TO_LE32(v[idx]->ui[coloroffset]) 9975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_RESTORE_RGBA( idx ) v[idx]->ui[coloroffset] = LE32_TO_CPU(color[idx]) 9985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_SET_SPEC( v0, c ) if (havespec) { \ 10005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul v0->v.specular.red = (c)[0]; \ 10015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul v0->v.specular.green = (c)[1]; \ 10025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul v0->v.specular.blue = (c)[2]; } 10035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_COPY_SPEC( v0, v1 ) if (havespec) { \ 10045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul v0->v.specular.red = v1->v.specular.red; \ 10055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul v0->v.specular.green = v1->v.specular.green; \ 10065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul v0->v.specular.blue = v1->v.specular.blue; } 10075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_SAVE_SPEC( idx ) if (havespec) spec[idx] = CPU_TO_LE32(v[idx]->ui[5]) 10085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_RESTORE_SPEC( idx ) if (havespec) v[idx]->ui[5] = LE32_TO_CPU(spec[idx]) 10095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 10115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 10125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef INIT 10135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS(n) \ 10155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 10165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint color[n], spec[n]; \ 10175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint coloroffset = (rmesa->swtcl.vertex_size == 4 ? 3 : 4); \ 10185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLboolean havespec = (rmesa->swtcl.vertex_size > 4); \ 10195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (void) color; (void) spec; (void) coloroffset; (void) havespec; 10205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 10225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Helpers for rendering unfilled primitives * 10235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 10245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RASTERIZE(x) radeonRasterPrimitive( ctx, reduced_hw_prim[x] ) 10265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_PRIMITIVE rmesa->swtcl.render_primitive 10275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 10285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x 10295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_unfilled.h" 10305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef IND 10315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 10345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Generate GL render functions * 10355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 10365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (0) 10395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x 10405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT) 10435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside 10445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_UNFILLED_BIT) 10475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_unfilled 10485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT) 10515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside_unfilled 10525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_OFFSET_BIT) 10555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_offset 10565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT|RADEON_OFFSET_BIT) 10595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside_offset 10605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_UNFILLED_BIT|RADEON_OFFSET_BIT) 10635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_unfilled_offset 10645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT|RADEON_OFFSET_BIT) 10675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside_unfilled_offset 10685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 10695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void init_rast_tab( void ) 10725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 10735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init(); 10745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside(); 10755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_unfilled(); 10765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside_unfilled(); 10775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_offset(); 10785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside_offset(); 10795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_unfilled_offset(); 10805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside_unfilled_offset(); 10815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 10825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 10845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Render unclipped begin/end objects */ 10855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 10865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT(x) (radeonVertex *)(radeonverts + (x << shift)) 10885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_POINTS( start, count ) \ 10895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for ( ; start < count ; start++) \ 10905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_point( rmesa, VERT(start) ) 10915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_LINE( v0, v1 ) \ 10925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_line( rmesa, VERT(v0), VERT(v1) ) 10935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_TRI( v0, v1, v2 ) \ 10945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_triangle( rmesa, VERT(v0), VERT(v1), VERT(v2) ) 10955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_QUAD( v0, v1, v2, v3 ) \ 10965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_quad( rmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) ) 10975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef INIT 10985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INIT(x) do { \ 10995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRenderPrimitive( ctx, x ); \ 11005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} while (0) 11015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 11025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS \ 11035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 11045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLuint shift = rmesa->swtcl.vertex_stride_shift; \ 11055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const char *radeonverts = (char *)rmesa->swtcl.verts; \ 11065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \ 11075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLboolean stipple = ctx->Line.StippleFlag; \ 11085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (void) elt; (void) stipple; 11095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RESET_STIPPLE if ( stipple ) radeonResetLineStipple( ctx ); 11105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RESET_OCCLUSION 11115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PRESERVE_VB_DEFS 11125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT(x) (x) 11135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x##_verts 11145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_vb_rendertmp.h" 11155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef ELT 11165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 11175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x##_elts 11185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT(x) elt[x] 11195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_vb_rendertmp.h" 11205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 11245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Choose render functions */ 11255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 11265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonChooseRenderState( GLcontext *ctx ) 11285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 11295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 11305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 11315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint index = 0; 11325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint flags = ctx->_TriangleCaps; 11335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->TclFallback || rmesa->Fallback) 11355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 11365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & DD_TRI_LIGHT_TWOSIDE) index |= RADEON_TWOSIDE_BIT; 11385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & DD_TRI_UNFILLED) index |= RADEON_UNFILLED_BIT; 11395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ((flags & DD_TRI_OFFSET) && 11405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dri.drmMinor == 1) index |= RADEON_OFFSET_BIT; 11415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (index != rmesa->swtcl.RenderIndex) { 11435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Points = rast_tab[index].points; 11445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Line = rast_tab[index].line; 11455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedLine = rast_tab[index].line; 11465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Triangle = rast_tab[index].triangle; 11475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Quad = rast_tab[index].quad; 11485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (index == 0) { 11505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabVerts = radeon_render_tab_verts; 11515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabElts = radeon_render_tab_elts; 11525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedPolygon = radeon_fast_clipped_poly; 11535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } else { 11545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts; 11555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts; 11565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedPolygon = _tnl_RenderClippedPolygon; 11575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = index; 11605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 11655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* High level hooks for t_vb_render.c */ 11665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 11675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ) 11705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 11715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 11725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.hw_primitive != hwprim) { 11745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 11755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hwprim; 11765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ) 11805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 11815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 11825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.render_primitive = prim; 11835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (prim < GL_TRIANGLES || !(ctx->_TriangleCaps & DD_TRI_UNFILLED)) 11845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRasterPrimitive( ctx, reduced_hw_prim[prim] ); 11855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderFinish( GLcontext *ctx ) 11885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 11895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonResetLineStipple( GLcontext *ctx ) 11925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 11935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 11945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_STATECHANGE( rmesa, lin ); 11955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 11995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Transition to/from hardware rasterization. */ 12005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 12015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const char * const fallbackStrings[] = { 12035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "Texture mode", 12045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glDrawBuffer(GL_FRONT_AND_BACK)", 12055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glEnable(GL_STENCIL) without hw stencil buffer", 12065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glRenderMode(selection or feedback)", 12075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glBlendEquation", 12085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glBlendFunc", 12095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "RADEON_NO_RAST", 12105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "Mixing GL_CLAMP_TO_BORDER and GL_CLAMP (or GL_MIRROR_CLAMP_ATI)" 12115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 12125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const char *getFallbackString(GLuint bit) 12155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 12165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int i = 0; 12175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul while (bit > 1) { 12185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul i++; 12195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit >>= 1; 12205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return fallbackStrings[i]; 12225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 12235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode ) 12265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 12275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 12285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 12295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint oldfallback = rmesa->Fallback; 12305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (mode) { 12325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->Fallback |= bit; 12335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (oldfallback == 0) { 12345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_FIREVERTICES( rmesa ); 12355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_TRUE ); 12365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _swsetup_Wakeup( ctx ); 12375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _tnl_need_projected_coords( ctx, GL_TRUE ); 12385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = ~0; 12395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_FALLBACKS) { 12405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "Radeon begin rasterization fallback: 0x%x %s\n", 12415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit, getFallbackString(bit)); 12425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 12465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->Fallback &= ~bit; 12475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (oldfallback == bit) { 12485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _swrast_flush( ctx ); 12495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start = radeonRenderStart; 12505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 12515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish = radeonRenderFinish; 12525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.BuildVertices = radeonBuildVertices; 12535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 12545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_FALSE ); 12555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->TclFallback) { 12565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* These are already done if rmesa->TclFallback goes to 12575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * zero above. But not if it doesn't (RADEON_NO_TCL for 12585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * example?) 12595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 12605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonChooseVertexState( ctx ); 12615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonChooseRenderState( ctx ); 12625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_FALLBACKS) { 12645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "Radeon end rasterization fallback: 0x%x %s\n", 12655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit, getFallbackString(bit)); 12665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 12705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonFlushVertices( GLcontext *ctx, GLuint flags ) 12735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 12745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _tnl_flush_vertices( ctx, flags ); 12755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & FLUSH_STORED_VERTICES) 12775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( RADEON_CONTEXT( ctx ) ); 12785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 12795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 12815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Initialization. */ 12825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 12835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonInitSwtcl( GLcontext *ctx ) 12855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 12865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 12875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 12885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint size = TNL_CONTEXT(ctx)->vb.Size; 12895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul static int firsttime = 1; 12905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (firsttime) { 12925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_rast_tab(); 12935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_setup_tab(); 12945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul firsttime = 0; 12955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 12965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 12975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start = radeonRenderStart; 12985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish = radeonRenderFinish; 12995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 13005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 13015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.BuildVertices = radeonBuildVertices; 13025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 13035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.verts = ALIGN_MALLOC( size * 16 * 4, 32 ); 13045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = ~0; 13055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.render_primitive = GL_TRIANGLES; 13065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = 0; 13075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 13085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 13095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 13105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonDestroySwtcl( GLcontext *ctx ) 13115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 13125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 13135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 13145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.indexed_verts.buf) 13155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, 13165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __FUNCTION__ ); 13175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 13185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.verts) { 13195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ALIGN_FREE(rmesa->swtcl.verts); 13205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.verts = 0; 13215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 13225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 13235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->UbyteSecondaryColor.Ptr) { 13245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ALIGN_FREE(rmesa->UbyteSecondaryColor.Ptr); 13255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->UbyteSecondaryColor.Ptr = 0; 13265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 13275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 13285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->UbyteColor.Ptr) { 13295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ALIGN_FREE(rmesa->UbyteColor.Ptr); 13305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->UbyteColor.Ptr = 0; 13315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 13325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 1333