radeon_swtcl.c revision bf87f864934e174b3493592d5d107f012aac0842
1bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_swtcl.c,v 1.6 2003/05/06 23:52:08 daenzer Exp $ */ 25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/************************************************************************** 35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 55df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VA Linux Systems Inc., Fremont, California. 65df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 75df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved. 85df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 95df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining 105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the 115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including 125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish, 135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to 145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to 155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions: 165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the 185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial 195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software. 205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/ 305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Authors: 335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Keith Whitwell <keith@tungstengraphics.com> 345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "glheader.h" 375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "mtypes.h" 385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "colormac.h" 395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "enums.h" 405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "imports.h" 415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "macros.h" 425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "swrast_setup/swrast_setup.h" 445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "math/m_translate.h" 455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/tnl.h" 465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_context.h" 475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_pipeline.h" 4857c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell#include "tnl/t_vtx_api.h" /* for _tnl_FlushVertices */ 495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_context.h" 515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_ioctl.h" 525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_state.h" 535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_swtcl.h" 545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_tcl.h" 555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Build render functions from dd templates * 585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_XYZW_BIT 0x01 625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_RGBA_BIT 0x02 635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_SPEC_BIT 0x04 645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_TEX0_BIT 0x08 655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_TEX1_BIT 0x10 665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_PTEX_BIT 0x20 675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_MAX_SETUP 0x40 685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim( radeonContextPtr rmesa ); 705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic struct { 725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul void (*emit)( GLcontext *, GLuint, GLuint, void *, GLuint ); 733d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_interp_func interp; 743d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_copy_pv_func copy_pv; 755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLboolean (*check_tex_sizes)( GLcontext *ctx ); 765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint vertex_size; 775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint vertex_format; 785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} setup_tab[RADEON_MAX_SETUP]; 795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TINY_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR) 845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define NOTEX_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC) 905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX0_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC | \ 965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST0) 975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 1005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 1015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 1025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC | \ 1035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST0 | \ 1045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST1) 1055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PROJ_TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \ 1075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Z | \ 1085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_W0 | \ 1095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKCOLOR | \ 1105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_PKSPEC | \ 1115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST0 | \ 1125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Q0 | \ 1135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_ST1 | \ 1145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_FRMT_Q1) 1155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX2_VERTEX_FORMAT 0 1175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX3_VERTEX_FORMAT 0 1185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PROJ_TEX3_VERTEX_FORMAT 0 1195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_XYZW (IND & RADEON_XYZW_BIT) 1215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_RGBA (IND & RADEON_RGBA_BIT) 1225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_SPEC (IND & RADEON_SPEC_BIT) 1235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FOG (IND & RADEON_SPEC_BIT) 1245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX0 (IND & RADEON_TEX0_BIT) 1255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX1 (IND & RADEON_TEX1_BIT) 1265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX2 0 1275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TEX3 0 1285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_PTEX (IND & RADEON_PTEX_BIT) 1295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERTEX radeonVertex 1315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERTEX_COLOR radeon_color_t 1325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VIEWPORT_MAT() 0 1335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_TEXSOURCE(n) n 1345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_FORMAT() RADEON_CONTEXT(ctx)->swtcl.vertex_format 1355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_STORE() RADEON_CONTEXT(ctx)->swtcl.verts 1362dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define GET_VERTEX_SIZE() RADEON_CONTEXT(ctx)->swtcl.vertex_size * sizeof(GLuint) 1375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_HW_VIEWPORT 1 1395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Tiny vertices don't seem to work atm - haven't looked into why. 1405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 1415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_HW_DIVIDE (IND & ~(RADEON_XYZW_BIT|RADEON_RGBA_BIT)) 1425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TINY_VERTICES 1 1435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_RGBA_COLOR 1 1445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_NOTEX_VERTICES 1 1455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX0_VERTICES 1 1465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX1_VERTICES 1 1475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX2_VERTICES 0 1485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TEX3_VERTICES 0 1495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_PTEX_VERTICES 1 1505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CHECK_HW_DIVIDE (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE| \ 1525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul DD_TRI_UNFILLED))) 1535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INTERP_VERTEX setup_tab[RADEON_CONTEXT(ctx)->swtcl.SetupIndex].interp 1555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define COPY_PV_VERTEX setup_tab[RADEON_CONTEXT(ctx)->swtcl.SetupIndex].copy_pv 1565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 1595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Generate pv-copying and translation functions * 1605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 1615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x 1635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND ~0 1645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vb.c" 1655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef IND 1665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 1695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Generate vertex emit and interp functions * 1705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 1715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT) 1735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wg 1745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT) 1775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgt0 1785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_PTEX_BIT) 1815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgpt0 1825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT) 1855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgt0t1 1865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT|\ 1895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_PTEX_BIT) 1905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgpt0t1 1915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT) 1945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfs 1955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 1965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 1985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT) 1995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfst0 2005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 2035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT|RADEON_PTEX_BIT) 2045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfspt0 2055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 2085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT|RADEON_TEX1_BIT) 2095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfst0t1 2105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|\ 2135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX0_BIT|RADEON_TEX1_BIT|RADEON_PTEX_BIT) 2145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_wgfspt0t1 2155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_vbtmp.h" 2165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 2195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Initialization 2205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 2215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void init_setup_tab( void ) 2235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wg(); 2255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgt0(); 2265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgpt0(); 2275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgt0t1(); 2285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgpt0t1(); 2295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfs(); 2305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfst0(); 2315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfspt0(); 2325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfst0t1(); 2335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_wgfspt0t1(); 2345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonPrintSetupFlags(char *msg, GLuint flags ) 2395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "%s(%x): %s%s%s%s%s%s\n", 2415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul msg, 2425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (int)flags, 2435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_XYZW_BIT) ? " xyzw," : "", 2445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_RGBA_BIT) ? " rgba," : "", 2455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_SPEC_BIT) ? " spec/fog," : "", 2465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_TEX0_BIT) ? " tex-0," : "", 2475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_TEX1_BIT) ? " tex-1," : "", 2485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (flags & RADEON_PTEX_BIT) ? " proj-tex," : ""); 2495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderStart( GLcontext *ctx ) 2535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 2555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 2565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!setup_tab[rmesa->swtcl.SetupIndex].check_tex_sizes(ctx)) { 2585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint ind = rmesa->swtcl.SetupIndex |= (RADEON_PTEX_BIT|RADEON_RGBA_BIT); 2595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* Projective textures are handled nicely; just have to change 2615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * up to the new vertex format. 2625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (setup_tab[ind].vertex_format != rmesa->swtcl.vertex_format) { 2645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM(rmesa); 2655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format = setup_tab[ind].vertex_format; 2665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size = setup_tab[ind].vertex_size; 2675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { 2705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Interp = setup_tab[rmesa->swtcl.SetupIndex].interp; 2715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.CopyPV = setup_tab[rmesa->swtcl.SetupIndex].copy_pv; 2725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.flush != 0 && 2765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush != flush_last_swtcl_prim) 2775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.flush( rmesa ); 2785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonBuildVertices( GLcontext *ctx, GLuint start, GLuint count, 2825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint newinputs ) 2835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 2852dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell GLuint stride = rmesa->swtcl.vertex_size * sizeof(int); 2862dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell GLubyte *v = ((GLubyte *)rmesa->swtcl.verts + (start * stride)); 2875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul newinputs |= rmesa->swtcl.SetupNewInputs; 2895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.SetupNewInputs = 0; 2905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!newinputs) 2925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 2935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul setup_tab[rmesa->swtcl.SetupIndex].emit( ctx, start, count, v, stride ); 2955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 2965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonChooseVertexState( GLcontext *ctx ) 2985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); 3005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 3015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint ind = (RADEON_XYZW_BIT | RADEON_RGBA_BIT); 3025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->TclFallback || rmesa->Fallback) 3045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 3055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Fog.Enabled || (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)) 3075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ind |= RADEON_SPEC_BIT; 3085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->Texture._EnabledUnits & 0x2) 3105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* unit 1 enabled */ 3115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ind |= RADEON_TEX0_BIT|RADEON_TEX1_BIT; 3125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else if (ctx->Texture._EnabledUnits & 0x1) 3135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* unit 0 enabled */ 3145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ind |= RADEON_TEX0_BIT; 3155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.SetupIndex = ind; 3175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)) { 3195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Interp = radeon_interp_extras; 3205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.CopyPV = radeon_copy_pv_extras; 3215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 3235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Interp = setup_tab[ind].interp; 3245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.CopyPV = setup_tab[ind].copy_pv; 3255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (setup_tab[ind].vertex_format != rmesa->swtcl.vertex_format) { 3285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM(rmesa); 3295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format = setup_tab[ind].vertex_format; 3305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size = setup_tab[ind].vertex_size; 3315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 3345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint se_coord_fmt, needproj; 3355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* HW perspective divide is a win, but tiny vertex formats are a 3375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * bigger one. 3385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 3395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (setup_tab[ind].vertex_format == TINY_VERTEX_FORMAT || 3405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { 3415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul needproj = GL_TRUE; 3425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | 3435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_VTX_Z_PRE_MULT_1_OVER_W0 | 3445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX1_W_ROUTING_USE_Q1); 3455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 3475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul needproj = GL_FALSE; 3485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul se_coord_fmt = (RADEON_VTX_W0_IS_NOT_1_OVER_W0 | 3495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_TEX1_W_ROUTING_USE_Q1); 3505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT] ) { 3535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_STATECHANGE( rmesa, set ); 3545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt; 3555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _tnl_need_projected_coords( ctx, needproj ); 3575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 3595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Flush vertices in the current dma region. 3625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 3635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void flush_last_swtcl_prim( radeonContextPtr rmesa ) 3645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 3655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_IOCTL) 3665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "%s\n", __FUNCTION__); 3675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3682c28dd892cfb43445d7e54df8b6a8331192f4e99Brian Paul rmesa->dma.flush = NULL; 3695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.current.buf) { 3715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct radeon_dma_region *current = &rmesa->dma.current; 372bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl GLuint current_offset = (rmesa->radeonScreen->gart_buffer_offset + 3735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->buf->buf->idx * RADEON_BUFFER_SIZE + 3745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start); 3755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (!(rmesa->swtcl.hw_primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND)); 3775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (current->start + 3795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 3805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->ptr); 3815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->dma.current.start != rmesa->dma.current.ptr) { 3836f3cc6a5226fd4b5d44cca91e2f76216ecaff831Eric Anholt radeonEnsureCmdBufSpace( rmesa, VERT_AOS_BUFSZ + 3846f3cc6a5226fd4b5d44cca91e2f76216ecaff831Eric Anholt rmesa->hw.max_state_size + VBUF_BUFSZ ); 3855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonEmitVertexAOS( rmesa, 3865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size, 3875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current_offset); 3885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonEmitVbufPrim( rmesa, 3905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_format, 3915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive, 3925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts); 3935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts = 0; 3965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul current->start = current->ptr; 3975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 3995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Alloc space in the current dma region. 4025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void *radeonAllocDmaLowVerts( radeonContextPtr rmesa, 4045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int nverts, int vsize ) 4055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint bytes = vsize * nverts; 4075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( rmesa->dma.current.ptr + bytes > rmesa->dma.current.end ) 4095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRefillCurrentDmaRegion( rmesa ); 4105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->dma.flush) { 4125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; 413bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl rmesa->dma.flush = flush_last_swtcl_prim; 4145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert( vsize == rmesa->swtcl.vertex_size * 4 ); 417bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl assert( rmesa->dma.flush == flush_last_swtcl_prim ); 4185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert (rmesa->dma.current.start + 4195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == 4205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.current.ptr); 4215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 424bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl GLubyte *head = (GLubyte *)(rmesa->dma.current.address + rmesa->dma.current.ptr); 4255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->dma.current.ptr += bytes; 4265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.numverts += nverts; 4275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return head; 4285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4352dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwellstatic void *radeon_emit_contiguous_verts( GLcontext *ctx, 4362dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell GLuint start, 4372dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell GLuint count, 4382dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell void *dest) 4395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 4412dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell GLuint stride = rmesa->swtcl.vertex_size * 4; 4422dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell setup_tab[rmesa->swtcl.SetupIndex].emit( ctx, start, count, dest, stride ); 4432dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell return (void *)((char *)dest + stride * (count - start)); 4445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeon_emit_indexed_verts( GLcontext *ctx, GLuint start, GLuint count ) 4495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 4515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonAllocDmaRegionVerts( rmesa, 4535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul &rmesa->swtcl.indexed_verts, 4545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul count - start, 4555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size * 4, 4565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 64); 4575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul setup_tab[rmesa->swtcl.SetupIndex].emit( 4595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ctx, start, count, 4605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.indexed_verts.address + rmesa->swtcl.indexed_verts.start, 4615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.vertex_size * 4 ); 4625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 4665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Render unclipped vertex buffers by emitting vertices directly to 4675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * dma buffers. Use strip/fan hardware primitives where possible. 4685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Try to simulate missing primitives with indexed vertices. 4695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_POINTS 1 4715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_LINES 1 4725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_LINE_STRIPS 1 4735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRIANGLES 1 4745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_STRIPS 1 4755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_STRIP_1 0 4765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_TRI_FANS 1 4775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_QUADS 0 4785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_QUAD_STRIPS 0 4795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_POLYGONS 0 4805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_ELTS 1 4815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const GLuint hw_prim[GL_POLYGON+1] = { 4835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 4845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 4855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 4865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP, 4875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 4885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP, 4895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN, 4905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 4915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0, 4925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 0 4935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 4945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void radeonDmaPrimitive( radeonContextPtr rmesa, GLenum prim ) 4965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 4985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hw_prim[prim]; 4995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul assert(rmesa->dma.current.ptr == rmesa->dma.current.start); 5005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic __inline void radeonEltPrimitive( radeonContextPtr rmesa, GLenum prim ) 5035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 5055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hw_prim[prim] | RADEON_CP_VC_CNTL_PRIM_WALK_IND; 5065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 51138b317d508a2a3a4cc6d700ebca80c3b06c913e2Alan Hourihane#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx) 51238b317d508a2a3a4cc6d700ebca80c3b06c913e2Alan Hourihane#define ELTS_VARS( buf ) GLushort *dest = buf; (void)rmesa; 5135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INIT( prim ) radeonDmaPrimitive( rmesa, prim ) 5145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT_INIT(prim) radeonEltPrimitive( rmesa, prim ) 5152dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define FLUSH() RADEON_NEWPRIM( rmesa ) 5165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_CURRENT_VB_MAX_VERTS() \ 5175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (((int)rmesa->dma.current.end - (int)rmesa->dma.current.ptr) / (rmesa->swtcl.vertex_size*4)) 5185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_SUBSEQUENT_VB_MAX_VERTS() \ 5195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_BUFFER_SIZE) / (rmesa->swtcl.vertex_size*4)) 5205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#if RADEON_OLD_PACKETS 5225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul# define GET_CURRENT_VB_MAX_ELTS() \ 5235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_CMD_BUF_SZ - (rmesa->store.cmd_used + 24)) / 2) 5245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#else 5255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul# define GET_CURRENT_VB_MAX_ELTS() \ 5265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_CMD_BUF_SZ - (rmesa->store.cmd_used + 16)) / 2) 5275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif 5285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_SUBSEQUENT_VB_MAX_ELTS() \ 5295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((RADEON_CMD_BUF_SZ - 1024) / 2) 5305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5322dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwellstatic void *radeon_alloc_elts( radeonContextPtr rmesa, int nr ) 5332dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell{ 5342dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell if (rmesa->dma.flush == radeonFlushElts && 5352dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->store.cmd_used + nr*2 < RADEON_CMD_BUF_SZ) { 5365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5372dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->store.cmd_used += nr*2; 5382dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell 5392dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell return (void *)(rmesa->store.cmd_buf + rmesa->store.cmd_used); 5402dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell } 5412dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell else { 5422dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell if (rmesa->dma.flush) { 5432dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->dma.flush( rmesa ); 5442dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell } 5455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5462dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell radeonEmitVertexAOS( rmesa, 5472dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->swtcl.vertex_size, 5482dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell (rmesa->radeonScreen->gart_buffer_offset + 5492dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->swtcl.indexed_verts.buf->buf->idx * 5502dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell RADEON_BUFFER_SIZE + 5512dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->swtcl.indexed_verts.start)); 5522dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell 5532dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell return (void *) radeonAllocEltsOpenEnded( rmesa, 5542dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->swtcl.vertex_format, 5552dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell rmesa->swtcl.hw_primitive, 5562dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell nr ); 5572dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell } 5582dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell} 5592dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell 5602dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define ALLOC_ELTS(nr) radeon_alloc_elts(rmesa, nr) 5615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#ifdef MESA_BIG_ENDIAN 5635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */ 5645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_ELT(offset, x) do { \ 5655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 ); \ 5665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 ); \ 567025aa9efcd8213ce530818cfd8be1b6d9e945b2cAlan Hourihane (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x); \ 568025aa9efcd8213ce530818cfd8be1b6d9e945b2cAlan Hourihane (void)rmesa; } while (0) 5695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#else 570025aa9efcd8213ce530818cfd8be1b6d9e945b2cAlan Hourihane#define EMIT_ELT(offset, x) do { \ 571025aa9efcd8213ce530818cfd8be1b6d9e945b2cAlan Hourihane (dest)[offset] = (GLushort) (x); \ 572025aa9efcd8213ce530818cfd8be1b6d9e945b2cAlan Hourihane (void)rmesa; } while (0) 5735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif 5745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_TWO_ELTS(offset, x, y) *(GLuint *)(dest+offset) = ((y)<<16)|(x); 5755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INCR_ELTS( nr ) dest += nr 5762dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define ELTPTR dest 5775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RELEASE_ELT_VERTS() \ 5785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, __FUNCTION__ ) 5795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EMIT_INDEXED_VERTS( ctx, start, count ) \ 5805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_emit_indexed_verts( ctx, start, count ) 5815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5832dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define ALLOC_VERTS( nr ) \ 5842dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell radeonAllocDmaLowVerts( rmesa, nr, rmesa->swtcl.vertex_size * 4 ) 5852dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define EMIT_VERTS( ctx, j, nr, buf ) \ 5862dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell radeon_emit_contiguous_verts(ctx, j, (j)+(nr), buf) 5872dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell 5885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_dma_##x 5895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_dmatmp.h" 5905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 5935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Render pipeline stage */ 5945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 5955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean radeon_run_render( GLcontext *ctx, 59857c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell struct tnl_pipeline_stage *stage ) 5995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 6005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 6015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 6025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &tnl->vb; 6033d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_render_func *tab = TAG(render_tab_verts); 6048592ba94b85b3f0f93ae875eece259b4626a6759Keith Whitwell GLuint i; 6055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 606bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell if (rmesa->swtcl.indexed_verts.buf) 6075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RELEASE_ELT_VERTS(); 6085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6092dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell if (rmesa->swtcl.RenderIndex != 0 || 6102dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell !radeon_dma_validate_render( ctx, VB )) 6115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 6125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start( ctx ); 6145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (VB->Elts) { 6165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tab = TAG(render_tab_elts); 6172dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell if (!rmesa->swtcl.indexed_verts.buf) { 6182dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell if (VB->Count > GET_SUBSEQUENT_VB_MAX_VERTS()) 6192dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell return GL_TRUE; 6202dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell EMIT_INDEXED_VERTS(ctx, 0, VB->Count); 6212dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell } 6225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 6235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 62457c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell for (i = 0 ; i < VB->PrimitiveCount ; i++) 6255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul { 62657c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell GLuint prim = VB->Primitive[i].mode; 62757c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell GLuint start = VB->Primitive[i].start; 62857c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell GLuint length = VB->Primitive[i].count; 62957c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell 63057c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell if (!length) 63157c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell continue; 6325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_PRIMS) 6342dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell fprintf(stderr, "radeon_render.c: prim %s %d..%d\n", 63557c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), 63657c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell start, start+length); 6375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (length) 6398592ba94b85b3f0f93ae875eece259b4626a6759Keith Whitwell tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim ); 6405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 6415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish( ctx ); 6435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; /* finished the pipe */ 6455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 6465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 65057c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwellconst struct tnl_pipeline_stage _radeon_render_stage = 6515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 6525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "radeon render", 653bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 654bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 655bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 656bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 6575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_run_render /* run */ 6585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 6595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**************************************************************************/ 6625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Radeon texture rectangle expects coords in 0..1 range, not 0..dimension 6645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * as in the extension spec. Need to translate here. 6655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * 6665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Note that swrast expects 0..dimension, so if a fallback is active, 6675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * don't do anything. (Maybe need to configure swrast to match hw) 6685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 6695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct texrect_stage_data { 6705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLvector4f texcoord[MAX_TEXTURE_UNITS]; 6715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 6725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEXRECT_STAGE_DATA(stage) ((struct texrect_stage_data *)stage->privatePtr) 6745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean run_texrect_stage( GLcontext *ctx, 67757c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell struct tnl_pipeline_stage *stage ) 6785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 6795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 6805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 6815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 6825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &tnl->vb; 6835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 6845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->Fallback) 6865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 6875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) { 689bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell if (ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_RECT_BIT) { 6905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct gl_texture_object *texObj = ctx->Texture.Unit[i].CurrentRect; 69118fa367ac6e035341f5eb86ecc4231124b2921e3Keith Whitwell struct gl_texture_image *texImage = texObj->Image[0][texObj->BaseLevel]; 6925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLfloat iw = 1.0/texImage->Width; 6935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLfloat ih = 1.0/texImage->Height; 6945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data; 6955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLint instride = VB->TexCoordPtr[i]->stride; 6965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLfloat (*out)[4] = store->texcoord[i].data; 6975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLint j; 6985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (j = 0 ; j < VB->Count ; j++) { 7005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul out[j][0] = in[0] * iw; 7015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul out[j][1] = in[1] * ih; 7025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul in = (GLfloat *)((GLubyte *)in + instride); 7035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 7045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 705bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell VB->TexCoordPtr[i] = &store->texcoord[i]; 706bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell } 7075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 7085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 7105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Called the first time stage->run() is invoked. 7145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 7155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean alloc_texrect_data( GLcontext *ctx, 71657c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell struct tnl_pipeline_stage *stage ) 7175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; 7195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store; 7205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 7215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul stage->privatePtr = CALLOC(sizeof(*store)); 7235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul store = TEXRECT_STAGE_DATA(stage); 7245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!store) 7255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; 7265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < ctx->Const.MaxTextureUnits ; i++) 7285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_vector4f_alloc( &store->texcoord[i], 0, VB->Size, 32 ); 7295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 730bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell return GL_TRUE; 7315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 73357c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwellstatic void free_texrect_data( struct tnl_pipeline_stage *stage ) 7345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul struct texrect_stage_data *store = TEXRECT_STAGE_DATA(stage); 7365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint i; 7375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (store) { 7395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for (i = 0 ; i < MAX_TEXTURE_UNITS ; i++) 7405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (store->texcoord[i].data) 7415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_vector4f_free( &store->texcoord[i] ); 7425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( store ); 7432c28dd892cfb43445d7e54df8b6a8331192f4e99Brian Paul stage->privatePtr = NULL; 7445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 7455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 74757c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwellconst struct tnl_pipeline_stage _radeon_texrect_stage = 7485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "radeon texrect stage", /* name */ 750bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 751bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell alloc_texrect_data, 752bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell free_texrect_data, 753bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell NULL, 754bf87f864934e174b3493592d5d107f012aac0842Keith Whitwell run_texrect_stage 7555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 7565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**************************************************************************/ 7595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const GLuint reduced_hw_prim[GL_POLYGON+1] = { 7625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_POINT, 7635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 7645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 7655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_LINE, 7665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 7675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 7685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 7695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 7705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST, 7715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST 7725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 7735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ); 7755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ); 7765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonResetLineStipple( GLcontext *ctx ); 7775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 7805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Emit primitives as inline vertices * 7815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 7825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 7842dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#undef ALLOC_VERTS 7855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_ARG radeonContextPtr rmesa 7865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_ARG2 rmesa 7875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GET_VERTEX_DWORDS() rmesa->swtcl.vertex_size 7885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ALLOC_VERTS( n, size ) radeonAllocDmaLowVerts( rmesa, n, size * 4 ) 7895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 7905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS \ 7915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 7925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const char *radeonverts = (char *)rmesa->swtcl.verts; 7932dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define VERT(x) (radeonVertex *)(radeonverts + (x * vertsize * sizeof(int))) 7945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERTEX radeonVertex 7955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 7965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x 7975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_triemit.h" 7985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 8015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Macros for t_dd_tritmp.h to draw basic primitives * 8025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 8035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define QUAD( a, b, c, d ) radeon_quad( rmesa, a, b, c, d ) 8055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TRI( a, b, c ) radeon_triangle( rmesa, a, b, c ) 8065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LINE( a, b ) radeon_line( rmesa, a, b ) 8075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define POINT( a ) radeon_point( rmesa, a ) 8085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 8105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Build render functions from dd templates * 8115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 8125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_TWOSIDE_BIT 0x01 8145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_UNFILLED_BIT 0x02 8155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_MAX_TRIFUNC 0x08 8165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic struct { 8193d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_points_func points; 8203d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_line_func line; 8213d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_triangle_func triangle; 8223d38361b718d490e1e7fda64519952ec887cd149Keith Whitwell tnl_quad_func quad; 8235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} rast_tab[RADEON_MAX_TRIFUNC]; 8245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FALLBACK 0 827bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl#define DO_OFFSET 0 8285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_UNFILLED (IND & RADEON_UNFILLED_BIT) 8295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TWOSIDE (IND & RADEON_TWOSIDE_BIT) 8305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FLAT 0 8315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_TRI 1 8325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_QUAD 1 8335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_LINE 1 8345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_POINTS 1 8355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_FULL_QUAD 1 8365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_RGBA 1 8385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_SPEC 1 8395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_BACK_COLORS 0 8405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define HAVE_HW_FLATSHADE 1 8415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAB rast_tab 8425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DEPTH_SCALE 1.0 8445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UNFILLED_TRI unfilled_tri 8455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UNFILLED_QUAD unfilled_quad 8465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_X(_v) _v->v.x 8475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_Y(_v) _v->v.y 8485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_Z(_v) _v->v.z 8495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define AREA_IS_CCW( a ) (a < 0) 8502dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define GET_VERTEX(e) (rmesa->swtcl.verts + (e * rmesa->swtcl.vertex_size * sizeof(int))) 8515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 852c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_SET_RGBA( v, c ) \ 853c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwelldo { \ 854c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell radeon_color_t *color = (radeon_color_t *)&((v)->ui[coloroffset]); \ 855c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->red, (c)[0]); \ 856c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->green, (c)[1]); \ 857c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->blue, (c)[2]); \ 858c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(color->alpha, (c)[3]); \ 859c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell} while (0) 860c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell 8615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset] 862c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell 863c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_SET_SPEC( v0, c ) \ 864c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwelldo { \ 865c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell if (havespec) { \ 866c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.red, (c)[0]); \ 867c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.green, (c)[1]); \ 868c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.blue, (c)[2]); \ 869c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell } \ 870c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell} while (0) 871c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_COPY_SPEC( v0, v1 ) \ 872c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwelldo { \ 873c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell if (havespec) { \ 874c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell v0->v.specular.red = v1->v.specular.red; \ 875c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell v0->v.specular.green = v1->v.specular.green; \ 876c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell v0->v.specular.blue = v1->v.specular.blue; \ 877c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell } \ 878c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell} while (0) 879c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell 880c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell/* These don't need LE32_TO_CPU() as they used to save and restore 881c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell * colors which are already in the correct format. 882c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell */ 883c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_SAVE_RGBA( idx ) color[idx] = v[idx]->ui[coloroffset] 884c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_RESTORE_RGBA( idx ) v[idx]->ui[coloroffset] = color[idx] 885c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_SAVE_SPEC( idx ) if (havespec) spec[idx] = v[idx]->ui[5] 886c4f7de5d785266237fd46ee420d4715771f67dfbKeith Whitwell#define VERT_RESTORE_SPEC( idx ) if (havespec) v[idx]->ui[5] = spec[idx] 8875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 8895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 8905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef INIT 8915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS(n) \ 8935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 8945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint color[n], spec[n]; \ 8955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint coloroffset = (rmesa->swtcl.vertex_size == 4 ? 3 : 4); \ 8965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLboolean havespec = (rmesa->swtcl.vertex_size > 4); \ 8975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (void) color; (void) spec; (void) coloroffset; (void) havespec; 8985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 9005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Helpers for rendering unfilled primitives * 9015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 9025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RASTERIZE(x) radeonRasterPrimitive( ctx, reduced_hw_prim[x] ) 9045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_PRIMITIVE rmesa->swtcl.render_primitive 9055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 9065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x 9075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_unfilled.h" 9085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef IND 9095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*********************************************************************** 9125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Generate GL render functions * 9135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ***********************************************************************/ 9145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (0) 9175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x 9185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 9195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT) 9215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside 9225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 9235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_UNFILLED_BIT) 9255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_unfilled 9265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 9275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT) 9295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) x##_twoside_unfilled 9305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl_dd/t_dd_tritmp.h" 9315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void init_rast_tab( void ) 9345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 9355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init(); 9365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside(); 9375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_unfilled(); 9385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_twoside_unfilled(); 9395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 9405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 9425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Render unclipped begin/end objects */ 9435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 9445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9452dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell#define VERT(x) (radeonVertex *)(radeonverts + (x * vertsize * sizeof(int))) 9465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_POINTS( start, count ) \ 9475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul for ( ; start < count ; start++) \ 9485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_point( rmesa, VERT(start) ) 9495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_LINE( v0, v1 ) \ 9505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_line( rmesa, VERT(v0), VERT(v1) ) 9515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_TRI( v0, v1, v2 ) \ 9525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_triangle( rmesa, VERT(v0), VERT(v1), VERT(v2) ) 9535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RENDER_QUAD( v0, v1, v2, v3 ) \ 9545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeon_quad( rmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) ) 9555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef INIT 9565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define INIT(x) do { \ 9575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRenderPrimitive( ctx, x ); \ 9585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} while (0) 9595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef LOCAL_VARS 9605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LOCAL_VARS \ 9615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ 9622dc621f3fdb585f23013aa3e220f2148f9405538Keith Whitwell const GLuint vertsize = rmesa->swtcl.vertex_size; \ 9635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const char *radeonverts = (char *)rmesa->swtcl.verts; \ 9645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \ 9655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLboolean stipple = ctx->Line.StippleFlag; \ 9665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (void) elt; (void) stipple; 9675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RESET_STIPPLE if ( stipple ) radeonResetLineStipple( ctx ); 9685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RESET_OCCLUSION 9695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PRESERVE_VB_DEFS 9705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT(x) (x) 9715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x##_verts 9725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_vb_rendertmp.h" 9735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef ELT 9745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#undef TAG 9755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TAG(x) radeon_##x##_elts 9765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ELT(x) elt[x] 9775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "tnl/t_vb_rendertmp.h" 9785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 9825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Choose render functions */ 9835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 9845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonChooseRenderState( GLcontext *ctx ) 9865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 9875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 9885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 9895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint index = 0; 9905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint flags = ctx->_TriangleCaps; 9915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!rmesa->TclFallback || rmesa->Fallback) 9935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 9945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & DD_TRI_LIGHT_TWOSIDE) index |= RADEON_TWOSIDE_BIT; 9965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & DD_TRI_UNFILLED) index |= RADEON_UNFILLED_BIT; 9975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 9985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (index != rmesa->swtcl.RenderIndex) { 9995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Points = rast_tab[index].points; 10005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Line = rast_tab[index].line; 10015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedLine = rast_tab[index].line; 10025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Triangle = rast_tab[index].triangle; 10035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Quad = rast_tab[index].quad; 10045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (index == 0) { 10065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabVerts = radeon_render_tab_verts; 10075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabElts = radeon_render_tab_elts; 10085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedPolygon = radeon_fast_clipped_poly; 10095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } else { 10105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts; 10115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts; 10125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ClippedPolygon = _tnl_RenderClippedPolygon; 10135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 10145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = index; 10165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 10175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 10185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 10215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* High level hooks for t_vb_render.c */ 10225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 10235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim ) 10265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 10275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 10285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.hw_primitive != hwprim) { 10305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( rmesa ); 10315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = hwprim; 10325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 10335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 10345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderPrimitive( GLcontext *ctx, GLenum prim ) 10365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 10375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 10385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.render_primitive = prim; 10395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (prim < GL_TRIANGLES || !(ctx->_TriangleCaps & DD_TRI_UNFILLED)) 10405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRasterPrimitive( ctx, reduced_hw_prim[prim] ); 10415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 10425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonRenderFinish( GLcontext *ctx ) 10445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 10455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 10465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void radeonResetLineStipple( GLcontext *ctx ) 10485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 10495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 10505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_STATECHANGE( rmesa, lin ); 10515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 10525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 10555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Transition to/from hardware rasterization. */ 10565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 10575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const char * const fallbackStrings[] = { 10595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "Texture mode", 10605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glDrawBuffer(GL_FRONT_AND_BACK)", 10615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glEnable(GL_STENCIL) without hw stencil buffer", 10625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glRenderMode(selection or feedback)", 10635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glBlendEquation", 10645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "glBlendFunc", 10655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "RADEON_NO_RAST", 10665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul "Mixing GL_CLAMP_TO_BORDER and GL_CLAMP (or GL_MIRROR_CLAMP_ATI)" 10675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 10685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic const char *getFallbackString(GLuint bit) 10715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 10725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int i = 0; 10735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul while (bit > 1) { 10745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul i++; 10755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit >>= 1; 10765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 10775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return fallbackStrings[i]; 10785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 10795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode ) 10825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 10835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 10845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 10855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint oldfallback = rmesa->Fallback; 10865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 10875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (mode) { 10885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->Fallback |= bit; 10895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (oldfallback == 0) { 10905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_FIREVERTICES( rmesa ); 10915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_TRUE ); 10925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _swsetup_Wakeup( ctx ); 10935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _tnl_need_projected_coords( ctx, GL_TRUE ); 10945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = ~0; 10955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_FALLBACKS) { 10965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "Radeon begin rasterization fallback: 0x%x %s\n", 10975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit, getFallbackString(bit)); 10985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 10995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 11025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->Fallback &= ~bit; 11035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (oldfallback == bit) { 11045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _swrast_flush( ctx ); 11055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start = radeonRenderStart; 11065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 11075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish = radeonRenderFinish; 11085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.BuildVertices = radeonBuildVertices; 11095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 11105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_FALSE ); 11115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->TclFallback) { 11125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* These are already done if rmesa->TclFallback goes to 11135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * zero above. But not if it doesn't (RADEON_NO_TCL for 11145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * example?) 11155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 11165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonChooseVertexState( ctx ); 11175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonChooseRenderState( ctx ); 11185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (RADEON_DEBUG & DEBUG_FALLBACKS) { 11205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "Radeon end rasterization fallback: 0x%x %s\n", 11215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul bit, getFallbackString(bit)); 11225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonFlushVertices( GLcontext *ctx, GLuint flags ) 11295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 113057c9814b9e87924696df4c741861c29d4236d1ebKeith Whitwell _tnl_FlushVertices( ctx, flags ); 11315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (flags & FLUSH_STORED_VERTICES) 11335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEON_NEWPRIM( RADEON_CONTEXT( ctx ) ); 11345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 11375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Initialization. */ 11385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**********************************************************************/ 11395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonInitSwtcl( GLcontext *ctx ) 11415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 11425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul TNLcontext *tnl = TNL_CONTEXT(ctx); 11435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 11445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLuint size = TNL_CONTEXT(ctx)->vb.Size; 11455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul static int firsttime = 1; 11465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (firsttime) { 11485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_rast_tab(); 11495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul init_setup_tab(); 11505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul firsttime = 0; 11515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Start = radeonRenderStart; 11545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.Finish = radeonRenderFinish; 11555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive; 11565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple; 11575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul tnl->Driver.Render.BuildVertices = radeonBuildVertices; 11585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1159bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl rmesa->swtcl.verts = (GLubyte *)ALIGN_MALLOC( size * 16 * 4, 32 ); 11605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.RenderIndex = ~0; 11615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.render_primitive = GL_TRIANGLES; 11625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa->swtcl.hw_primitive = 0; 11635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 11645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonDestroySwtcl( GLcontext *ctx ) 11675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 11685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 11695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.indexed_verts.buf) 11715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, 11725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __FUNCTION__ ); 11735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (rmesa->swtcl.verts) { 11755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ALIGN_FREE(rmesa->swtcl.verts); 11762c28dd892cfb43445d7e54df8b6a8331192f4e99Brian Paul rmesa->swtcl.verts = NULL; 11775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 11785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 11795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 1180