radeon_texture.c revision 2730ee75c73e79f4196d6df5540da7063a96c25e
1/* 2 * Copyright (C) 2008 Nicolai Haehnle. 3 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 4 * 5 * The Weather Channel (TM) funded Tungsten Graphics to develop the 6 * initial release of the Radeon 8500 driver under the XFree86 license. 7 * This notice must be preserved. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining 10 * a copy of this software and associated documentation files (the 11 * "Software"), to deal in the Software without restriction, including 12 * without limitation the rights to use, copy, modify, merge, publish, 13 * distribute, sublicense, and/or sell copies of the Software, and to 14 * permit persons to whom the Software is furnished to do so, subject to 15 * the following conditions: 16 * 17 * The above copyright notice and this permission notice (including the 18 * next paragraph) shall be included in all copies or substantial 19 * portions of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 24 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 25 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 26 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 27 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 28 * 29 */ 30 31#include "main/glheader.h" 32#include "main/imports.h" 33#include "main/context.h" 34#include "main/convolve.h" 35#include "main/mipmap.h" 36#include "main/texcompress.h" 37#include "main/texformat.h" 38#include "main/texstore.h" 39#include "main/teximage.h" 40#include "main/texobj.h" 41#include "main/texgetimage.h" 42 43#include "xmlpool.h" /* for symbolic values of enum-type options */ 44 45#include "radeon_common.h" 46 47#include "radeon_mipmap_tree.h" 48 49 50static void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride, 51 GLuint numrows, GLuint rowsize) 52{ 53 assert(rowsize <= dststride); 54 assert(rowsize <= srcstride); 55 56 if (rowsize == srcstride && rowsize == dststride) { 57 memcpy(dst, src, numrows*rowsize); 58 } else { 59 GLuint i; 60 for(i = 0; i < numrows; ++i) { 61 memcpy(dst, src, rowsize); 62 dst += dststride; 63 src += srcstride; 64 } 65 } 66} 67 68/* textures */ 69/** 70 * Allocate an empty texture image object. 71 */ 72struct gl_texture_image *radeonNewTextureImage(GLcontext *ctx) 73{ 74 return CALLOC(sizeof(radeon_texture_image)); 75} 76 77/** 78 * Free memory associated with this texture image. 79 */ 80void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage) 81{ 82 radeon_texture_image* image = get_radeon_texture_image(timage); 83 84 if (image->mt) { 85 radeon_miptree_unreference(image->mt); 86 image->mt = 0; 87 assert(!image->base.Data); 88 } else { 89 _mesa_free_texture_image_data(ctx, timage); 90 } 91 if (image->bo) { 92 radeon_bo_unref(image->bo); 93 image->bo = NULL; 94 } 95 if (timage->Data) { 96 _mesa_free_texmemory(timage->Data); 97 timage->Data = NULL; 98 } 99} 100 101/* Set Data pointer and additional data for mapped texture image */ 102static void teximage_set_map_data(radeon_texture_image *image) 103{ 104 radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel]; 105 106 image->base.Data = image->mt->bo->ptr + lvl->faces[image->mtface].offset; 107 image->base.RowStride = lvl->rowstride / image->mt->bpp; 108} 109 110 111/** 112 * Map a single texture image for glTexImage and friends. 113 */ 114void radeon_teximage_map(radeon_texture_image *image, GLboolean write_enable) 115{ 116 if (image->mt) { 117 assert(!image->base.Data); 118 119 radeon_bo_map(image->mt->bo, write_enable); 120 teximage_set_map_data(image); 121 } 122} 123 124 125void radeon_teximage_unmap(radeon_texture_image *image) 126{ 127 if (image->mt) { 128 assert(image->base.Data); 129 130 image->base.Data = 0; 131 radeon_bo_unmap(image->mt->bo); 132 } 133} 134 135static void map_override(GLcontext *ctx, radeonTexObj *t) 136{ 137 radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]); 138 139 radeon_bo_map(t->bo, GL_FALSE); 140 141 img->base.Data = t->bo->ptr; 142 _mesa_set_fetch_functions(&img->base, 2); 143} 144 145static void unmap_override(GLcontext *ctx, radeonTexObj *t) 146{ 147 radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]); 148 149 radeon_bo_unmap(t->bo); 150 151 img->base.Data = NULL; 152} 153 154/** 155 * Map a validated texture for reading during software rendering. 156 */ 157void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj) 158{ 159 radeonTexObj* t = radeon_tex_obj(texObj); 160 int face, level; 161 162 if (!radeon_validate_texture_miptree(ctx, texObj)) 163 return; 164 165 /* for r100 3D sw fallbacks don't have mt */ 166 if (t->image_override && t->bo) 167 map_override(ctx, t); 168 169 if (!t->mt) 170 return; 171 172 radeon_bo_map(t->mt->bo, GL_FALSE); 173 for(face = 0; face < t->mt->faces; ++face) { 174 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level) 175 teximage_set_map_data(get_radeon_texture_image(texObj->Image[face][level])); 176 } 177} 178 179void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj) 180{ 181 radeonTexObj* t = radeon_tex_obj(texObj); 182 int face, level; 183 184 if (t->image_override && t->bo) 185 unmap_override(ctx, t); 186 /* for r100 3D sw fallbacks don't have mt */ 187 if (!t->mt) 188 return; 189 190 for(face = 0; face < t->mt->faces; ++face) { 191 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level) 192 texObj->Image[face][level]->Data = 0; 193 } 194 radeon_bo_unmap(t->mt->bo); 195} 196 197GLuint radeon_face_for_target(GLenum target) 198{ 199 switch (target) { 200 case GL_TEXTURE_CUBE_MAP_POSITIVE_X: 201 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: 202 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: 203 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: 204 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: 205 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: 206 return (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X; 207 default: 208 return 0; 209 } 210} 211 212/** 213 * Wraps Mesa's implementation to ensure that the base level image is mapped. 214 * 215 * This relies on internal details of _mesa_generate_mipmap, in particular 216 * the fact that the memory for recreated texture images is always freed. 217 */ 218static void radeon_generate_mipmap(GLcontext *ctx, GLenum target, 219 struct gl_texture_object *texObj) 220{ 221 radeonTexObj* t = radeon_tex_obj(texObj); 222 GLuint nr_faces = (t->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1; 223 int i, face; 224 225 226 _mesa_generate_mipmap(ctx, target, texObj); 227 228 for (face = 0; face < nr_faces; face++) { 229 for (i = texObj->BaseLevel + 1; i < texObj->MaxLevel; i++) { 230 radeon_texture_image *image; 231 232 image = get_radeon_texture_image(texObj->Image[face][i]); 233 234 if (image == NULL) 235 break; 236 237 image->mtlevel = i; 238 image->mtface = face; 239 240 radeon_miptree_unreference(image->mt); 241 image->mt = NULL; 242 } 243 } 244 245} 246 247void radeonGenerateMipmap(GLcontext* ctx, GLenum target, struct gl_texture_object *texObj) 248{ 249 GLuint face = radeon_face_for_target(target); 250 radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[face][texObj->BaseLevel]); 251 252 radeon_teximage_map(baseimage, GL_FALSE); 253 radeon_generate_mipmap(ctx, target, texObj); 254 radeon_teximage_unmap(baseimage); 255} 256 257 258/* try to find a format which will only need a memcopy */ 259static const struct gl_texture_format *radeonChoose8888TexFormat(radeonContextPtr rmesa, 260 GLenum srcFormat, 261 GLenum srcType, GLboolean fbo) 262{ 263 const GLuint ui = 1; 264 const GLubyte littleEndian = *((const GLubyte *)&ui); 265 266 /* r100 can only do this */ 267 if (IS_R100_CLASS(rmesa->radeonScreen) || fbo) 268 return _dri_texformat_argb8888; 269 270 if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8) || 271 (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && !littleEndian) || 272 (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) || 273 (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && littleEndian)) { 274 return &_mesa_texformat_rgba8888; 275 } else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) || 276 (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && littleEndian) || 277 (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8) || 278 (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && !littleEndian)) { 279 return &_mesa_texformat_rgba8888_rev; 280 } else if (IS_R200_CLASS(rmesa->radeonScreen)) { 281 return _dri_texformat_argb8888; 282 } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && !littleEndian) || 283 srcType == GL_UNSIGNED_INT_8_8_8_8)) { 284 return &_mesa_texformat_argb8888_rev; 285 } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && littleEndian) || 286 srcType == GL_UNSIGNED_INT_8_8_8_8_REV)) { 287 return &_mesa_texformat_argb8888; 288 } else 289 return _dri_texformat_argb8888; 290} 291 292const struct gl_texture_format *radeonChooseTextureFormat_mesa(GLcontext * ctx, 293 GLint internalFormat, 294 GLenum format, 295 GLenum type) 296{ 297 return radeonChooseTextureFormat(ctx, internalFormat, format, 298 type, 0); 299} 300 301const struct gl_texture_format *radeonChooseTextureFormat(GLcontext * ctx, 302 GLint internalFormat, 303 GLenum format, 304 GLenum type, GLboolean fbo) 305{ 306 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 307 const GLboolean do32bpt = 308 (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_32); 309 const GLboolean force16bpt = 310 (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FORCE_16); 311 (void)format; 312 313#if 0 314 fprintf(stderr, "InternalFormat=%s(%d) type=%s format=%s\n", 315 _mesa_lookup_enum_by_nr(internalFormat), internalFormat, 316 _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format)); 317 fprintf(stderr, "do32bpt=%d force16bpt=%d\n", do32bpt, force16bpt); 318#endif 319 320 switch (internalFormat) { 321 case 4: 322 case GL_RGBA: 323 case GL_COMPRESSED_RGBA: 324 switch (type) { 325 case GL_UNSIGNED_INT_10_10_10_2: 326 case GL_UNSIGNED_INT_2_10_10_10_REV: 327 return do32bpt ? _dri_texformat_argb8888 : 328 _dri_texformat_argb1555; 329 case GL_UNSIGNED_SHORT_4_4_4_4: 330 case GL_UNSIGNED_SHORT_4_4_4_4_REV: 331 return _dri_texformat_argb4444; 332 case GL_UNSIGNED_SHORT_5_5_5_1: 333 case GL_UNSIGNED_SHORT_1_5_5_5_REV: 334 return _dri_texformat_argb1555; 335 default: 336 return do32bpt ? radeonChoose8888TexFormat(rmesa, format, type, fbo) : 337 _dri_texformat_argb4444; 338 } 339 340 case 3: 341 case GL_RGB: 342 case GL_COMPRESSED_RGB: 343 switch (type) { 344 case GL_UNSIGNED_SHORT_4_4_4_4: 345 case GL_UNSIGNED_SHORT_4_4_4_4_REV: 346 return _dri_texformat_argb4444; 347 case GL_UNSIGNED_SHORT_5_5_5_1: 348 case GL_UNSIGNED_SHORT_1_5_5_5_REV: 349 return _dri_texformat_argb1555; 350 case GL_UNSIGNED_SHORT_5_6_5: 351 case GL_UNSIGNED_SHORT_5_6_5_REV: 352 return _dri_texformat_rgb565; 353 default: 354 return do32bpt ? _dri_texformat_argb8888 : 355 _dri_texformat_rgb565; 356 } 357 358 case GL_RGBA8: 359 case GL_RGB10_A2: 360 case GL_RGBA12: 361 case GL_RGBA16: 362 return !force16bpt ? 363 radeonChoose8888TexFormat(rmesa, format, type, fbo) : 364 _dri_texformat_argb4444; 365 366 case GL_RGBA4: 367 case GL_RGBA2: 368 return _dri_texformat_argb4444; 369 370 case GL_RGB5_A1: 371 return _dri_texformat_argb1555; 372 373 case GL_RGB8: 374 case GL_RGB10: 375 case GL_RGB12: 376 case GL_RGB16: 377 return !force16bpt ? _dri_texformat_argb8888 : 378 _dri_texformat_rgb565; 379 380 case GL_RGB5: 381 case GL_RGB4: 382 case GL_R3_G3_B2: 383 return _dri_texformat_rgb565; 384 385 case GL_ALPHA: 386 case GL_ALPHA4: 387 case GL_ALPHA8: 388 case GL_ALPHA12: 389 case GL_ALPHA16: 390 case GL_COMPRESSED_ALPHA: 391 /* r200: can't use a8 format since interpreting hw I8 as a8 would result 392 in wrong rgb values (same as alpha value instead of 0). */ 393 if (IS_R200_CLASS(rmesa->radeonScreen)) 394 return _dri_texformat_al88; 395 else 396 return _dri_texformat_a8; 397 case 1: 398 case GL_LUMINANCE: 399 case GL_LUMINANCE4: 400 case GL_LUMINANCE8: 401 case GL_LUMINANCE12: 402 case GL_LUMINANCE16: 403 case GL_COMPRESSED_LUMINANCE: 404 return _dri_texformat_l8; 405 406 case 2: 407 case GL_LUMINANCE_ALPHA: 408 case GL_LUMINANCE4_ALPHA4: 409 case GL_LUMINANCE6_ALPHA2: 410 case GL_LUMINANCE8_ALPHA8: 411 case GL_LUMINANCE12_ALPHA4: 412 case GL_LUMINANCE12_ALPHA12: 413 case GL_LUMINANCE16_ALPHA16: 414 case GL_COMPRESSED_LUMINANCE_ALPHA: 415 return _dri_texformat_al88; 416 417 case GL_INTENSITY: 418 case GL_INTENSITY4: 419 case GL_INTENSITY8: 420 case GL_INTENSITY12: 421 case GL_INTENSITY16: 422 case GL_COMPRESSED_INTENSITY: 423 return _dri_texformat_i8; 424 425 case GL_YCBCR_MESA: 426 if (type == GL_UNSIGNED_SHORT_8_8_APPLE || 427 type == GL_UNSIGNED_BYTE) 428 return &_mesa_texformat_ycbcr; 429 else 430 return &_mesa_texformat_ycbcr_rev; 431 432 case GL_RGB_S3TC: 433 case GL_RGB4_S3TC: 434 case GL_COMPRESSED_RGB_S3TC_DXT1_EXT: 435 return &_mesa_texformat_rgb_dxt1; 436 437 case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT: 438 return &_mesa_texformat_rgba_dxt1; 439 440 case GL_RGBA_S3TC: 441 case GL_RGBA4_S3TC: 442 case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT: 443 return &_mesa_texformat_rgba_dxt3; 444 445 case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT: 446 return &_mesa_texformat_rgba_dxt5; 447 448 case GL_ALPHA16F_ARB: 449 return &_mesa_texformat_alpha_float16; 450 case GL_ALPHA32F_ARB: 451 return &_mesa_texformat_alpha_float32; 452 case GL_LUMINANCE16F_ARB: 453 return &_mesa_texformat_luminance_float16; 454 case GL_LUMINANCE32F_ARB: 455 return &_mesa_texformat_luminance_float32; 456 case GL_LUMINANCE_ALPHA16F_ARB: 457 return &_mesa_texformat_luminance_alpha_float16; 458 case GL_LUMINANCE_ALPHA32F_ARB: 459 return &_mesa_texformat_luminance_alpha_float32; 460 case GL_INTENSITY16F_ARB: 461 return &_mesa_texformat_intensity_float16; 462 case GL_INTENSITY32F_ARB: 463 return &_mesa_texformat_intensity_float32; 464 case GL_RGB16F_ARB: 465 return &_mesa_texformat_rgba_float16; 466 case GL_RGB32F_ARB: 467 return &_mesa_texformat_rgba_float32; 468 case GL_RGBA16F_ARB: 469 return &_mesa_texformat_rgba_float16; 470 case GL_RGBA32F_ARB: 471 return &_mesa_texformat_rgba_float32; 472 473 case GL_DEPTH_COMPONENT: 474 case GL_DEPTH_COMPONENT16: 475 case GL_DEPTH_COMPONENT24: 476 case GL_DEPTH_COMPONENT32: 477 case GL_DEPTH_STENCIL_EXT: 478 case GL_DEPTH24_STENCIL8_EXT: 479 return &_mesa_texformat_s8_z24; 480 481 /* EXT_texture_sRGB */ 482 case GL_SRGB: 483 case GL_SRGB8: 484 case GL_SRGB_ALPHA: 485 case GL_SRGB8_ALPHA8: 486 case GL_COMPRESSED_SRGB: 487 case GL_COMPRESSED_SRGB_ALPHA: 488 return &_mesa_texformat_srgba8; 489 490 case GL_SLUMINANCE: 491 case GL_SLUMINANCE8: 492 case GL_COMPRESSED_SLUMINANCE: 493 return &_mesa_texformat_sl8; 494 495 case GL_SLUMINANCE_ALPHA: 496 case GL_SLUMINANCE8_ALPHA8: 497 case GL_COMPRESSED_SLUMINANCE_ALPHA: 498 return &_mesa_texformat_sla8; 499 500 default: 501 _mesa_problem(ctx, 502 "unexpected internalFormat 0x%x in %s", 503 (int)internalFormat, __func__); 504 return NULL; 505 } 506 507 return NULL; /* never get here */ 508} 509 510/** 511 * All glTexImage calls go through this function. 512 */ 513static void radeon_teximage( 514 GLcontext *ctx, int dims, 515 GLenum target, GLint level, 516 GLint internalFormat, 517 GLint width, GLint height, GLint depth, 518 GLsizei imageSize, 519 GLenum format, GLenum type, const GLvoid * pixels, 520 const struct gl_pixelstore_attrib *packing, 521 struct gl_texture_object *texObj, 522 struct gl_texture_image *texImage, 523 int compressed) 524{ 525 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 526 radeonTexObj* t = radeon_tex_obj(texObj); 527 radeon_texture_image* image = get_radeon_texture_image(texImage); 528 GLuint dstRowStride; 529 GLint postConvWidth = width; 530 GLint postConvHeight = height; 531 GLuint texelBytes; 532 GLuint face = radeon_face_for_target(target); 533 534 radeon_firevertices(rmesa); 535 536 t->validated = GL_FALSE; 537 538 if (ctx->_ImageTransferState & IMAGE_CONVOLUTION_BIT) { 539 _mesa_adjust_image_for_convolution(ctx, dims, &postConvWidth, 540 &postConvHeight); 541 } 542 543 /* Choose and fill in the texture format for this image */ 544 texImage->TexFormat = radeonChooseTextureFormat(ctx, internalFormat, format, type, 0); 545 _mesa_set_fetch_functions(texImage, dims); 546 547 if (texImage->TexFormat->TexelBytes == 0) { 548 texelBytes = 0; 549 texImage->IsCompressed = GL_TRUE; 550 texImage->CompressedSize = 551 ctx->Driver.CompressedTextureSize(ctx, texImage->Width, 552 texImage->Height, texImage->Depth, 553 texImage->TexFormat->MesaFormat); 554 } else { 555 texImage->IsCompressed = GL_FALSE; 556 texImage->CompressedSize = 0; 557 558 texelBytes = texImage->TexFormat->TexelBytes; 559 /* Minimum pitch of 32 bytes */ 560 if (postConvWidth * texelBytes < 32) { 561 postConvWidth = 32 / texelBytes; 562 texImage->RowStride = postConvWidth; 563 } 564 if (!image->mt) { 565 assert(texImage->RowStride == postConvWidth); 566 } 567 } 568 569 /* Allocate memory for image */ 570 radeonFreeTexImageData(ctx, texImage); /* Mesa core only clears texImage->Data but not image->mt */ 571 572 if (t->mt && 573 t->mt->firstLevel == level && 574 t->mt->lastLevel == level && 575 t->mt->target != GL_TEXTURE_CUBE_MAP_ARB && 576 !radeon_miptree_matches_image(t->mt, texImage, face, level)) { 577 radeon_miptree_unreference(t->mt); 578 t->mt = NULL; 579 } 580 581 if (!t->mt) 582 radeon_try_alloc_miptree(rmesa, t, texImage, face, level); 583 if (t->mt && radeon_miptree_matches_image(t->mt, texImage, face, level)) { 584 radeon_mipmap_level *lvl; 585 image->mt = t->mt; 586 image->mtlevel = level - t->mt->firstLevel; 587 image->mtface = face; 588 radeon_miptree_reference(t->mt); 589 lvl = &image->mt->levels[image->mtlevel]; 590 dstRowStride = lvl->rowstride; 591 } else { 592 int size; 593 if (texImage->IsCompressed) { 594 size = texImage->CompressedSize; 595 } else { 596 size = texImage->Width * texImage->Height * texImage->Depth * texImage->TexFormat->TexelBytes; 597 } 598 texImage->Data = _mesa_alloc_texmemory(size); 599 } 600 601 /* Upload texture image; note that the spec allows pixels to be NULL */ 602 if (compressed) { 603 pixels = _mesa_validate_pbo_compressed_teximage( 604 ctx, imageSize, pixels, packing, "glCompressedTexImage"); 605 } else { 606 pixels = _mesa_validate_pbo_teximage( 607 ctx, dims, width, height, depth, 608 format, type, pixels, packing, "glTexImage"); 609 } 610 611 if (pixels) { 612 radeon_teximage_map(image, GL_TRUE); 613 614 if (compressed) { 615 memcpy(texImage->Data, pixels, imageSize); 616 } else { 617 GLuint dstRowStride; 618 GLuint *dstImageOffsets; 619 620 if (image->mt) { 621 radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel]; 622 dstRowStride = lvl->rowstride; 623 } else { 624 dstRowStride = texImage->Width * texImage->TexFormat->TexelBytes; 625 } 626 627 if (dims == 3) { 628 int i; 629 630 dstImageOffsets = _mesa_malloc(depth * sizeof(GLuint)) ; 631 if (!dstImageOffsets) 632 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage"); 633 634 for (i = 0; i < depth; ++i) { 635 dstImageOffsets[i] = dstRowStride/texImage->TexFormat->TexelBytes * height * i; 636 } 637 } else { 638 dstImageOffsets = texImage->ImageOffsets; 639 } 640 641 if (!texImage->TexFormat->StoreImage(ctx, dims, 642 texImage->_BaseFormat, 643 texImage->TexFormat, 644 texImage->Data, 0, 0, 0, /* dstX/Y/Zoffset */ 645 dstRowStride, 646 dstImageOffsets, 647 width, height, depth, 648 format, type, pixels, packing)) 649 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage"); 650 651 if (dims == 3) 652 _mesa_free(dstImageOffsets); 653 } 654 655 /* SGIS_generate_mipmap */ 656 if (level == texObj->BaseLevel && texObj->GenerateMipmap) { 657 radeon_generate_mipmap(ctx, target, texObj); 658 } 659 } 660 661 _mesa_unmap_teximage_pbo(ctx, packing); 662 663 if (pixels) 664 radeon_teximage_unmap(image); 665 666 667} 668 669void radeonTexImage1D(GLcontext * ctx, GLenum target, GLint level, 670 GLint internalFormat, 671 GLint width, GLint border, 672 GLenum format, GLenum type, const GLvoid * pixels, 673 const struct gl_pixelstore_attrib *packing, 674 struct gl_texture_object *texObj, 675 struct gl_texture_image *texImage) 676{ 677 radeon_teximage(ctx, 1, target, level, internalFormat, width, 1, 1, 678 0, format, type, pixels, packing, texObj, texImage, 0); 679} 680 681void radeonTexImage2D(GLcontext * ctx, GLenum target, GLint level, 682 GLint internalFormat, 683 GLint width, GLint height, GLint border, 684 GLenum format, GLenum type, const GLvoid * pixels, 685 const struct gl_pixelstore_attrib *packing, 686 struct gl_texture_object *texObj, 687 struct gl_texture_image *texImage) 688 689{ 690 radeon_teximage(ctx, 2, target, level, internalFormat, width, height, 1, 691 0, format, type, pixels, packing, texObj, texImage, 0); 692} 693 694void radeonCompressedTexImage2D(GLcontext * ctx, GLenum target, 695 GLint level, GLint internalFormat, 696 GLint width, GLint height, GLint border, 697 GLsizei imageSize, const GLvoid * data, 698 struct gl_texture_object *texObj, 699 struct gl_texture_image *texImage) 700{ 701 radeon_teximage(ctx, 2, target, level, internalFormat, width, height, 1, 702 imageSize, 0, 0, data, &ctx->Unpack, texObj, texImage, 1); 703} 704 705void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level, 706 GLint internalFormat, 707 GLint width, GLint height, GLint depth, 708 GLint border, 709 GLenum format, GLenum type, const GLvoid * pixels, 710 const struct gl_pixelstore_attrib *packing, 711 struct gl_texture_object *texObj, 712 struct gl_texture_image *texImage) 713{ 714 radeon_teximage(ctx, 3, target, level, internalFormat, width, height, depth, 715 0, format, type, pixels, packing, texObj, texImage, 0); 716} 717 718/** 719 * Update a subregion of the given texture image. 720 */ 721static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int level, 722 GLint xoffset, GLint yoffset, GLint zoffset, 723 GLsizei width, GLsizei height, GLsizei depth, 724 GLsizei imageSize, 725 GLenum format, GLenum type, 726 const GLvoid * pixels, 727 const struct gl_pixelstore_attrib *packing, 728 struct gl_texture_object *texObj, 729 struct gl_texture_image *texImage, 730 int compressed) 731{ 732 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 733 radeonTexObj* t = radeon_tex_obj(texObj); 734 radeon_texture_image* image = get_radeon_texture_image(texImage); 735 736 radeon_firevertices(rmesa); 737 738 t->validated = GL_FALSE; 739 if (compressed) { 740 pixels = _mesa_validate_pbo_compressed_teximage( 741 ctx, imageSize, pixels, packing, "glCompressedTexImage"); 742 } else { 743 pixels = _mesa_validate_pbo_teximage(ctx, dims, 744 width, height, depth, format, type, pixels, packing, "glTexSubImage1D"); 745 } 746 747 if (pixels) { 748 GLint dstRowStride; 749 radeon_teximage_map(image, GL_TRUE); 750 751 if (image->mt) { 752 radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel]; 753 dstRowStride = lvl->rowstride; 754 } else { 755 dstRowStride = texImage->RowStride * texImage->TexFormat->TexelBytes; 756 } 757 758 if (compressed) { 759 uint32_t srcRowStride, bytesPerRow, rows; 760 dstRowStride = _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, texImage->Width); 761 srcRowStride = _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, width); 762 bytesPerRow = srcRowStride; 763 rows = height / 4; 764 765 copy_rows(texImage->Data, dstRowStride, image->base.Data, srcRowStride, rows, 766 bytesPerRow); 767 768 } else { 769 if (!texImage->TexFormat->StoreImage(ctx, dims, texImage->_BaseFormat, 770 texImage->TexFormat, texImage->Data, 771 xoffset, yoffset, zoffset, 772 dstRowStride, 773 texImage->ImageOffsets, 774 width, height, depth, 775 format, type, pixels, packing)) 776 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage"); 777 } 778 779 /* GL_SGIS_generate_mipmap */ 780 if (level == texObj->BaseLevel && texObj->GenerateMipmap) { 781 radeon_generate_mipmap(ctx, target, texObj); 782 } 783 } 784 785 radeon_teximage_unmap(image); 786 787 _mesa_unmap_teximage_pbo(ctx, packing); 788 789 790} 791 792void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level, 793 GLint xoffset, 794 GLsizei width, 795 GLenum format, GLenum type, 796 const GLvoid * pixels, 797 const struct gl_pixelstore_attrib *packing, 798 struct gl_texture_object *texObj, 799 struct gl_texture_image *texImage) 800{ 801 radeon_texsubimage(ctx, 1, target, level, xoffset, 0, 0, width, 1, 1, 0, 802 format, type, pixels, packing, texObj, texImage, 0); 803} 804 805void radeonTexSubImage2D(GLcontext * ctx, GLenum target, GLint level, 806 GLint xoffset, GLint yoffset, 807 GLsizei width, GLsizei height, 808 GLenum format, GLenum type, 809 const GLvoid * pixels, 810 const struct gl_pixelstore_attrib *packing, 811 struct gl_texture_object *texObj, 812 struct gl_texture_image *texImage) 813{ 814 radeon_texsubimage(ctx, 2, target, level, xoffset, yoffset, 0, width, height, 1, 815 0, format, type, pixels, packing, texObj, texImage, 816 0); 817} 818 819void radeonCompressedTexSubImage2D(GLcontext * ctx, GLenum target, 820 GLint level, GLint xoffset, 821 GLint yoffset, GLsizei width, 822 GLsizei height, GLenum format, 823 GLsizei imageSize, const GLvoid * data, 824 struct gl_texture_object *texObj, 825 struct gl_texture_image *texImage) 826{ 827 radeon_texsubimage(ctx, 2, target, level, xoffset, yoffset, 0, width, height, 1, 828 imageSize, format, 0, data, &ctx->Unpack, texObj, texImage, 1); 829} 830 831 832void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level, 833 GLint xoffset, GLint yoffset, GLint zoffset, 834 GLsizei width, GLsizei height, GLsizei depth, 835 GLenum format, GLenum type, 836 const GLvoid * pixels, 837 const struct gl_pixelstore_attrib *packing, 838 struct gl_texture_object *texObj, 839 struct gl_texture_image *texImage) 840{ 841 radeon_texsubimage(ctx, 3, target, level, xoffset, yoffset, zoffset, width, height, depth, 0, 842 format, type, pixels, packing, texObj, texImage, 0); 843} 844 845 846 847/** 848 * Ensure that the given image is stored in the given miptree from now on. 849 */ 850static void migrate_image_to_miptree(radeon_mipmap_tree *mt, radeon_texture_image *image, int face, int level) 851{ 852 radeon_mipmap_level *dstlvl = &mt->levels[level - mt->firstLevel]; 853 unsigned char *dest; 854 855 assert(image->mt != mt); 856 assert(dstlvl->width == image->base.Width); 857 assert(dstlvl->height == image->base.Height); 858 assert(dstlvl->depth == image->base.Depth); 859 860 861 radeon_bo_map(mt->bo, GL_TRUE); 862 dest = mt->bo->ptr + dstlvl->faces[face].offset; 863 864 if (image->mt) { 865 /* Format etc. should match, so we really just need a memcpy(). 866 * In fact, that memcpy() could be done by the hardware in many 867 * cases, provided that we have a proper memory manager. 868 */ 869 radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel-image->mt->firstLevel]; 870 871 assert(srclvl->size == dstlvl->size); 872 assert(srclvl->rowstride == dstlvl->rowstride); 873 874 radeon_bo_map(image->mt->bo, GL_FALSE); 875 876 memcpy(dest, 877 image->mt->bo->ptr + srclvl->faces[face].offset, 878 dstlvl->size); 879 radeon_bo_unmap(image->mt->bo); 880 881 radeon_miptree_unreference(image->mt); 882 } else { 883 uint32_t srcrowstride; 884 uint32_t height; 885 /* need to confirm this value is correct */ 886 if (mt->compressed) { 887 height = image->base.Height / 4; 888 srcrowstride = image->base.RowStride * mt->bpp; 889 } else { 890 height = image->base.Height * image->base.Depth; 891 srcrowstride = image->base.Width * image->base.TexFormat->TexelBytes; 892 } 893 894// if (mt->tilebits) 895// WARN_ONCE("%s: tiling not supported yet", __FUNCTION__); 896 897 copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride, 898 height, srcrowstride); 899 900 _mesa_free_texmemory(image->base.Data); 901 image->base.Data = 0; 902 } 903 904 radeon_bo_unmap(mt->bo); 905 906 image->mt = mt; 907 image->mtface = face; 908 image->mtlevel = level; 909 radeon_miptree_reference(image->mt); 910} 911 912int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj) 913{ 914 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); 915 radeonTexObj *t = radeon_tex_obj(texObj); 916 radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[0][texObj->BaseLevel]); 917 int face, level; 918 919 if (t->validated || t->image_override) 920 return GL_TRUE; 921 922 if (RADEON_DEBUG & DEBUG_TEXTURE) 923 fprintf(stderr, "%s: Validating texture %p now\n", __FUNCTION__, texObj); 924 925 if (baseimage->base.Border > 0) 926 return GL_FALSE; 927 928 /* Ensure a matching miptree exists. 929 * 930 * Differing mipmap trees can result when the app uses TexImage to 931 * change texture dimensions. 932 * 933 * Prefer to use base image's miptree if it 934 * exists, since that most likely contains more valid data (remember 935 * that the base level is usually significantly larger than the rest 936 * of the miptree, so cubemaps are the only possible exception). 937 */ 938 if (baseimage->mt && 939 baseimage->mt != t->mt && 940 radeon_miptree_matches_texture(baseimage->mt, &t->base)) { 941 radeon_miptree_unreference(t->mt); 942 t->mt = baseimage->mt; 943 radeon_miptree_reference(t->mt); 944 } else if (t->mt && !radeon_miptree_matches_texture(t->mt, &t->base)) { 945 radeon_miptree_unreference(t->mt); 946 t->mt = 0; 947 } 948 949 if (!t->mt) { 950 if (RADEON_DEBUG & DEBUG_TEXTURE) 951 fprintf(stderr, " Allocate new miptree\n"); 952 radeon_try_alloc_miptree(rmesa, t, &baseimage->base, 0, texObj->BaseLevel); 953 if (!t->mt) { 954 _mesa_problem(ctx, "radeon_validate_texture failed to alloc miptree"); 955 return GL_FALSE; 956 } 957 } 958 959 /* Ensure all images are stored in the single main miptree */ 960 for(face = 0; face < t->mt->faces; ++face) { 961 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level) { 962 radeon_texture_image *image = get_radeon_texture_image(texObj->Image[face][level]); 963 if (RADEON_DEBUG & DEBUG_TEXTURE) 964 fprintf(stderr, " face %i, level %i... %p vs %p ", face, level, t->mt, image->mt); 965 if (t->mt == image->mt) { 966 if (RADEON_DEBUG & DEBUG_TEXTURE) 967 fprintf(stderr, "OK\n"); 968 969 continue; 970 } 971 972 if (RADEON_DEBUG & DEBUG_TEXTURE) 973 fprintf(stderr, "migrating\n"); 974 migrate_image_to_miptree(t->mt, image, face, level); 975 } 976 } 977 978 return GL_TRUE; 979} 980 981 982/** 983 * Need to map texture image into memory before copying image data, 984 * then unmap it. 985 */ 986static void 987radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level, 988 GLenum format, GLenum type, GLvoid * pixels, 989 struct gl_texture_object *texObj, 990 struct gl_texture_image *texImage, int compressed) 991{ 992 radeon_texture_image *image = get_radeon_texture_image(texImage); 993 994 if (image->mt) { 995 /* Map the texture image read-only */ 996 radeon_teximage_map(image, GL_FALSE); 997 } else { 998 /* Image hasn't been uploaded to a miptree yet */ 999 assert(image->base.Data); 1000 } 1001 1002 if (compressed) { 1003 _mesa_get_compressed_teximage(ctx, target, level, pixels, 1004 texObj, texImage); 1005 } else { 1006 _mesa_get_teximage(ctx, target, level, format, type, pixels, 1007 texObj, texImage); 1008 } 1009 1010 if (image->mt) { 1011 radeon_teximage_unmap(image); 1012 } 1013} 1014 1015void 1016radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level, 1017 GLenum format, GLenum type, GLvoid * pixels, 1018 struct gl_texture_object *texObj, 1019 struct gl_texture_image *texImage) 1020{ 1021 radeon_get_tex_image(ctx, target, level, format, type, pixels, 1022 texObj, texImage, 0); 1023} 1024 1025void 1026radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level, 1027 GLvoid *pixels, 1028 struct gl_texture_object *texObj, 1029 struct gl_texture_image *texImage) 1030{ 1031 radeon_get_tex_image(ctx, target, level, 0, 0, pixels, 1032 texObj, texImage, 1); 1033} 1034