radeon_texture.c revision c9a7dfcf92e6adb4b85338c2c8dbbfbaf39fbfe7
1/*
2 * Copyright (C) 2009 Maciej Cencora.
3 * Copyright (C) 2008 Nicolai Haehnle.
4 * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
5 *
6 * The Weather Channel (TM) funded Tungsten Graphics to develop the
7 * initial release of the Radeon 8500 driver under the XFree86 license.
8 * This notice must be preserved.
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining
11 * a copy of this software and associated documentation files (the
12 * "Software"), to deal in the Software without restriction, including
13 * without limitation the rights to use, copy, modify, merge, publish,
14 * distribute, sublicense, and/or sell copies of the Software, and to
15 * permit persons to whom the Software is furnished to do so, subject to
16 * the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial
20 * portions of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 *
30 */
31
32#include "main/glheader.h"
33#include "main/imports.h"
34#include "main/context.h"
35#include "main/enums.h"
36#include "main/mfeatures.h"
37#include "main/mipmap.h"
38#include "main/pbo.h"
39#include "main/texcompress.h"
40#include "main/texstore.h"
41#include "main/teximage.h"
42#include "main/texobj.h"
43#include "drivers/common/meta.h"
44
45#include "xmlpool.h"		/* for symbolic values of enum-type options */
46
47#include "radeon_common.h"
48
49#include "radeon_mipmap_tree.h"
50
51static void teximage_assign_miptree(radeonContextPtr rmesa,
52				    struct gl_texture_object *texObj,
53				    struct gl_texture_image *texImage);
54
55static radeon_mipmap_tree *radeon_miptree_create_for_teximage(radeonContextPtr rmesa,
56							      struct gl_texture_object *texObj,
57							      struct gl_texture_image *texImage);
58
59void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
60	GLuint numrows, GLuint rowsize)
61{
62	assert(rowsize <= dststride);
63	assert(rowsize <= srcstride);
64
65	radeon_print(RADEON_TEXTURE, RADEON_TRACE,
66		"%s dst %p, stride %u, src %p, stride %u, "
67		"numrows %u, rowsize %u.\n",
68		__func__, dst, dststride,
69		src, srcstride,
70		numrows, rowsize);
71
72	if (rowsize == srcstride && rowsize == dststride) {
73		memcpy(dst, src, numrows*rowsize);
74	} else {
75		GLuint i;
76		for(i = 0; i < numrows; ++i) {
77			memcpy(dst, src, rowsize);
78			dst += dststride;
79			src += srcstride;
80		}
81	}
82}
83
84/* textures */
85/**
86 * Allocate an empty texture image object.
87 */
88struct gl_texture_image *radeonNewTextureImage(struct gl_context *ctx)
89{
90	return CALLOC(sizeof(radeon_texture_image));
91}
92
93
94/**
95 * Delete a texture image object.
96 */
97static void
98radeonDeleteTextureImage(struct gl_context *ctx, struct gl_texture_image *img)
99{
100	/* nothing special (yet) for radeon_texture_image */
101	_mesa_delete_texture_image(ctx, img);
102}
103
104static GLboolean
105radeonAllocTextureImageBuffer(struct gl_context *ctx,
106			      struct gl_texture_image *timage)
107{
108	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
109	radeon_texture_image *image = get_radeon_texture_image(timage);
110	struct gl_texture_object *texobj = timage->TexObject;
111	int slices;
112
113	ctx->Driver.FreeTextureImageBuffer(ctx, timage);
114
115	switch (texobj->Target) {
116	case GL_TEXTURE_3D:
117		slices = timage->Depth;
118		break;
119	default:
120		slices = 1;
121	}
122	assert(!image->base.ImageOffsets);
123	image->base.ImageOffsets = malloc(slices * sizeof(GLuint));
124	teximage_assign_miptree(rmesa, texobj, timage);
125
126	return GL_TRUE;
127}
128
129
130/**
131 * Free memory associated with this texture image.
132 */
133void radeonFreeTextureImageBuffer(struct gl_context *ctx, struct gl_texture_image *timage)
134{
135	radeon_texture_image* image = get_radeon_texture_image(timage);
136
137	if (image->mt) {
138		radeon_miptree_unreference(&image->mt);
139	} else {
140		_swrast_free_texture_image_buffer(ctx, timage);
141	}
142	if (image->bo) {
143		radeon_bo_unref(image->bo);
144		image->bo = NULL;
145	}
146	if (image->base.Buffer) {
147		_mesa_align_free(image->base.Buffer);
148		image->base.Buffer = NULL;
149	}
150
151	if (image->base.ImageOffsets) {
152		free(image->base.ImageOffsets);
153		image->base.ImageOffsets = NULL;
154	}
155}
156
157/* Set Data pointer and additional data for mapped texture image */
158static void teximage_set_map_data(radeon_texture_image *image)
159{
160	radeon_mipmap_level *lvl;
161
162	if (!image->mt) {
163		radeon_warning("%s(%p) Trying to set map data without miptree.\n",
164				__func__, image);
165
166		return;
167	}
168
169	lvl = &image->mt->levels[image->base.Base.Level];
170
171	image->base.Map = image->mt->bo->ptr + lvl->faces[image->base.Base.Face].offset;
172	image->base.RowStride = lvl->rowstride / _mesa_get_format_bytes(image->base.Base.TexFormat);
173}
174
175
176/**
177 * Map a single texture image for glTexImage and friends.
178 */
179void radeon_teximage_map(radeon_texture_image *image, GLboolean write_enable)
180{
181	radeon_print(RADEON_TEXTURE, RADEON_VERBOSE,
182			"%s(img %p), write_enable %s.\n",
183			__func__, image,
184			write_enable ? "true": "false");
185	if (image->mt) {
186		assert(!image->base.Map);
187
188		radeon_bo_map(image->mt->bo, write_enable);
189		teximage_set_map_data(image);
190	}
191}
192
193
194void radeon_teximage_unmap(radeon_texture_image *image)
195{
196	radeon_print(RADEON_TEXTURE, RADEON_VERBOSE,
197			"%s(img %p)\n",
198			__func__, image);
199	if (image->mt) {
200		assert(image->base.Map);
201
202		image->base.Map = 0;
203		radeon_bo_unmap(image->mt->bo);
204	}
205}
206
207/**
208 * Map texture memory/buffer into user space.
209 * Note: the region of interest parameters are ignored here.
210 * \param mapOut  returns start of mapping of region of interest
211 * \param rowStrideOut  returns row stride in bytes
212 */
213static void
214radeon_map_texture_image(struct gl_context *ctx,
215			 struct gl_texture_image *texImage,
216			 GLuint slice,
217			 GLuint x, GLuint y, GLuint w, GLuint h,
218			 GLbitfield mode,
219			 GLubyte **map,
220			 GLint *stride)
221{
222	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
223	radeon_texture_image *image = get_radeon_texture_image(texImage);
224	radeon_mipmap_tree *mt = image->mt;
225	GLuint texel_size = _mesa_get_format_bytes(texImage->TexFormat);
226	GLuint width = texImage->Width;
227	GLuint height = texImage->Height;
228	struct radeon_bo *bo = !image->mt ? image->bo : image->mt->bo;
229	unsigned int bw, bh;
230	GLboolean write = (mode & GL_MAP_WRITE_BIT) != 0;
231
232	_mesa_get_format_block_size(texImage->TexFormat, &bw, &bh);
233	assert(y % bh == 0);
234	y /= bh;
235	texel_size /= bw;
236
237	if (bo && radeon_bo_is_referenced_by_cs(bo, rmesa->cmdbuf.cs)) {
238		radeon_print(RADEON_TEXTURE, RADEON_VERBOSE,
239			     "%s for texture that is "
240			     "queued for GPU processing.\n",
241			     __func__);
242		radeon_firevertices(rmesa);
243	}
244
245	if (image->bo) {
246		/* TFP case */
247		radeon_bo_map(image->bo, write);
248		*stride = get_texture_image_row_stride(rmesa, texImage->TexFormat, width, 0, texImage->TexObject->Target);
249		*map = bo->ptr;
250	} else if (likely(mt)) {
251		void *base;
252		radeon_mipmap_level *lvl = &image->mt->levels[texImage->Level];
253
254		radeon_bo_map(mt->bo, write);
255		base = mt->bo->ptr + lvl->faces[image->base.Base.Face].offset;
256
257		*stride = lvl->rowstride;
258		*map = base + (slice * height) * *stride;
259	} else {
260		/* texture data is in malloc'd memory */
261
262		assert(map);
263
264		*stride = _mesa_format_row_stride(texImage->TexFormat, width);
265		*map = image->base.Buffer + (slice * height) * *stride;
266	}
267
268	*map += y * *stride + x * texel_size;
269}
270
271static void
272radeon_unmap_texture_image(struct gl_context *ctx,
273			   struct gl_texture_image *texImage, GLuint slice)
274{
275	radeon_texture_image *image = get_radeon_texture_image(texImage);
276
277	if (image->bo)
278		radeon_bo_unmap(image->bo);
279	else if (image->mt)
280		radeon_bo_unmap(image->mt->bo);
281}
282
283/* try to find a format which will only need a memcopy */
284static gl_format radeonChoose8888TexFormat(radeonContextPtr rmesa,
285					   GLenum srcFormat,
286					   GLenum srcType, GLboolean fbo)
287{
288#if defined(RADEON_R100)
289	/* r100 can only do this */
290	return _radeon_texformat_argb8888;
291#elif defined(RADEON_R200)
292	const GLuint ui = 1;
293	const GLubyte littleEndian = *((const GLubyte *)&ui);
294
295	if (fbo)
296		return _radeon_texformat_argb8888;
297
298	if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8) ||
299	    (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && !littleEndian) ||
300	    (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) ||
301	    (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && littleEndian)) {
302		return MESA_FORMAT_RGBA8888;
303	} else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) ||
304		   (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && littleEndian) ||
305		   (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8) ||
306		   (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && !littleEndian)) {
307		return MESA_FORMAT_RGBA8888_REV;
308	} else
309		return _radeon_texformat_argb8888;
310#endif
311}
312
313gl_format radeonChooseTextureFormat_mesa(struct gl_context * ctx,
314					 GLint internalFormat,
315					 GLenum format,
316					 GLenum type)
317{
318	return radeonChooseTextureFormat(ctx, internalFormat, format,
319					 type, 0);
320}
321
322gl_format radeonChooseTextureFormat(struct gl_context * ctx,
323				    GLint internalFormat,
324				    GLenum format,
325				    GLenum type, GLboolean fbo)
326{
327	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
328	const GLboolean do32bpt =
329	    (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_32);
330	const GLboolean force16bpt =
331	    (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FORCE_16);
332	(void)format;
333
334	radeon_print(RADEON_TEXTURE, RADEON_TRACE,
335		"%s InternalFormat=%s(%d) type=%s format=%s\n",
336		__func__,
337		_mesa_lookup_enum_by_nr(internalFormat), internalFormat,
338		_mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format));
339	radeon_print(RADEON_TEXTURE, RADEON_TRACE,
340			"%s do32bpt=%d force16bpt=%d\n",
341			__func__, do32bpt, force16bpt);
342
343	switch (internalFormat) {
344	case 4:
345	case GL_RGBA:
346	case GL_COMPRESSED_RGBA:
347		switch (type) {
348		case GL_UNSIGNED_INT_10_10_10_2:
349		case GL_UNSIGNED_INT_2_10_10_10_REV:
350			return do32bpt ? _radeon_texformat_argb8888 :
351			    _radeon_texformat_argb1555;
352		case GL_UNSIGNED_SHORT_4_4_4_4:
353		case GL_UNSIGNED_SHORT_4_4_4_4_REV:
354			return _radeon_texformat_argb4444;
355		case GL_UNSIGNED_SHORT_5_5_5_1:
356		case GL_UNSIGNED_SHORT_1_5_5_5_REV:
357			return _radeon_texformat_argb1555;
358		default:
359			return do32bpt ? radeonChoose8888TexFormat(rmesa, format, type, fbo) :
360			    _radeon_texformat_argb4444;
361		}
362
363	case 3:
364	case GL_RGB:
365	case GL_COMPRESSED_RGB:
366		switch (type) {
367		case GL_UNSIGNED_SHORT_4_4_4_4:
368		case GL_UNSIGNED_SHORT_4_4_4_4_REV:
369			return _radeon_texformat_argb4444;
370		case GL_UNSIGNED_SHORT_5_5_5_1:
371		case GL_UNSIGNED_SHORT_1_5_5_5_REV:
372			return _radeon_texformat_argb1555;
373		case GL_UNSIGNED_SHORT_5_6_5:
374		case GL_UNSIGNED_SHORT_5_6_5_REV:
375			return _radeon_texformat_rgb565;
376		default:
377			return do32bpt ? _radeon_texformat_argb8888 :
378			    _radeon_texformat_rgb565;
379		}
380
381	case GL_RGBA8:
382	case GL_RGB10_A2:
383	case GL_RGBA12:
384	case GL_RGBA16:
385		return !force16bpt ?
386			radeonChoose8888TexFormat(rmesa, format, type, fbo) :
387			_radeon_texformat_argb4444;
388
389	case GL_RGBA4:
390	case GL_RGBA2:
391		return _radeon_texformat_argb4444;
392
393	case GL_RGB5_A1:
394		return _radeon_texformat_argb1555;
395
396	case GL_RGB8:
397	case GL_RGB10:
398	case GL_RGB12:
399	case GL_RGB16:
400		return !force16bpt ? _radeon_texformat_argb8888 :
401		    _radeon_texformat_rgb565;
402
403	case GL_RGB5:
404	case GL_RGB4:
405	case GL_R3_G3_B2:
406		return _radeon_texformat_rgb565;
407
408	case GL_ALPHA:
409	case GL_ALPHA4:
410	case GL_ALPHA8:
411	case GL_ALPHA12:
412	case GL_ALPHA16:
413	case GL_COMPRESSED_ALPHA:
414#if defined(RADEON_R200)
415		/* r200: can't use a8 format since interpreting hw I8 as a8 would result
416		   in wrong rgb values (same as alpha value instead of 0). */
417		return _radeon_texformat_al88;
418#else
419		return MESA_FORMAT_A8;
420#endif
421	case 1:
422	case GL_LUMINANCE:
423	case GL_LUMINANCE4:
424	case GL_LUMINANCE8:
425	case GL_LUMINANCE12:
426	case GL_LUMINANCE16:
427	case GL_COMPRESSED_LUMINANCE:
428		return MESA_FORMAT_L8;
429
430	case 2:
431	case GL_LUMINANCE_ALPHA:
432	case GL_LUMINANCE4_ALPHA4:
433	case GL_LUMINANCE6_ALPHA2:
434	case GL_LUMINANCE8_ALPHA8:
435	case GL_LUMINANCE12_ALPHA4:
436	case GL_LUMINANCE12_ALPHA12:
437	case GL_LUMINANCE16_ALPHA16:
438	case GL_COMPRESSED_LUMINANCE_ALPHA:
439		return _radeon_texformat_al88;
440
441	case GL_INTENSITY:
442	case GL_INTENSITY4:
443	case GL_INTENSITY8:
444	case GL_INTENSITY12:
445	case GL_INTENSITY16:
446	case GL_COMPRESSED_INTENSITY:
447		return MESA_FORMAT_I8;
448
449	case GL_YCBCR_MESA:
450		if (type == GL_UNSIGNED_SHORT_8_8_APPLE ||
451		    type == GL_UNSIGNED_BYTE)
452			return MESA_FORMAT_YCBCR;
453		else
454			return MESA_FORMAT_YCBCR_REV;
455
456	case GL_RGB_S3TC:
457	case GL_RGB4_S3TC:
458	case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
459		return MESA_FORMAT_RGB_DXT1;
460
461	case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
462		return MESA_FORMAT_RGBA_DXT1;
463
464	case GL_RGBA_S3TC:
465	case GL_RGBA4_S3TC:
466	case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
467		return MESA_FORMAT_RGBA_DXT3;
468
469	case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
470		return MESA_FORMAT_RGBA_DXT5;
471
472	case GL_ALPHA16F_ARB:
473		return MESA_FORMAT_ALPHA_FLOAT16;
474	case GL_ALPHA32F_ARB:
475		return MESA_FORMAT_ALPHA_FLOAT32;
476	case GL_LUMINANCE16F_ARB:
477		return MESA_FORMAT_LUMINANCE_FLOAT16;
478	case GL_LUMINANCE32F_ARB:
479		return MESA_FORMAT_LUMINANCE_FLOAT32;
480	case GL_LUMINANCE_ALPHA16F_ARB:
481		return MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16;
482	case GL_LUMINANCE_ALPHA32F_ARB:
483		return MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32;
484	case GL_INTENSITY16F_ARB:
485		return MESA_FORMAT_INTENSITY_FLOAT16;
486	case GL_INTENSITY32F_ARB:
487		return MESA_FORMAT_INTENSITY_FLOAT32;
488	case GL_RGB16F_ARB:
489		return MESA_FORMAT_RGBA_FLOAT16;
490	case GL_RGB32F_ARB:
491		return MESA_FORMAT_RGBA_FLOAT32;
492	case GL_RGBA16F_ARB:
493		return MESA_FORMAT_RGBA_FLOAT16;
494	case GL_RGBA32F_ARB:
495		return MESA_FORMAT_RGBA_FLOAT32;
496
497	case GL_DEPTH_COMPONENT:
498	case GL_DEPTH_COMPONENT16:
499	case GL_DEPTH_COMPONENT24:
500	case GL_DEPTH_COMPONENT32:
501	case GL_DEPTH_STENCIL_EXT:
502	case GL_DEPTH24_STENCIL8_EXT:
503		return MESA_FORMAT_S8_Z24;
504
505	/* EXT_texture_sRGB */
506	case GL_SRGB:
507	case GL_SRGB8:
508	case GL_SRGB_ALPHA:
509	case GL_SRGB8_ALPHA8:
510	case GL_COMPRESSED_SRGB:
511	case GL_COMPRESSED_SRGB_ALPHA:
512		return MESA_FORMAT_SARGB8;
513
514	case GL_SLUMINANCE:
515	case GL_SLUMINANCE8:
516	case GL_COMPRESSED_SLUMINANCE:
517		return MESA_FORMAT_SL8;
518
519	case GL_SLUMINANCE_ALPHA:
520	case GL_SLUMINANCE8_ALPHA8:
521	case GL_COMPRESSED_SLUMINANCE_ALPHA:
522		return MESA_FORMAT_SLA8;
523
524	case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT:
525		return MESA_FORMAT_SRGB_DXT1;
526	case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT:
527		return MESA_FORMAT_SRGBA_DXT1;
528	case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT:
529		return MESA_FORMAT_SRGBA_DXT3;
530	case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT:
531		return MESA_FORMAT_SRGBA_DXT5;
532
533	default:
534		_mesa_problem(ctx,
535			      "unexpected internalFormat 0x%x in %s",
536			      (int)internalFormat, __func__);
537		return MESA_FORMAT_NONE;
538	}
539
540	return MESA_FORMAT_NONE;		/* never get here */
541}
542
543/** Check if given image is valid within current texture object.
544 */
545static void teximage_assign_miptree(radeonContextPtr rmesa,
546				    struct gl_texture_object *texObj,
547				    struct gl_texture_image *texImage)
548{
549	radeonTexObj *t = radeon_tex_obj(texObj);
550	radeon_texture_image* image = get_radeon_texture_image(texImage);
551
552	/* Try using current miptree, or create new if there isn't any */
553	if (!t->mt || !radeon_miptree_matches_image(t->mt, texImage)) {
554		radeon_miptree_unreference(&t->mt);
555		t->mt = radeon_miptree_create_for_teximage(rmesa,
556							   texObj,
557							   texImage);
558
559		radeon_print(RADEON_TEXTURE, RADEON_NORMAL,
560			     "%s: texObj %p, texImage %p, "
561				"texObj miptree doesn't match, allocated new miptree %p\n",
562				__FUNCTION__, texObj, texImage, t->mt);
563	}
564
565	/* Miptree alocation may have failed,
566	 * when there was no image for baselevel specified */
567	if (t->mt) {
568		radeon_miptree_reference(t->mt, &image->mt);
569	} else
570		radeon_print(RADEON_TEXTURE, RADEON_VERBOSE,
571				"%s Failed to allocate miptree.\n", __func__);
572}
573
574unsigned radeonIsFormatRenderable(gl_format mesa_format)
575{
576	if (mesa_format == _radeon_texformat_argb8888 || mesa_format == _radeon_texformat_rgb565 ||
577		mesa_format == _radeon_texformat_argb1555 || mesa_format == _radeon_texformat_argb4444)
578		return 1;
579
580	switch (mesa_format)
581	{
582		case MESA_FORMAT_Z16:
583		case MESA_FORMAT_S8_Z24:
584			return 1;
585		default:
586			return 0;
587	}
588}
589
590#if FEATURE_OES_EGL_image
591void radeon_image_target_texture_2d(struct gl_context *ctx, GLenum target,
592				    struct gl_texture_object *texObj,
593				    struct gl_texture_image *texImage,
594				    GLeglImageOES image_handle)
595{
596	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
597	radeonTexObj *t = radeon_tex_obj(texObj);
598	radeon_texture_image *radeonImage = get_radeon_texture_image(texImage);
599	__DRIscreen *screen;
600	__DRIimage *image;
601
602	screen = radeon->dri.screen;
603	image = screen->dri2.image->lookupEGLImage(screen, image_handle,
604						   screen->loaderPrivate);
605	if (image == NULL)
606		return;
607
608	radeonFreeTextureImageBuffer(ctx, texImage);
609
610	texImage->Width = image->width;
611	texImage->Height = image->height;
612	texImage->Depth = 1;
613	texImage->_BaseFormat = GL_RGBA;
614	texImage->TexFormat = image->format;
615	radeonImage->base.RowStride = image->pitch;
616	texImage->InternalFormat = image->internal_format;
617
618	if(t->mt)
619	{
620		radeon_miptree_unreference(&t->mt);
621		t->mt = NULL;
622	}
623
624	/* NOTE: The following is *very* ugly and will probably break. But
625	   I don't know how to deal with it, without creating a whole new
626	   function like radeon_miptree_from_bo() so I'm going with the
627	   easy but error-prone way. */
628
629	radeon_try_alloc_miptree(radeon, t);
630
631	radeon_miptree_reference(t->mt, &radeonImage->mt);
632
633	if (t->mt == NULL)
634	{
635		radeon_print(RADEON_TEXTURE, RADEON_VERBOSE,
636			     "%s Failed to allocate miptree.\n", __func__);
637		return;
638	}
639
640	/* Particularly ugly: this is guaranteed to break, if image->bo is
641	   not of the required size for a miptree. */
642	radeon_bo_unref(t->mt->bo);
643	radeon_bo_ref(image->bo);
644	t->mt->bo = image->bo;
645
646	if (!radeon_miptree_matches_image(t->mt, &radeonImage->base.Base))
647		fprintf(stderr, "miptree doesn't match image\n");
648}
649#endif
650
651gl_format _radeon_texformat_rgba8888 = MESA_FORMAT_NONE;
652gl_format _radeon_texformat_argb8888 = MESA_FORMAT_NONE;
653gl_format _radeon_texformat_rgb565 = MESA_FORMAT_NONE;
654gl_format _radeon_texformat_argb4444 = MESA_FORMAT_NONE;
655gl_format _radeon_texformat_argb1555 = MESA_FORMAT_NONE;
656gl_format _radeon_texformat_al88 = MESA_FORMAT_NONE;
657/*@}*/
658
659
660static void
661radeonInitTextureFormats(void)
662{
663   if (_mesa_little_endian()) {
664      _radeon_texformat_rgba8888	= MESA_FORMAT_RGBA8888;
665      _radeon_texformat_argb8888	= MESA_FORMAT_ARGB8888;
666      _radeon_texformat_rgb565		= MESA_FORMAT_RGB565;
667      _radeon_texformat_argb4444	= MESA_FORMAT_ARGB4444;
668      _radeon_texformat_argb1555	= MESA_FORMAT_ARGB1555;
669      _radeon_texformat_al88		= MESA_FORMAT_AL88;
670   }
671   else {
672      _radeon_texformat_rgba8888	= MESA_FORMAT_RGBA8888_REV;
673      _radeon_texformat_argb8888	= MESA_FORMAT_ARGB8888_REV;
674      _radeon_texformat_rgb565		= MESA_FORMAT_RGB565_REV;
675      _radeon_texformat_argb4444	= MESA_FORMAT_ARGB4444_REV;
676      _radeon_texformat_argb1555	= MESA_FORMAT_ARGB1555_REV;
677      _radeon_texformat_al88		= MESA_FORMAT_AL88_REV;
678   }
679}
680
681void
682radeon_init_common_texture_funcs(radeonContextPtr radeon,
683				 struct dd_function_table *functions)
684{
685	functions->NewTextureImage = radeonNewTextureImage;
686	functions->DeleteTextureImage = radeonDeleteTextureImage;
687	functions->AllocTextureImageBuffer = radeonAllocTextureImageBuffer;
688	functions->FreeTextureImageBuffer = radeonFreeTextureImageBuffer;
689	functions->MapTextureImage = radeon_map_texture_image;
690	functions->UnmapTextureImage = radeon_unmap_texture_image;
691
692	functions->ChooseTextureFormat	= radeonChooseTextureFormat_mesa;
693
694	functions->CopyTexSubImage = radeonCopyTexSubImage;
695
696	functions->Bitmap = _mesa_meta_Bitmap;
697#if FEATURE_OES_EGL_image
698	functions->EGLImageTargetTexture2D = radeon_image_target_texture_2d;
699#endif
700
701	radeonInitTextureFormats();
702}
703
704static void
705radeon_swrast_map_image(radeonContextPtr rmesa,
706			radeon_texture_image *image)
707{
708	GLuint level, face;
709	radeon_mipmap_tree *mt;
710	GLuint texel_size;
711	radeon_mipmap_level *lvl;
712	int rs;
713
714	if (!image || !image->mt)
715		return;
716
717	texel_size = _mesa_get_format_bytes(image->base.Base.TexFormat);
718	level = image->base.Base.Level;
719	face = image->base.Base.Face;
720	mt = image->mt;
721
722	lvl = &image->mt->levels[level];
723
724	rs = lvl->rowstride / texel_size;
725
726	radeon_bo_map(mt->bo, 1);
727
728	image->base.Map = mt->bo->ptr + lvl->faces[face].offset;
729	if (mt->target == GL_TEXTURE_3D) {
730		int i;
731
732		for (i = 0; i < mt->levels[level].depth; i++)
733			image->base.ImageOffsets[i] = rs * lvl->height * i;
734	}
735	image->base.RowStride = rs;
736}
737
738static void
739radeon_swrast_unmap_image(radeonContextPtr rmesa,
740			  radeon_texture_image *image)
741{
742	if (image && image->mt) {
743		image->base.Map = NULL;
744		radeon_bo_unmap(image->mt->bo);
745	}
746}
747
748void
749radeon_swrast_map_texture_images(struct gl_context *ctx,
750				 struct gl_texture_object *texObj)
751{
752	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
753	GLuint nr_faces = (texObj->Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
754	int i, face;
755
756	for (i = texObj->BaseLevel; i <= texObj->_MaxLevel; i++) {
757		for (face = 0; face < nr_faces; face++) {
758			radeon_texture_image *image = get_radeon_texture_image(texObj->Image[face][i]);
759			radeon_swrast_map_image(rmesa, image);
760		}
761	}
762}
763
764void
765radeon_swrast_unmap_texture_images(struct gl_context *ctx,
766				   struct gl_texture_object *texObj)
767{
768	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
769	GLuint nr_faces = (texObj->Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
770	int i, face;
771
772	for (i = texObj->BaseLevel; i <= texObj->_MaxLevel; i++) {
773		for (face = 0; face < nr_faces; face++) {
774			radeon_texture_image *image = get_radeon_texture_image(texObj->Image[face][i]);
775			radeon_swrast_unmap_image(rmesa, image);
776		}
777	}
778
779}
780
781static radeon_mipmap_tree *radeon_miptree_create_for_teximage(radeonContextPtr rmesa,
782						       struct gl_texture_object *texObj,
783						       struct gl_texture_image *texImage)
784{
785	radeonTexObj *t = radeon_tex_obj(texObj);
786	GLuint firstLevel;
787	GLuint lastLevel;
788	int width, height, depth;
789	int i;
790
791	width = texImage->Width;
792	height = texImage->Height;
793	depth = texImage->Depth;
794
795	if (texImage->Level > texObj->BaseLevel &&
796	    (width == 1 ||
797	     (texObj->Target != GL_TEXTURE_1D && height == 1) ||
798	     (texObj->Target == GL_TEXTURE_3D && depth == 1))) {
799		/* For this combination, we're at some lower mipmap level and
800		 * some important dimension is 1.  We can't extrapolate up to a
801		 * likely base level width/height/depth for a full mipmap stack
802		 * from this info, so just allocate this one level.
803		 */
804		firstLevel = texImage->Level;
805		lastLevel = texImage->Level;
806	} else {
807		if (texImage->Level < texObj->BaseLevel)
808			firstLevel = 0;
809		else
810			firstLevel = texObj->BaseLevel;
811
812		for (i = texImage->Level; i > firstLevel; i--) {
813			width <<= 1;
814			if (height != 1)
815				height <<= 1;
816			if (depth != 1)
817				depth <<= 1;
818		}
819		if ((texObj->Sampler.MinFilter == GL_NEAREST ||
820		     texObj->Sampler.MinFilter == GL_LINEAR) &&
821		    texImage->Level == firstLevel) {
822			lastLevel = firstLevel;
823		} else {
824			lastLevel = firstLevel + _mesa_logbase2(MAX2(MAX2(width, height), depth));
825		}
826	}
827
828	return  radeon_miptree_create(rmesa, texObj->Target,
829				      texImage->TexFormat, firstLevel, lastLevel - firstLevel + 1,
830				      width, height, depth,
831				      t->tile_bits);
832}
833