st_glsl_to_tgsi.cpp revision 3788b4b5c942b2346bf122486b687c632ab7eac4
1/* 2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved. 3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved. 4 * Copyright © 2010 Intel Corporation 5 * Copyright © 2011 Bryan Cain 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24 * DEALINGS IN THE SOFTWARE. 25 */ 26 27/** 28 * \file glsl_to_tgsi.cpp 29 * 30 * Translate GLSL IR to TGSI. 31 */ 32 33#include <stdio.h> 34#include "main/compiler.h" 35#include "ir.h" 36#include "ir_visitor.h" 37#include "ir_print_visitor.h" 38#include "ir_expression_flattening.h" 39#include "glsl_types.h" 40#include "glsl_parser_extras.h" 41#include "../glsl/program.h" 42#include "ir_optimization.h" 43#include "ast.h" 44 45#include "main/mtypes.h" 46#include "main/shaderobj.h" 47#include "program/hash_table.h" 48 49extern "C" { 50#include "main/shaderapi.h" 51#include "main/uniforms.h" 52#include "program/prog_instruction.h" 53#include "program/prog_optimize.h" 54#include "program/prog_print.h" 55#include "program/program.h" 56#include "program/prog_parameter.h" 57#include "program/sampler.h" 58 59#include "pipe/p_compiler.h" 60#include "pipe/p_context.h" 61#include "pipe/p_screen.h" 62#include "pipe/p_shader_tokens.h" 63#include "pipe/p_state.h" 64#include "util/u_math.h" 65#include "tgsi/tgsi_ureg.h" 66#include "tgsi/tgsi_info.h" 67#include "st_context.h" 68#include "st_program.h" 69#include "st_glsl_to_tgsi.h" 70#include "st_mesa_to_tgsi.h" 71} 72 73#define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX 74#define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \ 75 (1 << PROGRAM_ENV_PARAM) | \ 76 (1 << PROGRAM_STATE_VAR) | \ 77 (1 << PROGRAM_NAMED_PARAM) | \ 78 (1 << PROGRAM_CONSTANT) | \ 79 (1 << PROGRAM_UNIFORM)) 80 81/** 82 * Maximum number of temporary registers. 83 * 84 * It is too big for stack allocated arrays -- it will cause stack overflow on 85 * Windows and likely Mac OS X. 86 */ 87#define MAX_TEMPS 4096 88 89/* will be 4 for GLSL 4.00 */ 90#define MAX_GLSL_TEXTURE_OFFSET 1 91 92class st_src_reg; 93class st_dst_reg; 94 95static int swizzle_for_size(int size); 96 97/** 98 * This struct is a corresponding struct to TGSI ureg_src. 99 */ 100class st_src_reg { 101public: 102 st_src_reg(gl_register_file file, int index, const glsl_type *type) 103 { 104 this->file = file; 105 this->index = index; 106 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix())) 107 this->swizzle = swizzle_for_size(type->vector_elements); 108 else 109 this->swizzle = SWIZZLE_XYZW; 110 this->negate = 0; 111 this->type = type ? type->base_type : GLSL_TYPE_ERROR; 112 this->reladdr = NULL; 113 } 114 115 st_src_reg(gl_register_file file, int index, int type) 116 { 117 this->type = type; 118 this->file = file; 119 this->index = index; 120 this->swizzle = SWIZZLE_XYZW; 121 this->negate = 0; 122 this->reladdr = NULL; 123 } 124 125 st_src_reg() 126 { 127 this->type = GLSL_TYPE_ERROR; 128 this->file = PROGRAM_UNDEFINED; 129 this->index = 0; 130 this->swizzle = 0; 131 this->negate = 0; 132 this->reladdr = NULL; 133 } 134 135 explicit st_src_reg(st_dst_reg reg); 136 137 gl_register_file file; /**< PROGRAM_* from Mesa */ 138 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */ 139 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */ 140 int negate; /**< NEGATE_XYZW mask from mesa */ 141 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ 142 /** Register index should be offset by the integer in this reg. */ 143 st_src_reg *reladdr; 144}; 145 146class st_dst_reg { 147public: 148 st_dst_reg(gl_register_file file, int writemask, int type) 149 { 150 this->file = file; 151 this->index = 0; 152 this->writemask = writemask; 153 this->cond_mask = COND_TR; 154 this->reladdr = NULL; 155 this->type = type; 156 } 157 158 st_dst_reg() 159 { 160 this->type = GLSL_TYPE_ERROR; 161 this->file = PROGRAM_UNDEFINED; 162 this->index = 0; 163 this->writemask = 0; 164 this->cond_mask = COND_TR; 165 this->reladdr = NULL; 166 } 167 168 explicit st_dst_reg(st_src_reg reg); 169 170 gl_register_file file; /**< PROGRAM_* from Mesa */ 171 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */ 172 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ 173 GLuint cond_mask:4; 174 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ 175 /** Register index should be offset by the integer in this reg. */ 176 st_src_reg *reladdr; 177}; 178 179st_src_reg::st_src_reg(st_dst_reg reg) 180{ 181 this->type = reg.type; 182 this->file = reg.file; 183 this->index = reg.index; 184 this->swizzle = SWIZZLE_XYZW; 185 this->negate = 0; 186 this->reladdr = reg.reladdr; 187} 188 189st_dst_reg::st_dst_reg(st_src_reg reg) 190{ 191 this->type = reg.type; 192 this->file = reg.file; 193 this->index = reg.index; 194 this->writemask = WRITEMASK_XYZW; 195 this->cond_mask = COND_TR; 196 this->reladdr = reg.reladdr; 197} 198 199class glsl_to_tgsi_instruction : public exec_node { 200public: 201 /* Callers of this ralloc-based new need not call delete. It's 202 * easier to just ralloc_free 'ctx' (or any of its ancestors). */ 203 static void* operator new(size_t size, void *ctx) 204 { 205 void *node; 206 207 node = rzalloc_size(ctx, size); 208 assert(node != NULL); 209 210 return node; 211 } 212 213 unsigned op; 214 st_dst_reg dst; 215 st_src_reg src[3]; 216 /** Pointer to the ir source this tree came from for debugging */ 217 ir_instruction *ir; 218 GLboolean cond_update; 219 bool saturate; 220 int sampler; /**< sampler index */ 221 int tex_target; /**< One of TEXTURE_*_INDEX */ 222 GLboolean tex_shadow; 223 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET]; 224 unsigned tex_offset_num_offset; 225 int dead_mask; /**< Used in dead code elimination */ 226 227 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */ 228}; 229 230class variable_storage : public exec_node { 231public: 232 variable_storage(ir_variable *var, gl_register_file file, int index) 233 : file(file), index(index), var(var) 234 { 235 /* empty */ 236 } 237 238 gl_register_file file; 239 int index; 240 ir_variable *var; /* variable that maps to this, if any */ 241}; 242 243class immediate_storage : public exec_node { 244public: 245 immediate_storage(gl_constant_value *values, int size, int type) 246 { 247 memcpy(this->values, values, size * sizeof(gl_constant_value)); 248 this->size = size; 249 this->type = type; 250 } 251 252 gl_constant_value values[4]; 253 int size; /**< Number of components (1-4) */ 254 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */ 255}; 256 257class function_entry : public exec_node { 258public: 259 ir_function_signature *sig; 260 261 /** 262 * identifier of this function signature used by the program. 263 * 264 * At the point that TGSI instructions for function calls are 265 * generated, we don't know the address of the first instruction of 266 * the function body. So we make the BranchTarget that is called a 267 * small integer and rewrite them during set_branchtargets(). 268 */ 269 int sig_id; 270 271 /** 272 * Pointer to first instruction of the function body. 273 * 274 * Set during function body emits after main() is processed. 275 */ 276 glsl_to_tgsi_instruction *bgn_inst; 277 278 /** 279 * Index of the first instruction of the function body in actual TGSI. 280 * 281 * Set after conversion from glsl_to_tgsi_instruction to TGSI. 282 */ 283 int inst; 284 285 /** Storage for the return value. */ 286 st_src_reg return_reg; 287}; 288 289class glsl_to_tgsi_visitor : public ir_visitor { 290public: 291 glsl_to_tgsi_visitor(); 292 ~glsl_to_tgsi_visitor(); 293 294 function_entry *current_function; 295 296 struct gl_context *ctx; 297 struct gl_program *prog; 298 struct gl_shader_program *shader_program; 299 struct gl_shader_compiler_options *options; 300 301 int next_temp; 302 303 int num_address_regs; 304 int samplers_used; 305 bool indirect_addr_temps; 306 bool indirect_addr_consts; 307 308 int glsl_version; 309 bool native_integers; 310 311 variable_storage *find_variable_storage(ir_variable *var); 312 313 int add_constant(gl_register_file file, gl_constant_value values[4], 314 int size, int datatype, GLuint *swizzle_out); 315 316 function_entry *get_function_signature(ir_function_signature *sig); 317 318 st_src_reg get_temp(const glsl_type *type); 319 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr); 320 321 st_src_reg st_src_reg_for_float(float val); 322 st_src_reg st_src_reg_for_int(int val); 323 st_src_reg st_src_reg_for_type(int type, int val); 324 325 /** 326 * \name Visit methods 327 * 328 * As typical for the visitor pattern, there must be one \c visit method for 329 * each concrete subclass of \c ir_instruction. Virtual base classes within 330 * the hierarchy should not have \c visit methods. 331 */ 332 /*@{*/ 333 virtual void visit(ir_variable *); 334 virtual void visit(ir_loop *); 335 virtual void visit(ir_loop_jump *); 336 virtual void visit(ir_function_signature *); 337 virtual void visit(ir_function *); 338 virtual void visit(ir_expression *); 339 virtual void visit(ir_swizzle *); 340 virtual void visit(ir_dereference_variable *); 341 virtual void visit(ir_dereference_array *); 342 virtual void visit(ir_dereference_record *); 343 virtual void visit(ir_assignment *); 344 virtual void visit(ir_constant *); 345 virtual void visit(ir_call *); 346 virtual void visit(ir_return *); 347 virtual void visit(ir_discard *); 348 virtual void visit(ir_texture *); 349 virtual void visit(ir_if *); 350 /*@}*/ 351 352 st_src_reg result; 353 354 /** List of variable_storage */ 355 exec_list variables; 356 357 /** List of immediate_storage */ 358 exec_list immediates; 359 int num_immediates; 360 361 /** List of function_entry */ 362 exec_list function_signatures; 363 int next_signature_id; 364 365 /** List of glsl_to_tgsi_instruction */ 366 exec_list instructions; 367 368 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op); 369 370 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, 371 st_dst_reg dst, st_src_reg src0); 372 373 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, 374 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 375 376 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, 377 st_dst_reg dst, 378 st_src_reg src0, st_src_reg src1, st_src_reg src2); 379 380 unsigned get_opcode(ir_instruction *ir, unsigned op, 381 st_dst_reg dst, 382 st_src_reg src0, st_src_reg src1); 383 384 /** 385 * Emit the correct dot-product instruction for the type of arguments 386 */ 387 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir, 388 st_dst_reg dst, 389 st_src_reg src0, 390 st_src_reg src1, 391 unsigned elements); 392 393 void emit_scalar(ir_instruction *ir, unsigned op, 394 st_dst_reg dst, st_src_reg src0); 395 396 void emit_scalar(ir_instruction *ir, unsigned op, 397 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 398 399 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst); 400 401 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0); 402 403 void emit_scs(ir_instruction *ir, unsigned op, 404 st_dst_reg dst, const st_src_reg &src); 405 406 bool try_emit_mad(ir_expression *ir, 407 int mul_operand); 408 bool try_emit_mad_for_and_not(ir_expression *ir, 409 int mul_operand); 410 bool try_emit_sat(ir_expression *ir); 411 412 void emit_swz(ir_expression *ir); 413 414 bool process_move_condition(ir_rvalue *ir); 415 416 void remove_output_reads(gl_register_file type); 417 void simplify_cmp(void); 418 419 void rename_temp_register(int index, int new_index); 420 int get_first_temp_read(int index); 421 int get_first_temp_write(int index); 422 int get_last_temp_read(int index); 423 int get_last_temp_write(int index); 424 425 void copy_propagate(void); 426 void eliminate_dead_code(void); 427 int eliminate_dead_code_advanced(void); 428 void merge_registers(void); 429 void renumber_registers(void); 430 431 void *mem_ctx; 432}; 433 434static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR); 435 436static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR); 437 438static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT); 439 440static void 441fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3); 442 443static void 444fail_link(struct gl_shader_program *prog, const char *fmt, ...) 445{ 446 va_list args; 447 va_start(args, fmt); 448 ralloc_vasprintf_append(&prog->InfoLog, fmt, args); 449 va_end(args); 450 451 prog->LinkStatus = GL_FALSE; 452} 453 454static int 455swizzle_for_size(int size) 456{ 457 int size_swizzles[4] = { 458 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X), 459 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y), 460 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z), 461 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W), 462 }; 463 464 assert((size >= 1) && (size <= 4)); 465 return size_swizzles[size - 1]; 466} 467 468static bool 469is_tex_instruction(unsigned opcode) 470{ 471 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); 472 return info->is_tex; 473} 474 475static unsigned 476num_inst_dst_regs(unsigned opcode) 477{ 478 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); 479 return info->num_dst; 480} 481 482static unsigned 483num_inst_src_regs(unsigned opcode) 484{ 485 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); 486 return info->is_tex ? info->num_src - 1 : info->num_src; 487} 488 489glsl_to_tgsi_instruction * 490glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, 491 st_dst_reg dst, 492 st_src_reg src0, st_src_reg src1, st_src_reg src2) 493{ 494 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction(); 495 int num_reladdr = 0, i; 496 497 op = get_opcode(ir, op, dst, src0, src1); 498 499 /* If we have to do relative addressing, we want to load the ARL 500 * reg directly for one of the regs, and preload the other reladdr 501 * sources into temps. 502 */ 503 num_reladdr += dst.reladdr != NULL; 504 num_reladdr += src0.reladdr != NULL; 505 num_reladdr += src1.reladdr != NULL; 506 num_reladdr += src2.reladdr != NULL; 507 508 reladdr_to_temp(ir, &src2, &num_reladdr); 509 reladdr_to_temp(ir, &src1, &num_reladdr); 510 reladdr_to_temp(ir, &src0, &num_reladdr); 511 512 if (dst.reladdr) { 513 emit_arl(ir, address_reg, *dst.reladdr); 514 num_reladdr--; 515 } 516 assert(num_reladdr == 0); 517 518 inst->op = op; 519 inst->dst = dst; 520 inst->src[0] = src0; 521 inst->src[1] = src1; 522 inst->src[2] = src2; 523 inst->ir = ir; 524 inst->dead_mask = 0; 525 526 inst->function = NULL; 527 528 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL) 529 this->num_address_regs = 1; 530 531 /* Update indirect addressing status used by TGSI */ 532 if (dst.reladdr) { 533 switch(dst.file) { 534 case PROGRAM_TEMPORARY: 535 this->indirect_addr_temps = true; 536 break; 537 case PROGRAM_LOCAL_PARAM: 538 case PROGRAM_ENV_PARAM: 539 case PROGRAM_STATE_VAR: 540 case PROGRAM_NAMED_PARAM: 541 case PROGRAM_CONSTANT: 542 case PROGRAM_UNIFORM: 543 this->indirect_addr_consts = true; 544 break; 545 case PROGRAM_IMMEDIATE: 546 assert(!"immediates should not have indirect addressing"); 547 break; 548 default: 549 break; 550 } 551 } 552 else { 553 for (i=0; i<3; i++) { 554 if(inst->src[i].reladdr) { 555 switch(inst->src[i].file) { 556 case PROGRAM_TEMPORARY: 557 this->indirect_addr_temps = true; 558 break; 559 case PROGRAM_LOCAL_PARAM: 560 case PROGRAM_ENV_PARAM: 561 case PROGRAM_STATE_VAR: 562 case PROGRAM_NAMED_PARAM: 563 case PROGRAM_CONSTANT: 564 case PROGRAM_UNIFORM: 565 this->indirect_addr_consts = true; 566 break; 567 case PROGRAM_IMMEDIATE: 568 assert(!"immediates should not have indirect addressing"); 569 break; 570 default: 571 break; 572 } 573 } 574 } 575 } 576 577 this->instructions.push_tail(inst); 578 579 if (native_integers) 580 try_emit_float_set(ir, op, dst); 581 582 return inst; 583} 584 585 586glsl_to_tgsi_instruction * 587glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, 588 st_dst_reg dst, st_src_reg src0, st_src_reg src1) 589{ 590 return emit(ir, op, dst, src0, src1, undef_src); 591} 592 593glsl_to_tgsi_instruction * 594glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, 595 st_dst_reg dst, st_src_reg src0) 596{ 597 assert(dst.writemask != 0); 598 return emit(ir, op, dst, src0, undef_src, undef_src); 599} 600 601glsl_to_tgsi_instruction * 602glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op) 603{ 604 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src); 605} 606 607 /** 608 * Emits the code to convert the result of float SET instructions to integers. 609 */ 610void 611glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op, 612 st_dst_reg dst) 613{ 614 if ((op == TGSI_OPCODE_SEQ || 615 op == TGSI_OPCODE_SNE || 616 op == TGSI_OPCODE_SGE || 617 op == TGSI_OPCODE_SLT)) 618 { 619 st_src_reg src = st_src_reg(dst); 620 src.negate = ~src.negate; 621 dst.type = GLSL_TYPE_FLOAT; 622 emit(ir, TGSI_OPCODE_F2I, dst, src); 623 } 624} 625 626/** 627 * Determines whether to use an integer, unsigned integer, or float opcode 628 * based on the operands and input opcode, then emits the result. 629 */ 630unsigned 631glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op, 632 st_dst_reg dst, 633 st_src_reg src0, st_src_reg src1) 634{ 635 int type = GLSL_TYPE_FLOAT; 636 637 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT) 638 type = GLSL_TYPE_FLOAT; 639 else if (native_integers) 640 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type; 641 642#define case4(c, f, i, u) \ 643 case TGSI_OPCODE_##c: \ 644 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \ 645 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \ 646 else op = TGSI_OPCODE_##f; \ 647 break; 648#define case3(f, i, u) case4(f, f, i, u) 649#define case2fi(f, i) case4(f, f, i, i) 650#define case2iu(i, u) case4(i, LAST, i, u) 651 652 switch(op) { 653 case2fi(ADD, UADD); 654 case2fi(MUL, UMUL); 655 case2fi(MAD, UMAD); 656 case3(DIV, IDIV, UDIV); 657 case3(MAX, IMAX, UMAX); 658 case3(MIN, IMIN, UMIN); 659 case2iu(MOD, UMOD); 660 661 case2fi(SEQ, USEQ); 662 case2fi(SNE, USNE); 663 case3(SGE, ISGE, USGE); 664 case3(SLT, ISLT, USLT); 665 666 case2iu(ISHR, USHR); 667 668 default: break; 669 } 670 671 assert(op != TGSI_OPCODE_LAST); 672 return op; 673} 674 675glsl_to_tgsi_instruction * 676glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir, 677 st_dst_reg dst, st_src_reg src0, st_src_reg src1, 678 unsigned elements) 679{ 680 static const unsigned dot_opcodes[] = { 681 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4 682 }; 683 684 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1); 685} 686 687/** 688 * Emits TGSI scalar opcodes to produce unique answers across channels. 689 * 690 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X 691 * channel determines the result across all channels. So to do a vec4 692 * of this operation, we want to emit a scalar per source channel used 693 * to produce dest channels. 694 */ 695void 696glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, 697 st_dst_reg dst, 698 st_src_reg orig_src0, st_src_reg orig_src1) 699{ 700 int i, j; 701 int done_mask = ~dst.writemask; 702 703 /* TGSI RCP is a scalar operation splatting results to all channels, 704 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our 705 * dst channels. 706 */ 707 for (i = 0; i < 4; i++) { 708 GLuint this_mask = (1 << i); 709 glsl_to_tgsi_instruction *inst; 710 st_src_reg src0 = orig_src0; 711 st_src_reg src1 = orig_src1; 712 713 if (done_mask & this_mask) 714 continue; 715 716 GLuint src0_swiz = GET_SWZ(src0.swizzle, i); 717 GLuint src1_swiz = GET_SWZ(src1.swizzle, i); 718 for (j = i + 1; j < 4; j++) { 719 /* If there is another enabled component in the destination that is 720 * derived from the same inputs, generate its value on this pass as 721 * well. 722 */ 723 if (!(done_mask & (1 << j)) && 724 GET_SWZ(src0.swizzle, j) == src0_swiz && 725 GET_SWZ(src1.swizzle, j) == src1_swiz) { 726 this_mask |= (1 << j); 727 } 728 } 729 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz, 730 src0_swiz, src0_swiz); 731 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz, 732 src1_swiz, src1_swiz); 733 734 inst = emit(ir, op, dst, src0, src1); 735 inst->dst.writemask = this_mask; 736 done_mask |= this_mask; 737 } 738} 739 740void 741glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, 742 st_dst_reg dst, st_src_reg src0) 743{ 744 st_src_reg undef = undef_src; 745 746 undef.swizzle = SWIZZLE_XXXX; 747 748 emit_scalar(ir, op, dst, src0, undef); 749} 750 751void 752glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir, 753 st_dst_reg dst, st_src_reg src0) 754{ 755 int op = TGSI_OPCODE_ARL; 756 757 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT) 758 op = TGSI_OPCODE_UARL; 759 760 emit(NULL, op, dst, src0); 761} 762 763/** 764 * Emit an TGSI_OPCODE_SCS instruction 765 * 766 * The \c SCS opcode functions a bit differently than the other TGSI opcodes. 767 * Instead of splatting its result across all four components of the 768 * destination, it writes one value to the \c x component and another value to 769 * the \c y component. 770 * 771 * \param ir IR instruction being processed 772 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending 773 * on which value is desired. 774 * \param dst Destination register 775 * \param src Source register 776 */ 777void 778glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op, 779 st_dst_reg dst, 780 const st_src_reg &src) 781{ 782 /* Vertex programs cannot use the SCS opcode. 783 */ 784 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) { 785 emit_scalar(ir, op, dst, src); 786 return; 787 } 788 789 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1; 790 const unsigned scs_mask = (1U << component); 791 int done_mask = ~dst.writemask; 792 st_src_reg tmp; 793 794 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS); 795 796 /* If there are compnents in the destination that differ from the component 797 * that will be written by the SCS instrution, we'll need a temporary. 798 */ 799 if (scs_mask != unsigned(dst.writemask)) { 800 tmp = get_temp(glsl_type::vec4_type); 801 } 802 803 for (unsigned i = 0; i < 4; i++) { 804 unsigned this_mask = (1U << i); 805 st_src_reg src0 = src; 806 807 if ((done_mask & this_mask) != 0) 808 continue; 809 810 /* The source swizzle specified which component of the source generates 811 * sine / cosine for the current component in the destination. The SCS 812 * instruction requires that this value be swizzle to the X component. 813 * Replace the current swizzle with a swizzle that puts the source in 814 * the X component. 815 */ 816 unsigned src0_swiz = GET_SWZ(src.swizzle, i); 817 818 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz, 819 src0_swiz, src0_swiz); 820 for (unsigned j = i + 1; j < 4; j++) { 821 /* If there is another enabled component in the destination that is 822 * derived from the same inputs, generate its value on this pass as 823 * well. 824 */ 825 if (!(done_mask & (1 << j)) && 826 GET_SWZ(src0.swizzle, j) == src0_swiz) { 827 this_mask |= (1 << j); 828 } 829 } 830 831 if (this_mask != scs_mask) { 832 glsl_to_tgsi_instruction *inst; 833 st_dst_reg tmp_dst = st_dst_reg(tmp); 834 835 /* Emit the SCS instruction. 836 */ 837 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0); 838 inst->dst.writemask = scs_mask; 839 840 /* Move the result of the SCS instruction to the desired location in 841 * the destination. 842 */ 843 tmp.swizzle = MAKE_SWIZZLE4(component, component, 844 component, component); 845 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp); 846 inst->dst.writemask = this_mask; 847 } else { 848 /* Emit the SCS instruction to write directly to the destination. 849 */ 850 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0); 851 inst->dst.writemask = scs_mask; 852 } 853 854 done_mask |= this_mask; 855 } 856} 857 858int 859glsl_to_tgsi_visitor::add_constant(gl_register_file file, 860 gl_constant_value values[4], int size, int datatype, 861 GLuint *swizzle_out) 862{ 863 if (file == PROGRAM_CONSTANT) { 864 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values, 865 size, datatype, swizzle_out); 866 } else { 867 int index = 0; 868 immediate_storage *entry; 869 assert(file == PROGRAM_IMMEDIATE); 870 871 /* Search immediate storage to see if we already have an identical 872 * immediate that we can use instead of adding a duplicate entry. 873 */ 874 foreach_iter(exec_list_iterator, iter, this->immediates) { 875 entry = (immediate_storage *)iter.get(); 876 877 if (entry->size == size && 878 entry->type == datatype && 879 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) { 880 return index; 881 } 882 index++; 883 } 884 885 /* Add this immediate to the list. */ 886 entry = new(mem_ctx) immediate_storage(values, size, datatype); 887 this->immediates.push_tail(entry); 888 this->num_immediates++; 889 return index; 890 } 891} 892 893st_src_reg 894glsl_to_tgsi_visitor::st_src_reg_for_float(float val) 895{ 896 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT); 897 union gl_constant_value uval; 898 899 uval.f = val; 900 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle); 901 902 return src; 903} 904 905st_src_reg 906glsl_to_tgsi_visitor::st_src_reg_for_int(int val) 907{ 908 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT); 909 union gl_constant_value uval; 910 911 assert(native_integers); 912 913 uval.i = val; 914 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle); 915 916 return src; 917} 918 919st_src_reg 920glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val) 921{ 922 if (native_integers) 923 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) : 924 st_src_reg_for_int(val); 925 else 926 return st_src_reg_for_float(val); 927} 928 929static int 930type_size(const struct glsl_type *type) 931{ 932 unsigned int i; 933 int size; 934 935 switch (type->base_type) { 936 case GLSL_TYPE_UINT: 937 case GLSL_TYPE_INT: 938 case GLSL_TYPE_FLOAT: 939 case GLSL_TYPE_BOOL: 940 if (type->is_matrix()) { 941 return type->matrix_columns; 942 } else { 943 /* Regardless of size of vector, it gets a vec4. This is bad 944 * packing for things like floats, but otherwise arrays become a 945 * mess. Hopefully a later pass over the code can pack scalars 946 * down if appropriate. 947 */ 948 return 1; 949 } 950 case GLSL_TYPE_ARRAY: 951 assert(type->length > 0); 952 return type_size(type->fields.array) * type->length; 953 case GLSL_TYPE_STRUCT: 954 size = 0; 955 for (i = 0; i < type->length; i++) { 956 size += type_size(type->fields.structure[i].type); 957 } 958 return size; 959 case GLSL_TYPE_SAMPLER: 960 /* Samplers take up one slot in UNIFORMS[], but they're baked in 961 * at link time. 962 */ 963 return 1; 964 default: 965 assert(0); 966 return 0; 967 } 968} 969 970/** 971 * In the initial pass of codegen, we assign temporary numbers to 972 * intermediate results. (not SSA -- variable assignments will reuse 973 * storage). 974 */ 975st_src_reg 976glsl_to_tgsi_visitor::get_temp(const glsl_type *type) 977{ 978 st_src_reg src; 979 980 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT; 981 src.file = PROGRAM_TEMPORARY; 982 src.index = next_temp; 983 src.reladdr = NULL; 984 next_temp += type_size(type); 985 986 if (type->is_array() || type->is_record()) { 987 src.swizzle = SWIZZLE_NOOP; 988 } else { 989 src.swizzle = swizzle_for_size(type->vector_elements); 990 } 991 src.negate = 0; 992 993 return src; 994} 995 996variable_storage * 997glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var) 998{ 999 1000 variable_storage *entry; 1001 1002 foreach_iter(exec_list_iterator, iter, this->variables) { 1003 entry = (variable_storage *)iter.get(); 1004 1005 if (entry->var == var) 1006 return entry; 1007 } 1008 1009 return NULL; 1010} 1011 1012void 1013glsl_to_tgsi_visitor::visit(ir_variable *ir) 1014{ 1015 if (strcmp(ir->name, "gl_FragCoord") == 0) { 1016 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog; 1017 1018 fp->OriginUpperLeft = ir->origin_upper_left; 1019 fp->PixelCenterInteger = ir->pixel_center_integer; 1020 } 1021 1022 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) { 1023 unsigned int i; 1024 const ir_state_slot *const slots = ir->state_slots; 1025 assert(ir->state_slots != NULL); 1026 1027 /* Check if this statevar's setup in the STATE file exactly 1028 * matches how we'll want to reference it as a 1029 * struct/array/whatever. If not, then we need to move it into 1030 * temporary storage and hope that it'll get copy-propagated 1031 * out. 1032 */ 1033 for (i = 0; i < ir->num_state_slots; i++) { 1034 if (slots[i].swizzle != SWIZZLE_XYZW) { 1035 break; 1036 } 1037 } 1038 1039 variable_storage *storage; 1040 st_dst_reg dst; 1041 if (i == ir->num_state_slots) { 1042 /* We'll set the index later. */ 1043 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1); 1044 this->variables.push_tail(storage); 1045 1046 dst = undef_dst; 1047 } else { 1048 /* The variable_storage constructor allocates slots based on the size 1049 * of the type. However, this had better match the number of state 1050 * elements that we're going to copy into the new temporary. 1051 */ 1052 assert((int) ir->num_state_slots == type_size(ir->type)); 1053 1054 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY, 1055 this->next_temp); 1056 this->variables.push_tail(storage); 1057 this->next_temp += type_size(ir->type); 1058 1059 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index, 1060 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT)); 1061 } 1062 1063 1064 for (unsigned int i = 0; i < ir->num_state_slots; i++) { 1065 int index = _mesa_add_state_reference(this->prog->Parameters, 1066 (gl_state_index *)slots[i].tokens); 1067 1068 if (storage->file == PROGRAM_STATE_VAR) { 1069 if (storage->index == -1) { 1070 storage->index = index; 1071 } else { 1072 assert(index == storage->index + (int)i); 1073 } 1074 } else { 1075 st_src_reg src(PROGRAM_STATE_VAR, index, 1076 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT); 1077 src.swizzle = slots[i].swizzle; 1078 emit(ir, TGSI_OPCODE_MOV, dst, src); 1079 /* even a float takes up a whole vec4 reg in a struct/array. */ 1080 dst.index++; 1081 } 1082 } 1083 1084 if (storage->file == PROGRAM_TEMPORARY && 1085 dst.index != storage->index + (int) ir->num_state_slots) { 1086 fail_link(this->shader_program, 1087 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n", 1088 ir->name, dst.index - storage->index, 1089 type_size(ir->type)); 1090 } 1091 } 1092} 1093 1094void 1095glsl_to_tgsi_visitor::visit(ir_loop *ir) 1096{ 1097 ir_dereference_variable *counter = NULL; 1098 1099 if (ir->counter != NULL) 1100 counter = new(ir) ir_dereference_variable(ir->counter); 1101 1102 if (ir->from != NULL) { 1103 assert(ir->counter != NULL); 1104 1105 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL); 1106 1107 a->accept(this); 1108 delete a; 1109 } 1110 1111 emit(NULL, TGSI_OPCODE_BGNLOOP); 1112 1113 if (ir->to) { 1114 ir_expression *e = 1115 new(ir) ir_expression(ir->cmp, glsl_type::bool_type, 1116 counter, ir->to); 1117 ir_if *if_stmt = new(ir) ir_if(e); 1118 1119 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break); 1120 1121 if_stmt->then_instructions.push_tail(brk); 1122 1123 if_stmt->accept(this); 1124 1125 delete if_stmt; 1126 delete e; 1127 delete brk; 1128 } 1129 1130 visit_exec_list(&ir->body_instructions, this); 1131 1132 if (ir->increment) { 1133 ir_expression *e = 1134 new(ir) ir_expression(ir_binop_add, counter->type, 1135 counter, ir->increment); 1136 1137 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL); 1138 1139 a->accept(this); 1140 delete a; 1141 delete e; 1142 } 1143 1144 emit(NULL, TGSI_OPCODE_ENDLOOP); 1145} 1146 1147void 1148glsl_to_tgsi_visitor::visit(ir_loop_jump *ir) 1149{ 1150 switch (ir->mode) { 1151 case ir_loop_jump::jump_break: 1152 emit(NULL, TGSI_OPCODE_BRK); 1153 break; 1154 case ir_loop_jump::jump_continue: 1155 emit(NULL, TGSI_OPCODE_CONT); 1156 break; 1157 } 1158} 1159 1160 1161void 1162glsl_to_tgsi_visitor::visit(ir_function_signature *ir) 1163{ 1164 assert(0); 1165 (void)ir; 1166} 1167 1168void 1169glsl_to_tgsi_visitor::visit(ir_function *ir) 1170{ 1171 /* Ignore function bodies other than main() -- we shouldn't see calls to 1172 * them since they should all be inlined before we get to glsl_to_tgsi. 1173 */ 1174 if (strcmp(ir->name, "main") == 0) { 1175 const ir_function_signature *sig; 1176 exec_list empty; 1177 1178 sig = ir->matching_signature(&empty); 1179 1180 assert(sig); 1181 1182 foreach_iter(exec_list_iterator, iter, sig->body) { 1183 ir_instruction *ir = (ir_instruction *)iter.get(); 1184 1185 ir->accept(this); 1186 } 1187 } 1188} 1189 1190bool 1191glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand) 1192{ 1193 int nonmul_operand = 1 - mul_operand; 1194 st_src_reg a, b, c; 1195 st_dst_reg result_dst; 1196 1197 ir_expression *expr = ir->operands[mul_operand]->as_expression(); 1198 if (!expr || expr->operation != ir_binop_mul) 1199 return false; 1200 1201 expr->operands[0]->accept(this); 1202 a = this->result; 1203 expr->operands[1]->accept(this); 1204 b = this->result; 1205 ir->operands[nonmul_operand]->accept(this); 1206 c = this->result; 1207 1208 this->result = get_temp(ir->type); 1209 result_dst = st_dst_reg(this->result); 1210 result_dst.writemask = (1 << ir->type->vector_elements) - 1; 1211 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c); 1212 1213 return true; 1214} 1215 1216/** 1217 * Emit MAD(a, -b, a) instead of AND(a, NOT(b)) 1218 * 1219 * The logic values are 1.0 for true and 0.0 for false. Logical-and is 1220 * implemented using multiplication, and logical-or is implemented using 1221 * addition. Logical-not can be implemented as (true - x), or (1.0 - x). 1222 * As result, the logical expression (a & !b) can be rewritten as: 1223 * 1224 * - a * !b 1225 * - a * (1 - b) 1226 * - (a * 1) - (a * b) 1227 * - a + -(a * b) 1228 * - a + (a * -b) 1229 * 1230 * This final expression can be implemented as a single MAD(a, -b, a) 1231 * instruction. 1232 */ 1233bool 1234glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand) 1235{ 1236 const int other_operand = 1 - try_operand; 1237 st_src_reg a, b; 1238 1239 ir_expression *expr = ir->operands[try_operand]->as_expression(); 1240 if (!expr || expr->operation != ir_unop_logic_not) 1241 return false; 1242 1243 ir->operands[other_operand]->accept(this); 1244 a = this->result; 1245 expr->operands[0]->accept(this); 1246 b = this->result; 1247 1248 b.negate = ~b.negate; 1249 1250 this->result = get_temp(ir->type); 1251 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a); 1252 1253 return true; 1254} 1255 1256bool 1257glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir) 1258{ 1259 /* Saturates were only introduced to vertex programs in 1260 * NV_vertex_program3, so don't give them to drivers in the VP. 1261 */ 1262 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) 1263 return false; 1264 1265 ir_rvalue *sat_src = ir->as_rvalue_to_saturate(); 1266 if (!sat_src) 1267 return false; 1268 1269 sat_src->accept(this); 1270 st_src_reg src = this->result; 1271 1272 /* If we generated an expression instruction into a temporary in 1273 * processing the saturate's operand, apply the saturate to that 1274 * instruction. Otherwise, generate a MOV to do the saturate. 1275 * 1276 * Note that we have to be careful to only do this optimization if 1277 * the instruction in question was what generated src->result. For 1278 * example, ir_dereference_array might generate a MUL instruction 1279 * to create the reladdr, and return us a src reg using that 1280 * reladdr. That MUL result is not the value we're trying to 1281 * saturate. 1282 */ 1283 ir_expression *sat_src_expr = sat_src->as_expression(); 1284 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul || 1285 sat_src_expr->operation == ir_binop_add || 1286 sat_src_expr->operation == ir_binop_dot)) { 1287 glsl_to_tgsi_instruction *new_inst; 1288 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 1289 new_inst->saturate = true; 1290 } else { 1291 this->result = get_temp(ir->type); 1292 st_dst_reg result_dst = st_dst_reg(this->result); 1293 result_dst.writemask = (1 << ir->type->vector_elements) - 1; 1294 glsl_to_tgsi_instruction *inst; 1295 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src); 1296 inst->saturate = true; 1297 } 1298 1299 return true; 1300} 1301 1302void 1303glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir, 1304 st_src_reg *reg, int *num_reladdr) 1305{ 1306 if (!reg->reladdr) 1307 return; 1308 1309 emit_arl(ir, address_reg, *reg->reladdr); 1310 1311 if (*num_reladdr != 1) { 1312 st_src_reg temp = get_temp(glsl_type::vec4_type); 1313 1314 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg); 1315 *reg = temp; 1316 } 1317 1318 (*num_reladdr)--; 1319} 1320 1321void 1322glsl_to_tgsi_visitor::visit(ir_expression *ir) 1323{ 1324 unsigned int operand; 1325 st_src_reg op[Elements(ir->operands)]; 1326 st_src_reg result_src; 1327 st_dst_reg result_dst; 1328 1329 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c) 1330 */ 1331 if (ir->operation == ir_binop_add) { 1332 if (try_emit_mad(ir, 1)) 1333 return; 1334 if (try_emit_mad(ir, 0)) 1335 return; 1336 } 1337 1338 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b)) 1339 */ 1340 if (ir->operation == ir_binop_logic_and) { 1341 if (try_emit_mad_for_and_not(ir, 1)) 1342 return; 1343 if (try_emit_mad_for_and_not(ir, 0)) 1344 return; 1345 } 1346 1347 if (try_emit_sat(ir)) 1348 return; 1349 1350 if (ir->operation == ir_quadop_vector) 1351 assert(!"ir_quadop_vector should have been lowered"); 1352 1353 for (operand = 0; operand < ir->get_num_operands(); operand++) { 1354 this->result.file = PROGRAM_UNDEFINED; 1355 ir->operands[operand]->accept(this); 1356 if (this->result.file == PROGRAM_UNDEFINED) { 1357 ir_print_visitor v; 1358 printf("Failed to get tree for expression operand:\n"); 1359 ir->operands[operand]->accept(&v); 1360 exit(1); 1361 } 1362 op[operand] = this->result; 1363 1364 /* Matrix expression operands should have been broken down to vector 1365 * operations already. 1366 */ 1367 assert(!ir->operands[operand]->type->is_matrix()); 1368 } 1369 1370 int vector_elements = ir->operands[0]->type->vector_elements; 1371 if (ir->operands[1]) { 1372 vector_elements = MAX2(vector_elements, 1373 ir->operands[1]->type->vector_elements); 1374 } 1375 1376 this->result.file = PROGRAM_UNDEFINED; 1377 1378 /* Storage for our result. Ideally for an assignment we'd be using 1379 * the actual storage for the result here, instead. 1380 */ 1381 result_src = get_temp(ir->type); 1382 /* convenience for the emit functions below. */ 1383 result_dst = st_dst_reg(result_src); 1384 /* Limit writes to the channels that will be used by result_src later. 1385 * This does limit this temp's use as a temporary for multi-instruction 1386 * sequences. 1387 */ 1388 result_dst.writemask = (1 << ir->type->vector_elements) - 1; 1389 1390 switch (ir->operation) { 1391 case ir_unop_logic_not: 1392 if (result_dst.type != GLSL_TYPE_FLOAT) 1393 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]); 1394 else { 1395 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many 1396 * older GPUs implement SEQ using multiple instructions (i915 uses two 1397 * SGE instructions and a MUL instruction). Since our logic values are 1398 * 0.0 and 1.0, 1-x also implements !x. 1399 */ 1400 op[0].negate = ~op[0].negate; 1401 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0)); 1402 } 1403 break; 1404 case ir_unop_neg: 1405 assert(result_dst.type == GLSL_TYPE_FLOAT || result_dst.type == GLSL_TYPE_INT); 1406 if (result_dst.type == GLSL_TYPE_INT) 1407 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]); 1408 else { 1409 op[0].negate = ~op[0].negate; 1410 result_src = op[0]; 1411 } 1412 break; 1413 case ir_unop_abs: 1414 assert(result_dst.type == GLSL_TYPE_FLOAT); 1415 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]); 1416 break; 1417 case ir_unop_sign: 1418 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]); 1419 break; 1420 case ir_unop_rcp: 1421 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]); 1422 break; 1423 1424 case ir_unop_exp2: 1425 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]); 1426 break; 1427 case ir_unop_exp: 1428 case ir_unop_log: 1429 assert(!"not reached: should be handled by ir_explog_to_explog2"); 1430 break; 1431 case ir_unop_log2: 1432 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]); 1433 break; 1434 case ir_unop_sin: 1435 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]); 1436 break; 1437 case ir_unop_cos: 1438 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]); 1439 break; 1440 case ir_unop_sin_reduced: 1441 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]); 1442 break; 1443 case ir_unop_cos_reduced: 1444 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]); 1445 break; 1446 1447 case ir_unop_dFdx: 1448 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]); 1449 break; 1450 case ir_unop_dFdy: 1451 op[0].negate = ~op[0].negate; 1452 emit(ir, TGSI_OPCODE_DDY, result_dst, op[0]); 1453 break; 1454 1455 case ir_unop_noise: { 1456 /* At some point, a motivated person could add a better 1457 * implementation of noise. Currently not even the nvidia 1458 * binary drivers do anything more than this. In any case, the 1459 * place to do this is in the GL state tracker, not the poor 1460 * driver. 1461 */ 1462 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5)); 1463 break; 1464 } 1465 1466 case ir_binop_add: 1467 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); 1468 break; 1469 case ir_binop_sub: 1470 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]); 1471 break; 1472 1473 case ir_binop_mul: 1474 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); 1475 break; 1476 case ir_binop_div: 1477 if (result_dst.type == GLSL_TYPE_FLOAT) 1478 assert(!"not reached: should be handled by ir_div_to_mul_rcp"); 1479 else 1480 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); 1481 break; 1482 case ir_binop_mod: 1483 if (result_dst.type == GLSL_TYPE_FLOAT) 1484 assert(!"ir_binop_mod should have been converted to b * fract(a/b)"); 1485 else 1486 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]); 1487 break; 1488 1489 case ir_binop_less: 1490 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]); 1491 break; 1492 case ir_binop_greater: 1493 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]); 1494 break; 1495 case ir_binop_lequal: 1496 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]); 1497 break; 1498 case ir_binop_gequal: 1499 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]); 1500 break; 1501 case ir_binop_equal: 1502 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); 1503 break; 1504 case ir_binop_nequal: 1505 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); 1506 break; 1507 case ir_binop_all_equal: 1508 /* "==" operator producing a scalar boolean. */ 1509 if (ir->operands[0]->type->is_vector() || 1510 ir->operands[1]->type->is_vector()) { 1511 st_src_reg temp = get_temp(native_integers ? 1512 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) : 1513 glsl_type::vec4_type); 1514 1515 if (native_integers) { 1516 st_dst_reg temp_dst = st_dst_reg(temp); 1517 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp); 1518 1519 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]); 1520 1521 /* Emit 1-3 AND operations to combine the SEQ results. */ 1522 switch (ir->operands[0]->type->vector_elements) { 1523 case 2: 1524 break; 1525 case 3: 1526 temp_dst.writemask = WRITEMASK_Y; 1527 temp1.swizzle = SWIZZLE_YYYY; 1528 temp2.swizzle = SWIZZLE_ZZZZ; 1529 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); 1530 break; 1531 case 4: 1532 temp_dst.writemask = WRITEMASK_X; 1533 temp1.swizzle = SWIZZLE_XXXX; 1534 temp2.swizzle = SWIZZLE_YYYY; 1535 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); 1536 temp_dst.writemask = WRITEMASK_Y; 1537 temp1.swizzle = SWIZZLE_ZZZZ; 1538 temp2.swizzle = SWIZZLE_WWWW; 1539 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); 1540 } 1541 1542 temp1.swizzle = SWIZZLE_XXXX; 1543 temp2.swizzle = SWIZZLE_YYYY; 1544 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2); 1545 } else { 1546 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); 1547 1548 /* After the dot-product, the value will be an integer on the 1549 * range [0,4]. Zero becomes 1.0, and positive values become zero. 1550 */ 1551 emit_dp(ir, result_dst, temp, temp, vector_elements); 1552 1553 /* Negating the result of the dot-product gives values on the range 1554 * [-4, 0]. Zero becomes 1.0, and negative values become zero. 1555 * This is achieved using SGE. 1556 */ 1557 st_src_reg sge_src = result_src; 1558 sge_src.negate = ~sge_src.negate; 1559 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0)); 1560 } 1561 } else { 1562 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); 1563 } 1564 break; 1565 case ir_binop_any_nequal: 1566 /* "!=" operator producing a scalar boolean. */ 1567 if (ir->operands[0]->type->is_vector() || 1568 ir->operands[1]->type->is_vector()) { 1569 st_src_reg temp = get_temp(native_integers ? 1570 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) : 1571 glsl_type::vec4_type); 1572 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); 1573 1574 if (native_integers) { 1575 st_dst_reg temp_dst = st_dst_reg(temp); 1576 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp); 1577 1578 /* Emit 1-3 OR operations to combine the SNE results. */ 1579 switch (ir->operands[0]->type->vector_elements) { 1580 case 2: 1581 break; 1582 case 3: 1583 temp_dst.writemask = WRITEMASK_Y; 1584 temp1.swizzle = SWIZZLE_YYYY; 1585 temp2.swizzle = SWIZZLE_ZZZZ; 1586 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); 1587 break; 1588 case 4: 1589 temp_dst.writemask = WRITEMASK_X; 1590 temp1.swizzle = SWIZZLE_XXXX; 1591 temp2.swizzle = SWIZZLE_YYYY; 1592 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); 1593 temp_dst.writemask = WRITEMASK_Y; 1594 temp1.swizzle = SWIZZLE_ZZZZ; 1595 temp2.swizzle = SWIZZLE_WWWW; 1596 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); 1597 } 1598 1599 temp1.swizzle = SWIZZLE_XXXX; 1600 temp2.swizzle = SWIZZLE_YYYY; 1601 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2); 1602 } else { 1603 /* After the dot-product, the value will be an integer on the 1604 * range [0,4]. Zero stays zero, and positive values become 1.0. 1605 */ 1606 glsl_to_tgsi_instruction *const dp = 1607 emit_dp(ir, result_dst, temp, temp, vector_elements); 1608 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) { 1609 /* The clamping to [0,1] can be done for free in the fragment 1610 * shader with a saturate. 1611 */ 1612 dp->saturate = true; 1613 } else { 1614 /* Negating the result of the dot-product gives values on the range 1615 * [-4, 0]. Zero stays zero, and negative values become 1.0. This 1616 * achieved using SLT. 1617 */ 1618 st_src_reg slt_src = result_src; 1619 slt_src.negate = ~slt_src.negate; 1620 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); 1621 } 1622 } 1623 } else { 1624 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); 1625 } 1626 break; 1627 1628 case ir_unop_any: { 1629 assert(ir->operands[0]->type->is_vector()); 1630 1631 /* After the dot-product, the value will be an integer on the 1632 * range [0,4]. Zero stays zero, and positive values become 1.0. 1633 */ 1634 glsl_to_tgsi_instruction *const dp = 1635 emit_dp(ir, result_dst, op[0], op[0], 1636 ir->operands[0]->type->vector_elements); 1637 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB && 1638 result_dst.type == GLSL_TYPE_FLOAT) { 1639 /* The clamping to [0,1] can be done for free in the fragment 1640 * shader with a saturate. 1641 */ 1642 dp->saturate = true; 1643 } else if (result_dst.type == GLSL_TYPE_FLOAT) { 1644 /* Negating the result of the dot-product gives values on the range 1645 * [-4, 0]. Zero stays zero, and negative values become 1.0. This 1646 * is achieved using SLT. 1647 */ 1648 st_src_reg slt_src = result_src; 1649 slt_src.negate = ~slt_src.negate; 1650 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); 1651 } 1652 else { 1653 /* Use SNE 0 if integers are being used as boolean values. */ 1654 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0)); 1655 } 1656 break; 1657 } 1658 1659 case ir_binop_logic_xor: 1660 if (native_integers) 1661 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); 1662 else 1663 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); 1664 break; 1665 1666 case ir_binop_logic_or: { 1667 if (native_integers) { 1668 /* If integers are used as booleans, we can use an actual "or" 1669 * instruction. 1670 */ 1671 assert(native_integers); 1672 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); 1673 } else { 1674 /* After the addition, the value will be an integer on the 1675 * range [0,2]. Zero stays zero, and positive values become 1.0. 1676 */ 1677 glsl_to_tgsi_instruction *add = 1678 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); 1679 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) { 1680 /* The clamping to [0,1] can be done for free in the fragment 1681 * shader with a saturate if floats are being used as boolean values. 1682 */ 1683 add->saturate = true; 1684 } else { 1685 /* Negating the result of the addition gives values on the range 1686 * [-2, 0]. Zero stays zero, and negative values become 1.0. This 1687 * is achieved using SLT. 1688 */ 1689 st_src_reg slt_src = result_src; 1690 slt_src.negate = ~slt_src.negate; 1691 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); 1692 } 1693 } 1694 break; 1695 } 1696 1697 case ir_binop_logic_and: 1698 /* If native integers are disabled, the bool args are stored as float 0.0 1699 * or 1.0, so "mul" gives us "and". If they're enabled, just use the 1700 * actual AND opcode. 1701 */ 1702 if (native_integers) 1703 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); 1704 else 1705 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); 1706 break; 1707 1708 case ir_binop_dot: 1709 assert(ir->operands[0]->type->is_vector()); 1710 assert(ir->operands[0]->type == ir->operands[1]->type); 1711 emit_dp(ir, result_dst, op[0], op[1], 1712 ir->operands[0]->type->vector_elements); 1713 break; 1714 1715 case ir_unop_sqrt: 1716 /* sqrt(x) = x * rsq(x). */ 1717 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]); 1718 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]); 1719 /* For incoming channels <= 0, set the result to 0. */ 1720 op[0].negate = ~op[0].negate; 1721 emit(ir, TGSI_OPCODE_CMP, result_dst, 1722 op[0], result_src, st_src_reg_for_float(0.0)); 1723 break; 1724 case ir_unop_rsq: 1725 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]); 1726 break; 1727 case ir_unop_i2f: 1728 if (native_integers) { 1729 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]); 1730 break; 1731 } 1732 /* fallthrough to next case otherwise */ 1733 case ir_unop_b2f: 1734 if (native_integers) { 1735 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0)); 1736 break; 1737 } 1738 /* fallthrough to next case otherwise */ 1739 case ir_unop_i2u: 1740 case ir_unop_u2i: 1741 /* Converting between signed and unsigned integers is a no-op. */ 1742 result_src = op[0]; 1743 break; 1744 case ir_unop_b2i: 1745 if (native_integers) { 1746 /* Booleans are stored as integers using ~0 for true and 0 for false. 1747 * GLSL requires that int(bool) return 1 for true and 0 for false. 1748 * This conversion is done with AND, but it could be done with NEG. 1749 */ 1750 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1)); 1751 } else { 1752 /* Booleans and integers are both stored as floats when native 1753 * integers are disabled. 1754 */ 1755 result_src = op[0]; 1756 } 1757 break; 1758 case ir_unop_f2i: 1759 if (native_integers) 1760 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]); 1761 else 1762 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); 1763 break; 1764 case ir_unop_f2b: 1765 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); 1766 break; 1767 case ir_unop_i2b: 1768 if (native_integers) 1769 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]); 1770 else 1771 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); 1772 break; 1773 case ir_unop_trunc: 1774 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); 1775 break; 1776 case ir_unop_ceil: 1777 op[0].negate = ~op[0].negate; 1778 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]); 1779 result_src.negate = ~result_src.negate; 1780 break; 1781 case ir_unop_floor: 1782 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]); 1783 break; 1784 case ir_unop_fract: 1785 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]); 1786 break; 1787 1788 case ir_binop_min: 1789 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]); 1790 break; 1791 case ir_binop_max: 1792 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]); 1793 break; 1794 case ir_binop_pow: 1795 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]); 1796 break; 1797 1798 case ir_unop_bit_not: 1799 if (native_integers) { 1800 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]); 1801 break; 1802 } 1803 case ir_unop_u2f: 1804 if (native_integers) { 1805 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]); 1806 break; 1807 } 1808 case ir_binop_lshift: 1809 if (native_integers) { 1810 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]); 1811 break; 1812 } 1813 case ir_binop_rshift: 1814 if (native_integers) { 1815 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]); 1816 break; 1817 } 1818 case ir_binop_bit_and: 1819 if (native_integers) { 1820 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); 1821 break; 1822 } 1823 case ir_binop_bit_xor: 1824 if (native_integers) { 1825 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); 1826 break; 1827 } 1828 case ir_binop_bit_or: 1829 if (native_integers) { 1830 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); 1831 break; 1832 } 1833 case ir_unop_round_even: 1834 assert(!"GLSL 1.30 features unsupported"); 1835 break; 1836 1837 case ir_quadop_vector: 1838 /* This operation should have already been handled. 1839 */ 1840 assert(!"Should not get here."); 1841 break; 1842 } 1843 1844 this->result = result_src; 1845} 1846 1847 1848void 1849glsl_to_tgsi_visitor::visit(ir_swizzle *ir) 1850{ 1851 st_src_reg src; 1852 int i; 1853 int swizzle[4]; 1854 1855 /* Note that this is only swizzles in expressions, not those on the left 1856 * hand side of an assignment, which do write masking. See ir_assignment 1857 * for that. 1858 */ 1859 1860 ir->val->accept(this); 1861 src = this->result; 1862 assert(src.file != PROGRAM_UNDEFINED); 1863 1864 for (i = 0; i < 4; i++) { 1865 if (i < ir->type->vector_elements) { 1866 switch (i) { 1867 case 0: 1868 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x); 1869 break; 1870 case 1: 1871 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y); 1872 break; 1873 case 2: 1874 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z); 1875 break; 1876 case 3: 1877 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w); 1878 break; 1879 } 1880 } else { 1881 /* If the type is smaller than a vec4, replicate the last 1882 * channel out. 1883 */ 1884 swizzle[i] = swizzle[ir->type->vector_elements - 1]; 1885 } 1886 } 1887 1888 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]); 1889 1890 this->result = src; 1891} 1892 1893void 1894glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir) 1895{ 1896 variable_storage *entry = find_variable_storage(ir->var); 1897 ir_variable *var = ir->var; 1898 1899 if (!entry) { 1900 switch (var->mode) { 1901 case ir_var_uniform: 1902 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM, 1903 var->location); 1904 this->variables.push_tail(entry); 1905 break; 1906 case ir_var_in: 1907 case ir_var_inout: 1908 /* The linker assigns locations for varyings and attributes, 1909 * including deprecated builtins (like gl_Color), user-assign 1910 * generic attributes (glBindVertexLocation), and 1911 * user-defined varyings. 1912 * 1913 * FINISHME: We would hit this path for function arguments. Fix! 1914 */ 1915 assert(var->location != -1); 1916 entry = new(mem_ctx) variable_storage(var, 1917 PROGRAM_INPUT, 1918 var->location); 1919 break; 1920 case ir_var_out: 1921 assert(var->location != -1); 1922 entry = new(mem_ctx) variable_storage(var, 1923 PROGRAM_OUTPUT, 1924 var->location); 1925 break; 1926 case ir_var_system_value: 1927 entry = new(mem_ctx) variable_storage(var, 1928 PROGRAM_SYSTEM_VALUE, 1929 var->location); 1930 break; 1931 case ir_var_auto: 1932 case ir_var_temporary: 1933 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY, 1934 this->next_temp); 1935 this->variables.push_tail(entry); 1936 1937 next_temp += type_size(var->type); 1938 break; 1939 } 1940 1941 if (!entry) { 1942 printf("Failed to make storage for %s\n", var->name); 1943 exit(1); 1944 } 1945 } 1946 1947 this->result = st_src_reg(entry->file, entry->index, var->type); 1948 if (!native_integers) 1949 this->result.type = GLSL_TYPE_FLOAT; 1950} 1951 1952void 1953glsl_to_tgsi_visitor::visit(ir_dereference_array *ir) 1954{ 1955 ir_constant *index; 1956 st_src_reg src; 1957 int element_size = type_size(ir->type); 1958 1959 index = ir->array_index->constant_expression_value(); 1960 1961 ir->array->accept(this); 1962 src = this->result; 1963 1964 if (index) { 1965 src.index += index->value.i[0] * element_size; 1966 } else { 1967 /* Variable index array dereference. It eats the "vec4" of the 1968 * base of the array and an index that offsets the TGSI register 1969 * index. 1970 */ 1971 ir->array_index->accept(this); 1972 1973 st_src_reg index_reg; 1974 1975 if (element_size == 1) { 1976 index_reg = this->result; 1977 } else { 1978 index_reg = get_temp(native_integers ? 1979 glsl_type::int_type : glsl_type::float_type); 1980 1981 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg), 1982 this->result, st_src_reg_for_type(index_reg.type, element_size)); 1983 } 1984 1985 /* If there was already a relative address register involved, add the 1986 * new and the old together to get the new offset. 1987 */ 1988 if (src.reladdr != NULL) { 1989 st_src_reg accum_reg = get_temp(native_integers ? 1990 glsl_type::int_type : glsl_type::float_type); 1991 1992 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg), 1993 index_reg, *src.reladdr); 1994 1995 index_reg = accum_reg; 1996 } 1997 1998 src.reladdr = ralloc(mem_ctx, st_src_reg); 1999 memcpy(src.reladdr, &index_reg, sizeof(index_reg)); 2000 } 2001 2002 /* If the type is smaller than a vec4, replicate the last channel out. */ 2003 if (ir->type->is_scalar() || ir->type->is_vector()) 2004 src.swizzle = swizzle_for_size(ir->type->vector_elements); 2005 else 2006 src.swizzle = SWIZZLE_NOOP; 2007 2008 this->result = src; 2009} 2010 2011void 2012glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) 2013{ 2014 unsigned int i; 2015 const glsl_type *struct_type = ir->record->type; 2016 int offset = 0; 2017 2018 ir->record->accept(this); 2019 2020 for (i = 0; i < struct_type->length; i++) { 2021 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0) 2022 break; 2023 offset += type_size(struct_type->fields.structure[i].type); 2024 } 2025 2026 /* If the type is smaller than a vec4, replicate the last channel out. */ 2027 if (ir->type->is_scalar() || ir->type->is_vector()) 2028 this->result.swizzle = swizzle_for_size(ir->type->vector_elements); 2029 else 2030 this->result.swizzle = SWIZZLE_NOOP; 2031 2032 this->result.index += offset; 2033} 2034 2035/** 2036 * We want to be careful in assignment setup to hit the actual storage 2037 * instead of potentially using a temporary like we might with the 2038 * ir_dereference handler. 2039 */ 2040static st_dst_reg 2041get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v) 2042{ 2043 /* The LHS must be a dereference. If the LHS is a variable indexed array 2044 * access of a vector, it must be separated into a series conditional moves 2045 * before reaching this point (see ir_vec_index_to_cond_assign). 2046 */ 2047 assert(ir->as_dereference()); 2048 ir_dereference_array *deref_array = ir->as_dereference_array(); 2049 if (deref_array) { 2050 assert(!deref_array->array->type->is_vector()); 2051 } 2052 2053 /* Use the rvalue deref handler for the most part. We'll ignore 2054 * swizzles in it and write swizzles using writemask, though. 2055 */ 2056 ir->accept(v); 2057 return st_dst_reg(v->result); 2058} 2059 2060/** 2061 * Process the condition of a conditional assignment 2062 * 2063 * Examines the condition of a conditional assignment to generate the optimal 2064 * first operand of a \c CMP instruction. If the condition is a relational 2065 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be 2066 * used as the source for the \c CMP instruction. Otherwise the comparison 2067 * is processed to a boolean result, and the boolean result is used as the 2068 * operand to the CMP instruction. 2069 */ 2070bool 2071glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir) 2072{ 2073 ir_rvalue *src_ir = ir; 2074 bool negate = true; 2075 bool switch_order = false; 2076 2077 ir_expression *const expr = ir->as_expression(); 2078 if ((expr != NULL) && (expr->get_num_operands() == 2)) { 2079 bool zero_on_left = false; 2080 2081 if (expr->operands[0]->is_zero()) { 2082 src_ir = expr->operands[1]; 2083 zero_on_left = true; 2084 } else if (expr->operands[1]->is_zero()) { 2085 src_ir = expr->operands[0]; 2086 zero_on_left = false; 2087 } 2088 2089 /* a is - 0 + - 0 + 2090 * (a < 0) T F F ( a < 0) T F F 2091 * (0 < a) F F T (-a < 0) F F T 2092 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands) 2093 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands) 2094 * (a > 0) F F T (-a < 0) F F T 2095 * (0 > a) T F F ( a < 0) T F F 2096 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands) 2097 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands) 2098 * 2099 * Note that exchanging the order of 0 and 'a' in the comparison simply 2100 * means that the value of 'a' should be negated. 2101 */ 2102 if (src_ir != ir) { 2103 switch (expr->operation) { 2104 case ir_binop_less: 2105 switch_order = false; 2106 negate = zero_on_left; 2107 break; 2108 2109 case ir_binop_greater: 2110 switch_order = false; 2111 negate = !zero_on_left; 2112 break; 2113 2114 case ir_binop_lequal: 2115 switch_order = true; 2116 negate = !zero_on_left; 2117 break; 2118 2119 case ir_binop_gequal: 2120 switch_order = true; 2121 negate = zero_on_left; 2122 break; 2123 2124 default: 2125 /* This isn't the right kind of comparison afterall, so make sure 2126 * the whole condition is visited. 2127 */ 2128 src_ir = ir; 2129 break; 2130 } 2131 } 2132 } 2133 2134 src_ir->accept(this); 2135 2136 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the 2137 * condition we produced is 0.0 or 1.0. By flipping the sign, we can 2138 * choose which value TGSI_OPCODE_CMP produces without an extra instruction 2139 * computing the condition. 2140 */ 2141 if (negate) 2142 this->result.negate = ~this->result.negate; 2143 2144 return switch_order; 2145} 2146 2147void 2148glsl_to_tgsi_visitor::visit(ir_assignment *ir) 2149{ 2150 st_dst_reg l; 2151 st_src_reg r; 2152 int i; 2153 2154 ir->rhs->accept(this); 2155 r = this->result; 2156 2157 l = get_assignment_lhs(ir->lhs, this); 2158 2159 /* FINISHME: This should really set to the correct maximal writemask for each 2160 * FINISHME: component written (in the loops below). This case can only 2161 * FINISHME: occur for matrices, arrays, and structures. 2162 */ 2163 if (ir->write_mask == 0) { 2164 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector()); 2165 l.writemask = WRITEMASK_XYZW; 2166 } else if (ir->lhs->type->is_scalar() && 2167 ir->lhs->variable_referenced()->mode == ir_var_out) { 2168 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the 2169 * FINISHME: W component of fragment shader output zero, work correctly. 2170 */ 2171 l.writemask = WRITEMASK_XYZW; 2172 } else { 2173 int swizzles[4]; 2174 int first_enabled_chan = 0; 2175 int rhs_chan = 0; 2176 2177 l.writemask = ir->write_mask; 2178 2179 for (int i = 0; i < 4; i++) { 2180 if (l.writemask & (1 << i)) { 2181 first_enabled_chan = GET_SWZ(r.swizzle, i); 2182 break; 2183 } 2184 } 2185 2186 /* Swizzle a small RHS vector into the channels being written. 2187 * 2188 * glsl ir treats write_mask as dictating how many channels are 2189 * present on the RHS while TGSI treats write_mask as just 2190 * showing which channels of the vec4 RHS get written. 2191 */ 2192 for (int i = 0; i < 4; i++) { 2193 if (l.writemask & (1 << i)) 2194 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++); 2195 else 2196 swizzles[i] = first_enabled_chan; 2197 } 2198 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1], 2199 swizzles[2], swizzles[3]); 2200 } 2201 2202 assert(l.file != PROGRAM_UNDEFINED); 2203 assert(r.file != PROGRAM_UNDEFINED); 2204 2205 if (ir->condition) { 2206 const bool switch_order = this->process_move_condition(ir->condition); 2207 st_src_reg condition = this->result; 2208 2209 for (i = 0; i < type_size(ir->lhs->type); i++) { 2210 st_src_reg l_src = st_src_reg(l); 2211 st_src_reg condition_temp = condition; 2212 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements); 2213 2214 if (native_integers) { 2215 /* This is necessary because TGSI's CMP instruction expects the 2216 * condition to be a float, and we store booleans as integers. 2217 * If TGSI had a UCMP instruction or similar, this extra 2218 * instruction would not be necessary. 2219 */ 2220 condition_temp = get_temp(glsl_type::vec4_type); 2221 condition.negate = 0; 2222 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition); 2223 condition_temp.swizzle = condition.swizzle; 2224 } 2225 2226 if (switch_order) { 2227 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r); 2228 } else { 2229 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src); 2230 } 2231 2232 l.index++; 2233 r.index++; 2234 } 2235 } else if (ir->rhs->as_expression() && 2236 this->instructions.get_tail() && 2237 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir && 2238 type_size(ir->lhs->type) == 1 && 2239 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) { 2240 /* To avoid emitting an extra MOV when assigning an expression to a 2241 * variable, emit the last instruction of the expression again, but 2242 * replace the destination register with the target of the assignment. 2243 * Dead code elimination will remove the original instruction. 2244 */ 2245 glsl_to_tgsi_instruction *inst, *new_inst; 2246 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 2247 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]); 2248 new_inst->saturate = inst->saturate; 2249 inst->dead_mask = inst->dst.writemask; 2250 } else { 2251 for (i = 0; i < type_size(ir->lhs->type); i++) { 2252 emit(ir, TGSI_OPCODE_MOV, l, r); 2253 l.index++; 2254 r.index++; 2255 } 2256 } 2257} 2258 2259 2260void 2261glsl_to_tgsi_visitor::visit(ir_constant *ir) 2262{ 2263 st_src_reg src; 2264 GLfloat stack_vals[4] = { 0 }; 2265 gl_constant_value *values = (gl_constant_value *) stack_vals; 2266 GLenum gl_type = GL_NONE; 2267 unsigned int i; 2268 static int in_array = 0; 2269 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE; 2270 2271 /* Unfortunately, 4 floats is all we can get into 2272 * _mesa_add_typed_unnamed_constant. So, make a temp to store an 2273 * aggregate constant and move each constant value into it. If we 2274 * get lucky, copy propagation will eliminate the extra moves. 2275 */ 2276 if (ir->type->base_type == GLSL_TYPE_STRUCT) { 2277 st_src_reg temp_base = get_temp(ir->type); 2278 st_dst_reg temp = st_dst_reg(temp_base); 2279 2280 foreach_iter(exec_list_iterator, iter, ir->components) { 2281 ir_constant *field_value = (ir_constant *)iter.get(); 2282 int size = type_size(field_value->type); 2283 2284 assert(size > 0); 2285 2286 field_value->accept(this); 2287 src = this->result; 2288 2289 for (i = 0; i < (unsigned int)size; i++) { 2290 emit(ir, TGSI_OPCODE_MOV, temp, src); 2291 2292 src.index++; 2293 temp.index++; 2294 } 2295 } 2296 this->result = temp_base; 2297 return; 2298 } 2299 2300 if (ir->type->is_array()) { 2301 st_src_reg temp_base = get_temp(ir->type); 2302 st_dst_reg temp = st_dst_reg(temp_base); 2303 int size = type_size(ir->type->fields.array); 2304 2305 assert(size > 0); 2306 in_array++; 2307 2308 for (i = 0; i < ir->type->length; i++) { 2309 ir->array_elements[i]->accept(this); 2310 src = this->result; 2311 for (int j = 0; j < size; j++) { 2312 emit(ir, TGSI_OPCODE_MOV, temp, src); 2313 2314 src.index++; 2315 temp.index++; 2316 } 2317 } 2318 this->result = temp_base; 2319 in_array--; 2320 return; 2321 } 2322 2323 if (ir->type->is_matrix()) { 2324 st_src_reg mat = get_temp(ir->type); 2325 st_dst_reg mat_column = st_dst_reg(mat); 2326 2327 for (i = 0; i < ir->type->matrix_columns; i++) { 2328 assert(ir->type->base_type == GLSL_TYPE_FLOAT); 2329 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements]; 2330 2331 src = st_src_reg(file, -1, ir->type->base_type); 2332 src.index = add_constant(file, 2333 values, 2334 ir->type->vector_elements, 2335 GL_FLOAT, 2336 &src.swizzle); 2337 emit(ir, TGSI_OPCODE_MOV, mat_column, src); 2338 2339 mat_column.index++; 2340 } 2341 2342 this->result = mat; 2343 return; 2344 } 2345 2346 switch (ir->type->base_type) { 2347 case GLSL_TYPE_FLOAT: 2348 gl_type = GL_FLOAT; 2349 for (i = 0; i < ir->type->vector_elements; i++) { 2350 values[i].f = ir->value.f[i]; 2351 } 2352 break; 2353 case GLSL_TYPE_UINT: 2354 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT; 2355 for (i = 0; i < ir->type->vector_elements; i++) { 2356 if (native_integers) 2357 values[i].u = ir->value.u[i]; 2358 else 2359 values[i].f = ir->value.u[i]; 2360 } 2361 break; 2362 case GLSL_TYPE_INT: 2363 gl_type = native_integers ? GL_INT : GL_FLOAT; 2364 for (i = 0; i < ir->type->vector_elements; i++) { 2365 if (native_integers) 2366 values[i].i = ir->value.i[i]; 2367 else 2368 values[i].f = ir->value.i[i]; 2369 } 2370 break; 2371 case GLSL_TYPE_BOOL: 2372 gl_type = native_integers ? GL_BOOL : GL_FLOAT; 2373 for (i = 0; i < ir->type->vector_elements; i++) { 2374 if (native_integers) 2375 values[i].b = ir->value.b[i]; 2376 else 2377 values[i].f = ir->value.b[i]; 2378 } 2379 break; 2380 default: 2381 assert(!"Non-float/uint/int/bool constant"); 2382 } 2383 2384 this->result = st_src_reg(file, -1, ir->type); 2385 this->result.index = add_constant(file, 2386 values, 2387 ir->type->vector_elements, 2388 gl_type, 2389 &this->result.swizzle); 2390} 2391 2392function_entry * 2393glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig) 2394{ 2395 function_entry *entry; 2396 2397 foreach_iter(exec_list_iterator, iter, this->function_signatures) { 2398 entry = (function_entry *)iter.get(); 2399 2400 if (entry->sig == sig) 2401 return entry; 2402 } 2403 2404 entry = ralloc(mem_ctx, function_entry); 2405 entry->sig = sig; 2406 entry->sig_id = this->next_signature_id++; 2407 entry->bgn_inst = NULL; 2408 2409 /* Allocate storage for all the parameters. */ 2410 foreach_iter(exec_list_iterator, iter, sig->parameters) { 2411 ir_variable *param = (ir_variable *)iter.get(); 2412 variable_storage *storage; 2413 2414 storage = find_variable_storage(param); 2415 assert(!storage); 2416 2417 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY, 2418 this->next_temp); 2419 this->variables.push_tail(storage); 2420 2421 this->next_temp += type_size(param->type); 2422 } 2423 2424 if (!sig->return_type->is_void()) { 2425 entry->return_reg = get_temp(sig->return_type); 2426 } else { 2427 entry->return_reg = undef_src; 2428 } 2429 2430 this->function_signatures.push_tail(entry); 2431 return entry; 2432} 2433 2434void 2435glsl_to_tgsi_visitor::visit(ir_call *ir) 2436{ 2437 glsl_to_tgsi_instruction *call_inst; 2438 ir_function_signature *sig = ir->get_callee(); 2439 function_entry *entry = get_function_signature(sig); 2440 int i; 2441 2442 /* Process in parameters. */ 2443 exec_list_iterator sig_iter = sig->parameters.iterator(); 2444 foreach_iter(exec_list_iterator, iter, *ir) { 2445 ir_rvalue *param_rval = (ir_rvalue *)iter.get(); 2446 ir_variable *param = (ir_variable *)sig_iter.get(); 2447 2448 if (param->mode == ir_var_in || 2449 param->mode == ir_var_inout) { 2450 variable_storage *storage = find_variable_storage(param); 2451 assert(storage); 2452 2453 param_rval->accept(this); 2454 st_src_reg r = this->result; 2455 2456 st_dst_reg l; 2457 l.file = storage->file; 2458 l.index = storage->index; 2459 l.reladdr = NULL; 2460 l.writemask = WRITEMASK_XYZW; 2461 l.cond_mask = COND_TR; 2462 2463 for (i = 0; i < type_size(param->type); i++) { 2464 emit(ir, TGSI_OPCODE_MOV, l, r); 2465 l.index++; 2466 r.index++; 2467 } 2468 } 2469 2470 sig_iter.next(); 2471 } 2472 assert(!sig_iter.has_next()); 2473 2474 /* Emit call instruction */ 2475 call_inst = emit(ir, TGSI_OPCODE_CAL); 2476 call_inst->function = entry; 2477 2478 /* Process out parameters. */ 2479 sig_iter = sig->parameters.iterator(); 2480 foreach_iter(exec_list_iterator, iter, *ir) { 2481 ir_rvalue *param_rval = (ir_rvalue *)iter.get(); 2482 ir_variable *param = (ir_variable *)sig_iter.get(); 2483 2484 if (param->mode == ir_var_out || 2485 param->mode == ir_var_inout) { 2486 variable_storage *storage = find_variable_storage(param); 2487 assert(storage); 2488 2489 st_src_reg r; 2490 r.file = storage->file; 2491 r.index = storage->index; 2492 r.reladdr = NULL; 2493 r.swizzle = SWIZZLE_NOOP; 2494 r.negate = 0; 2495 2496 param_rval->accept(this); 2497 st_dst_reg l = st_dst_reg(this->result); 2498 2499 for (i = 0; i < type_size(param->type); i++) { 2500 emit(ir, TGSI_OPCODE_MOV, l, r); 2501 l.index++; 2502 r.index++; 2503 } 2504 } 2505 2506 sig_iter.next(); 2507 } 2508 assert(!sig_iter.has_next()); 2509 2510 /* Process return value. */ 2511 this->result = entry->return_reg; 2512} 2513 2514void 2515glsl_to_tgsi_visitor::visit(ir_texture *ir) 2516{ 2517 st_src_reg result_src, coord, lod_info, projector, dx, dy, offset; 2518 st_dst_reg result_dst, coord_dst; 2519 glsl_to_tgsi_instruction *inst = NULL; 2520 unsigned opcode = TGSI_OPCODE_NOP; 2521 2522 if (ir->coordinate) { 2523 ir->coordinate->accept(this); 2524 2525 /* Put our coords in a temp. We'll need to modify them for shadow, 2526 * projection, or LOD, so the only case we'd use it as is is if 2527 * we're doing plain old texturing. The optimization passes on 2528 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case. 2529 */ 2530 coord = get_temp(glsl_type::vec4_type); 2531 coord_dst = st_dst_reg(coord); 2532 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result); 2533 } 2534 2535 if (ir->projector) { 2536 ir->projector->accept(this); 2537 projector = this->result; 2538 } 2539 2540 /* Storage for our result. Ideally for an assignment we'd be using 2541 * the actual storage for the result here, instead. 2542 */ 2543 result_src = get_temp(glsl_type::vec4_type); 2544 result_dst = st_dst_reg(result_src); 2545 2546 switch (ir->op) { 2547 case ir_tex: 2548 opcode = TGSI_OPCODE_TEX; 2549 break; 2550 case ir_txb: 2551 opcode = TGSI_OPCODE_TXB; 2552 ir->lod_info.bias->accept(this); 2553 lod_info = this->result; 2554 break; 2555 case ir_txl: 2556 opcode = TGSI_OPCODE_TXL; 2557 ir->lod_info.lod->accept(this); 2558 lod_info = this->result; 2559 break; 2560 case ir_txd: 2561 opcode = TGSI_OPCODE_TXD; 2562 ir->lod_info.grad.dPdx->accept(this); 2563 dx = this->result; 2564 ir->lod_info.grad.dPdy->accept(this); 2565 dy = this->result; 2566 break; 2567 case ir_txs: 2568 opcode = TGSI_OPCODE_TXQ; 2569 ir->lod_info.lod->accept(this); 2570 lod_info = this->result; 2571 break; 2572 case ir_txf: 2573 opcode = TGSI_OPCODE_TXF; 2574 ir->lod_info.lod->accept(this); 2575 lod_info = this->result; 2576 if (ir->offset) { 2577 ir->offset->accept(this); 2578 offset = this->result; 2579 } 2580 break; 2581 } 2582 2583 const glsl_type *sampler_type = ir->sampler->type; 2584 2585 if (ir->projector) { 2586 if (opcode == TGSI_OPCODE_TEX) { 2587 /* Slot the projector in as the last component of the coord. */ 2588 coord_dst.writemask = WRITEMASK_W; 2589 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector); 2590 coord_dst.writemask = WRITEMASK_XYZW; 2591 opcode = TGSI_OPCODE_TXP; 2592 } else { 2593 st_src_reg coord_w = coord; 2594 coord_w.swizzle = SWIZZLE_WWWW; 2595 2596 /* For the other TEX opcodes there's no projective version 2597 * since the last slot is taken up by LOD info. Do the 2598 * projective divide now. 2599 */ 2600 coord_dst.writemask = WRITEMASK_W; 2601 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector); 2602 2603 /* In the case where we have to project the coordinates "by hand," 2604 * the shadow comparator value must also be projected. 2605 */ 2606 st_src_reg tmp_src = coord; 2607 if (ir->shadow_comparitor) { 2608 /* Slot the shadow value in as the second to last component of the 2609 * coord. 2610 */ 2611 ir->shadow_comparitor->accept(this); 2612 2613 tmp_src = get_temp(glsl_type::vec4_type); 2614 st_dst_reg tmp_dst = st_dst_reg(tmp_src); 2615 2616 /* Projective division not allowed for array samplers. */ 2617 assert(!sampler_type->sampler_array); 2618 2619 tmp_dst.writemask = WRITEMASK_Z; 2620 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result); 2621 2622 tmp_dst.writemask = WRITEMASK_XY; 2623 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord); 2624 } 2625 2626 coord_dst.writemask = WRITEMASK_XYZ; 2627 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w); 2628 2629 coord_dst.writemask = WRITEMASK_XYZW; 2630 coord.swizzle = SWIZZLE_XYZW; 2631 } 2632 } 2633 2634 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow 2635 * comparator was put in the correct place (and projected) by the code, 2636 * above, that handles by-hand projection. 2637 */ 2638 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) { 2639 /* Slot the shadow value in as the second to last component of the 2640 * coord. 2641 */ 2642 ir->shadow_comparitor->accept(this); 2643 2644 /* XXX This will need to be updated for cubemap array samplers. */ 2645 if (sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D && 2646 sampler_type->sampler_array) { 2647 coord_dst.writemask = WRITEMASK_W; 2648 } else { 2649 coord_dst.writemask = WRITEMASK_Z; 2650 } 2651 2652 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result); 2653 coord_dst.writemask = WRITEMASK_XYZW; 2654 } 2655 2656 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB || 2657 opcode == TGSI_OPCODE_TXF) { 2658 /* TGSI stores LOD or LOD bias in the last channel of the coords. */ 2659 coord_dst.writemask = WRITEMASK_W; 2660 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info); 2661 coord_dst.writemask = WRITEMASK_XYZW; 2662 } 2663 2664 if (opcode == TGSI_OPCODE_TXD) 2665 inst = emit(ir, opcode, result_dst, coord, dx, dy); 2666 else if (opcode == TGSI_OPCODE_TXQ) 2667 inst = emit(ir, opcode, result_dst, lod_info); 2668 else if (opcode == TGSI_OPCODE_TXF) { 2669 inst = emit(ir, opcode, result_dst, coord); 2670 } else 2671 inst = emit(ir, opcode, result_dst, coord); 2672 2673 if (ir->shadow_comparitor) 2674 inst->tex_shadow = GL_TRUE; 2675 2676 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler, 2677 this->shader_program, 2678 this->prog); 2679 2680 if (ir->offset) { 2681 inst->tex_offset_num_offset = 1; 2682 inst->tex_offsets[0].Index = offset.index; 2683 inst->tex_offsets[0].File = offset.file; 2684 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0); 2685 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1); 2686 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2); 2687 } 2688 2689 switch (sampler_type->sampler_dimensionality) { 2690 case GLSL_SAMPLER_DIM_1D: 2691 inst->tex_target = (sampler_type->sampler_array) 2692 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX; 2693 break; 2694 case GLSL_SAMPLER_DIM_2D: 2695 inst->tex_target = (sampler_type->sampler_array) 2696 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX; 2697 break; 2698 case GLSL_SAMPLER_DIM_3D: 2699 inst->tex_target = TEXTURE_3D_INDEX; 2700 break; 2701 case GLSL_SAMPLER_DIM_CUBE: 2702 inst->tex_target = TEXTURE_CUBE_INDEX; 2703 break; 2704 case GLSL_SAMPLER_DIM_RECT: 2705 inst->tex_target = TEXTURE_RECT_INDEX; 2706 break; 2707 case GLSL_SAMPLER_DIM_BUF: 2708 assert(!"FINISHME: Implement ARB_texture_buffer_object"); 2709 break; 2710 case GLSL_SAMPLER_DIM_EXTERNAL: 2711 inst->tex_target = TEXTURE_EXTERNAL_INDEX; 2712 break; 2713 default: 2714 assert(!"Should not get here."); 2715 } 2716 2717 this->result = result_src; 2718} 2719 2720void 2721glsl_to_tgsi_visitor::visit(ir_return *ir) 2722{ 2723 if (ir->get_value()) { 2724 st_dst_reg l; 2725 int i; 2726 2727 assert(current_function); 2728 2729 ir->get_value()->accept(this); 2730 st_src_reg r = this->result; 2731 2732 l = st_dst_reg(current_function->return_reg); 2733 2734 for (i = 0; i < type_size(current_function->sig->return_type); i++) { 2735 emit(ir, TGSI_OPCODE_MOV, l, r); 2736 l.index++; 2737 r.index++; 2738 } 2739 } 2740 2741 emit(ir, TGSI_OPCODE_RET); 2742} 2743 2744void 2745glsl_to_tgsi_visitor::visit(ir_discard *ir) 2746{ 2747 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog; 2748 2749 if (ir->condition) { 2750 ir->condition->accept(this); 2751 this->result.negate = ~this->result.negate; 2752 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result); 2753 } else { 2754 emit(ir, TGSI_OPCODE_KILP); 2755 } 2756 2757 fp->UsesKill = GL_TRUE; 2758} 2759 2760void 2761glsl_to_tgsi_visitor::visit(ir_if *ir) 2762{ 2763 glsl_to_tgsi_instruction *cond_inst, *if_inst; 2764 glsl_to_tgsi_instruction *prev_inst; 2765 2766 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 2767 2768 ir->condition->accept(this); 2769 assert(this->result.file != PROGRAM_UNDEFINED); 2770 2771 if (this->options->EmitCondCodes) { 2772 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 2773 2774 /* See if we actually generated any instruction for generating 2775 * the condition. If not, then cook up a move to a temp so we 2776 * have something to set cond_update on. 2777 */ 2778 if (cond_inst == prev_inst) { 2779 st_src_reg temp = get_temp(glsl_type::bool_type); 2780 cond_inst = emit(ir->condition, TGSI_OPCODE_MOV, st_dst_reg(temp), result); 2781 } 2782 cond_inst->cond_update = GL_TRUE; 2783 2784 if_inst = emit(ir->condition, TGSI_OPCODE_IF); 2785 if_inst->dst.cond_mask = COND_NE; 2786 } else { 2787 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result); 2788 } 2789 2790 this->instructions.push_tail(if_inst); 2791 2792 visit_exec_list(&ir->then_instructions, this); 2793 2794 if (!ir->else_instructions.is_empty()) { 2795 emit(ir->condition, TGSI_OPCODE_ELSE); 2796 visit_exec_list(&ir->else_instructions, this); 2797 } 2798 2799 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF); 2800} 2801 2802glsl_to_tgsi_visitor::glsl_to_tgsi_visitor() 2803{ 2804 result.file = PROGRAM_UNDEFINED; 2805 next_temp = 1; 2806 next_signature_id = 1; 2807 num_immediates = 0; 2808 current_function = NULL; 2809 num_address_regs = 0; 2810 indirect_addr_temps = false; 2811 indirect_addr_consts = false; 2812 mem_ctx = ralloc_context(NULL); 2813} 2814 2815glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor() 2816{ 2817 ralloc_free(mem_ctx); 2818} 2819 2820extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v) 2821{ 2822 delete v; 2823} 2824 2825 2826/** 2827 * Count resources used by the given gpu program (number of texture 2828 * samplers, etc). 2829 */ 2830static void 2831count_resources(glsl_to_tgsi_visitor *v, gl_program *prog) 2832{ 2833 v->samplers_used = 0; 2834 2835 foreach_iter(exec_list_iterator, iter, v->instructions) { 2836 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 2837 2838 if (is_tex_instruction(inst->op)) { 2839 v->samplers_used |= 1 << inst->sampler; 2840 2841 prog->SamplerTargets[inst->sampler] = 2842 (gl_texture_index)inst->tex_target; 2843 if (inst->tex_shadow) { 2844 prog->ShadowSamplers |= 1 << inst->sampler; 2845 } 2846 } 2847 } 2848 2849 prog->SamplersUsed = v->samplers_used; 2850 _mesa_update_shader_textures_used(prog); 2851} 2852 2853static void 2854set_uniform_initializer(struct gl_context *ctx, void *mem_ctx, 2855 struct gl_shader_program *shader_program, 2856 const char *name, const glsl_type *type, 2857 ir_constant *val) 2858{ 2859 if (type->is_record()) { 2860 ir_constant *field_constant; 2861 2862 field_constant = (ir_constant *)val->components.get_head(); 2863 2864 for (unsigned int i = 0; i < type->length; i++) { 2865 const glsl_type *field_type = type->fields.structure[i].type; 2866 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name, 2867 type->fields.structure[i].name); 2868 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name, 2869 field_type, field_constant); 2870 field_constant = (ir_constant *)field_constant->next; 2871 } 2872 return; 2873 } 2874 2875 int loc = _mesa_get_uniform_location(ctx, shader_program, name); 2876 2877 if (loc == -1) { 2878 fail_link(shader_program, 2879 "Couldn't find uniform for initializer %s\n", name); 2880 return; 2881 } 2882 2883 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) { 2884 ir_constant *element; 2885 const glsl_type *element_type; 2886 if (type->is_array()) { 2887 element = val->array_elements[i]; 2888 element_type = type->fields.array; 2889 } else { 2890 element = val; 2891 element_type = type; 2892 } 2893 2894 void *values; 2895 2896 if (element_type->base_type == GLSL_TYPE_BOOL) { 2897 int *conv = ralloc_array(mem_ctx, int, element_type->components()); 2898 for (unsigned int j = 0; j < element_type->components(); j++) { 2899 conv[j] = element->value.b[j]; 2900 } 2901 values = (void *)conv; 2902 element_type = glsl_type::get_instance(GLSL_TYPE_INT, 2903 element_type->vector_elements, 2904 1); 2905 } else { 2906 values = &element->value; 2907 } 2908 2909 if (element_type->is_matrix()) { 2910 _mesa_uniform_matrix(ctx, shader_program, 2911 element_type->matrix_columns, 2912 element_type->vector_elements, 2913 loc, 1, GL_FALSE, (GLfloat *)values); 2914 } else { 2915 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns, 2916 values, element_type->gl_type); 2917 } 2918 2919 loc++; 2920 } 2921} 2922 2923/* 2924 * Scan/rewrite program to remove reads of custom (output) registers. 2925 * The passed type has to be either PROGRAM_OUTPUT or PROGRAM_VARYING 2926 * (for vertex shaders). 2927 * In GLSL shaders, varying vars can be read and written. 2928 * On some hardware, trying to read an output register causes trouble. 2929 * So, rewrite the program to use a temporary register in this case. 2930 * 2931 * Based on _mesa_remove_output_reads from programopt.c. 2932 */ 2933void 2934glsl_to_tgsi_visitor::remove_output_reads(gl_register_file type) 2935{ 2936 GLuint i; 2937 GLint outputMap[VERT_RESULT_MAX]; 2938 GLint outputTypes[VERT_RESULT_MAX]; 2939 GLuint numVaryingReads = 0; 2940 GLboolean *usedTemps; 2941 GLuint firstTemp = 0; 2942 2943 usedTemps = new GLboolean[MAX_TEMPS]; 2944 if (!usedTemps) { 2945 return; 2946 } 2947 _mesa_find_used_registers(prog, PROGRAM_TEMPORARY, 2948 usedTemps, MAX_TEMPS); 2949 2950 assert(type == PROGRAM_VARYING || type == PROGRAM_OUTPUT); 2951 assert(prog->Target == GL_VERTEX_PROGRAM_ARB || type != PROGRAM_VARYING); 2952 2953 for (i = 0; i < VERT_RESULT_MAX; i++) 2954 outputMap[i] = -1; 2955 2956 /* look for instructions which read from varying vars */ 2957 foreach_iter(exec_list_iterator, iter, this->instructions) { 2958 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 2959 const GLuint numSrc = num_inst_src_regs(inst->op); 2960 GLuint j; 2961 for (j = 0; j < numSrc; j++) { 2962 if (inst->src[j].file == type) { 2963 /* replace the read with a temp reg */ 2964 const GLuint var = inst->src[j].index; 2965 if (outputMap[var] == -1) { 2966 numVaryingReads++; 2967 outputMap[var] = _mesa_find_free_register(usedTemps, 2968 MAX_TEMPS, 2969 firstTemp); 2970 outputTypes[var] = inst->src[j].type; 2971 firstTemp = outputMap[var] + 1; 2972 } 2973 inst->src[j].file = PROGRAM_TEMPORARY; 2974 inst->src[j].index = outputMap[var]; 2975 } 2976 } 2977 } 2978 2979 delete [] usedTemps; 2980 2981 if (numVaryingReads == 0) 2982 return; /* nothing to be done */ 2983 2984 /* look for instructions which write to the varying vars identified above */ 2985 foreach_iter(exec_list_iterator, iter, this->instructions) { 2986 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 2987 if (inst->dst.file == type && outputMap[inst->dst.index] >= 0) { 2988 /* change inst to write to the temp reg, instead of the varying */ 2989 inst->dst.file = PROGRAM_TEMPORARY; 2990 inst->dst.index = outputMap[inst->dst.index]; 2991 } 2992 } 2993 2994 /* insert new MOV instructions at the end */ 2995 for (i = 0; i < VERT_RESULT_MAX; i++) { 2996 if (outputMap[i] >= 0) { 2997 /* MOV VAR[i], TEMP[tmp]; */ 2998 st_src_reg src = st_src_reg(PROGRAM_TEMPORARY, outputMap[i], outputTypes[i]); 2999 st_dst_reg dst = st_dst_reg(type, WRITEMASK_XYZW, outputTypes[i]); 3000 dst.index = i; 3001 this->emit(NULL, TGSI_OPCODE_MOV, dst, src); 3002 } 3003 } 3004} 3005 3006/** 3007 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which 3008 * are read from the given src in this instruction 3009 */ 3010static int 3011get_src_arg_mask(st_dst_reg dst, st_src_reg src) 3012{ 3013 int read_mask = 0, comp; 3014 3015 /* Now, given the src swizzle and the written channels, find which 3016 * components are actually read 3017 */ 3018 for (comp = 0; comp < 4; ++comp) { 3019 const unsigned coord = GET_SWZ(src.swizzle, comp); 3020 ASSERT(coord < 4); 3021 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W) 3022 read_mask |= 1 << coord; 3023 } 3024 3025 return read_mask; 3026} 3027 3028/** 3029 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP 3030 * instruction is the first instruction to write to register T0. There are 3031 * several lowering passes done in GLSL IR (e.g. branches and 3032 * relative addressing) that create a large number of conditional assignments 3033 * that ir_to_mesa converts to CMP instructions like the one mentioned above. 3034 * 3035 * Here is why this conversion is safe: 3036 * CMP T0, T1 T2 T0 can be expanded to: 3037 * if (T1 < 0.0) 3038 * MOV T0, T2; 3039 * else 3040 * MOV T0, T0; 3041 * 3042 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same 3043 * as the original program. If (T1 < 0.0) evaluates to false, executing 3044 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized. 3045 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2 3046 * because any instruction that was going to read from T0 after this was going 3047 * to read a garbage value anyway. 3048 */ 3049void 3050glsl_to_tgsi_visitor::simplify_cmp(void) 3051{ 3052 unsigned *tempWrites; 3053 unsigned outputWrites[MAX_PROGRAM_OUTPUTS]; 3054 3055 tempWrites = new unsigned[MAX_TEMPS]; 3056 if (!tempWrites) { 3057 return; 3058 } 3059 memset(tempWrites, 0, sizeof(tempWrites)); 3060 memset(outputWrites, 0, sizeof(outputWrites)); 3061 3062 foreach_iter(exec_list_iterator, iter, this->instructions) { 3063 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3064 unsigned prevWriteMask = 0; 3065 3066 /* Give up if we encounter relative addressing or flow control. */ 3067 if (inst->dst.reladdr || 3068 tgsi_get_opcode_info(inst->op)->is_branch || 3069 inst->op == TGSI_OPCODE_BGNSUB || 3070 inst->op == TGSI_OPCODE_CONT || 3071 inst->op == TGSI_OPCODE_END || 3072 inst->op == TGSI_OPCODE_ENDSUB || 3073 inst->op == TGSI_OPCODE_RET) { 3074 break; 3075 } 3076 3077 if (inst->dst.file == PROGRAM_OUTPUT) { 3078 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS); 3079 prevWriteMask = outputWrites[inst->dst.index]; 3080 outputWrites[inst->dst.index] |= inst->dst.writemask; 3081 } else if (inst->dst.file == PROGRAM_TEMPORARY) { 3082 assert(inst->dst.index < MAX_TEMPS); 3083 prevWriteMask = tempWrites[inst->dst.index]; 3084 tempWrites[inst->dst.index] |= inst->dst.writemask; 3085 } 3086 3087 /* For a CMP to be considered a conditional write, the destination 3088 * register and source register two must be the same. */ 3089 if (inst->op == TGSI_OPCODE_CMP 3090 && !(inst->dst.writemask & prevWriteMask) 3091 && inst->src[2].file == inst->dst.file 3092 && inst->src[2].index == inst->dst.index 3093 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) { 3094 3095 inst->op = TGSI_OPCODE_MOV; 3096 inst->src[0] = inst->src[1]; 3097 } 3098 } 3099 3100 delete [] tempWrites; 3101} 3102 3103/* Replaces all references to a temporary register index with another index. */ 3104void 3105glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index) 3106{ 3107 foreach_iter(exec_list_iterator, iter, this->instructions) { 3108 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3109 unsigned j; 3110 3111 for (j=0; j < num_inst_src_regs(inst->op); j++) { 3112 if (inst->src[j].file == PROGRAM_TEMPORARY && 3113 inst->src[j].index == index) { 3114 inst->src[j].index = new_index; 3115 } 3116 } 3117 3118 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) { 3119 inst->dst.index = new_index; 3120 } 3121 } 3122} 3123 3124int 3125glsl_to_tgsi_visitor::get_first_temp_read(int index) 3126{ 3127 int depth = 0; /* loop depth */ 3128 int loop_start = -1; /* index of the first active BGNLOOP (if any) */ 3129 unsigned i = 0, j; 3130 3131 foreach_iter(exec_list_iterator, iter, this->instructions) { 3132 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3133 3134 for (j=0; j < num_inst_src_regs(inst->op); j++) { 3135 if (inst->src[j].file == PROGRAM_TEMPORARY && 3136 inst->src[j].index == index) { 3137 return (depth == 0) ? i : loop_start; 3138 } 3139 } 3140 3141 if (inst->op == TGSI_OPCODE_BGNLOOP) { 3142 if(depth++ == 0) 3143 loop_start = i; 3144 } else if (inst->op == TGSI_OPCODE_ENDLOOP) { 3145 if (--depth == 0) 3146 loop_start = -1; 3147 } 3148 assert(depth >= 0); 3149 3150 i++; 3151 } 3152 3153 return -1; 3154} 3155 3156int 3157glsl_to_tgsi_visitor::get_first_temp_write(int index) 3158{ 3159 int depth = 0; /* loop depth */ 3160 int loop_start = -1; /* index of the first active BGNLOOP (if any) */ 3161 int i = 0; 3162 3163 foreach_iter(exec_list_iterator, iter, this->instructions) { 3164 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3165 3166 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) { 3167 return (depth == 0) ? i : loop_start; 3168 } 3169 3170 if (inst->op == TGSI_OPCODE_BGNLOOP) { 3171 if(depth++ == 0) 3172 loop_start = i; 3173 } else if (inst->op == TGSI_OPCODE_ENDLOOP) { 3174 if (--depth == 0) 3175 loop_start = -1; 3176 } 3177 assert(depth >= 0); 3178 3179 i++; 3180 } 3181 3182 return -1; 3183} 3184 3185int 3186glsl_to_tgsi_visitor::get_last_temp_read(int index) 3187{ 3188 int depth = 0; /* loop depth */ 3189 int last = -1; /* index of last instruction that reads the temporary */ 3190 unsigned i = 0, j; 3191 3192 foreach_iter(exec_list_iterator, iter, this->instructions) { 3193 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3194 3195 for (j=0; j < num_inst_src_regs(inst->op); j++) { 3196 if (inst->src[j].file == PROGRAM_TEMPORARY && 3197 inst->src[j].index == index) { 3198 last = (depth == 0) ? i : -2; 3199 } 3200 } 3201 3202 if (inst->op == TGSI_OPCODE_BGNLOOP) 3203 depth++; 3204 else if (inst->op == TGSI_OPCODE_ENDLOOP) 3205 if (--depth == 0 && last == -2) 3206 last = i; 3207 assert(depth >= 0); 3208 3209 i++; 3210 } 3211 3212 assert(last >= -1); 3213 return last; 3214} 3215 3216int 3217glsl_to_tgsi_visitor::get_last_temp_write(int index) 3218{ 3219 int depth = 0; /* loop depth */ 3220 int last = -1; /* index of last instruction that writes to the temporary */ 3221 int i = 0; 3222 3223 foreach_iter(exec_list_iterator, iter, this->instructions) { 3224 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3225 3226 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) 3227 last = (depth == 0) ? i : -2; 3228 3229 if (inst->op == TGSI_OPCODE_BGNLOOP) 3230 depth++; 3231 else if (inst->op == TGSI_OPCODE_ENDLOOP) 3232 if (--depth == 0 && last == -2) 3233 last = i; 3234 assert(depth >= 0); 3235 3236 i++; 3237 } 3238 3239 assert(last >= -1); 3240 return last; 3241} 3242 3243/* 3244 * On a basic block basis, tracks available PROGRAM_TEMPORARY register 3245 * channels for copy propagation and updates following instructions to 3246 * use the original versions. 3247 * 3248 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass 3249 * will occur. As an example, a TXP production before this pass: 3250 * 3251 * 0: MOV TEMP[1], INPUT[4].xyyy; 3252 * 1: MOV TEMP[1].w, INPUT[4].wwww; 3253 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D; 3254 * 3255 * and after: 3256 * 3257 * 0: MOV TEMP[1], INPUT[4].xyyy; 3258 * 1: MOV TEMP[1].w, INPUT[4].wwww; 3259 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D; 3260 * 3261 * which allows for dead code elimination on TEMP[1]'s writes. 3262 */ 3263void 3264glsl_to_tgsi_visitor::copy_propagate(void) 3265{ 3266 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx, 3267 glsl_to_tgsi_instruction *, 3268 this->next_temp * 4); 3269 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4); 3270 int level = 0; 3271 3272 foreach_iter(exec_list_iterator, iter, this->instructions) { 3273 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3274 3275 assert(inst->dst.file != PROGRAM_TEMPORARY 3276 || inst->dst.index < this->next_temp); 3277 3278 /* First, do any copy propagation possible into the src regs. */ 3279 for (int r = 0; r < 3; r++) { 3280 glsl_to_tgsi_instruction *first = NULL; 3281 bool good = true; 3282 int acp_base = inst->src[r].index * 4; 3283 3284 if (inst->src[r].file != PROGRAM_TEMPORARY || 3285 inst->src[r].reladdr) 3286 continue; 3287 3288 /* See if we can find entries in the ACP consisting of MOVs 3289 * from the same src register for all the swizzled channels 3290 * of this src register reference. 3291 */ 3292 for (int i = 0; i < 4; i++) { 3293 int src_chan = GET_SWZ(inst->src[r].swizzle, i); 3294 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan]; 3295 3296 if (!copy_chan) { 3297 good = false; 3298 break; 3299 } 3300 3301 assert(acp_level[acp_base + src_chan] <= level); 3302 3303 if (!first) { 3304 first = copy_chan; 3305 } else { 3306 if (first->src[0].file != copy_chan->src[0].file || 3307 first->src[0].index != copy_chan->src[0].index) { 3308 good = false; 3309 break; 3310 } 3311 } 3312 } 3313 3314 if (good) { 3315 /* We've now validated that we can copy-propagate to 3316 * replace this src register reference. Do it. 3317 */ 3318 inst->src[r].file = first->src[0].file; 3319 inst->src[r].index = first->src[0].index; 3320 3321 int swizzle = 0; 3322 for (int i = 0; i < 4; i++) { 3323 int src_chan = GET_SWZ(inst->src[r].swizzle, i); 3324 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan]; 3325 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) << 3326 (3 * i)); 3327 } 3328 inst->src[r].swizzle = swizzle; 3329 } 3330 } 3331 3332 switch (inst->op) { 3333 case TGSI_OPCODE_BGNLOOP: 3334 case TGSI_OPCODE_ENDLOOP: 3335 /* End of a basic block, clear the ACP entirely. */ 3336 memset(acp, 0, sizeof(*acp) * this->next_temp * 4); 3337 break; 3338 3339 case TGSI_OPCODE_IF: 3340 ++level; 3341 break; 3342 3343 case TGSI_OPCODE_ENDIF: 3344 case TGSI_OPCODE_ELSE: 3345 /* Clear all channels written inside the block from the ACP, but 3346 * leaving those that were not touched. 3347 */ 3348 for (int r = 0; r < this->next_temp; r++) { 3349 for (int c = 0; c < 4; c++) { 3350 if (!acp[4 * r + c]) 3351 continue; 3352 3353 if (acp_level[4 * r + c] >= level) 3354 acp[4 * r + c] = NULL; 3355 } 3356 } 3357 if (inst->op == TGSI_OPCODE_ENDIF) 3358 --level; 3359 break; 3360 3361 default: 3362 /* Continuing the block, clear any written channels from 3363 * the ACP. 3364 */ 3365 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) { 3366 /* Any temporary might be written, so no copy propagation 3367 * across this instruction. 3368 */ 3369 memset(acp, 0, sizeof(*acp) * this->next_temp * 4); 3370 } else if (inst->dst.file == PROGRAM_OUTPUT && 3371 inst->dst.reladdr) { 3372 /* Any output might be written, so no copy propagation 3373 * from outputs across this instruction. 3374 */ 3375 for (int r = 0; r < this->next_temp; r++) { 3376 for (int c = 0; c < 4; c++) { 3377 if (!acp[4 * r + c]) 3378 continue; 3379 3380 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT) 3381 acp[4 * r + c] = NULL; 3382 } 3383 } 3384 } else if (inst->dst.file == PROGRAM_TEMPORARY || 3385 inst->dst.file == PROGRAM_OUTPUT) { 3386 /* Clear where it's used as dst. */ 3387 if (inst->dst.file == PROGRAM_TEMPORARY) { 3388 for (int c = 0; c < 4; c++) { 3389 if (inst->dst.writemask & (1 << c)) { 3390 acp[4 * inst->dst.index + c] = NULL; 3391 } 3392 } 3393 } 3394 3395 /* Clear where it's used as src. */ 3396 for (int r = 0; r < this->next_temp; r++) { 3397 for (int c = 0; c < 4; c++) { 3398 if (!acp[4 * r + c]) 3399 continue; 3400 3401 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c); 3402 3403 if (acp[4 * r + c]->src[0].file == inst->dst.file && 3404 acp[4 * r + c]->src[0].index == inst->dst.index && 3405 inst->dst.writemask & (1 << src_chan)) 3406 { 3407 acp[4 * r + c] = NULL; 3408 } 3409 } 3410 } 3411 } 3412 break; 3413 } 3414 3415 /* If this is a copy, add it to the ACP. */ 3416 if (inst->op == TGSI_OPCODE_MOV && 3417 inst->dst.file == PROGRAM_TEMPORARY && 3418 !inst->dst.reladdr && 3419 !inst->saturate && 3420 !inst->src[0].reladdr && 3421 !inst->src[0].negate) { 3422 for (int i = 0; i < 4; i++) { 3423 if (inst->dst.writemask & (1 << i)) { 3424 acp[4 * inst->dst.index + i] = inst; 3425 acp_level[4 * inst->dst.index + i] = level; 3426 } 3427 } 3428 } 3429 } 3430 3431 ralloc_free(acp_level); 3432 ralloc_free(acp); 3433} 3434 3435/* 3436 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination. 3437 * 3438 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass 3439 * will occur. As an example, a TXP production after copy propagation but 3440 * before this pass: 3441 * 3442 * 0: MOV TEMP[1], INPUT[4].xyyy; 3443 * 1: MOV TEMP[1].w, INPUT[4].wwww; 3444 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D; 3445 * 3446 * and after this pass: 3447 * 3448 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D; 3449 * 3450 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB) 3451 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them 3452 */ 3453void 3454glsl_to_tgsi_visitor::eliminate_dead_code(void) 3455{ 3456 int i; 3457 3458 for (i=0; i < this->next_temp; i++) { 3459 int last_read = get_last_temp_read(i); 3460 int j = 0; 3461 3462 foreach_iter(exec_list_iterator, iter, this->instructions) { 3463 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3464 3465 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i && 3466 j > last_read) 3467 { 3468 iter.remove(); 3469 delete inst; 3470 } 3471 3472 j++; 3473 } 3474 } 3475} 3476 3477/* 3478 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead 3479 * code elimination. This is less primitive than eliminate_dead_code(), as it 3480 * is per-channel and can detect consecutive writes without a read between them 3481 * as dead code. However, there is some dead code that can be eliminated by 3482 * eliminate_dead_code() but not this function - for example, this function 3483 * cannot eliminate an instruction writing to a register that is never read and 3484 * is the only instruction writing to that register. 3485 * 3486 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass 3487 * will occur. 3488 */ 3489int 3490glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void) 3491{ 3492 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx, 3493 glsl_to_tgsi_instruction *, 3494 this->next_temp * 4); 3495 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4); 3496 int level = 0; 3497 int removed = 0; 3498 3499 foreach_iter(exec_list_iterator, iter, this->instructions) { 3500 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3501 3502 assert(inst->dst.file != PROGRAM_TEMPORARY 3503 || inst->dst.index < this->next_temp); 3504 3505 switch (inst->op) { 3506 case TGSI_OPCODE_BGNLOOP: 3507 case TGSI_OPCODE_ENDLOOP: 3508 /* End of a basic block, clear the write array entirely. 3509 * FIXME: This keeps us from killing dead code when the writes are 3510 * on either side of a loop, even when the register isn't touched 3511 * inside the loop. 3512 */ 3513 memset(writes, 0, sizeof(*writes) * this->next_temp * 4); 3514 break; 3515 3516 case TGSI_OPCODE_ENDIF: 3517 case TGSI_OPCODE_ELSE: 3518 /* Promote the recorded level of all channels written inside the 3519 * preceding if or else block to the level above the if/else block. 3520 */ 3521 for (int r = 0; r < this->next_temp; r++) { 3522 for (int c = 0; c < 4; c++) { 3523 if (!writes[4 * r + c]) 3524 continue; 3525 3526 if (write_level[4 * r + c] == level) 3527 write_level[4 * r + c] = level-1; 3528 } 3529 } 3530 3531 if(inst->op == TGSI_OPCODE_ENDIF) 3532 --level; 3533 3534 break; 3535 3536 case TGSI_OPCODE_IF: 3537 ++level; 3538 /* fallthrough to default case to mark the condition as read */ 3539 3540 default: 3541 /* Continuing the block, clear any channels from the write array that 3542 * are read by this instruction. 3543 */ 3544 for (unsigned i = 0; i < Elements(inst->src); i++) { 3545 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){ 3546 /* Any temporary might be read, so no dead code elimination 3547 * across this instruction. 3548 */ 3549 memset(writes, 0, sizeof(*writes) * this->next_temp * 4); 3550 } else if (inst->src[i].file == PROGRAM_TEMPORARY) { 3551 /* Clear where it's used as src. */ 3552 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0); 3553 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1); 3554 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2); 3555 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3); 3556 3557 for (int c = 0; c < 4; c++) { 3558 if (src_chans & (1 << c)) { 3559 writes[4 * inst->src[i].index + c] = NULL; 3560 } 3561 } 3562 } 3563 } 3564 break; 3565 } 3566 3567 /* If this instruction writes to a temporary, add it to the write array. 3568 * If there is already an instruction in the write array for one or more 3569 * of the channels, flag that channel write as dead. 3570 */ 3571 if (inst->dst.file == PROGRAM_TEMPORARY && 3572 !inst->dst.reladdr && 3573 !inst->saturate) { 3574 for (int c = 0; c < 4; c++) { 3575 if (inst->dst.writemask & (1 << c)) { 3576 if (writes[4 * inst->dst.index + c]) { 3577 if (write_level[4 * inst->dst.index + c] < level) 3578 continue; 3579 else 3580 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c); 3581 } 3582 writes[4 * inst->dst.index + c] = inst; 3583 write_level[4 * inst->dst.index + c] = level; 3584 } 3585 } 3586 } 3587 } 3588 3589 /* Anything still in the write array at this point is dead code. */ 3590 for (int r = 0; r < this->next_temp; r++) { 3591 for (int c = 0; c < 4; c++) { 3592 glsl_to_tgsi_instruction *inst = writes[4 * r + c]; 3593 if (inst) 3594 inst->dead_mask |= (1 << c); 3595 } 3596 } 3597 3598 /* Now actually remove the instructions that are completely dead and update 3599 * the writemask of other instructions with dead channels. 3600 */ 3601 foreach_iter(exec_list_iterator, iter, this->instructions) { 3602 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3603 3604 if (!inst->dead_mask || !inst->dst.writemask) 3605 continue; 3606 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) { 3607 iter.remove(); 3608 delete inst; 3609 removed++; 3610 } else 3611 inst->dst.writemask &= ~(inst->dead_mask); 3612 } 3613 3614 ralloc_free(write_level); 3615 ralloc_free(writes); 3616 3617 return removed; 3618} 3619 3620/* Merges temporary registers together where possible to reduce the number of 3621 * registers needed to run a program. 3622 * 3623 * Produces optimal code only after copy propagation and dead code elimination 3624 * have been run. */ 3625void 3626glsl_to_tgsi_visitor::merge_registers(void) 3627{ 3628 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp); 3629 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp); 3630 int i, j; 3631 3632 /* Read the indices of the last read and first write to each temp register 3633 * into an array so that we don't have to traverse the instruction list as 3634 * much. */ 3635 for (i=0; i < this->next_temp; i++) { 3636 last_reads[i] = get_last_temp_read(i); 3637 first_writes[i] = get_first_temp_write(i); 3638 } 3639 3640 /* Start looking for registers with non-overlapping usages that can be 3641 * merged together. */ 3642 for (i=0; i < this->next_temp; i++) { 3643 /* Don't touch unused registers. */ 3644 if (last_reads[i] < 0 || first_writes[i] < 0) continue; 3645 3646 for (j=0; j < this->next_temp; j++) { 3647 /* Don't touch unused registers. */ 3648 if (last_reads[j] < 0 || first_writes[j] < 0) continue; 3649 3650 /* We can merge the two registers if the first write to j is after or 3651 * in the same instruction as the last read from i. Note that the 3652 * register at index i will always be used earlier or at the same time 3653 * as the register at index j. */ 3654 if (first_writes[i] <= first_writes[j] && 3655 last_reads[i] <= first_writes[j]) 3656 { 3657 rename_temp_register(j, i); /* Replace all references to j with i.*/ 3658 3659 /* Update the first_writes and last_reads arrays with the new 3660 * values for the merged register index, and mark the newly unused 3661 * register index as such. */ 3662 last_reads[i] = last_reads[j]; 3663 first_writes[j] = -1; 3664 last_reads[j] = -1; 3665 } 3666 } 3667 } 3668 3669 ralloc_free(last_reads); 3670 ralloc_free(first_writes); 3671} 3672 3673/* Reassign indices to temporary registers by reusing unused indices created 3674 * by optimization passes. */ 3675void 3676glsl_to_tgsi_visitor::renumber_registers(void) 3677{ 3678 int i = 0; 3679 int new_index = 0; 3680 3681 for (i=0; i < this->next_temp; i++) { 3682 if (get_first_temp_read(i) < 0) continue; 3683 if (i != new_index) 3684 rename_temp_register(i, new_index); 3685 new_index++; 3686 } 3687 3688 this->next_temp = new_index; 3689} 3690 3691/** 3692 * Returns a fragment program which implements the current pixel transfer ops. 3693 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c. 3694 */ 3695extern "C" void 3696get_pixel_transfer_visitor(struct st_fragment_program *fp, 3697 glsl_to_tgsi_visitor *original, 3698 int scale_and_bias, int pixel_maps) 3699{ 3700 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor(); 3701 struct st_context *st = st_context(original->ctx); 3702 struct gl_program *prog = &fp->Base.Base; 3703 struct gl_program_parameter_list *params = _mesa_new_parameter_list(); 3704 st_src_reg coord, src0; 3705 st_dst_reg dst0; 3706 glsl_to_tgsi_instruction *inst; 3707 3708 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */ 3709 v->ctx = original->ctx; 3710 v->prog = prog; 3711 v->glsl_version = original->glsl_version; 3712 v->native_integers = original->native_integers; 3713 v->options = original->options; 3714 v->next_temp = original->next_temp; 3715 v->num_address_regs = original->num_address_regs; 3716 v->samplers_used = prog->SamplersUsed = original->samplers_used; 3717 v->indirect_addr_temps = original->indirect_addr_temps; 3718 v->indirect_addr_consts = original->indirect_addr_consts; 3719 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); 3720 3721 /* 3722 * Get initial pixel color from the texture. 3723 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D; 3724 */ 3725 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type); 3726 src0 = v->get_temp(glsl_type::vec4_type); 3727 dst0 = st_dst_reg(src0); 3728 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord); 3729 inst->sampler = 0; 3730 inst->tex_target = TEXTURE_2D_INDEX; 3731 3732 prog->InputsRead |= FRAG_BIT_TEX0; 3733 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */ 3734 v->samplers_used |= (1 << 0); 3735 3736 if (scale_and_bias) { 3737 static const gl_state_index scale_state[STATE_LENGTH] = 3738 { STATE_INTERNAL, STATE_PT_SCALE, 3739 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 }; 3740 static const gl_state_index bias_state[STATE_LENGTH] = 3741 { STATE_INTERNAL, STATE_PT_BIAS, 3742 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 }; 3743 GLint scale_p, bias_p; 3744 st_src_reg scale, bias; 3745 3746 scale_p = _mesa_add_state_reference(params, scale_state); 3747 bias_p = _mesa_add_state_reference(params, bias_state); 3748 3749 /* MAD colorTemp, colorTemp, scale, bias; */ 3750 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT); 3751 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT); 3752 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias); 3753 } 3754 3755 if (pixel_maps) { 3756 st_src_reg temp = v->get_temp(glsl_type::vec4_type); 3757 st_dst_reg temp_dst = st_dst_reg(temp); 3758 3759 assert(st->pixel_xfer.pixelmap_texture); 3760 3761 /* With a little effort, we can do four pixel map look-ups with 3762 * two TEX instructions: 3763 */ 3764 3765 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */ 3766 temp_dst.writemask = WRITEMASK_XY; /* write R,G */ 3767 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0); 3768 inst->sampler = 1; 3769 inst->tex_target = TEXTURE_2D_INDEX; 3770 3771 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */ 3772 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W); 3773 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */ 3774 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0); 3775 inst->sampler = 1; 3776 inst->tex_target = TEXTURE_2D_INDEX; 3777 3778 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */ 3779 v->samplers_used |= (1 << 1); 3780 3781 /* MOV colorTemp, temp; */ 3782 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp); 3783 } 3784 3785 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the 3786 * new visitor. */ 3787 foreach_iter(exec_list_iterator, iter, original->instructions) { 3788 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3789 glsl_to_tgsi_instruction *newinst; 3790 st_src_reg src_regs[3]; 3791 3792 if (inst->dst.file == PROGRAM_OUTPUT) 3793 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index); 3794 3795 for (int i=0; i<3; i++) { 3796 src_regs[i] = inst->src[i]; 3797 if (src_regs[i].file == PROGRAM_INPUT && 3798 src_regs[i].index == FRAG_ATTRIB_COL0) 3799 { 3800 src_regs[i].file = PROGRAM_TEMPORARY; 3801 src_regs[i].index = src0.index; 3802 } 3803 else if (src_regs[i].file == PROGRAM_INPUT) 3804 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index); 3805 } 3806 3807 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]); 3808 newinst->tex_target = inst->tex_target; 3809 } 3810 3811 /* Make modifications to fragment program info. */ 3812 prog->Parameters = _mesa_combine_parameter_lists(params, 3813 original->prog->Parameters); 3814 _mesa_free_parameter_list(params); 3815 count_resources(v, prog); 3816 fp->glsl_to_tgsi = v; 3817} 3818 3819/** 3820 * Make fragment program for glBitmap: 3821 * Sample the texture and kill the fragment if the bit is 0. 3822 * This program will be combined with the user's fragment program. 3823 * 3824 * Based on make_bitmap_fragment_program in st_cb_bitmap.c. 3825 */ 3826extern "C" void 3827get_bitmap_visitor(struct st_fragment_program *fp, 3828 glsl_to_tgsi_visitor *original, int samplerIndex) 3829{ 3830 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor(); 3831 struct st_context *st = st_context(original->ctx); 3832 struct gl_program *prog = &fp->Base.Base; 3833 st_src_reg coord, src0; 3834 st_dst_reg dst0; 3835 glsl_to_tgsi_instruction *inst; 3836 3837 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */ 3838 v->ctx = original->ctx; 3839 v->prog = prog; 3840 v->glsl_version = original->glsl_version; 3841 v->native_integers = original->native_integers; 3842 v->options = original->options; 3843 v->next_temp = original->next_temp; 3844 v->num_address_regs = original->num_address_regs; 3845 v->samplers_used = prog->SamplersUsed = original->samplers_used; 3846 v->indirect_addr_temps = original->indirect_addr_temps; 3847 v->indirect_addr_consts = original->indirect_addr_consts; 3848 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); 3849 3850 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */ 3851 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type); 3852 src0 = v->get_temp(glsl_type::vec4_type); 3853 dst0 = st_dst_reg(src0); 3854 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord); 3855 inst->sampler = samplerIndex; 3856 inst->tex_target = TEXTURE_2D_INDEX; 3857 3858 prog->InputsRead |= FRAG_BIT_TEX0; 3859 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */ 3860 v->samplers_used |= (1 << samplerIndex); 3861 3862 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */ 3863 src0.negate = NEGATE_XYZW; 3864 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM) 3865 src0.swizzle = SWIZZLE_XXXX; 3866 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0); 3867 3868 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the 3869 * new visitor. */ 3870 foreach_iter(exec_list_iterator, iter, original->instructions) { 3871 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3872 glsl_to_tgsi_instruction *newinst; 3873 st_src_reg src_regs[3]; 3874 3875 if (inst->dst.file == PROGRAM_OUTPUT) 3876 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index); 3877 3878 for (int i=0; i<3; i++) { 3879 src_regs[i] = inst->src[i]; 3880 if (src_regs[i].file == PROGRAM_INPUT) 3881 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index); 3882 } 3883 3884 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]); 3885 newinst->tex_target = inst->tex_target; 3886 } 3887 3888 /* Make modifications to fragment program info. */ 3889 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters); 3890 count_resources(v, prog); 3891 fp->glsl_to_tgsi = v; 3892} 3893 3894/* ------------------------- TGSI conversion stuff -------------------------- */ 3895struct label { 3896 unsigned branch_target; 3897 unsigned token; 3898}; 3899 3900/** 3901 * Intermediate state used during shader translation. 3902 */ 3903struct st_translate { 3904 struct ureg_program *ureg; 3905 3906 struct ureg_dst temps[MAX_TEMPS]; 3907 struct ureg_src *constants; 3908 struct ureg_src *immediates; 3909 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS]; 3910 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS]; 3911 struct ureg_dst address[1]; 3912 struct ureg_src samplers[PIPE_MAX_SAMPLERS]; 3913 struct ureg_src systemValues[SYSTEM_VALUE_MAX]; 3914 3915 /* Extra info for handling point size clamping in vertex shader */ 3916 struct ureg_dst pointSizeResult; /**< Actual point size output register */ 3917 struct ureg_src pointSizeConst; /**< Point size range constant register */ 3918 GLint pointSizeOutIndex; /**< Temp point size output register */ 3919 GLboolean prevInstWrotePointSize; 3920 3921 const GLuint *inputMapping; 3922 const GLuint *outputMapping; 3923 3924 /* For every instruction that contains a label (eg CALL), keep 3925 * details so that we can go back afterwards and emit the correct 3926 * tgsi instruction number for each label. 3927 */ 3928 struct label *labels; 3929 unsigned labels_size; 3930 unsigned labels_count; 3931 3932 /* Keep a record of the tgsi instruction number that each mesa 3933 * instruction starts at, will be used to fix up labels after 3934 * translation. 3935 */ 3936 unsigned *insn; 3937 unsigned insn_size; 3938 unsigned insn_count; 3939 3940 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */ 3941 3942 boolean error; 3943}; 3944 3945/** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */ 3946static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = { 3947 TGSI_SEMANTIC_FACE, 3948 TGSI_SEMANTIC_VERTEXID, 3949 TGSI_SEMANTIC_INSTANCEID 3950}; 3951 3952/** 3953 * Make note of a branch to a label in the TGSI code. 3954 * After we've emitted all instructions, we'll go over the list 3955 * of labels built here and patch the TGSI code with the actual 3956 * location of each label. 3957 */ 3958static unsigned *get_label(struct st_translate *t, unsigned branch_target) 3959{ 3960 unsigned i; 3961 3962 if (t->labels_count + 1 >= t->labels_size) { 3963 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1); 3964 t->labels = (struct label *)realloc(t->labels, 3965 t->labels_size * sizeof(struct label)); 3966 if (t->labels == NULL) { 3967 static unsigned dummy; 3968 t->error = TRUE; 3969 return &dummy; 3970 } 3971 } 3972 3973 i = t->labels_count++; 3974 t->labels[i].branch_target = branch_target; 3975 return &t->labels[i].token; 3976} 3977 3978/** 3979 * Called prior to emitting the TGSI code for each instruction. 3980 * Allocate additional space for instructions if needed. 3981 * Update the insn[] array so the next glsl_to_tgsi_instruction points to 3982 * the next TGSI instruction. 3983 */ 3984static void set_insn_start(struct st_translate *t, unsigned start) 3985{ 3986 if (t->insn_count + 1 >= t->insn_size) { 3987 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1); 3988 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0])); 3989 if (t->insn == NULL) { 3990 t->error = TRUE; 3991 return; 3992 } 3993 } 3994 3995 t->insn[t->insn_count++] = start; 3996} 3997 3998/** 3999 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate. 4000 */ 4001static struct ureg_src 4002emit_immediate(struct st_translate *t, 4003 gl_constant_value values[4], 4004 int type, int size) 4005{ 4006 struct ureg_program *ureg = t->ureg; 4007 4008 switch(type) 4009 { 4010 case GL_FLOAT: 4011 return ureg_DECL_immediate(ureg, &values[0].f, size); 4012 case GL_INT: 4013 return ureg_DECL_immediate_int(ureg, &values[0].i, size); 4014 case GL_UNSIGNED_INT: 4015 case GL_BOOL: 4016 return ureg_DECL_immediate_uint(ureg, &values[0].u, size); 4017 default: 4018 assert(!"should not get here - type must be float, int, uint, or bool"); 4019 return ureg_src_undef(); 4020 } 4021} 4022 4023/** 4024 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register. 4025 */ 4026static struct ureg_dst 4027dst_register(struct st_translate *t, 4028 gl_register_file file, 4029 GLuint index) 4030{ 4031 switch(file) { 4032 case PROGRAM_UNDEFINED: 4033 return ureg_dst_undef(); 4034 4035 case PROGRAM_TEMPORARY: 4036 if (ureg_dst_is_undef(t->temps[index])) 4037 t->temps[index] = ureg_DECL_temporary(t->ureg); 4038 4039 return t->temps[index]; 4040 4041 case PROGRAM_OUTPUT: 4042 if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ) 4043 t->prevInstWrotePointSize = GL_TRUE; 4044 4045 if (t->procType == TGSI_PROCESSOR_VERTEX) 4046 assert(index < VERT_RESULT_MAX); 4047 else if (t->procType == TGSI_PROCESSOR_FRAGMENT) 4048 assert(index < FRAG_RESULT_MAX); 4049 else 4050 assert(index < GEOM_RESULT_MAX); 4051 4052 assert(t->outputMapping[index] < Elements(t->outputs)); 4053 4054 return t->outputs[t->outputMapping[index]]; 4055 4056 case PROGRAM_ADDRESS: 4057 return t->address[index]; 4058 4059 default: 4060 assert(!"unknown dst register file"); 4061 return ureg_dst_undef(); 4062 } 4063} 4064 4065/** 4066 * Map a glsl_to_tgsi src register to a TGSI ureg_src register. 4067 */ 4068static struct ureg_src 4069src_register(struct st_translate *t, 4070 gl_register_file file, 4071 GLuint index) 4072{ 4073 switch(file) { 4074 case PROGRAM_UNDEFINED: 4075 return ureg_src_undef(); 4076 4077 case PROGRAM_TEMPORARY: 4078 assert(index >= 0); 4079 assert(index < Elements(t->temps)); 4080 if (ureg_dst_is_undef(t->temps[index])) 4081 t->temps[index] = ureg_DECL_temporary(t->ureg); 4082 return ureg_src(t->temps[index]); 4083 4084 case PROGRAM_NAMED_PARAM: 4085 case PROGRAM_ENV_PARAM: 4086 case PROGRAM_LOCAL_PARAM: 4087 case PROGRAM_UNIFORM: 4088 assert(index >= 0); 4089 return t->constants[index]; 4090 case PROGRAM_STATE_VAR: 4091 case PROGRAM_CONSTANT: /* ie, immediate */ 4092 if (index < 0) 4093 return ureg_DECL_constant(t->ureg, 0); 4094 else 4095 return t->constants[index]; 4096 4097 case PROGRAM_IMMEDIATE: 4098 return t->immediates[index]; 4099 4100 case PROGRAM_INPUT: 4101 assert(t->inputMapping[index] < Elements(t->inputs)); 4102 return t->inputs[t->inputMapping[index]]; 4103 4104 case PROGRAM_OUTPUT: 4105 assert(t->outputMapping[index] < Elements(t->outputs)); 4106 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */ 4107 4108 case PROGRAM_ADDRESS: 4109 return ureg_src(t->address[index]); 4110 4111 case PROGRAM_SYSTEM_VALUE: 4112 assert(index < Elements(t->systemValues)); 4113 return t->systemValues[index]; 4114 4115 default: 4116 assert(!"unknown src register file"); 4117 return ureg_src_undef(); 4118 } 4119} 4120 4121/** 4122 * Create a TGSI ureg_dst register from an st_dst_reg. 4123 */ 4124static struct ureg_dst 4125translate_dst(struct st_translate *t, 4126 const st_dst_reg *dst_reg, 4127 bool saturate) 4128{ 4129 struct ureg_dst dst = dst_register(t, 4130 dst_reg->file, 4131 dst_reg->index); 4132 4133 dst = ureg_writemask(dst, dst_reg->writemask); 4134 4135 if (saturate) 4136 dst = ureg_saturate(dst); 4137 4138 if (dst_reg->reladdr != NULL) 4139 dst = ureg_dst_indirect(dst, ureg_src(t->address[0])); 4140 4141 return dst; 4142} 4143 4144/** 4145 * Create a TGSI ureg_src register from an st_src_reg. 4146 */ 4147static struct ureg_src 4148translate_src(struct st_translate *t, const st_src_reg *src_reg) 4149{ 4150 struct ureg_src src = src_register(t, src_reg->file, src_reg->index); 4151 4152 src = ureg_swizzle(src, 4153 GET_SWZ(src_reg->swizzle, 0) & 0x3, 4154 GET_SWZ(src_reg->swizzle, 1) & 0x3, 4155 GET_SWZ(src_reg->swizzle, 2) & 0x3, 4156 GET_SWZ(src_reg->swizzle, 3) & 0x3); 4157 4158 if ((src_reg->negate & 0xf) == NEGATE_XYZW) 4159 src = ureg_negate(src); 4160 4161 if (src_reg->reladdr != NULL) { 4162 /* Normally ureg_src_indirect() would be used here, but a stupid compiler 4163 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously 4164 * set the bit for src.Negate. So we have to do the operation manually 4165 * here to work around the compiler's problems. */ 4166 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/ 4167 struct ureg_src addr = ureg_src(t->address[0]); 4168 src.Indirect = 1; 4169 src.IndirectFile = addr.File; 4170 src.IndirectIndex = addr.Index; 4171 src.IndirectSwizzle = addr.SwizzleX; 4172 4173 if (src_reg->file != PROGRAM_INPUT && 4174 src_reg->file != PROGRAM_OUTPUT) { 4175 /* If src_reg->index was negative, it was set to zero in 4176 * src_register(). Reassign it now. But don't do this 4177 * for input/output regs since they get remapped while 4178 * const buffers don't. 4179 */ 4180 src.Index = src_reg->index; 4181 } 4182 } 4183 4184 return src; 4185} 4186 4187static struct tgsi_texture_offset 4188translate_tex_offset(struct st_translate *t, 4189 const struct tgsi_texture_offset *in_offset) 4190{ 4191 struct tgsi_texture_offset offset; 4192 4193 assert(in_offset->File == PROGRAM_IMMEDIATE); 4194 4195 offset.File = TGSI_FILE_IMMEDIATE; 4196 offset.Index = in_offset->Index; 4197 offset.SwizzleX = in_offset->SwizzleX; 4198 offset.SwizzleY = in_offset->SwizzleY; 4199 offset.SwizzleZ = in_offset->SwizzleZ; 4200 4201 return offset; 4202} 4203 4204static void 4205compile_tgsi_instruction(struct st_translate *t, 4206 const glsl_to_tgsi_instruction *inst) 4207{ 4208 struct ureg_program *ureg = t->ureg; 4209 GLuint i; 4210 struct ureg_dst dst[1]; 4211 struct ureg_src src[4]; 4212 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET]; 4213 4214 unsigned num_dst; 4215 unsigned num_src; 4216 4217 num_dst = num_inst_dst_regs(inst->op); 4218 num_src = num_inst_src_regs(inst->op); 4219 4220 if (num_dst) 4221 dst[0] = translate_dst(t, 4222 &inst->dst, 4223 inst->saturate); 4224 4225 for (i = 0; i < num_src; i++) 4226 src[i] = translate_src(t, &inst->src[i]); 4227 4228 switch(inst->op) { 4229 case TGSI_OPCODE_BGNLOOP: 4230 case TGSI_OPCODE_CAL: 4231 case TGSI_OPCODE_ELSE: 4232 case TGSI_OPCODE_ENDLOOP: 4233 case TGSI_OPCODE_IF: 4234 assert(num_dst == 0); 4235 ureg_label_insn(ureg, 4236 inst->op, 4237 src, num_src, 4238 get_label(t, 4239 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0)); 4240 return; 4241 4242 case TGSI_OPCODE_TEX: 4243 case TGSI_OPCODE_TXB: 4244 case TGSI_OPCODE_TXD: 4245 case TGSI_OPCODE_TXL: 4246 case TGSI_OPCODE_TXP: 4247 case TGSI_OPCODE_TXQ: 4248 case TGSI_OPCODE_TXF: 4249 src[num_src++] = t->samplers[inst->sampler]; 4250 for (i = 0; i < inst->tex_offset_num_offset; i++) { 4251 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]); 4252 } 4253 ureg_tex_insn(ureg, 4254 inst->op, 4255 dst, num_dst, 4256 translate_texture_target(inst->tex_target, inst->tex_shadow), 4257 texoffsets, inst->tex_offset_num_offset, 4258 src, num_src); 4259 return; 4260 4261 case TGSI_OPCODE_SCS: 4262 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY); 4263 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src); 4264 break; 4265 4266 default: 4267 ureg_insn(ureg, 4268 inst->op, 4269 dst, num_dst, 4270 src, num_src); 4271 break; 4272 } 4273} 4274 4275/** 4276 * Emit the TGSI instructions for inverting and adjusting WPOS. 4277 * This code is unavoidable because it also depends on whether 4278 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM). 4279 */ 4280static void 4281emit_wpos_adjustment( struct st_translate *t, 4282 const struct gl_program *program, 4283 boolean invert, 4284 GLfloat adjX, GLfloat adjY[2]) 4285{ 4286 struct ureg_program *ureg = t->ureg; 4287 4288 /* Fragment program uses fragment position input. 4289 * Need to replace instances of INPUT[WPOS] with temp T 4290 * where T = INPUT[WPOS] by y is inverted. 4291 */ 4292 static const gl_state_index wposTransformState[STATE_LENGTH] 4293 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 4294 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 }; 4295 4296 /* XXX: note we are modifying the incoming shader here! Need to 4297 * do this before emitting the constant decls below, or this 4298 * will be missed: 4299 */ 4300 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters, 4301 wposTransformState); 4302 4303 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst ); 4304 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg ); 4305 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]]; 4306 4307 /* First, apply the coordinate shift: */ 4308 if (adjX || adjY[0] || adjY[1]) { 4309 if (adjY[0] != adjY[1]) { 4310 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively 4311 * depending on whether inversion is actually going to be applied 4312 * or not, which is determined by testing against the inversion 4313 * state variable used below, which will be either +1 or -1. 4314 */ 4315 struct ureg_dst adj_temp = ureg_DECL_temporary(ureg); 4316 4317 ureg_CMP(ureg, adj_temp, 4318 ureg_scalar(wpostrans, invert ? 2 : 0), 4319 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f), 4320 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f)); 4321 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp)); 4322 } else { 4323 ureg_ADD(ureg, wpos_temp, wpos_input, 4324 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f)); 4325 } 4326 wpos_input = ureg_src(wpos_temp); 4327 } else { 4328 /* MOV wpos_temp, input[wpos] 4329 */ 4330 ureg_MOV( ureg, wpos_temp, wpos_input ); 4331 } 4332 4333 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be 4334 * inversion/identity, or the other way around if we're drawing to an FBO. 4335 */ 4336 if (invert) { 4337 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy 4338 */ 4339 ureg_MAD( ureg, 4340 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ), 4341 wpos_input, 4342 ureg_scalar(wpostrans, 0), 4343 ureg_scalar(wpostrans, 1)); 4344 } else { 4345 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww 4346 */ 4347 ureg_MAD( ureg, 4348 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ), 4349 wpos_input, 4350 ureg_scalar(wpostrans, 2), 4351 ureg_scalar(wpostrans, 3)); 4352 } 4353 4354 /* Use wpos_temp as position input from here on: 4355 */ 4356 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp); 4357} 4358 4359 4360/** 4361 * Emit fragment position/ooordinate code. 4362 */ 4363static void 4364emit_wpos(struct st_context *st, 4365 struct st_translate *t, 4366 const struct gl_program *program, 4367 struct ureg_program *ureg) 4368{ 4369 const struct gl_fragment_program *fp = 4370 (const struct gl_fragment_program *) program; 4371 struct pipe_screen *pscreen = st->pipe->screen; 4372 GLfloat adjX = 0.0f; 4373 GLfloat adjY[2] = { 0.0f, 0.0f }; 4374 boolean invert = FALSE; 4375 4376 /* Query the pixel center conventions supported by the pipe driver and set 4377 * adjX, adjY to help out if it cannot handle the requested one internally. 4378 * 4379 * The bias of the y-coordinate depends on whether y-inversion takes place 4380 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are 4381 * drawing to an FBO (causes additional inversion), and whether the the pipe 4382 * driver origin and the requested origin differ (the latter condition is 4383 * stored in the 'invert' variable). 4384 * 4385 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper): 4386 * 4387 * center shift only: 4388 * i -> h: +0.5 4389 * h -> i: -0.5 4390 * 4391 * inversion only: 4392 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99 4393 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5 4394 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0 4395 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5 4396 * 4397 * inversion and center shift: 4398 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5 4399 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99 4400 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5 4401 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0 4402 */ 4403 if (fp->OriginUpperLeft) { 4404 /* Fragment shader wants origin in upper-left */ 4405 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) { 4406 /* the driver supports upper-left origin */ 4407 } 4408 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) { 4409 /* the driver supports lower-left origin, need to invert Y */ 4410 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT); 4411 invert = TRUE; 4412 } 4413 else 4414 assert(0); 4415 } 4416 else { 4417 /* Fragment shader wants origin in lower-left */ 4418 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) 4419 /* the driver supports lower-left origin */ 4420 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT); 4421 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) 4422 /* the driver supports upper-left origin, need to invert Y */ 4423 invert = TRUE; 4424 else 4425 assert(0); 4426 } 4427 4428 if (fp->PixelCenterInteger) { 4429 /* Fragment shader wants pixel center integer */ 4430 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) { 4431 /* the driver supports pixel center integer */ 4432 adjY[1] = 1.0f; 4433 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER); 4434 } 4435 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) { 4436 /* the driver supports pixel center half integer, need to bias X,Y */ 4437 adjX = -0.5f; 4438 adjY[0] = -0.5f; 4439 adjY[1] = 0.5f; 4440 } 4441 else 4442 assert(0); 4443 } 4444 else { 4445 /* Fragment shader wants pixel center half integer */ 4446 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) { 4447 /* the driver supports pixel center half integer */ 4448 } 4449 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) { 4450 /* the driver supports pixel center integer, need to bias X,Y */ 4451 adjX = adjY[0] = adjY[1] = 0.5f; 4452 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER); 4453 } 4454 else 4455 assert(0); 4456 } 4457 4458 /* we invert after adjustment so that we avoid the MOV to temporary, 4459 * and reuse the adjustment ADD instead */ 4460 emit_wpos_adjustment(t, program, invert, adjX, adjY); 4461} 4462 4463/** 4464 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back. 4465 * TGSI uses +1 for front, -1 for back. 4466 * This function converts the TGSI value to the GL value. Simply clamping/ 4467 * saturating the value to [0,1] does the job. 4468 */ 4469static void 4470emit_face_var(struct st_translate *t) 4471{ 4472 struct ureg_program *ureg = t->ureg; 4473 struct ureg_dst face_temp = ureg_DECL_temporary(ureg); 4474 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]]; 4475 4476 /* MOV_SAT face_temp, input[face] */ 4477 face_temp = ureg_saturate(face_temp); 4478 ureg_MOV(ureg, face_temp, face_input); 4479 4480 /* Use face_temp as face input from here on: */ 4481 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp); 4482} 4483 4484static void 4485emit_edgeflags(struct st_translate *t) 4486{ 4487 struct ureg_program *ureg = t->ureg; 4488 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]]; 4489 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]]; 4490 4491 ureg_MOV(ureg, edge_dst, edge_src); 4492} 4493 4494/** 4495 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format. 4496 * \param program the program to translate 4497 * \param numInputs number of input registers used 4498 * \param inputMapping maps Mesa fragment program inputs to TGSI generic 4499 * input indexes 4500 * \param inputSemanticName the TGSI_SEMANTIC flag for each input 4501 * \param inputSemanticIndex the semantic index (ex: which texcoord) for 4502 * each input 4503 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input 4504 * \param numOutputs number of output registers used 4505 * \param outputMapping maps Mesa fragment program outputs to TGSI 4506 * generic outputs 4507 * \param outputSemanticName the TGSI_SEMANTIC flag for each output 4508 * \param outputSemanticIndex the semantic index (ex: which texcoord) for 4509 * each output 4510 * 4511 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY 4512 */ 4513extern "C" enum pipe_error 4514st_translate_program( 4515 struct gl_context *ctx, 4516 uint procType, 4517 struct ureg_program *ureg, 4518 glsl_to_tgsi_visitor *program, 4519 const struct gl_program *proginfo, 4520 GLuint numInputs, 4521 const GLuint inputMapping[], 4522 const ubyte inputSemanticName[], 4523 const ubyte inputSemanticIndex[], 4524 const GLuint interpMode[], 4525 GLuint numOutputs, 4526 const GLuint outputMapping[], 4527 const ubyte outputSemanticName[], 4528 const ubyte outputSemanticIndex[], 4529 boolean passthrough_edgeflags) 4530{ 4531 struct st_translate *t; 4532 unsigned i; 4533 enum pipe_error ret = PIPE_OK; 4534 4535 assert(numInputs <= Elements(t->inputs)); 4536 assert(numOutputs <= Elements(t->outputs)); 4537 4538 t = CALLOC_STRUCT(st_translate); 4539 if (!t) { 4540 ret = PIPE_ERROR_OUT_OF_MEMORY; 4541 goto out; 4542 } 4543 4544 memset(t, 0, sizeof *t); 4545 4546 t->procType = procType; 4547 t->inputMapping = inputMapping; 4548 t->outputMapping = outputMapping; 4549 t->ureg = ureg; 4550 t->pointSizeOutIndex = -1; 4551 t->prevInstWrotePointSize = GL_FALSE; 4552 4553 /* 4554 * Declare input attributes. 4555 */ 4556 if (procType == TGSI_PROCESSOR_FRAGMENT) { 4557 for (i = 0; i < numInputs; i++) { 4558 t->inputs[i] = ureg_DECL_fs_input(ureg, 4559 inputSemanticName[i], 4560 inputSemanticIndex[i], 4561 interpMode[i]); 4562 } 4563 4564 if (proginfo->InputsRead & FRAG_BIT_WPOS) { 4565 /* Must do this after setting up t->inputs, and before 4566 * emitting constant references, below: 4567 */ 4568 emit_wpos(st_context(ctx), t, proginfo, ureg); 4569 } 4570 4571 if (proginfo->InputsRead & FRAG_BIT_FACE) 4572 emit_face_var(t); 4573 4574 /* 4575 * Declare output attributes. 4576 */ 4577 for (i = 0; i < numOutputs; i++) { 4578 switch (outputSemanticName[i]) { 4579 case TGSI_SEMANTIC_POSITION: 4580 t->outputs[i] = ureg_DECL_output(ureg, 4581 TGSI_SEMANTIC_POSITION, /* Z/Depth */ 4582 outputSemanticIndex[i]); 4583 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z); 4584 break; 4585 case TGSI_SEMANTIC_STENCIL: 4586 t->outputs[i] = ureg_DECL_output(ureg, 4587 TGSI_SEMANTIC_STENCIL, /* Stencil */ 4588 outputSemanticIndex[i]); 4589 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y); 4590 break; 4591 case TGSI_SEMANTIC_COLOR: 4592 t->outputs[i] = ureg_DECL_output(ureg, 4593 TGSI_SEMANTIC_COLOR, 4594 outputSemanticIndex[i]); 4595 break; 4596 default: 4597 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR"); 4598 ret = PIPE_ERROR_BAD_INPUT; 4599 goto out; 4600 } 4601 } 4602 } 4603 else if (procType == TGSI_PROCESSOR_GEOMETRY) { 4604 for (i = 0; i < numInputs; i++) { 4605 t->inputs[i] = ureg_DECL_gs_input(ureg, 4606 i, 4607 inputSemanticName[i], 4608 inputSemanticIndex[i]); 4609 } 4610 4611 for (i = 0; i < numOutputs; i++) { 4612 t->outputs[i] = ureg_DECL_output(ureg, 4613 outputSemanticName[i], 4614 outputSemanticIndex[i]); 4615 } 4616 } 4617 else { 4618 assert(procType == TGSI_PROCESSOR_VERTEX); 4619 4620 for (i = 0; i < numInputs; i++) { 4621 t->inputs[i] = ureg_DECL_vs_input(ureg, i); 4622 } 4623 4624 for (i = 0; i < numOutputs; i++) { 4625 t->outputs[i] = ureg_DECL_output(ureg, 4626 outputSemanticName[i], 4627 outputSemanticIndex[i]); 4628 if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && proginfo->Id) { 4629 /* Writing to the point size result register requires special 4630 * handling to implement clamping. 4631 */ 4632 static const gl_state_index pointSizeClampState[STATE_LENGTH] 4633 = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 }; 4634 /* XXX: note we are modifying the incoming shader here! Need to 4635 * do this before emitting the constant decls below, or this 4636 * will be missed. 4637 */ 4638 unsigned pointSizeClampConst = 4639 _mesa_add_state_reference(proginfo->Parameters, 4640 pointSizeClampState); 4641 struct ureg_dst psizregtemp = ureg_DECL_temporary(ureg); 4642 t->pointSizeConst = ureg_DECL_constant(ureg, pointSizeClampConst); 4643 t->pointSizeResult = t->outputs[i]; 4644 t->pointSizeOutIndex = i; 4645 t->outputs[i] = psizregtemp; 4646 } 4647 } 4648 if (passthrough_edgeflags) 4649 emit_edgeflags(t); 4650 } 4651 4652 /* Declare address register. 4653 */ 4654 if (program->num_address_regs > 0) { 4655 assert(program->num_address_regs == 1); 4656 t->address[0] = ureg_DECL_address(ureg); 4657 } 4658 4659 /* Declare misc input registers 4660 */ 4661 { 4662 GLbitfield sysInputs = proginfo->SystemValuesRead; 4663 unsigned numSys = 0; 4664 for (i = 0; sysInputs; i++) { 4665 if (sysInputs & (1 << i)) { 4666 unsigned semName = mesa_sysval_to_semantic[i]; 4667 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0); 4668 numSys++; 4669 sysInputs &= ~(1 << i); 4670 } 4671 } 4672 } 4673 4674 if (program->indirect_addr_temps) { 4675 /* If temps are accessed with indirect addressing, declare temporaries 4676 * in sequential order. Else, we declare them on demand elsewhere. 4677 * (Note: the number of temporaries is equal to program->next_temp) 4678 */ 4679 for (i = 0; i < (unsigned)program->next_temp; i++) { 4680 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */ 4681 t->temps[i] = ureg_DECL_temporary(t->ureg); 4682 } 4683 } 4684 4685 /* Emit constants and uniforms. TGSI uses a single index space for these, 4686 * so we put all the translated regs in t->constants. 4687 */ 4688 if (proginfo->Parameters) { 4689 t->constants = (struct ureg_src *)CALLOC(proginfo->Parameters->NumParameters * sizeof(t->constants[0])); 4690 if (t->constants == NULL) { 4691 ret = PIPE_ERROR_OUT_OF_MEMORY; 4692 goto out; 4693 } 4694 4695 for (i = 0; i < proginfo->Parameters->NumParameters; i++) { 4696 switch (proginfo->Parameters->Parameters[i].Type) { 4697 case PROGRAM_ENV_PARAM: 4698 case PROGRAM_LOCAL_PARAM: 4699 case PROGRAM_STATE_VAR: 4700 case PROGRAM_NAMED_PARAM: 4701 case PROGRAM_UNIFORM: 4702 t->constants[i] = ureg_DECL_constant(ureg, i); 4703 break; 4704 4705 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect 4706 * addressing of the const buffer. 4707 * FIXME: Be smarter and recognize param arrays: 4708 * indirect addressing is only valid within the referenced 4709 * array. 4710 */ 4711 case PROGRAM_CONSTANT: 4712 if (program->indirect_addr_consts) 4713 t->constants[i] = ureg_DECL_constant(ureg, i); 4714 else 4715 t->constants[i] = emit_immediate(t, 4716 proginfo->Parameters->ParameterValues[i], 4717 proginfo->Parameters->Parameters[i].DataType, 4718 4); 4719 break; 4720 default: 4721 break; 4722 } 4723 } 4724 } 4725 4726 /* Emit immediate values. 4727 */ 4728 t->immediates = (struct ureg_src *)CALLOC(program->num_immediates * sizeof(struct ureg_src)); 4729 if (t->immediates == NULL) { 4730 ret = PIPE_ERROR_OUT_OF_MEMORY; 4731 goto out; 4732 } 4733 i = 0; 4734 foreach_iter(exec_list_iterator, iter, program->immediates) { 4735 immediate_storage *imm = (immediate_storage *)iter.get(); 4736 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size); 4737 } 4738 4739 /* texture samplers */ 4740 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) { 4741 if (program->samplers_used & (1 << i)) { 4742 t->samplers[i] = ureg_DECL_sampler(ureg, i); 4743 } 4744 } 4745 4746 /* Emit each instruction in turn: 4747 */ 4748 foreach_iter(exec_list_iterator, iter, program->instructions) { 4749 set_insn_start(t, ureg_get_instruction_number(ureg)); 4750 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get()); 4751 4752 if (t->prevInstWrotePointSize && proginfo->Id) { 4753 /* The previous instruction wrote to the (fake) vertex point size 4754 * result register. Now we need to clamp that value to the min/max 4755 * point size range, putting the result into the real point size 4756 * register. 4757 * Note that we can't do this easily at the end of program due to 4758 * possible early return. 4759 */ 4760 set_insn_start(t, ureg_get_instruction_number(ureg)); 4761 ureg_MAX(t->ureg, 4762 ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X), 4763 ureg_src(t->outputs[t->pointSizeOutIndex]), 4764 ureg_swizzle(t->pointSizeConst, 1,1,1,1)); 4765 ureg_MIN(t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X), 4766 ureg_src(t->outputs[t->pointSizeOutIndex]), 4767 ureg_swizzle(t->pointSizeConst, 2,2,2,2)); 4768 } 4769 t->prevInstWrotePointSize = GL_FALSE; 4770 } 4771 4772 /* Fix up all emitted labels: 4773 */ 4774 for (i = 0; i < t->labels_count; i++) { 4775 ureg_fixup_label(ureg, t->labels[i].token, 4776 t->insn[t->labels[i].branch_target]); 4777 } 4778 4779out: 4780 if (t) { 4781 FREE(t->insn); 4782 FREE(t->labels); 4783 FREE(t->constants); 4784 FREE(t->immediates); 4785 4786 if (t->error) { 4787 debug_printf("%s: translate error flag set\n", __FUNCTION__); 4788 } 4789 4790 FREE(t); 4791 } 4792 4793 return ret; 4794} 4795/* ----------------------------- End TGSI code ------------------------------ */ 4796 4797/** 4798 * Convert a shader's GLSL IR into a Mesa gl_program, although without 4799 * generating Mesa IR. 4800 */ 4801static struct gl_program * 4802get_mesa_program(struct gl_context *ctx, 4803 struct gl_shader_program *shader_program, 4804 struct gl_shader *shader) 4805{ 4806 glsl_to_tgsi_visitor* v = new glsl_to_tgsi_visitor(); 4807 struct gl_program *prog; 4808 struct pipe_screen * screen = st_context(ctx)->pipe->screen; 4809 unsigned pipe_shader_type; 4810 GLenum target; 4811 const char *target_string; 4812 bool progress; 4813 struct gl_shader_compiler_options *options = 4814 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)]; 4815 4816 switch (shader->Type) { 4817 case GL_VERTEX_SHADER: 4818 target = GL_VERTEX_PROGRAM_ARB; 4819 target_string = "vertex"; 4820 pipe_shader_type = PIPE_SHADER_VERTEX; 4821 break; 4822 case GL_FRAGMENT_SHADER: 4823 target = GL_FRAGMENT_PROGRAM_ARB; 4824 target_string = "fragment"; 4825 pipe_shader_type = PIPE_SHADER_FRAGMENT; 4826 break; 4827 case GL_GEOMETRY_SHADER: 4828 target = GL_GEOMETRY_PROGRAM_NV; 4829 target_string = "geometry"; 4830 pipe_shader_type = PIPE_SHADER_GEOMETRY; 4831 break; 4832 default: 4833 assert(!"should not be reached"); 4834 return NULL; 4835 } 4836 4837 validate_ir_tree(shader->ir); 4838 4839 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name); 4840 if (!prog) 4841 return NULL; 4842 prog->Parameters = _mesa_new_parameter_list(); 4843 v->ctx = ctx; 4844 v->prog = prog; 4845 v->shader_program = shader_program; 4846 v->options = options; 4847 v->glsl_version = ctx->Const.GLSLVersion; 4848 v->native_integers = ctx->Const.NativeIntegers; 4849 4850 _mesa_generate_parameters_list_for_uniforms(shader_program, shader, 4851 prog->Parameters); 4852 4853 /* Emit intermediate IR for main(). */ 4854 visit_exec_list(shader->ir, v); 4855 4856 /* Now emit bodies for any functions that were used. */ 4857 do { 4858 progress = GL_FALSE; 4859 4860 foreach_iter(exec_list_iterator, iter, v->function_signatures) { 4861 function_entry *entry = (function_entry *)iter.get(); 4862 4863 if (!entry->bgn_inst) { 4864 v->current_function = entry; 4865 4866 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB); 4867 entry->bgn_inst->function = entry; 4868 4869 visit_exec_list(&entry->sig->body, v); 4870 4871 glsl_to_tgsi_instruction *last; 4872 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail(); 4873 if (last->op != TGSI_OPCODE_RET) 4874 v->emit(NULL, TGSI_OPCODE_RET); 4875 4876 glsl_to_tgsi_instruction *end; 4877 end = v->emit(NULL, TGSI_OPCODE_ENDSUB); 4878 end->function = entry; 4879 4880 progress = GL_TRUE; 4881 } 4882 } 4883 } while (progress); 4884 4885#if 0 4886 /* Print out some information (for debugging purposes) used by the 4887 * optimization passes. */ 4888 for (i=0; i < v->next_temp; i++) { 4889 int fr = v->get_first_temp_read(i); 4890 int fw = v->get_first_temp_write(i); 4891 int lr = v->get_last_temp_read(i); 4892 int lw = v->get_last_temp_write(i); 4893 4894 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw); 4895 assert(fw <= fr); 4896 } 4897#endif 4898 4899 if (!screen->get_shader_param(screen, pipe_shader_type, 4900 PIPE_SHADER_CAP_OUTPUT_READ)) { 4901 /* Remove reads to output registers, and to varyings in vertex shaders. */ 4902 v->remove_output_reads(PROGRAM_OUTPUT); 4903 if (target == GL_VERTEX_PROGRAM_ARB) 4904 v->remove_output_reads(PROGRAM_VARYING); 4905 } 4906 4907 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */ 4908 v->simplify_cmp(); 4909 v->copy_propagate(); 4910 while (v->eliminate_dead_code_advanced()); 4911 4912 /* FIXME: These passes to optimize temporary registers don't work when there 4913 * is indirect addressing of the temporary register space. We need proper 4914 * array support so that we don't have to give up these passes in every 4915 * shader that uses arrays. 4916 */ 4917 if (!v->indirect_addr_temps) { 4918 v->eliminate_dead_code(); 4919 v->merge_registers(); 4920 v->renumber_registers(); 4921 } 4922 4923 /* Write the END instruction. */ 4924 v->emit(NULL, TGSI_OPCODE_END); 4925 4926 if (ctx->Shader.Flags & GLSL_DUMP) { 4927 printf("\n"); 4928 printf("GLSL IR for linked %s program %d:\n", target_string, 4929 shader_program->Name); 4930 _mesa_print_ir(shader->ir, NULL); 4931 printf("\n"); 4932 printf("\n"); 4933 fflush(stdout); 4934 } 4935 4936 prog->Instructions = NULL; 4937 prog->NumInstructions = 0; 4938 4939 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER); 4940 count_resources(v, prog); 4941 4942 _mesa_reference_program(ctx, &shader->Program, prog); 4943 4944 /* This has to be done last. Any operation the can cause 4945 * prog->ParameterValues to get reallocated (e.g., anything that adds a 4946 * program constant) has to happen before creating this linkage. 4947 */ 4948 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters); 4949 if (!shader_program->LinkStatus) { 4950 return NULL; 4951 } 4952 4953 struct st_vertex_program *stvp; 4954 struct st_fragment_program *stfp; 4955 struct st_geometry_program *stgp; 4956 4957 switch (shader->Type) { 4958 case GL_VERTEX_SHADER: 4959 stvp = (struct st_vertex_program *)prog; 4960 stvp->glsl_to_tgsi = v; 4961 break; 4962 case GL_FRAGMENT_SHADER: 4963 stfp = (struct st_fragment_program *)prog; 4964 stfp->glsl_to_tgsi = v; 4965 break; 4966 case GL_GEOMETRY_SHADER: 4967 stgp = (struct st_geometry_program *)prog; 4968 stgp->glsl_to_tgsi = v; 4969 break; 4970 default: 4971 assert(!"should not be reached"); 4972 return NULL; 4973 } 4974 4975 return prog; 4976} 4977 4978extern "C" { 4979 4980struct gl_shader * 4981st_new_shader(struct gl_context *ctx, GLuint name, GLuint type) 4982{ 4983 struct gl_shader *shader; 4984 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER || 4985 type == GL_GEOMETRY_SHADER_ARB); 4986 shader = rzalloc(NULL, struct gl_shader); 4987 if (shader) { 4988 shader->Type = type; 4989 shader->Name = name; 4990 _mesa_init_shader(ctx, shader); 4991 } 4992 return shader; 4993} 4994 4995struct gl_shader_program * 4996st_new_shader_program(struct gl_context *ctx, GLuint name) 4997{ 4998 struct gl_shader_program *shProg; 4999 shProg = rzalloc(NULL, struct gl_shader_program); 5000 if (shProg) { 5001 shProg->Name = name; 5002 _mesa_init_shader_program(ctx, shProg); 5003 } 5004 return shProg; 5005} 5006 5007/** 5008 * Link a shader. 5009 * Called via ctx->Driver.LinkShader() 5010 * This actually involves converting GLSL IR into an intermediate TGSI-like IR 5011 * with code lowering and other optimizations. 5012 */ 5013GLboolean 5014st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) 5015{ 5016 assert(prog->LinkStatus); 5017 5018 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) { 5019 if (prog->_LinkedShaders[i] == NULL) 5020 continue; 5021 5022 bool progress; 5023 exec_list *ir = prog->_LinkedShaders[i]->ir; 5024 const struct gl_shader_compiler_options *options = 5025 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)]; 5026 5027 do { 5028 progress = false; 5029 5030 /* Lowering */ 5031 do_mat_op_to_vec(ir); 5032 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2 5033 | LOG_TO_LOG2 | INT_DIV_TO_MUL_RCP 5034 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0))); 5035 5036 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress; 5037 5038 progress = do_common_optimization(ir, true, true, 5039 options->MaxUnrollIterations) 5040 || progress; 5041 5042 progress = lower_quadop_vector(ir, false) || progress; 5043 5044 if (options->MaxIfDepth == 0) 5045 progress = lower_discard(ir) || progress; 5046 5047 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress; 5048 5049 if (options->EmitNoNoise) 5050 progress = lower_noise(ir) || progress; 5051 5052 /* If there are forms of indirect addressing that the driver 5053 * cannot handle, perform the lowering pass. 5054 */ 5055 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput 5056 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) 5057 progress = 5058 lower_variable_index_to_cond_assign(ir, 5059 options->EmitNoIndirectInput, 5060 options->EmitNoIndirectOutput, 5061 options->EmitNoIndirectTemp, 5062 options->EmitNoIndirectUniform) 5063 || progress; 5064 5065 progress = do_vec_index_to_cond_assign(ir) || progress; 5066 } while (progress); 5067 5068 validate_ir_tree(ir); 5069 } 5070 5071 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) { 5072 struct gl_program *linked_prog; 5073 5074 if (prog->_LinkedShaders[i] == NULL) 5075 continue; 5076 5077 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]); 5078 5079 if (linked_prog) { 5080 static const GLenum targets[] = { 5081 GL_VERTEX_PROGRAM_ARB, 5082 GL_FRAGMENT_PROGRAM_ARB, 5083 GL_GEOMETRY_PROGRAM_NV 5084 }; 5085 5086 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, 5087 linked_prog); 5088 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) { 5089 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, 5090 NULL); 5091 _mesa_reference_program(ctx, &linked_prog, NULL); 5092 return GL_FALSE; 5093 } 5094 } 5095 5096 _mesa_reference_program(ctx, &linked_prog, NULL); 5097 } 5098 5099 return GL_TRUE; 5100} 5101 5102void 5103st_translate_stream_output_info(struct glsl_to_tgsi_visitor *glsl_to_tgsi, 5104 const GLuint outputMapping[], 5105 struct pipe_stream_output_info *so) 5106{ 5107 static unsigned comps_to_mask[] = { 5108 0, 5109 TGSI_WRITEMASK_X, 5110 TGSI_WRITEMASK_XY, 5111 TGSI_WRITEMASK_XYZ, 5112 TGSI_WRITEMASK_XYZW 5113 }; 5114 unsigned i; 5115 struct gl_transform_feedback_info *info = 5116 &glsl_to_tgsi->shader_program->LinkedTransformFeedback; 5117 5118 for (i = 0; i < info->NumOutputs; i++) { 5119 assert(info->Outputs[i].NumComponents < Elements(comps_to_mask)); 5120 so->output[i].register_index = 5121 outputMapping[info->Outputs[i].OutputRegister]; 5122 so->output[i].register_mask = 5123 comps_to_mask[info->Outputs[i].NumComponents]; 5124 so->output[i].output_buffer = info->Outputs[i].OutputBuffer; 5125 } 5126 so->num_outputs = info->NumOutputs; 5127} 5128 5129} /* extern "C" */ 5130