sha512-x86_64.pl revision 221304ee937bc0910948a8be1320cb8cc4eb6d36 
1#!/usr/bin/env perl
2#
3# ====================================================================
4# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5# project. Rights for redistribution and usage in source and binary
6# forms are granted according to the OpenSSL license.
7# ====================================================================
8#
9# sha256/512_block procedure for x86_64.
10#
11# 40% improvement over compiler-generated code on Opteron. On EM64T
12# sha256 was observed to run >80% faster and sha512 - >40%. No magical
13# tricks, just straight implementation... I really wonder why gcc
14# [being armed with inline assembler] fails to generate as fast code.
15# The only thing which is cool about this module is that it's very
16# same instruction sequence used for both SHA-256 and SHA-512. In
17# former case the instructions operate on 32-bit operands, while in
18# latter - on 64-bit ones. All I had to do is to get one flavor right,
19# the other one passed the test right away:-)
20#
21# sha256_block runs in ~1005 cycles on Opteron, which gives you
22# asymptotic performance of 64*1000/1005=63.7MBps times CPU clock
23# frequency in GHz. sha512_block runs in ~1275 cycles, which results
24# in 128*1000/1275=100MBps per GHz. Is there room for improvement?
25# Well, if you compare it to IA-64 implementation, which maintains
26# X[16] in register bank[!], tends to 4 instructions per CPU clock
27# cycle and runs in 1003 cycles, 1275 is very good result for 3-way
28# issue Opteron pipeline and X[16] maintained in memory. So that *if*
29# there is a way to improve it, *then* the only way would be to try to
30# offload X[16] updates to SSE unit, but that would require "deeper"
31# loop unroll, which in turn would naturally cause size blow-up, not
32# to mention increased complexity! And once again, only *if* it's
33# actually possible to noticeably improve overall ILP, instruction
34# level parallelism, on a given CPU implementation in this case.
35#
36# Special note on Intel EM64T. While Opteron CPU exhibits perfect
37# perfromance ratio of 1.5 between 64- and 32-bit flavors [see above],
38# [currently available] EM64T CPUs apparently are far from it. On the
39# contrary, 64-bit version, sha512_block, is ~30% *slower* than 32-bit
40# sha256_block:-( This is presumably because 64-bit shifts/rotates
41# apparently are not atomic instructions, but implemented in microcode.
42
43$flavour = shift;
44$output  = shift;
45if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
46
47$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
48
49$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
50( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
51( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
52die "can't locate x86_64-xlate.pl";
53
54open STDOUT,"| $^X $xlate $flavour $output";
55
56if ($output =~ /512/) {
57	$func="sha512_block_data_order";
58	$TABLE="K512";
59	$SZ=8;
60	@ROT=($A,$B,$C,$D,$E,$F,$G,$H)=("%rax","%rbx","%rcx","%rdx",
61					"%r8", "%r9", "%r10","%r11");
62	($T1,$a0,$a1,$a2)=("%r12","%r13","%r14","%r15");
63	@Sigma0=(28,34,39);
64	@Sigma1=(14,18,41);
65	@sigma0=(1,  8, 7);
66	@sigma1=(19,61, 6);
67	$rounds=80;
68} else {
69	$func="sha256_block_data_order";
70	$TABLE="K256";
71	$SZ=4;
72	@ROT=($A,$B,$C,$D,$E,$F,$G,$H)=("%eax","%ebx","%ecx","%edx",
73					"%r8d","%r9d","%r10d","%r11d");
74	($T1,$a0,$a1,$a2)=("%r12d","%r13d","%r14d","%r15d");
75	@Sigma0=( 2,13,22);
76	@Sigma1=( 6,11,25);
77	@sigma0=( 7,18, 3);
78	@sigma1=(17,19,10);
79	$rounds=64;
80}
81
82$ctx="%rdi";	# 1st arg
83$round="%rdi";	# zaps $ctx
84$inp="%rsi";	# 2nd arg
85$Tbl="%rbp";
86
87$_ctx="16*$SZ+0*8(%rsp)";
88$_inp="16*$SZ+1*8(%rsp)";
89$_end="16*$SZ+2*8(%rsp)";
90$_rsp="16*$SZ+3*8(%rsp)";
91$framesz="16*$SZ+4*8";
92
93
94sub ROUND_00_15()
95{ my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;
96
97$code.=<<___;
98	mov	$e,$a0
99	mov	$e,$a1
100	mov	$f,$a2
101
102	ror	\$$Sigma1[0],$a0
103	ror	\$$Sigma1[1],$a1
104	xor	$g,$a2			# f^g
105
106	xor	$a1,$a0
107	ror	\$`$Sigma1[2]-$Sigma1[1]`,$a1
108	and	$e,$a2			# (f^g)&e
109	mov	$T1,`$SZ*($i&0xf)`(%rsp)
110
111	xor	$a1,$a0			# Sigma1(e)
112	xor	$g,$a2			# Ch(e,f,g)=((f^g)&e)^g
113	add	$h,$T1			# T1+=h
114
115	mov	$a,$h
116	add	$a0,$T1			# T1+=Sigma1(e)
117
118	add	$a2,$T1			# T1+=Ch(e,f,g)
119	mov	$a,$a0
120	mov	$a,$a1
121
122	ror	\$$Sigma0[0],$h
123	ror	\$$Sigma0[1],$a0
124	mov	$a,$a2
125	add	($Tbl,$round,$SZ),$T1	# T1+=K[round]
126
127	xor	$a0,$h
128	ror	\$`$Sigma0[2]-$Sigma0[1]`,$a0
129	or	$c,$a1			# a|c
130
131	xor	$a0,$h			# h=Sigma0(a)
132	and	$c,$a2			# a&c
133	add	$T1,$d			# d+=T1
134
135	and	$b,$a1			# (a|c)&b
136	add	$T1,$h			# h+=T1
137
138	or	$a2,$a1			# Maj(a,b,c)=((a|c)&b)|(a&c)
139	lea	1($round),$round	# round++
140
141	add	$a1,$h			# h+=Maj(a,b,c)
142___
143}
144
145sub ROUND_16_XX()
146{ my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;
147
148$code.=<<___;
149	mov	`$SZ*(($i+1)&0xf)`(%rsp),$a0
150	mov	`$SZ*(($i+14)&0xf)`(%rsp),$T1
151
152	mov	$a0,$a2
153
154	shr	\$$sigma0[2],$a0
155	ror	\$$sigma0[0],$a2
156
157	xor	$a2,$a0
158	ror	\$`$sigma0[1]-$sigma0[0]`,$a2
159
160	xor	$a2,$a0			# sigma0(X[(i+1)&0xf])
161	mov	$T1,$a1
162
163	shr	\$$sigma1[2],$T1
164	ror	\$$sigma1[0],$a1
165
166	xor	$a1,$T1
167	ror	\$`$sigma1[1]-$sigma1[0]`,$a1
168
169	xor	$a1,$T1			# sigma1(X[(i+14)&0xf])
170
171	add	$a0,$T1
172
173	add	`$SZ*(($i+9)&0xf)`(%rsp),$T1
174
175	add	`$SZ*($i&0xf)`(%rsp),$T1
176___
177	&ROUND_00_15(@_);
178}
179
180$code=<<___;
181.text
182
183.globl	$func
184.type	$func,\@function,4
185.align	16
186$func:
187	push	%rbx
188	push	%rbp
189	push	%r12
190	push	%r13
191	push	%r14
192	push	%r15
193	mov	%rsp,%r11		# copy %rsp
194	shl	\$4,%rdx		# num*16
195	sub	\$$framesz,%rsp
196	lea	($inp,%rdx,$SZ),%rdx	# inp+num*16*$SZ
197	and	\$-64,%rsp		# align stack frame
198	mov	$ctx,$_ctx		# save ctx, 1st arg
199	mov	$inp,$_inp		# save inp, 2nd arh
200	mov	%rdx,$_end		# save end pointer, "3rd" arg
201	mov	%r11,$_rsp		# save copy of %rsp
202.Lprologue:
203
204	lea	$TABLE(%rip),$Tbl
205
206	mov	$SZ*0($ctx),$A
207	mov	$SZ*1($ctx),$B
208	mov	$SZ*2($ctx),$C
209	mov	$SZ*3($ctx),$D
210	mov	$SZ*4($ctx),$E
211	mov	$SZ*5($ctx),$F
212	mov	$SZ*6($ctx),$G
213	mov	$SZ*7($ctx),$H
214	jmp	.Lloop
215
216.align	16
217.Lloop:
218	xor	$round,$round
219___
220	for($i=0;$i<16;$i++) {
221		$code.="	mov	$SZ*$i($inp),$T1\n";
222		$code.="	bswap	$T1\n";
223		&ROUND_00_15($i,@ROT);
224		unshift(@ROT,pop(@ROT));
225	}
226$code.=<<___;
227	jmp	.Lrounds_16_xx
228.align	16
229.Lrounds_16_xx:
230___
231	for(;$i<32;$i++) {
232		&ROUND_16_XX($i,@ROT);
233		unshift(@ROT,pop(@ROT));
234	}
235
236$code.=<<___;
237	cmp	\$$rounds,$round
238	jb	.Lrounds_16_xx
239
240	mov	$_ctx,$ctx
241	lea	16*$SZ($inp),$inp
242
243	add	$SZ*0($ctx),$A
244	add	$SZ*1($ctx),$B
245	add	$SZ*2($ctx),$C
246	add	$SZ*3($ctx),$D
247	add	$SZ*4($ctx),$E
248	add	$SZ*5($ctx),$F
249	add	$SZ*6($ctx),$G
250	add	$SZ*7($ctx),$H
251
252	cmp	$_end,$inp
253
254	mov	$A,$SZ*0($ctx)
255	mov	$B,$SZ*1($ctx)
256	mov	$C,$SZ*2($ctx)
257	mov	$D,$SZ*3($ctx)
258	mov	$E,$SZ*4($ctx)
259	mov	$F,$SZ*5($ctx)
260	mov	$G,$SZ*6($ctx)
261	mov	$H,$SZ*7($ctx)
262	jb	.Lloop
263
264	mov	$_rsp,%rsi
265	mov	(%rsi),%r15
266	mov	8(%rsi),%r14
267	mov	16(%rsi),%r13
268	mov	24(%rsi),%r12
269	mov	32(%rsi),%rbp
270	mov	40(%rsi),%rbx
271	lea	48(%rsi),%rsp
272.Lepilogue:
273	ret
274.size	$func,.-$func
275___
276
277if ($SZ==4) {
278$code.=<<___;
279.align	64
280.type	$TABLE,\@object
281$TABLE:
282	.long	0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
283	.long	0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
284	.long	0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
285	.long	0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
286	.long	0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
287	.long	0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
288	.long	0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
289	.long	0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
290	.long	0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
291	.long	0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
292	.long	0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
293	.long	0xd192e819,0xd6990624,0xf40e3585,0x106aa070
294	.long	0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
295	.long	0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
296	.long	0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
297	.long	0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
298___
299} else {
300$code.=<<___;
301.align	64
302.type	$TABLE,\@object
303$TABLE:
304	.quad	0x428a2f98d728ae22,0x7137449123ef65cd
305	.quad	0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
306	.quad	0x3956c25bf348b538,0x59f111f1b605d019
307	.quad	0x923f82a4af194f9b,0xab1c5ed5da6d8118
308	.quad	0xd807aa98a3030242,0x12835b0145706fbe
309	.quad	0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
310	.quad	0x72be5d74f27b896f,0x80deb1fe3b1696b1
311	.quad	0x9bdc06a725c71235,0xc19bf174cf692694
312	.quad	0xe49b69c19ef14ad2,0xefbe4786384f25e3
313	.quad	0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
314	.quad	0x2de92c6f592b0275,0x4a7484aa6ea6e483
315	.quad	0x5cb0a9dcbd41fbd4,0x76f988da831153b5
316	.quad	0x983e5152ee66dfab,0xa831c66d2db43210
317	.quad	0xb00327c898fb213f,0xbf597fc7beef0ee4
318	.quad	0xc6e00bf33da88fc2,0xd5a79147930aa725
319	.quad	0x06ca6351e003826f,0x142929670a0e6e70
320	.quad	0x27b70a8546d22ffc,0x2e1b21385c26c926
321	.quad	0x4d2c6dfc5ac42aed,0x53380d139d95b3df
322	.quad	0x650a73548baf63de,0x766a0abb3c77b2a8
323	.quad	0x81c2c92e47edaee6,0x92722c851482353b
324	.quad	0xa2bfe8a14cf10364,0xa81a664bbc423001
325	.quad	0xc24b8b70d0f89791,0xc76c51a30654be30
326	.quad	0xd192e819d6ef5218,0xd69906245565a910
327	.quad	0xf40e35855771202a,0x106aa07032bbd1b8
328	.quad	0x19a4c116b8d2d0c8,0x1e376c085141ab53
329	.quad	0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
330	.quad	0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
331	.quad	0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
332	.quad	0x748f82ee5defb2fc,0x78a5636f43172f60
333	.quad	0x84c87814a1f0ab72,0x8cc702081a6439ec
334	.quad	0x90befffa23631e28,0xa4506cebde82bde9
335	.quad	0xbef9a3f7b2c67915,0xc67178f2e372532b
336	.quad	0xca273eceea26619c,0xd186b8c721c0c207
337	.quad	0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
338	.quad	0x06f067aa72176fba,0x0a637dc5a2c898a6
339	.quad	0x113f9804bef90dae,0x1b710b35131c471b
340	.quad	0x28db77f523047d84,0x32caab7b40c72493
341	.quad	0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
342	.quad	0x4cc5d4becb3e42b6,0x597f299cfc657e2a
343	.quad	0x5fcb6fab3ad6faec,0x6c44198c4a475817
344___
345}
346
347# EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
348#		CONTEXT *context,DISPATCHER_CONTEXT *disp)
349if ($win64) {
350$rec="%rcx";
351$frame="%rdx";
352$context="%r8";
353$disp="%r9";
354
355$code.=<<___;
356.extern	__imp_RtlVirtualUnwind
357.type	se_handler,\@abi-omnipotent
358.align	16
359se_handler:
360	push	%rsi
361	push	%rdi
362	push	%rbx
363	push	%rbp
364	push	%r12
365	push	%r13
366	push	%r14
367	push	%r15
368	pushfq
369	sub	\$64,%rsp
370
371	mov	120($context),%rax	# pull context->Rax
372	mov	248($context),%rbx	# pull context->Rip
373
374	lea	.Lprologue(%rip),%r10
375	cmp	%r10,%rbx		# context->Rip<.Lprologue
376	jb	.Lin_prologue
377
378	mov	152($context),%rax	# pull context->Rsp
379
380	lea	.Lepilogue(%rip),%r10
381	cmp	%r10,%rbx		# context->Rip>=.Lepilogue
382	jae	.Lin_prologue
383
384	mov	16*$SZ+3*8(%rax),%rax	# pull $_rsp
385	lea	48(%rax),%rax
386
387	mov	-8(%rax),%rbx
388	mov	-16(%rax),%rbp
389	mov	-24(%rax),%r12
390	mov	-32(%rax),%r13
391	mov	-40(%rax),%r14
392	mov	-48(%rax),%r15
393	mov	%rbx,144($context)	# restore context->Rbx
394	mov	%rbp,160($context)	# restore context->Rbp
395	mov	%r12,216($context)	# restore context->R12
396	mov	%r13,224($context)	# restore context->R13
397	mov	%r14,232($context)	# restore context->R14
398	mov	%r15,240($context)	# restore context->R15
399
400.Lin_prologue:
401	mov	8(%rax),%rdi
402	mov	16(%rax),%rsi
403	mov	%rax,152($context)	# restore context->Rsp
404	mov	%rsi,168($context)	# restore context->Rsi
405	mov	%rdi,176($context)	# restore context->Rdi
406
407	mov	40($disp),%rdi		# disp->ContextRecord
408	mov	$context,%rsi		# context
409	mov	\$154,%ecx		# sizeof(CONTEXT)
410	.long	0xa548f3fc		# cld; rep movsq
411
412	mov	$disp,%rsi
413	xor	%rcx,%rcx		# arg1, UNW_FLAG_NHANDLER
414	mov	8(%rsi),%rdx		# arg2, disp->ImageBase
415	mov	0(%rsi),%r8		# arg3, disp->ControlPc
416	mov	16(%rsi),%r9		# arg4, disp->FunctionEntry
417	mov	40(%rsi),%r10		# disp->ContextRecord
418	lea	56(%rsi),%r11		# &disp->HandlerData
419	lea	24(%rsi),%r12		# &disp->EstablisherFrame
420	mov	%r10,32(%rsp)		# arg5
421	mov	%r11,40(%rsp)		# arg6
422	mov	%r12,48(%rsp)		# arg7
423	mov	%rcx,56(%rsp)		# arg8, (NULL)
424	call	*__imp_RtlVirtualUnwind(%rip)
425
426	mov	\$1,%eax		# ExceptionContinueSearch
427	add	\$64,%rsp
428	popfq
429	pop	%r15
430	pop	%r14
431	pop	%r13
432	pop	%r12
433	pop	%rbp
434	pop	%rbx
435	pop	%rdi
436	pop	%rsi
437	ret
438.size	se_handler,.-se_handler
439
440.section	.pdata
441.align	4
442	.rva	.LSEH_begin_$func
443	.rva	.LSEH_end_$func
444	.rva	.LSEH_info_$func
445
446.section	.xdata
447.align	8
448.LSEH_info_$func:
449	.byte	9,0,0,0
450	.rva	se_handler
451___
452}
453
454$code =~ s/\`([^\`]*)\`/eval $1/gem;
455print $code;
456close STDOUT;
457