17a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 27a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Unit masks for the Intel "Westmere" micro architecture 37a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 47a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# See http://ark.intel.com/ for help in identifying Westmere based CPUs 57a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 67a33c86eb98056ef0570c99e713214f8dc56b6efJeff Browninclude:i386/arch_perfmon 77a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 87a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:x01 type:mandatory default:0x01 97a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 No unit mask 107a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:x02 type:mandatory default:0x02 117a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 No unit mask 127a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:x07 type:mandatory default:0x07 137a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x07 No unit mask 147a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:x10 type:mandatory default:0x10 157a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 No unit mask 167a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:x20 type:mandatory default:0x20 177a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 No unit mask 187a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:arith type:bitmask default:0x01 197a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 cycles_div_busy Cycles the divider is busy 207a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 mul Multiply operations executed 217a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:baclear type:bitmask default:0x01 227a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 clear BACLEAR asserted, regardless of cause 237a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 bad_target BACLEAR asserted with bad target address 247a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:bpu_clears type:bitmask default:0x01 257a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 early Early Branch Prediction Unit clears 267a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 late Late Branch Prediction Unit clears 277a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:br_inst_exec type:bitmask default:0x7f 287a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 cond Conditional branch instructions executed 297a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 direct Unconditional branches executed 307a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 indirect_non_call Indirect non call branches executed 317a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x07 non_calls All non call branches executed 327a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 return_near Indirect return branches executed 337a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 direct_near_call Unconditional call branches executed 347a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 indirect_near_call Indirect call branches executed 357a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x30 near_calls Call branches executed 367a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 taken Taken branches executed 377a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x7f any Branch instructions executed 387a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:br_inst_retired type:bitmask default:0x04 397a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 conditional Retired conditional branch instructions (Precise Event) 407a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 near_call Retired near call instructions (Precise Event) 417a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 all_branches Retired branch instructions (Precise Event) 427a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:br_misp_exec type:bitmask default:0x7f 437a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 cond Mispredicted conditional branches executed 447a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 direct Mispredicted unconditional branches executed 457a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 indirect_non_call Mispredicted indirect non call branches executed 467a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x07 non_calls Mispredicted non call branches executed 477a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 return_near Mispredicted return branches executed 487a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 direct_near_call Mispredicted non call branches executed 497a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 indirect_near_call Mispredicted indirect call branches executed 507a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x30 near_calls Mispredicted call branches executed 517a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 taken Mispredicted taken branches executed 527a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x7f any Mispredicted branches executed 537a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:br_misp_retired type:bitmask default:0x04 547a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 conditional Mispredicted conditional retired branches (Precise Event) 557a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 near_call Mispredicted near retired calls (Precise Event) 567a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 all_branches Mispredicted retired branch instructions (Precise Event) 577a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:cache_lock_cycles type:bitmask default:0x01 587a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 l1d_l2 Cycles L1D and L2 locked 597a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 l1d Cycles L1D locked 607a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:cpu_clk_unhalted type:bitmask default:0x00 617a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x00 thread_p Cycles when thread is not halted (programmable counter) 627a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 ref_p Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter) 637a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:dtlb_load_misses type:bitmask default:0x01 647a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 any DTLB load misses 657a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 walk_completed DTLB load miss page walks complete 667a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 walk_cycles DTLB load miss page walk cycles 677a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 stlb_hit DTLB second level hit 687a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 pde_miss DTLB load miss caused by low part of address 697a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 large_walk_completed DTLB load miss large page walks 707a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:dtlb_misses type:bitmask default:0x01 717a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 any DTLB misses 727a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 walk_completed DTLB miss page walks 737a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 walk_cycles DTLB miss page walk cycles 747a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 stlb_hit DTLB first level misses but second level hit 757a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 pde_miss DTLB misses casued by low part of address 767a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 large_walk_completed DTLB miss large page walks 777a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:fp_assist type:bitmask default:0x01 787a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 all X87 Floating point assists (Precise Event) 797a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 output X87 Floating point assists for invalid output value (Precise Event) 807a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 input X87 Floating poiint assists for invalid input value (Precise Event) 817a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:fp_comp_ops_exe type:bitmask default:0x01 827a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 x87 Computational floating-point operations executed 837a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 mmx MMX Uops 847a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 sse_fp SSE and SSE2 FP Uops 857a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 sse2_integer SSE2 integer Uops 867a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 sse_fp_packed SSE FP packed Uops 877a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 sse_fp_scalar SSE FP scalar Uops 887a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 sse_single_precision SSE* FP single precision Uops 897a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 sse_double_precision SSE* FP double precision Uops 907a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:fp_mmx_trans type:bitmask default:0x03 917a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 to_fp Transitions from MMX to Floating Point instructions 927a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 to_mmx Transitions from Floating Point to MMX instructions 937a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x03 any All Floating Point to and from MMX transitions 947a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:ild_stall type:bitmask default:0x0f 957a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 lcp Length Change Prefix stall cycles 967a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 mru Stall cycles due to BPU MRU bypass 977a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 iq_full Instruction Queue full stall cycles 987a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 regen Regen stall cycles 997a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0f any Any Instruction Length Decoder stall cycles 1007a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:inst_retired type:bitmask default:0x01 1017a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 any_p Instructions retired (Programmable counter and Precise Event) 1027a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 x87 Retired floating-point operations (Precise Event) 1037a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 mmx Retired MMX instructions (Precise Event) 1047a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:itlb_misses type:bitmask default:0x01 1057a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 any ITLB miss 1067a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 walk_completed ITLB miss page walks 1077a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 walk_cycles ITLB miss page walk cycles 1087a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 large_walk_completed ITLB miss large page walks 1097a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l1d type:bitmask default:0x01 1107a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 repl L1 data cache lines allocated 1117a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 m_repl L1D cache lines allocated in the M state 1127a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 m_evict L1D cache lines replaced in M state 1137a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 m_snoop_evict L1D snoop eviction of cache lines in M state 1147a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l1d_prefetch type:bitmask default:0x01 1157a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 requests L1D hardware prefetch requests 1167a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 miss L1D hardware prefetch misses 1177a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 triggers L1D hardware prefetch requests triggered 1187a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l1d_wb_l2 type:bitmask default:0x0f 1197a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 i_state L1 writebacks to L2 in I state (misses) 1207a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 s_state L1 writebacks to L2 in S state 1217a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 e_state L1 writebacks to L2 in E state 1227a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 m_state L1 writebacks to L2 in M state 1237a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0f mesi All L1 writebacks to L2 1247a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l1i type:bitmask default:0x01 1257a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 hits L1I instruction fetch hits 1267a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 misses L1I instruction fetch misses 1277a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x03 reads L1I Instruction fetches 1287a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 cycles_stalled L1I instruction fetch stall cycles 1297a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l2_data_rqsts type:bitmask default:0xff 1307a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 demand_i_state L2 data demand loads in I state (misses) 1317a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 demand_s_state L2 data demand loads in S state 1327a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 demand_e_state L2 data demand loads in E state 1337a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 demand_m_state L2 data demand loads in M state 1347a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0f demand_mesi L2 data demand requests 1357a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 prefetch_i_state L2 data prefetches in the I state (misses) 1367a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 prefetch_s_state L2 data prefetches in the S state 1377a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 prefetch_e_state L2 data prefetches in E state 1387a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 prefetch_m_state L2 data prefetches in M state 1397a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0xf0 prefetch_mesi All L2 data prefetches 1407a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0xff any All L2 data requests 1417a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l2_lines_in type:bitmask default:0x07 1427a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 s_state L2 lines allocated in the S state 1437a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 e_state L2 lines allocated in the E state 1447a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x07 any L2 lines alloacated 1457a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l2_lines_out type:bitmask default:0x0f 1467a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 demand_clean L2 lines evicted by a demand request 1477a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 demand_dirty L2 modified lines evicted by a demand request 1487a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 prefetch_clean L2 lines evicted by a prefetch request 1497a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 prefetch_dirty L2 modified lines evicted by a prefetch request 1507a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0f any L2 lines evicted 1517a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l2_rqsts type:bitmask default:0x01 1527a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 ld_hit L2 load hits 1537a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 ld_miss L2 load misses 1547a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x03 loads L2 requests 1557a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 rfo_hit L2 RFO hits 1567a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 rfo_miss L2 RFO misses 1577a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0c rfos L2 RFO requests 1587a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 ifetch_hit L2 instruction fetch hits 1597a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 ifetch_miss L2 instruction fetch misses 1607a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x30 ifetches L2 instruction fetches 1617a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 prefetch_hit L2 prefetch hits 1627a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 prefetch_miss L2 prefetch misses 1637a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0xaa miss All L2 misses 1647a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0xc0 prefetches All L2 prefetches 1657a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0xff references All L2 requests 1667a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l2_transactions type:bitmask default:0x80 1677a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 load L2 Load transactions 1687a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 rfo L2 RFO transactions 1697a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 ifetch L2 instruction fetch transactions 1707a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 prefetch L2 prefetch transactions 1717a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 l1d_wb L1D writeback to L2 transactions 1727a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 fill L2 fill transactions 1737a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 wb L2 writeback to LLC transactions 1747a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 any All L2 transactions 1757a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:l2_write type:bitmask default:0x01 1767a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 rfo_i_state L2 demand store RFOs in I state (misses) 1777a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 rfo_s_state L2 demand store RFOs in S state 1787a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 rfo_m_state L2 demand store RFOs in M state 1797a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0e rfo_hit All L2 demand store RFOs that hit the cache 1807a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0f rfo_mesi All L2 demand store RFOs 1817a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 lock_i_state L2 demand lock RFOs in I state (misses) 1827a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 lock_s_state L2 demand lock RFOs in S state 1837a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 lock_e_state L2 demand lock RFOs in E state 1847a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 lock_m_state L2 demand lock RFOs in M state 1857a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0xe0 lock_hit All demand L2 lock RFOs that hit the cache 1867a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0xf0 lock_mesi All demand L2 lock RFOs 1877a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:load_dispatch type:bitmask default:0x07 1887a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 rs Loads dispatched that bypass the MOB 1897a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 rs_delayed Loads dispatched from stage 305 1907a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 mob Loads dispatched from the MOB 1917a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x07 any All loads dispatched 1927a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:longest_lat_cache type:bitmask default:0x01 1937a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 miss Longest latency cache miss 1947a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 reference Longest latency cache reference 1957a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:machine_clears type:bitmask default:0x01 1967a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 cycles Cycles machine clear asserted 1977a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 mem_order Execution pipeline restart due to Memory ordering conflicts 1987a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 smc Self-Modifying Code detected 1997a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:mem_inst_retired type:bitmask default:0x01 2007a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 loads Instructions retired which contains a load (Precise Event) 2017a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 stores Instructions retired which contains a store (Precise Event) 2027a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 latency_above_threshold_0 Memory instructions retired above 0 clocks (Precise Event) (MSR_INDEX: 0x03F6 MSR_VALUE: 0x0000) 2037a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:mem_load_retired type:bitmask default:0x01 2047a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 l1d_hit Retired loads that hit the L1 data cache (Precise Event) 2057a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 l2_hit Retired loads that hit the L2 cache (Precise Event) 2067a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 llc_unshared_hit Retired loads that hit valid versions in the LLC cache (Precise Event) 2077a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 other_core_l2_hit_hitm Retired loads that hit sibling core's L2 in modified or unmodified states (Precise Event) 2087a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 llc_miss Retired loads that miss the LLC cache (Precise Event) 2097a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 hit_lfb Retired loads that miss L1D and hit an previously allocated LFB (Precise Event) 2107a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 dtlb_miss Retired loads that miss the DTLB (Precise Event) 2117a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:mem_uncore_retired type:bitmask default:0x02 2127a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 local_hitm Load instructions retired that HIT modified data in sibling core (Precise Event) 2137a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 remote_hitm Retired loads that hit remote socket in modified state (Precise Event) 2147a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 local_dram_and_remote_cache_hit Load instructions retired local dram and remote cache HIT data sources (Precise Event) 2157a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 remote_dram Load instructions retired remote DRAM and remote home-remote cache HITM (Precise Event) 2167a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 uncacheable Load instructions retired IO (Precise Event) 2177a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:offcore_requests type:bitmask default:0x80 2187a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 demand_read_data Offcore demand data read requests 2197a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 demand_read_code Offcore demand code read requests 2207a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 demand_rfo Offcore demand RFO requests 2217a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 any_read Offcore read requests 2227a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 any_rfo Offcore RFO requests 2237a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 l1d_writeback Offcore L1 data cache writebacks 2247a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 any All offcore requests 2257a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:offcore_requests_outstanding type:bitmask default:0x08 2267a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 demand_read_data Outstanding offcore demand data reads 2277a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 demand_read_code Outstanding offcore demand code reads 2287a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 demand_rfo Outstanding offcore demand RFOs 2297a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 any_read Outstanding offcore reads 2307a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:rat_stalls type:bitmask default:0x0f 2317a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 flags Flag stall cycles 2327a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 registers Partial register stall cycles 2337a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 rob_read_port ROB read port stalls cycles 2347a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 scoreboard Scoreboard stall cycles 2357a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x0f any All RAT stall cycles 2367a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:resource_stalls type:bitmask default:0x01 2377a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 any Resource related stall cycles 2387a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 load Load buffer stall cycles 2397a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 rs_full Reservation Station full stall cycles 2407a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 store Store buffer stall cycles 2417a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 rob_full ROB full stall cycles 2427a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 fpcw FPU control word write stall cycles 2437a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 mxcsr MXCSR rename stall cycles 2447a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 other Other Resource related stall cycles 2457a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:simd_int_128 type:bitmask default:0x01 2467a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 packed_mpy 128 bit SIMD integer multiply operations 2477a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 packed_shift 128 bit SIMD integer shift operations 2487a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 pack 128 bit SIMD integer pack operations 2497a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 unpack 128 bit SIMD integer unpack operations 2507a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 packed_logical 128 bit SIMD integer logical operations 2517a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 packed_arith 128 bit SIMD integer arithmetic operations 2527a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 shuffle_move 128 bit SIMD integer shuffle/move operations 2537a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:simd_int_64 type:bitmask default:0x01 2547a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 packed_mpy SIMD integer 64 bit packed multiply operations 2557a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 packed_shift SIMD integer 64 bit shift operations 2567a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 pack SIMD integer 64 bit pack operations 2577a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 unpack SIMD integer 64 bit unpack operations 2587a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 packed_logical SIMD integer 64 bit logical operations 2597a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 packed_arith SIMD integer 64 bit arithmetic operations 2607a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 shuffle_move SIMD integer 64 bit shuffle/move operations 2617a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:snoopq_requests type:bitmask default:0x01 2627a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 data Snoop data requests 2637a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 invalidate Snoop invalidate requests 2647a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 code Snoop code requests 2657a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:snoopq_requests_outstanding type:bitmask default:0x01 2667a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 data Outstanding snoop data requests 2677a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 invalidate Outstanding snoop invalidate requests 2687a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 code Outstanding snoop code requests 2697a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:snoop_response type:bitmask default:0x01 2707a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 hit Thread responded HIT to snoop 2717a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 hite Thread responded HITE to snoop 2727a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 hitm Thread responded HITM to snoop 2737a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:sq_misc type:bitmask default:0x04 2747a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 lru_hints Super Queue LRU hints sent to LLC 2757a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 split_lock Super Queue lock splits across a cache line 2767a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:ssex_uops_retired type:bitmask default:0x01 2777a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 packed_single SIMD Packed-Single Uops retired (Precise Event) 2787a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 scalar_single SIMD Scalar-Single Uops retired (Precise Event) 2797a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 packed_double SIMD Packed-Double Uops retired (Precise Event) 2807a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 scalar_double SIMD Scalar-Double Uops retired (Precise Event) 2817a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 vector_integer SIMD Vector Integer Uops retired (Precise Event) 2827a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:store_blocks type:bitmask default:0x04 2837a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 at_ret Loads delayed with at-Retirement block code 2847a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 l1d_block Cacheable loads delayed with L1D block code 2857a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:uops_decoded type:bitmask default:0x01 2867a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 stall_cycles Cycles no Uops are decoded 2877a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 ms_cycles_active Uops decoded by Microcode Sequencer 2887a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 esp_folding Stack pointer instructions decoded 2897a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 esp_sync Stack pointer sync operations 2907a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:uops_executed type:bitmask default:0x3f 2917a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 port0 Uops executed on port 0 2927a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 port1 Uops executed on port 1 2937a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 port2_core Uops executed on port 2 (core count) 2947a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x08 port3_core Uops executed on port 3 (core count) 2957a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x10 port4_core Uops executed on port 4 (core count) 2967a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x1f core_active_cycles_no_port5 Cycles Uops executed on ports 0-4 (core count) 2977a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x20 port5 Uops executed on port 5 2987a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x3f core_active_cycles Cycles Uops executed on any port (core count) 2997a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x40 port015 Uops issued on ports 0, 1 or 5 3007a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x80 port234_core Uops issued on ports 2, 3 or 4 3017a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:uops_issued type:bitmask default:0x01 3027a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 any Uops issued 3037a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 fused Fused Uops issued 3047a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownname:uops_retired type:bitmask default:0x01 3057a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x01 active_cycles Cycles Uops are being retired 3067a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x02 retire_slots Retirement slots used (Precise Event) 3077a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 0x04 macro_fused Macro-fused Uops retired (Precise Event) 308