17a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 27a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# AMD Athlon(tm)64 and AMD Opteron(tm) processor performance events 37a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 47a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Copyright OProfile authors 57a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Copyright (c) 2006-2008 Advanced Micro Devices 67a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Contributed by Ray Bryant <raybry at amd.com> 77a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Jason Yeh <jason.yeh at amd.com> 87a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Suravee Suthikulpanit <suravee.suthikulpanit at amd.com> 97a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Paul Drongowski <paul.drongowski at amd.com> 107a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 117a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Source : BIOS and Kernel Developer's Guide for AMD Family 11h Processors, 127a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Publication# 41256, Revision 3.00, July 07, 2008 137a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 147a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Updated on 11 November 2008: 157a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Description : Prepare for Oprofile patch submission 167a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Signed off : Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> 177a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 187a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Updated on 20 February 2008: 197a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Description : Added events for AMD Family 11h processors and proofread 207a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# WRT the latest BKDG 217a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 227a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 237a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Floating point events 247a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x00 counters:0,1,2,3 um:fpu_ops minimum:500 name:DISPATCHED_FPU_OPS : Dispatched FPU ops 257a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x01 counters:0,1,2,3 um:zero minimum:500 name:CYCLES_NO_FPU_OPS_RETIRED : Cycles in which the FPU is empty 267a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x02 counters:0,1,2,3 um:zero minimum:500 name:DISPATCHED_FPU_OPS_FAST_FLAG : Dispatched FPU ops that use the fast flag interface 277a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 287a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Load, Store, and TLB events 297a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x20 counters:0,1,2,3 um:segregload minimum:500 name:SEGMENT_REGISTER_LOADS : Segment register loads 307a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x21 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE : Micro-architectural re-sync caused by self modifying code 317a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x22 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_PROBE_HIT : Micro-architectural re-sync caused by snoop 327a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x23 counters:0,1,2,3 um:zero minimum:500 name:LS_BUFFER_2_FULL_CYCLES : Cycles LS Buffer 2 full 337a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x24 counters:0,1,2,3 um:locked_ops minimum:500 name:LOCKED_OPS : Locked operations 347a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 357a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Execution Unit Events 367a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 377a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Data Cache event 387a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses 397a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x41 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data cache misses 407a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Event 0x42 with unit mask 0x01 counts same events as event select 0x43 417a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_SYSTEM : Data cache refills from L2 or system 427a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x43 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_SYSTEM : Data cache refills from system 437a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x44 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_LINES_EVICTED : Data cache lines evicted 447a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB misses and L2 DTLB hits 457a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 and L2 DTLB misses 467a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x47 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses 477a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x48 counters:0,1,2,3 um:zero minimum:500 name:MICROARCHITECTURAL_LATE_CANCEL_OF_AN_ACCESS : Micro-architectural late cancel of an access 487a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x49 counters:0,1,2,3 um:zero minimum:500 name:MICROARCHITECTURAL_EARLY_CANCEL_OF_AN_ACCESS : Micro-architectural early cancel of an access 497a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x4a counters:0,1,2,3 um:ecc minimum:500 name:SCRUBBER_SINGLE_BIT_ECC_ERRORS : One bit ECC error recorded by scrubber 507a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x4b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch instructions dispatched 517a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x4c counters:0,1,2,3 um:dcachemisslocked minimum:500 name:DCACHE_MISS_LOCKED_INSTRUCTIONS : DCACHE misses by locked instructions 527a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 537a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# L2 Cache and System Interface events 547a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x65 counters:0,1,2,3 um:memreqtype minimum:500 name:MEMORY_REQUESTS : Memory requests by type 557a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x67 counters:0,1,2,3 um:dataprefetch minimum:500 name:DATA_PREFETCHES : Data prefetcher 567a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x6c counters:0,1,2,3 um:systemreadresponse minimum:500 name:SYSTEM_READ_RESPONSES : System read responses by coherency state 577a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x6d counters:0,1,2,3 um:writtentosystem minimum:500 name:QUADWORD_WRITE_TRANSFERS : Quadwords written to system 587a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 597a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x7d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 cache 607a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x7e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 cache misses 617a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x7f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 fill/writeback 627a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 637a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Instruction Cache events 647a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x80 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction cache fetches 657a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x81 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction cache misses 667a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x82 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction cache refills from L2 677a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x83 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction cache refills from system 687a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit 697a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB miss 707a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x86 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE : Pipeline restart due to instruction stream probe 717a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x87 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCH_STALL : Instruction fetch stall 727a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x88 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_HITS : Return stack hits 737a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x89 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_OVERFLOWS : Return stack overflows 747a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 757a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 767a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CFLUSH : Retired CLFLUSH instructions 777a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x27 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CPUID : Retired CPUID instructions 787a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x76 counters:0,1,2,3 um:zero minimum:3000 name:CPU_CLK_UNHALTED : Cycles outside of halt state 797a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 807a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Execution Unit events 817a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc0 counters:0,1,2,3 um:zero minimum:3000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs) 827a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : Retired micro-ops 837a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, unconditional, exceptions, interrupts) 847a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted branch instructions 857a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired taken branch instructions 867a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired taken branches mispredicted 877a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired far control transfers 887a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc7 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_RESYNCS : Retired branches resyncs (only non-control transfer branches) 897a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc8 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS : Retired near returns 907a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xc9 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS_MISPREDICTED : Retired near returns mispredicted 917a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xca counters:0,1,2,3 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired indirect branches mispredicted 927a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xcb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX/FP instructions 937a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xcc counters:0,1,2,3 um:fpu_fastpath minimum:500 name:RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS : Retired FastPath double-op instructions 947a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xcd counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES : Cycles with interrupts masked (IF=0) 957a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xce counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING : Cycles with interrupts masked while interrupt pending 967a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xcf counters:0,1,2,3 um:zero minimum:10 name:INTERRUPTS_TAKEN : Number of taken hardware interrupts 977a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd0 counters:0,1,2,3 um:zero minimum:500 name:DECODER_EMPTY : Nothing to dispatch (decoder empty) 987a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd1 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch stalls 997a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd2 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_BRANCH_ABORT : Dispatch stall from branch abort to retire 1007a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd3 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SERIALIZATION : Dispatch stall for serialization 1017a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd4 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SEGMENT_LOAD : Dispatch stall for segment load 1027a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd5 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_REORDER_BUFFER_FULL : Dispatch stall for reorder buffer full 1037a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd6 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_RESERVATION_STATION_FULL : Dispatch stall when reservation stations are full 1047a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd7 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FPU_FULL : Dispatch stall when FPU is full 1057a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd8 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_LS_FULL : Dispatch stall when LS is full 1067a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xd9 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_WAITING_FOR_ALL_QUIET : Dispatch stall when waiting for all to be quiet 1077a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xda counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FAR_TRANSFER_OR_RESYNC : Dispatch stall for far transfer or resync to retire 1087a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xdb counters:0,1,2,3 um:fpu_exceptions minimum:1 name:FPU_EXCEPTIONS : FPU exceptions 1097a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xdc counters:0,1,2,3 um:zero minimum:1 name:DR0_BREAKPOINTS : Number of breakpoints for DR0 1107a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xdd counters:0,1,2,3 um:zero minimum:1 name:DR1_BREAKPOINTS : Number of breakpoints for DR1 1117a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xde counters:0,1,2,3 um:zero minimum:1 name:DR2_BREAKPOINTS : Number of breakpoints for DR2 1127a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xdf counters:0,1,2,3 um:zero minimum:1 name:DR3_BREAKPOINTS : Number of breakpoints for DR3 1137a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 1147a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Memory Controller events 1157a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xe0 counters:0,1,2,3 um:dramaccess minimum:500 name:DRAM_ACCESSES : DRAM accesses 1167a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xe1 counters:0,1,2,3 um:dramcontroller minimum:500 name:DRAM_CONTROLLER_PAGE_TABLE_EVENTS : DRAM Controller Page Table Events 1177a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xe3 counters:0,1,2,3 um:turnaround minimum:500 name:MEMORY_CONTROLLER_TURNAROUNDS : Memory controller turnarounds 1187a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xe4 counters:0,1,2,3 um:rbdqueue minimum:500 name:MEMORY_CONTROLLER_RBD_QUEUE_EVENTS : Memory controller RBD queue events 1197a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xe8 counters:0,1,2,3 um:thermalstatus minimum:500 name:THERMAL_STATUS : Thermal status 1207a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xe9 counters:0,1,2,3 um:cpiorequests minimum:500 name:CPU_IO_REQUESTS_TO_MEMORY_IO : CPU/IO requests to memory/IO 1217a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xea counters:0,1,2,3 um:cacheblock minimum:500 name:CACHE_BLOCK_COMMANDS : Cache block commands 1227a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xeb counters:0,1,2,3 um:sizecmds minimum:500 name:SIZED_COMMANDS : Sized commands 1237a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xec counters:0,1,2,3 um:probe minimum:500 name:PROBE_RESPONSES_AND_UPSTREAM_REQUESTS : Probe responses and upstream requests 1247a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xee counters:0,1,2,3 um:devevents minimum:500 name:DEV_EVENTS : DEV events 1257a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 1267a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 1277a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x1f0 counters:0,1,2,3 um:memory_controller_requests minimum:500 name:MEMORY_CONTROLLER_REQUESTS : Memory controller requests 1287a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x1e9 counters:0,1,2,3 um:sideband_signals_and_special_cycles minimum:500 name:SIDEBAND_SIGNALS_AND_SPECIAL_CYCLES : Sideband Signals and Special Cycles 1297a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x1ea counters:0,1,2,3 um:interrupt_events minimum:500 name:INTERRUPT_EVENTS : Interrupt Events 1307a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown 1317a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Link events 1327a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xf6 counters:0,1,2,3 um:httransmit minimum:500 name:HYPERTRANSPORT_LINK_0_TRANSMIT_BANDWIDTH : HyperTransport(tm) link 0 transmit bandwidth 133