1/* opcodes/i386-dis.c r1.126 */ 2/* Print i386 instructions for GDB, the GNU debugger. 3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. 5 6 This file is part of GDB. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, see <http://www.gnu.org/licenses/>. */ 20 21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) 22 July 1988 23 modified by John Hassey (hassey@dg-rtp.dg.com) 24 x86-64 support added by Jan Hubicka (jh@suse.cz) 25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */ 26 27/* The main tables describing the instructions is essentially a copy 28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386 29 Programmers Manual. Usually, there is a capital letter, followed 30 by a small letter. The capital letter tell the addressing mode, 31 and the small letter tells about the operand size. Refer to 32 the Intel manual for details. */ 33 34#include <stdlib.h> 35#include "disas/bfd.h" 36/* include/opcode/i386.h r1.78 */ 37 38/* opcode/i386.h -- Intel 80386 opcode macros 39 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 40 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 41 Free Software Foundation, Inc. 42 43 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger. 44 45 This program is free software; you can redistribute it and/or modify 46 it under the terms of the GNU General Public License as published by 47 the Free Software Foundation; either version 2 of the License, or 48 (at your option) any later version. 49 50 This program is distributed in the hope that it will be useful, 51 but WITHOUT ANY WARRANTY; without even the implied warranty of 52 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 53 GNU General Public License for more details. 54 55 You should have received a copy of the GNU General Public License 56 along with this program; if not, see <http://www.gnu.org/licenses/>. */ 57 58/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived 59 ix86 Unix assemblers, generate floating point instructions with 60 reversed source and destination registers in certain cases. 61 Unfortunately, gcc and possibly many other programs use this 62 reversed syntax, so we're stuck with it. 63 64 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but 65 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than 66 the expected st(3) = st(3) - st 67 68 This happens with all the non-commutative arithmetic floating point 69 operations with two register operands, where the source register is 70 %st, and destination register is %st(i). 71 72 The affected opcode map is dceX, dcfX, deeX, defX. */ 73 74#ifndef SYSV386_COMPAT 75/* Set non-zero for broken, compatible instructions. Set to zero for 76 non-broken opcodes at your peril. gcc generates SystemV/386 77 compatible instructions. */ 78#define SYSV386_COMPAT 1 79#endif 80#ifndef OLDGCC_COMPAT 81/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could 82 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands 83 reversed. */ 84#define OLDGCC_COMPAT SYSV386_COMPAT 85#endif 86 87#define MOV_AX_DISP32 0xa0 88#define POP_SEG_SHORT 0x07 89#define JUMP_PC_RELATIVE 0xeb 90#define INT_OPCODE 0xcd 91#define INT3_OPCODE 0xcc 92/* The opcode for the fwait instruction, which disassembler treats as a 93 prefix when it can. */ 94#define FWAIT_OPCODE 0x9b 95#define ADDR_PREFIX_OPCODE 0x67 96#define DATA_PREFIX_OPCODE 0x66 97#define LOCK_PREFIX_OPCODE 0xf0 98#define CS_PREFIX_OPCODE 0x2e 99#define DS_PREFIX_OPCODE 0x3e 100#define ES_PREFIX_OPCODE 0x26 101#define FS_PREFIX_OPCODE 0x64 102#define GS_PREFIX_OPCODE 0x65 103#define SS_PREFIX_OPCODE 0x36 104#define REPNE_PREFIX_OPCODE 0xf2 105#define REPE_PREFIX_OPCODE 0xf3 106 107#define TWO_BYTE_OPCODE_ESCAPE 0x0f 108#define NOP_OPCODE (char) 0x90 109 110/* register numbers */ 111#define EBP_REG_NUM 5 112#define ESP_REG_NUM 4 113 114/* modrm_byte.regmem for twobyte escape */ 115#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM 116/* index_base_byte.index for no index register addressing */ 117#define NO_INDEX_REGISTER ESP_REG_NUM 118/* index_base_byte.base for no base register addressing */ 119#define NO_BASE_REGISTER EBP_REG_NUM 120#define NO_BASE_REGISTER_16 6 121 122/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */ 123#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */ 124#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG) 125 126/* x86-64 extension prefix. */ 127#define REX_OPCODE 0x40 128 129/* Indicates 64 bit operand size. */ 130#define REX_W 8 131/* High extension to reg field of modrm byte. */ 132#define REX_R 4 133/* High extension to SIB index field. */ 134#define REX_X 2 135/* High extension to base field of modrm or SIB, or reg field of opcode. */ 136#define REX_B 1 137 138/* max operands per insn */ 139#define MAX_OPERANDS 4 140 141/* max immediates per insn (lcall, ljmp, insertq, extrq) */ 142#define MAX_IMMEDIATE_OPERANDS 2 143 144/* max memory refs per insn (string ops) */ 145#define MAX_MEMORY_OPERANDS 2 146 147/* max size of insn mnemonics. */ 148#define MAX_MNEM_SIZE 16 149 150/* max size of register name in insn mnemonics. */ 151#define MAX_REG_NAME_SIZE 8 152 153/* opcodes/i386-dis.c r1.126 */ 154#include "qemu-common.h" 155 156#include <setjmp.h> 157 158static int fetch_data2(struct disassemble_info *, bfd_byte *); 159static int fetch_data(struct disassemble_info *, bfd_byte *); 160static void ckprefix (void); 161static const char *prefix_name (int, int); 162static int print_insn (bfd_vma, disassemble_info *); 163static void dofloat (int); 164static void OP_ST (int, int); 165static void OP_STi (int, int); 166static int putop (const char *, int); 167static void oappend (const char *); 168static void append_seg (void); 169static void OP_indirE (int, int); 170static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp); 171static void print_displacement (char *, bfd_vma); 172static void OP_E (int, int); 173static void OP_G (int, int); 174static bfd_vma get64 (void); 175static bfd_signed_vma get32 (void); 176static bfd_signed_vma get32s (void); 177static int get16 (void); 178static void set_op (bfd_vma, int); 179static void OP_REG (int, int); 180static void OP_IMREG (int, int); 181static void OP_I (int, int); 182static void OP_I64 (int, int); 183static void OP_sI (int, int); 184static void OP_J (int, int); 185static void OP_SEG (int, int); 186static void OP_DIR (int, int); 187static void OP_OFF (int, int); 188static void OP_OFF64 (int, int); 189static void ptr_reg (int, int); 190static void OP_ESreg (int, int); 191static void OP_DSreg (int, int); 192static void OP_C (int, int); 193static void OP_D (int, int); 194static void OP_T (int, int); 195static void OP_R (int, int); 196static void OP_MMX (int, int); 197static void OP_XMM (int, int); 198static void OP_EM (int, int); 199static void OP_EX (int, int); 200static void OP_EMC (int,int); 201static void OP_MXC (int,int); 202static void OP_MS (int, int); 203static void OP_XS (int, int); 204static void OP_M (int, int); 205static void OP_VMX (int, int); 206static void OP_0fae (int, int); 207static void OP_0f07 (int, int); 208static void NOP_Fixup1 (int, int); 209static void NOP_Fixup2 (int, int); 210static void OP_3DNowSuffix (int, int); 211static void OP_SIMD_Suffix (int, int); 212static void SIMD_Fixup (int, int); 213static void PNI_Fixup (int, int); 214static void SVME_Fixup (int, int); 215static void INVLPG_Fixup (int, int); 216static void BadOp (void); 217static void VMX_Fixup (int, int); 218static void REP_Fixup (int, int); 219static void CMPXCHG8B_Fixup (int, int); 220static void XMM_Fixup (int, int); 221static void CRC32_Fixup (int, int); 222 223struct dis_private { 224 /* Points to first byte not fetched. */ 225 bfd_byte *max_fetched; 226 bfd_byte the_buffer[MAX_MNEM_SIZE]; 227 bfd_vma insn_start; 228 int orig_sizeflag; 229 sigjmp_buf bailout; 230}; 231 232enum address_mode 233{ 234 mode_16bit, 235 mode_32bit, 236 mode_64bit 237}; 238 239static enum address_mode address_mode; 240 241/* Flags for the prefixes for the current instruction. See below. */ 242static int prefixes; 243 244/* REX prefix the current instruction. See below. */ 245static int rex; 246/* Bits of REX we've already used. */ 247static int rex_used; 248/* Mark parts used in the REX prefix. When we are testing for 249 empty prefix (for 8bit register REX extension), just mask it 250 out. Otherwise test for REX bit is excuse for existence of REX 251 only in case value is nonzero. */ 252#define USED_REX(value) \ 253 { \ 254 if (value) \ 255 { \ 256 if ((rex & value)) \ 257 rex_used |= (value) | REX_OPCODE; \ 258 } \ 259 else \ 260 rex_used |= REX_OPCODE; \ 261 } 262 263/* Flags for prefixes which we somehow handled when printing the 264 current instruction. */ 265static int used_prefixes; 266 267/* Flags stored in PREFIXES. */ 268#define PREFIX_REPZ 1 269#define PREFIX_REPNZ 2 270#define PREFIX_LOCK 4 271#define PREFIX_CS 8 272#define PREFIX_SS 0x10 273#define PREFIX_DS 0x20 274#define PREFIX_ES 0x40 275#define PREFIX_FS 0x80 276#define PREFIX_GS 0x100 277#define PREFIX_DATA 0x200 278#define PREFIX_ADDR 0x400 279#define PREFIX_FWAIT 0x800 280 281/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 282 to ADDR (exclusive) are valid. Returns 1 for success, longjmps 283 on error. */ 284static int 285fetch_data2(struct disassemble_info *info, bfd_byte *addr) 286{ 287 int status; 288 struct dis_private *priv = (struct dis_private *) info->private_data; 289 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 290 291 if (addr <= priv->the_buffer + MAX_MNEM_SIZE) 292 status = (*info->read_memory_func) (start, 293 priv->max_fetched, 294 addr - priv->max_fetched, 295 info); 296 else 297 status = -1; 298 if (status != 0) 299 { 300 /* If we did manage to read at least one byte, then 301 print_insn_i386 will do something sensible. Otherwise, print 302 an error. We do that here because this is where we know 303 STATUS. */ 304 if (priv->max_fetched == priv->the_buffer) 305 (*info->memory_error_func) (status, start, info); 306 siglongjmp(priv->bailout, 1); 307 } 308 else 309 priv->max_fetched = addr; 310 return 1; 311} 312 313static int 314fetch_data(struct disassemble_info *info, bfd_byte *addr) 315{ 316 if (addr <= ((struct dis_private *) (info->private_data))->max_fetched) { 317 return 1; 318 } else { 319 return fetch_data2(info, addr); 320 } 321} 322 323 324#define XX { NULL, 0 } 325 326#define Eb { OP_E, b_mode } 327#define Ev { OP_E, v_mode } 328#define Ed { OP_E, d_mode } 329#define Edq { OP_E, dq_mode } 330#define Edqw { OP_E, dqw_mode } 331#define Edqb { OP_E, dqb_mode } 332#define Edqd { OP_E, dqd_mode } 333#define indirEv { OP_indirE, stack_v_mode } 334#define indirEp { OP_indirE, f_mode } 335#define stackEv { OP_E, stack_v_mode } 336#define Em { OP_E, m_mode } 337#define Ew { OP_E, w_mode } 338#define M { OP_M, 0 } /* lea, lgdt, etc. */ 339#define Ma { OP_M, v_mode } 340#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */ 341#define Mq { OP_M, q_mode } 342#define Gb { OP_G, b_mode } 343#define Gv { OP_G, v_mode } 344#define Gd { OP_G, d_mode } 345#define Gdq { OP_G, dq_mode } 346#define Gm { OP_G, m_mode } 347#define Gw { OP_G, w_mode } 348#define Rd { OP_R, d_mode } 349#define Rm { OP_R, m_mode } 350#define Ib { OP_I, b_mode } 351#define sIb { OP_sI, b_mode } /* sign extened byte */ 352#define Iv { OP_I, v_mode } 353#define Iq { OP_I, q_mode } 354#define Iv64 { OP_I64, v_mode } 355#define Iw { OP_I, w_mode } 356#define I1 { OP_I, const_1_mode } 357#define Jb { OP_J, b_mode } 358#define Jv { OP_J, v_mode } 359#define Cm { OP_C, m_mode } 360#define Dm { OP_D, m_mode } 361#define Td { OP_T, d_mode } 362 363#define RMeAX { OP_REG, eAX_reg } 364#define RMeBX { OP_REG, eBX_reg } 365#define RMeCX { OP_REG, eCX_reg } 366#define RMeDX { OP_REG, eDX_reg } 367#define RMeSP { OP_REG, eSP_reg } 368#define RMeBP { OP_REG, eBP_reg } 369#define RMeSI { OP_REG, eSI_reg } 370#define RMeDI { OP_REG, eDI_reg } 371#define RMrAX { OP_REG, rAX_reg } 372#define RMrBX { OP_REG, rBX_reg } 373#define RMrCX { OP_REG, rCX_reg } 374#define RMrDX { OP_REG, rDX_reg } 375#define RMrSP { OP_REG, rSP_reg } 376#define RMrBP { OP_REG, rBP_reg } 377#define RMrSI { OP_REG, rSI_reg } 378#define RMrDI { OP_REG, rDI_reg } 379#define RMAL { OP_REG, al_reg } 380#define RMAL { OP_REG, al_reg } 381#define RMCL { OP_REG, cl_reg } 382#define RMDL { OP_REG, dl_reg } 383#define RMBL { OP_REG, bl_reg } 384#define RMAH { OP_REG, ah_reg } 385#define RMCH { OP_REG, ch_reg } 386#define RMDH { OP_REG, dh_reg } 387#define RMBH { OP_REG, bh_reg } 388#define RMAX { OP_REG, ax_reg } 389#define RMDX { OP_REG, dx_reg } 390 391#define eAX { OP_IMREG, eAX_reg } 392#define eBX { OP_IMREG, eBX_reg } 393#define eCX { OP_IMREG, eCX_reg } 394#define eDX { OP_IMREG, eDX_reg } 395#define eSP { OP_IMREG, eSP_reg } 396#define eBP { OP_IMREG, eBP_reg } 397#define eSI { OP_IMREG, eSI_reg } 398#define eDI { OP_IMREG, eDI_reg } 399#define AL { OP_IMREG, al_reg } 400#define CL { OP_IMREG, cl_reg } 401#define DL { OP_IMREG, dl_reg } 402#define BL { OP_IMREG, bl_reg } 403#define AH { OP_IMREG, ah_reg } 404#define CH { OP_IMREG, ch_reg } 405#define DH { OP_IMREG, dh_reg } 406#define BH { OP_IMREG, bh_reg } 407#define AX { OP_IMREG, ax_reg } 408#define DX { OP_IMREG, dx_reg } 409#define zAX { OP_IMREG, z_mode_ax_reg } 410#define indirDX { OP_IMREG, indir_dx_reg } 411 412#define Sw { OP_SEG, w_mode } 413#define Sv { OP_SEG, v_mode } 414#define Ap { OP_DIR, 0 } 415#define Ob { OP_OFF64, b_mode } 416#define Ov { OP_OFF64, v_mode } 417#define Xb { OP_DSreg, eSI_reg } 418#define Xv { OP_DSreg, eSI_reg } 419#define Xz { OP_DSreg, eSI_reg } 420#define Yb { OP_ESreg, eDI_reg } 421#define Yv { OP_ESreg, eDI_reg } 422#define DSBX { OP_DSreg, eBX_reg } 423 424#define es { OP_REG, es_reg } 425#define ss { OP_REG, ss_reg } 426#define cs { OP_REG, cs_reg } 427#define ds { OP_REG, ds_reg } 428#define fs { OP_REG, fs_reg } 429#define gs { OP_REG, gs_reg } 430 431#define MX { OP_MMX, 0 } 432#define XM { OP_XMM, 0 } 433#define EM { OP_EM, v_mode } 434#define EMd { OP_EM, d_mode } 435#define EMq { OP_EM, q_mode } 436#define EXd { OP_EX, d_mode } 437#define EXq { OP_EX, q_mode } 438#define EXx { OP_EX, x_mode } 439#define MS { OP_MS, v_mode } 440#define XS { OP_XS, v_mode } 441#define EMC { OP_EMC, v_mode } 442#define MXC { OP_MXC, 0 } 443#define VM { OP_VMX, q_mode } 444#define OPSUF { OP_3DNowSuffix, 0 } 445#define OPSIMD { OP_SIMD_Suffix, 0 } 446#define XMM0 { XMM_Fixup, 0 } 447 448/* Used handle "rep" prefix for string instructions. */ 449#define Xbr { REP_Fixup, eSI_reg } 450#define Xvr { REP_Fixup, eSI_reg } 451#define Ybr { REP_Fixup, eDI_reg } 452#define Yvr { REP_Fixup, eDI_reg } 453#define Yzr { REP_Fixup, eDI_reg } 454#define indirDXr { REP_Fixup, indir_dx_reg } 455#define ALr { REP_Fixup, al_reg } 456#define eAXr { REP_Fixup, eAX_reg } 457 458#define cond_jump_flag { NULL, cond_jump_mode } 459#define loop_jcxz_flag { NULL, loop_jcxz_mode } 460 461/* bits in sizeflag */ 462#define SUFFIX_ALWAYS 4 463#define AFLAG 2 464#define DFLAG 1 465 466#define b_mode 1 /* byte operand */ 467#define v_mode 2 /* operand size depends on prefixes */ 468#define w_mode 3 /* word operand */ 469#define d_mode 4 /* double word operand */ 470#define q_mode 5 /* quad word operand */ 471#define t_mode 6 /* ten-byte operand */ 472#define x_mode 7 /* 16-byte XMM operand */ 473#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */ 474#define cond_jump_mode 9 475#define loop_jcxz_mode 10 476#define dq_mode 11 /* operand size depends on REX prefixes. */ 477#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */ 478#define f_mode 13 /* 4- or 6-byte pointer operand */ 479#define const_1_mode 14 480#define stack_v_mode 15 /* v_mode for stack-related opcodes. */ 481#define z_mode 16 /* non-quad operand size depends on prefixes */ 482#define o_mode 17 /* 16-byte operand */ 483#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */ 484#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */ 485 486#define es_reg 100 487#define cs_reg 101 488#define ss_reg 102 489#define ds_reg 103 490#define fs_reg 104 491#define gs_reg 105 492 493#define eAX_reg 108 494#define eCX_reg 109 495#define eDX_reg 110 496#define eBX_reg 111 497#define eSP_reg 112 498#define eBP_reg 113 499#define eSI_reg 114 500#define eDI_reg 115 501 502#define al_reg 116 503#define cl_reg 117 504#define dl_reg 118 505#define bl_reg 119 506#define ah_reg 120 507#define ch_reg 121 508#define dh_reg 122 509#define bh_reg 123 510 511#define ax_reg 124 512#define cx_reg 125 513#define dx_reg 126 514#define bx_reg 127 515#define sp_reg 128 516#define bp_reg 129 517#define si_reg 130 518#define di_reg 131 519 520#define rAX_reg 132 521#define rCX_reg 133 522#define rDX_reg 134 523#define rBX_reg 135 524#define rSP_reg 136 525#define rBP_reg 137 526#define rSI_reg 138 527#define rDI_reg 139 528 529#define z_mode_ax_reg 149 530#define indir_dx_reg 150 531 532#define FLOATCODE 1 533#define USE_GROUPS 2 534#define USE_PREFIX_USER_TABLE 3 535#define X86_64_SPECIAL 4 536#define IS_3BYTE_OPCODE 5 537 538#define FLOAT NULL, { { NULL, FLOATCODE } } 539 540#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } } 541#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } } 542#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } } 543#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } } 544#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } } 545#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } } 546#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } } 547#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } } 548#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } } 549#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } } 550#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } } 551#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } } 552#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } } 553#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } } 554#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } } 555#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } } 556#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } } 557#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } } 558#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } } 559#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } } 560#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } } 561#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } } 562#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } } 563#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } } 564#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } } 565#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } } 566#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } } 567#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } } 568 569#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } } 570#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } } 571#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } } 572#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } } 573#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } } 574#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } } 575#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } } 576#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } } 577#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } } 578#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } } 579#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } } 580#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } } 581#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } } 582#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } } 583#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } } 584#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } } 585#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } } 586#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } } 587#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } } 588#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } } 589#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } } 590#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } } 591#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } } 592#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } } 593#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } } 594#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } } 595#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } } 596#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } } 597#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } } 598#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } } 599#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } } 600#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } } 601#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } } 602#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } } 603#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } } 604#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } } 605#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } } 606#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } } 607#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } } 608#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } } 609#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } } 610#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } } 611#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } } 612#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } } 613#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } } 614#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } } 615#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } } 616#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } } 617#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } } 618#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } } 619#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } } 620#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } } 621#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } } 622#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } } 623#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } } 624#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } } 625#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } } 626#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } } 627#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } } 628#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } } 629#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } } 630#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } } 631#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } } 632#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } } 633#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } } 634#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } } 635#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } } 636#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } } 637#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } } 638#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } } 639#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } } 640#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } } 641#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } } 642#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } } 643#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } } 644#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } } 645#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } } 646#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } } 647#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } } 648#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } } 649#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } } 650#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } } 651#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } } 652#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } } 653#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } } 654#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } } 655#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } } 656#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } } 657#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } } 658#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } } 659#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } } 660#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } } 661#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } } 662#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } } 663#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } } 664#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } } 665#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } } 666#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } } 667#define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } } 668#define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } } 669#define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } } 670#define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } } 671#define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } } 672#define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } } 673#define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } } 674 675 676#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } } 677#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } } 678#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } } 679#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } } 680 681#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } } 682#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } } 683 684typedef void (*op_rtn) (int bytemode, int sizeflag); 685 686struct dis386 { 687 const char *name; 688 struct 689 { 690 op_rtn rtn; 691 int bytemode; 692 } op[MAX_OPERANDS]; 693}; 694 695/* Upper case letters in the instruction names here are macros. 696 'A' => print 'b' if no register operands or suffix_always is true 697 'B' => print 'b' if suffix_always is true 698 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand 699 . size prefix 700 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if 701 . suffix_always is true 702 'E' => print 'e' if 32-bit form of jcxz 703 'F' => print 'w' or 'l' depending on address size prefix (loop insns) 704 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns) 705 'H' => print ",pt" or ",pn" branch hint 706 'I' => honor following macro letter even in Intel mode (implemented only 707 . for some of the macro letters) 708 'J' => print 'l' 709 'K' => print 'd' or 'q' if rex prefix is present. 710 'L' => print 'l' if suffix_always is true 711 'N' => print 'n' if instruction has no wait "prefix" 712 'O' => print 'd' or 'o' (or 'q' in Intel mode) 713 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, 714 . or suffix_always is true. print 'q' if rex prefix is present. 715 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always 716 . is true 717 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode) 718 'S' => print 'w', 'l' or 'q' if suffix_always is true 719 'T' => print 'q' in 64bit mode and behave as 'P' otherwise 720 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 721 'V' => print 'q' in 64bit mode and behave as 'S' otherwise 722 'W' => print 'b', 'w' or 'l' ('d' in Intel mode) 723 'X' => print 's', 'd' depending on data16 prefix (for XMM) 724 'Y' => 'q' if instruction has an REX 64bit overwrite prefix 725 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise 726 727 Many of the above letters print nothing in Intel mode. See "putop" 728 for the details. 729 730 Braces '{' and '}', and vertical bars '|', indicate alternative 731 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel 732 modes. In cases where there are only two alternatives, the X86_64 733 instruction is reserved, and "(bad)" is printed. 734*/ 735 736static const struct dis386 dis386[] = { 737 /* 00 */ 738 { "addB", { Eb, Gb } }, 739 { "addS", { Ev, Gv } }, 740 { "addB", { Gb, Eb } }, 741 { "addS", { Gv, Ev } }, 742 { "addB", { AL, Ib } }, 743 { "addS", { eAX, Iv } }, 744 { "push{T|}", { es } }, 745 { "pop{T|}", { es } }, 746 /* 08 */ 747 { "orB", { Eb, Gb } }, 748 { "orS", { Ev, Gv } }, 749 { "orB", { Gb, Eb } }, 750 { "orS", { Gv, Ev } }, 751 { "orB", { AL, Ib } }, 752 { "orS", { eAX, Iv } }, 753 { "push{T|}", { cs } }, 754 { "(bad)", { XX } }, /* 0x0f extended opcode escape */ 755 /* 10 */ 756 { "adcB", { Eb, Gb } }, 757 { "adcS", { Ev, Gv } }, 758 { "adcB", { Gb, Eb } }, 759 { "adcS", { Gv, Ev } }, 760 { "adcB", { AL, Ib } }, 761 { "adcS", { eAX, Iv } }, 762 { "push{T|}", { ss } }, 763 { "pop{T|}", { ss } }, 764 /* 18 */ 765 { "sbbB", { Eb, Gb } }, 766 { "sbbS", { Ev, Gv } }, 767 { "sbbB", { Gb, Eb } }, 768 { "sbbS", { Gv, Ev } }, 769 { "sbbB", { AL, Ib } }, 770 { "sbbS", { eAX, Iv } }, 771 { "push{T|}", { ds } }, 772 { "pop{T|}", { ds } }, 773 /* 20 */ 774 { "andB", { Eb, Gb } }, 775 { "andS", { Ev, Gv } }, 776 { "andB", { Gb, Eb } }, 777 { "andS", { Gv, Ev } }, 778 { "andB", { AL, Ib } }, 779 { "andS", { eAX, Iv } }, 780 { "(bad)", { XX } }, /* SEG ES prefix */ 781 { "daa{|}", { XX } }, 782 /* 28 */ 783 { "subB", { Eb, Gb } }, 784 { "subS", { Ev, Gv } }, 785 { "subB", { Gb, Eb } }, 786 { "subS", { Gv, Ev } }, 787 { "subB", { AL, Ib } }, 788 { "subS", { eAX, Iv } }, 789 { "(bad)", { XX } }, /* SEG CS prefix */ 790 { "das{|}", { XX } }, 791 /* 30 */ 792 { "xorB", { Eb, Gb } }, 793 { "xorS", { Ev, Gv } }, 794 { "xorB", { Gb, Eb } }, 795 { "xorS", { Gv, Ev } }, 796 { "xorB", { AL, Ib } }, 797 { "xorS", { eAX, Iv } }, 798 { "(bad)", { XX } }, /* SEG SS prefix */ 799 { "aaa{|}", { XX } }, 800 /* 38 */ 801 { "cmpB", { Eb, Gb } }, 802 { "cmpS", { Ev, Gv } }, 803 { "cmpB", { Gb, Eb } }, 804 { "cmpS", { Gv, Ev } }, 805 { "cmpB", { AL, Ib } }, 806 { "cmpS", { eAX, Iv } }, 807 { "(bad)", { XX } }, /* SEG DS prefix */ 808 { "aas{|}", { XX } }, 809 /* 40 */ 810 { "inc{S|}", { RMeAX } }, 811 { "inc{S|}", { RMeCX } }, 812 { "inc{S|}", { RMeDX } }, 813 { "inc{S|}", { RMeBX } }, 814 { "inc{S|}", { RMeSP } }, 815 { "inc{S|}", { RMeBP } }, 816 { "inc{S|}", { RMeSI } }, 817 { "inc{S|}", { RMeDI } }, 818 /* 48 */ 819 { "dec{S|}", { RMeAX } }, 820 { "dec{S|}", { RMeCX } }, 821 { "dec{S|}", { RMeDX } }, 822 { "dec{S|}", { RMeBX } }, 823 { "dec{S|}", { RMeSP } }, 824 { "dec{S|}", { RMeBP } }, 825 { "dec{S|}", { RMeSI } }, 826 { "dec{S|}", { RMeDI } }, 827 /* 50 */ 828 { "pushV", { RMrAX } }, 829 { "pushV", { RMrCX } }, 830 { "pushV", { RMrDX } }, 831 { "pushV", { RMrBX } }, 832 { "pushV", { RMrSP } }, 833 { "pushV", { RMrBP } }, 834 { "pushV", { RMrSI } }, 835 { "pushV", { RMrDI } }, 836 /* 58 */ 837 { "popV", { RMrAX } }, 838 { "popV", { RMrCX } }, 839 { "popV", { RMrDX } }, 840 { "popV", { RMrBX } }, 841 { "popV", { RMrSP } }, 842 { "popV", { RMrBP } }, 843 { "popV", { RMrSI } }, 844 { "popV", { RMrDI } }, 845 /* 60 */ 846 { X86_64_0 }, 847 { X86_64_1 }, 848 { X86_64_2 }, 849 { X86_64_3 }, 850 { "(bad)", { XX } }, /* seg fs */ 851 { "(bad)", { XX } }, /* seg gs */ 852 { "(bad)", { XX } }, /* op size prefix */ 853 { "(bad)", { XX } }, /* adr size prefix */ 854 /* 68 */ 855 { "pushT", { Iq } }, 856 { "imulS", { Gv, Ev, Iv } }, 857 { "pushT", { sIb } }, 858 { "imulS", { Gv, Ev, sIb } }, 859 { "ins{b||b|}", { Ybr, indirDX } }, 860 { "ins{R||G|}", { Yzr, indirDX } }, 861 { "outs{b||b|}", { indirDXr, Xb } }, 862 { "outs{R||G|}", { indirDXr, Xz } }, 863 /* 70 */ 864 { "joH", { Jb, XX, cond_jump_flag } }, 865 { "jnoH", { Jb, XX, cond_jump_flag } }, 866 { "jbH", { Jb, XX, cond_jump_flag } }, 867 { "jaeH", { Jb, XX, cond_jump_flag } }, 868 { "jeH", { Jb, XX, cond_jump_flag } }, 869 { "jneH", { Jb, XX, cond_jump_flag } }, 870 { "jbeH", { Jb, XX, cond_jump_flag } }, 871 { "jaH", { Jb, XX, cond_jump_flag } }, 872 /* 78 */ 873 { "jsH", { Jb, XX, cond_jump_flag } }, 874 { "jnsH", { Jb, XX, cond_jump_flag } }, 875 { "jpH", { Jb, XX, cond_jump_flag } }, 876 { "jnpH", { Jb, XX, cond_jump_flag } }, 877 { "jlH", { Jb, XX, cond_jump_flag } }, 878 { "jgeH", { Jb, XX, cond_jump_flag } }, 879 { "jleH", { Jb, XX, cond_jump_flag } }, 880 { "jgH", { Jb, XX, cond_jump_flag } }, 881 /* 80 */ 882 { GRP1b }, 883 { GRP1S }, 884 { "(bad)", { XX } }, 885 { GRP1Ss }, 886 { "testB", { Eb, Gb } }, 887 { "testS", { Ev, Gv } }, 888 { "xchgB", { Eb, Gb } }, 889 { "xchgS", { Ev, Gv } }, 890 /* 88 */ 891 { "movB", { Eb, Gb } }, 892 { "movS", { Ev, Gv } }, 893 { "movB", { Gb, Eb } }, 894 { "movS", { Gv, Ev } }, 895 { "movD", { Sv, Sw } }, 896 { "leaS", { Gv, M } }, 897 { "movD", { Sw, Sv } }, 898 { GRP1a }, 899 /* 90 */ 900 { PREGRP38 }, 901 { "xchgS", { RMeCX, eAX } }, 902 { "xchgS", { RMeDX, eAX } }, 903 { "xchgS", { RMeBX, eAX } }, 904 { "xchgS", { RMeSP, eAX } }, 905 { "xchgS", { RMeBP, eAX } }, 906 { "xchgS", { RMeSI, eAX } }, 907 { "xchgS", { RMeDI, eAX } }, 908 /* 98 */ 909 { "cW{t||t|}R", { XX } }, 910 { "cR{t||t|}O", { XX } }, 911 { "Jcall{T|}", { Ap } }, 912 { "(bad)", { XX } }, /* fwait */ 913 { "pushfT", { XX } }, 914 { "popfT", { XX } }, 915 { "sahf{|}", { XX } }, 916 { "lahf{|}", { XX } }, 917 /* a0 */ 918 { "movB", { AL, Ob } }, 919 { "movS", { eAX, Ov } }, 920 { "movB", { Ob, AL } }, 921 { "movS", { Ov, eAX } }, 922 { "movs{b||b|}", { Ybr, Xb } }, 923 { "movs{R||R|}", { Yvr, Xv } }, 924 { "cmps{b||b|}", { Xb, Yb } }, 925 { "cmps{R||R|}", { Xv, Yv } }, 926 /* a8 */ 927 { "testB", { AL, Ib } }, 928 { "testS", { eAX, Iv } }, 929 { "stosB", { Ybr, AL } }, 930 { "stosS", { Yvr, eAX } }, 931 { "lodsB", { ALr, Xb } }, 932 { "lodsS", { eAXr, Xv } }, 933 { "scasB", { AL, Yb } }, 934 { "scasS", { eAX, Yv } }, 935 /* b0 */ 936 { "movB", { RMAL, Ib } }, 937 { "movB", { RMCL, Ib } }, 938 { "movB", { RMDL, Ib } }, 939 { "movB", { RMBL, Ib } }, 940 { "movB", { RMAH, Ib } }, 941 { "movB", { RMCH, Ib } }, 942 { "movB", { RMDH, Ib } }, 943 { "movB", { RMBH, Ib } }, 944 /* b8 */ 945 { "movS", { RMeAX, Iv64 } }, 946 { "movS", { RMeCX, Iv64 } }, 947 { "movS", { RMeDX, Iv64 } }, 948 { "movS", { RMeBX, Iv64 } }, 949 { "movS", { RMeSP, Iv64 } }, 950 { "movS", { RMeBP, Iv64 } }, 951 { "movS", { RMeSI, Iv64 } }, 952 { "movS", { RMeDI, Iv64 } }, 953 /* c0 */ 954 { GRP2b }, 955 { GRP2S }, 956 { "retT", { Iw } }, 957 { "retT", { XX } }, 958 { "les{S|}", { Gv, Mp } }, 959 { "ldsS", { Gv, Mp } }, 960 { GRP11_C6 }, 961 { GRP11_C7 }, 962 /* c8 */ 963 { "enterT", { Iw, Ib } }, 964 { "leaveT", { XX } }, 965 { "lretP", { Iw } }, 966 { "lretP", { XX } }, 967 { "int3", { XX } }, 968 { "int", { Ib } }, 969 { "into{|}", { XX } }, 970 { "iretP", { XX } }, 971 /* d0 */ 972 { GRP2b_one }, 973 { GRP2S_one }, 974 { GRP2b_cl }, 975 { GRP2S_cl }, 976 { "aam{|}", { sIb } }, 977 { "aad{|}", { sIb } }, 978 { "(bad)", { XX } }, 979 { "xlat", { DSBX } }, 980 /* d8 */ 981 { FLOAT }, 982 { FLOAT }, 983 { FLOAT }, 984 { FLOAT }, 985 { FLOAT }, 986 { FLOAT }, 987 { FLOAT }, 988 { FLOAT }, 989 /* e0 */ 990 { "loopneFH", { Jb, XX, loop_jcxz_flag } }, 991 { "loopeFH", { Jb, XX, loop_jcxz_flag } }, 992 { "loopFH", { Jb, XX, loop_jcxz_flag } }, 993 { "jEcxzH", { Jb, XX, loop_jcxz_flag } }, 994 { "inB", { AL, Ib } }, 995 { "inG", { zAX, Ib } }, 996 { "outB", { Ib, AL } }, 997 { "outG", { Ib, zAX } }, 998 /* e8 */ 999 { "callT", { Jv } }, 1000 { "jmpT", { Jv } }, 1001 { "Jjmp{T|}", { Ap } }, 1002 { "jmp", { Jb } }, 1003 { "inB", { AL, indirDX } }, 1004 { "inG", { zAX, indirDX } }, 1005 { "outB", { indirDX, AL } }, 1006 { "outG", { indirDX, zAX } }, 1007 /* f0 */ 1008 { "(bad)", { XX } }, /* lock prefix */ 1009 { "icebp", { XX } }, 1010 { "(bad)", { XX } }, /* repne */ 1011 { "(bad)", { XX } }, /* repz */ 1012 { "hlt", { XX } }, 1013 { "cmc", { XX } }, 1014 { GRP3b }, 1015 { GRP3S }, 1016 /* f8 */ 1017 { "clc", { XX } }, 1018 { "stc", { XX } }, 1019 { "cli", { XX } }, 1020 { "sti", { XX } }, 1021 { "cld", { XX } }, 1022 { "std", { XX } }, 1023 { GRP4 }, 1024 { GRP5 }, 1025}; 1026 1027static const struct dis386 dis386_twobyte[] = { 1028 /* 00 */ 1029 { GRP6 }, 1030 { GRP7 }, 1031 { "larS", { Gv, Ew } }, 1032 { "lslS", { Gv, Ew } }, 1033 { "(bad)", { XX } }, 1034 { "syscall", { XX } }, 1035 { "clts", { XX } }, 1036 { "sysretP", { XX } }, 1037 /* 08 */ 1038 { "invd", { XX } }, 1039 { "wbinvd", { XX } }, 1040 { "(bad)", { XX } }, 1041 { "ud2a", { XX } }, 1042 { "(bad)", { XX } }, 1043 { GRPAMD }, 1044 { "femms", { XX } }, 1045 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */ 1046 /* 10 */ 1047 { PREGRP8 }, 1048 { PREGRP9 }, 1049 { PREGRP30 }, 1050 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } }, 1051 { "unpcklpX", { XM, EXq } }, 1052 { "unpckhpX", { XM, EXq } }, 1053 { PREGRP31 }, 1054 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } }, 1055 /* 18 */ 1056 { GRP16 }, 1057 { "(bad)", { XX } }, 1058 { "(bad)", { XX } }, 1059 { "(bad)", { XX } }, 1060 { "(bad)", { XX } }, 1061 { "(bad)", { XX } }, 1062 { "(bad)", { XX } }, 1063 { "nopQ", { Ev } }, 1064 /* 20 */ 1065 { "movZ", { Rm, Cm } }, 1066 { "movZ", { Rm, Dm } }, 1067 { "movZ", { Cm, Rm } }, 1068 { "movZ", { Dm, Rm } }, 1069 { "movL", { Rd, Td } }, 1070 { "(bad)", { XX } }, 1071 { "movL", { Td, Rd } }, 1072 { "(bad)", { XX } }, 1073 /* 28 */ 1074 { "movapX", { XM, EXx } }, 1075 { "movapX", { EXx, XM } }, 1076 { PREGRP2 }, 1077 { PREGRP33 }, 1078 { PREGRP4 }, 1079 { PREGRP3 }, 1080 { PREGRP93 }, 1081 { PREGRP94 }, 1082 /* 30 */ 1083 { "wrmsr", { XX } }, 1084 { "rdtsc", { XX } }, 1085 { "rdmsr", { XX } }, 1086 { "rdpmc", { XX } }, 1087 { "sysenter", { XX } }, 1088 { "sysexit", { XX } }, 1089 { "(bad)", { XX } }, 1090 { "(bad)", { XX } }, 1091 /* 38 */ 1092 { THREE_BYTE_0 }, 1093 { "(bad)", { XX } }, 1094 { THREE_BYTE_1 }, 1095 { "(bad)", { XX } }, 1096 { "(bad)", { XX } }, 1097 { "(bad)", { XX } }, 1098 { "(bad)", { XX } }, 1099 { "(bad)", { XX } }, 1100 /* 40 */ 1101 { "cmovo", { Gv, Ev } }, 1102 { "cmovno", { Gv, Ev } }, 1103 { "cmovb", { Gv, Ev } }, 1104 { "cmovae", { Gv, Ev } }, 1105 { "cmove", { Gv, Ev } }, 1106 { "cmovne", { Gv, Ev } }, 1107 { "cmovbe", { Gv, Ev } }, 1108 { "cmova", { Gv, Ev } }, 1109 /* 48 */ 1110 { "cmovs", { Gv, Ev } }, 1111 { "cmovns", { Gv, Ev } }, 1112 { "cmovp", { Gv, Ev } }, 1113 { "cmovnp", { Gv, Ev } }, 1114 { "cmovl", { Gv, Ev } }, 1115 { "cmovge", { Gv, Ev } }, 1116 { "cmovle", { Gv, Ev } }, 1117 { "cmovg", { Gv, Ev } }, 1118 /* 50 */ 1119 { "movmskpX", { Gdq, XS } }, 1120 { PREGRP13 }, 1121 { PREGRP12 }, 1122 { PREGRP11 }, 1123 { "andpX", { XM, EXx } }, 1124 { "andnpX", { XM, EXx } }, 1125 { "orpX", { XM, EXx } }, 1126 { "xorpX", { XM, EXx } }, 1127 /* 58 */ 1128 { PREGRP0 }, 1129 { PREGRP10 }, 1130 { PREGRP17 }, 1131 { PREGRP16 }, 1132 { PREGRP14 }, 1133 { PREGRP7 }, 1134 { PREGRP5 }, 1135 { PREGRP6 }, 1136 /* 60 */ 1137 { PREGRP95 }, 1138 { PREGRP96 }, 1139 { PREGRP97 }, 1140 { "packsswb", { MX, EM } }, 1141 { "pcmpgtb", { MX, EM } }, 1142 { "pcmpgtw", { MX, EM } }, 1143 { "pcmpgtd", { MX, EM } }, 1144 { "packuswb", { MX, EM } }, 1145 /* 68 */ 1146 { "punpckhbw", { MX, EM } }, 1147 { "punpckhwd", { MX, EM } }, 1148 { "punpckhdq", { MX, EM } }, 1149 { "packssdw", { MX, EM } }, 1150 { PREGRP26 }, 1151 { PREGRP24 }, 1152 { "movd", { MX, Edq } }, 1153 { PREGRP19 }, 1154 /* 70 */ 1155 { PREGRP22 }, 1156 { GRP12 }, 1157 { GRP13 }, 1158 { GRP14 }, 1159 { "pcmpeqb", { MX, EM } }, 1160 { "pcmpeqw", { MX, EM } }, 1161 { "pcmpeqd", { MX, EM } }, 1162 { "emms", { XX } }, 1163 /* 78 */ 1164 { PREGRP34 }, 1165 { PREGRP35 }, 1166 { "(bad)", { XX } }, 1167 { "(bad)", { XX } }, 1168 { PREGRP28 }, 1169 { PREGRP29 }, 1170 { PREGRP23 }, 1171 { PREGRP20 }, 1172 /* 80 */ 1173 { "joH", { Jv, XX, cond_jump_flag } }, 1174 { "jnoH", { Jv, XX, cond_jump_flag } }, 1175 { "jbH", { Jv, XX, cond_jump_flag } }, 1176 { "jaeH", { Jv, XX, cond_jump_flag } }, 1177 { "jeH", { Jv, XX, cond_jump_flag } }, 1178 { "jneH", { Jv, XX, cond_jump_flag } }, 1179 { "jbeH", { Jv, XX, cond_jump_flag } }, 1180 { "jaH", { Jv, XX, cond_jump_flag } }, 1181 /* 88 */ 1182 { "jsH", { Jv, XX, cond_jump_flag } }, 1183 { "jnsH", { Jv, XX, cond_jump_flag } }, 1184 { "jpH", { Jv, XX, cond_jump_flag } }, 1185 { "jnpH", { Jv, XX, cond_jump_flag } }, 1186 { "jlH", { Jv, XX, cond_jump_flag } }, 1187 { "jgeH", { Jv, XX, cond_jump_flag } }, 1188 { "jleH", { Jv, XX, cond_jump_flag } }, 1189 { "jgH", { Jv, XX, cond_jump_flag } }, 1190 /* 90 */ 1191 { "seto", { Eb } }, 1192 { "setno", { Eb } }, 1193 { "setb", { Eb } }, 1194 { "setae", { Eb } }, 1195 { "sete", { Eb } }, 1196 { "setne", { Eb } }, 1197 { "setbe", { Eb } }, 1198 { "seta", { Eb } }, 1199 /* 98 */ 1200 { "sets", { Eb } }, 1201 { "setns", { Eb } }, 1202 { "setp", { Eb } }, 1203 { "setnp", { Eb } }, 1204 { "setl", { Eb } }, 1205 { "setge", { Eb } }, 1206 { "setle", { Eb } }, 1207 { "setg", { Eb } }, 1208 /* a0 */ 1209 { "pushT", { fs } }, 1210 { "popT", { fs } }, 1211 { "cpuid", { XX } }, 1212 { "btS", { Ev, Gv } }, 1213 { "shldS", { Ev, Gv, Ib } }, 1214 { "shldS", { Ev, Gv, CL } }, 1215 { GRPPADLCK2 }, 1216 { GRPPADLCK1 }, 1217 /* a8 */ 1218 { "pushT", { gs } }, 1219 { "popT", { gs } }, 1220 { "rsm", { XX } }, 1221 { "btsS", { Ev, Gv } }, 1222 { "shrdS", { Ev, Gv, Ib } }, 1223 { "shrdS", { Ev, Gv, CL } }, 1224 { GRP15 }, 1225 { "imulS", { Gv, Ev } }, 1226 /* b0 */ 1227 { "cmpxchgB", { Eb, Gb } }, 1228 { "cmpxchgS", { Ev, Gv } }, 1229 { "lssS", { Gv, Mp } }, 1230 { "btrS", { Ev, Gv } }, 1231 { "lfsS", { Gv, Mp } }, 1232 { "lgsS", { Gv, Mp } }, 1233 { "movz{bR|x|bR|x}", { Gv, Eb } }, 1234 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */ 1235 /* b8 */ 1236 { PREGRP37 }, 1237 { "ud2b", { XX } }, 1238 { GRP8 }, 1239 { "btcS", { Ev, Gv } }, 1240 { "bsfS", { Gv, Ev } }, 1241 { PREGRP36 }, 1242 { "movs{bR|x|bR|x}", { Gv, Eb } }, 1243 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */ 1244 /* c0 */ 1245 { "xaddB", { Eb, Gb } }, 1246 { "xaddS", { Ev, Gv } }, 1247 { PREGRP1 }, 1248 { "movntiS", { Ev, Gv } }, 1249 { "pinsrw", { MX, Edqw, Ib } }, 1250 { "pextrw", { Gdq, MS, Ib } }, 1251 { "shufpX", { XM, EXx, Ib } }, 1252 { GRP9 }, 1253 /* c8 */ 1254 { "bswap", { RMeAX } }, 1255 { "bswap", { RMeCX } }, 1256 { "bswap", { RMeDX } }, 1257 { "bswap", { RMeBX } }, 1258 { "bswap", { RMeSP } }, 1259 { "bswap", { RMeBP } }, 1260 { "bswap", { RMeSI } }, 1261 { "bswap", { RMeDI } }, 1262 /* d0 */ 1263 { PREGRP27 }, 1264 { "psrlw", { MX, EM } }, 1265 { "psrld", { MX, EM } }, 1266 { "psrlq", { MX, EM } }, 1267 { "paddq", { MX, EM } }, 1268 { "pmullw", { MX, EM } }, 1269 { PREGRP21 }, 1270 { "pmovmskb", { Gdq, MS } }, 1271 /* d8 */ 1272 { "psubusb", { MX, EM } }, 1273 { "psubusw", { MX, EM } }, 1274 { "pminub", { MX, EM } }, 1275 { "pand", { MX, EM } }, 1276 { "paddusb", { MX, EM } }, 1277 { "paddusw", { MX, EM } }, 1278 { "pmaxub", { MX, EM } }, 1279 { "pandn", { MX, EM } }, 1280 /* e0 */ 1281 { "pavgb", { MX, EM } }, 1282 { "psraw", { MX, EM } }, 1283 { "psrad", { MX, EM } }, 1284 { "pavgw", { MX, EM } }, 1285 { "pmulhuw", { MX, EM } }, 1286 { "pmulhw", { MX, EM } }, 1287 { PREGRP15 }, 1288 { PREGRP25 }, 1289 /* e8 */ 1290 { "psubsb", { MX, EM } }, 1291 { "psubsw", { MX, EM } }, 1292 { "pminsw", { MX, EM } }, 1293 { "por", { MX, EM } }, 1294 { "paddsb", { MX, EM } }, 1295 { "paddsw", { MX, EM } }, 1296 { "pmaxsw", { MX, EM } }, 1297 { "pxor", { MX, EM } }, 1298 /* f0 */ 1299 { PREGRP32 }, 1300 { "psllw", { MX, EM } }, 1301 { "pslld", { MX, EM } }, 1302 { "psllq", { MX, EM } }, 1303 { "pmuludq", { MX, EM } }, 1304 { "pmaddwd", { MX, EM } }, 1305 { "psadbw", { MX, EM } }, 1306 { PREGRP18 }, 1307 /* f8 */ 1308 { "psubb", { MX, EM } }, 1309 { "psubw", { MX, EM } }, 1310 { "psubd", { MX, EM } }, 1311 { "psubq", { MX, EM } }, 1312 { "paddb", { MX, EM } }, 1313 { "paddw", { MX, EM } }, 1314 { "paddd", { MX, EM } }, 1315 { "(bad)", { XX } }, 1316}; 1317 1318static const unsigned char onebyte_has_modrm[256] = { 1319 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1320 /* ------------------------------- */ 1321 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ 1322 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ 1323 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ 1324 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ 1325 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ 1326 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ 1327 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ 1328 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ 1329 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ 1330 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ 1331 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ 1332 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ 1333 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ 1334 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ 1335 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ 1336 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ 1337 /* ------------------------------- */ 1338 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1339}; 1340 1341static const unsigned char twobyte_has_modrm[256] = { 1342 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1343 /* ------------------------------- */ 1344 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ 1345 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */ 1346 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ 1347 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ 1348 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ 1349 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ 1350 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ 1351 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */ 1352 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1353 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ 1354 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */ 1355 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */ 1356 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ 1357 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ 1358 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ 1359 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ 1360 /* ------------------------------- */ 1361 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1362}; 1363 1364static const unsigned char twobyte_uses_DATA_prefix[256] = { 1365 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1366 /* ------------------------------- */ 1367 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1368 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1369 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1370 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ 1371 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1372 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1373 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ 1374 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */ 1375 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1376 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1377 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1378 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1379 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1380 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1381 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1382 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ 1383 /* ------------------------------- */ 1384 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1385}; 1386 1387static const unsigned char twobyte_uses_REPNZ_prefix[256] = { 1388 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1389 /* ------------------------------- */ 1390 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1391 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1392 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1393 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1394 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1395 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */ 1396 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1397 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */ 1398 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1399 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1400 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1401 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1402 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1403 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1404 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1405 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1406 /* ------------------------------- */ 1407 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1408}; 1409 1410static const unsigned char twobyte_uses_REPZ_prefix[256] = { 1411 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1412 /* ------------------------------- */ 1413 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1414 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1415 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1416 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1417 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1418 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1419 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */ 1420 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */ 1421 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1422 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1423 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1424 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */ 1425 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1426 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1427 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1428 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1429 /* ------------------------------- */ 1430 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1431}; 1432 1433/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */ 1434static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = { 1435 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1436 /* ------------------------------- */ 1437 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */ 1438 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */ 1439 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */ 1440 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */ 1441 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1442 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1443 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1444 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1445 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1446 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1447 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1448 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1449 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1450 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */ 1451 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1452 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1453 /* ------------------------------- */ 1454 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1455}; 1456 1457/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */ 1458static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = { 1459 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1460 /* ------------------------------- */ 1461 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1462 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1463 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1464 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1465 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1466 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1467 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1468 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1469 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1470 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1471 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1472 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1473 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1474 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1475 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1476 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1477 /* ------------------------------- */ 1478 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1479}; 1480 1481/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */ 1482static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = { 1483 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1484 /* ------------------------------- */ 1485 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1486 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1487 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1488 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1489 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1490 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1491 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1492 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1493 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1494 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1495 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1496 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1497 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1498 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1499 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1500 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1501 /* ------------------------------- */ 1502 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1503}; 1504 1505/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */ 1506static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = { 1507 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1508 /* ------------------------------- */ 1509 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */ 1510 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */ 1511 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1512 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1513 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1514 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1515 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1516 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1517 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1518 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1519 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1520 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1521 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1522 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */ 1523 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1524 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1525 /* ------------------------------- */ 1526 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1527}; 1528 1529/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */ 1530static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = { 1531 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1532 /* ------------------------------- */ 1533 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1534 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1535 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1536 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1537 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1538 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1539 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1540 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1541 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1542 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1543 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1544 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1545 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1546 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1547 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1548 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1549 /* ------------------------------- */ 1550 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1551}; 1552 1553/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */ 1554static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = { 1555 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1556 /* ------------------------------- */ 1557 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1558 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1559 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1560 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1561 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1562 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1563 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1564 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1565 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1566 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1567 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1568 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1569 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1570 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1571 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1572 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1573 /* ------------------------------- */ 1574 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1575}; 1576 1577static char obuf[100]; 1578static char *obufp; 1579static char scratchbuf[100]; 1580static unsigned char *start_codep; 1581static unsigned char *insn_codep; 1582static unsigned char *codep; 1583static disassemble_info *the_info; 1584static struct 1585 { 1586 int mod; 1587 int reg; 1588 int rm; 1589 } 1590modrm; 1591static unsigned char need_modrm; 1592 1593/* If we are accessing mod/rm/reg without need_modrm set, then the 1594 values are stale. Hitting this abort likely indicates that you 1595 need to update onebyte_has_modrm or twobyte_has_modrm. */ 1596#define MODRM_CHECK if (!need_modrm) abort () 1597 1598static const char * const *names64; 1599static const char * const *names32; 1600static const char * const *names16; 1601static const char * const *names8; 1602static const char * const *names8rex; 1603static const char * const *names_seg; 1604static const char * const *index16; 1605 1606static const char * const intel_names64[] = { 1607 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 1608 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 1609}; 1610static const char * const intel_names32[] = { 1611 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", 1612 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" 1613}; 1614static const char * const intel_names16[] = { 1615 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", 1616 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" 1617}; 1618static const char * const intel_names8[] = { 1619 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", 1620}; 1621static const char * const intel_names8rex[] = { 1622 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", 1623 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" 1624}; 1625static const char * const intel_names_seg[] = { 1626 "es", "cs", "ss", "ds", "fs", "gs", "?", "?", 1627}; 1628static const char * const intel_index16[] = { 1629 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" 1630}; 1631 1632static const char * const att_names64[] = { 1633 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", 1634 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 1635}; 1636static const char * const att_names32[] = { 1637 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", 1638 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" 1639}; 1640static const char * const att_names16[] = { 1641 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", 1642 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" 1643}; 1644static const char * const att_names8[] = { 1645 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", 1646}; 1647static const char * const att_names8rex[] = { 1648 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", 1649 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 1650}; 1651static const char * const att_names_seg[] = { 1652 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", 1653}; 1654static const char * const att_index16[] = { 1655 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" 1656}; 1657 1658static const struct dis386 grps[][8] = { 1659 /* GRP1a */ 1660 { 1661 { "popU", { stackEv } }, 1662 { "(bad)", { XX } }, 1663 { "(bad)", { XX } }, 1664 { "(bad)", { XX } }, 1665 { "(bad)", { XX } }, 1666 { "(bad)", { XX } }, 1667 { "(bad)", { XX } }, 1668 { "(bad)", { XX } }, 1669 }, 1670 /* GRP1b */ 1671 { 1672 { "addA", { Eb, Ib } }, 1673 { "orA", { Eb, Ib } }, 1674 { "adcA", { Eb, Ib } }, 1675 { "sbbA", { Eb, Ib } }, 1676 { "andA", { Eb, Ib } }, 1677 { "subA", { Eb, Ib } }, 1678 { "xorA", { Eb, Ib } }, 1679 { "cmpA", { Eb, Ib } }, 1680 }, 1681 /* GRP1S */ 1682 { 1683 { "addQ", { Ev, Iv } }, 1684 { "orQ", { Ev, Iv } }, 1685 { "adcQ", { Ev, Iv } }, 1686 { "sbbQ", { Ev, Iv } }, 1687 { "andQ", { Ev, Iv } }, 1688 { "subQ", { Ev, Iv } }, 1689 { "xorQ", { Ev, Iv } }, 1690 { "cmpQ", { Ev, Iv } }, 1691 }, 1692 /* GRP1Ss */ 1693 { 1694 { "addQ", { Ev, sIb } }, 1695 { "orQ", { Ev, sIb } }, 1696 { "adcQ", { Ev, sIb } }, 1697 { "sbbQ", { Ev, sIb } }, 1698 { "andQ", { Ev, sIb } }, 1699 { "subQ", { Ev, sIb } }, 1700 { "xorQ", { Ev, sIb } }, 1701 { "cmpQ", { Ev, sIb } }, 1702 }, 1703 /* GRP2b */ 1704 { 1705 { "rolA", { Eb, Ib } }, 1706 { "rorA", { Eb, Ib } }, 1707 { "rclA", { Eb, Ib } }, 1708 { "rcrA", { Eb, Ib } }, 1709 { "shlA", { Eb, Ib } }, 1710 { "shrA", { Eb, Ib } }, 1711 { "(bad)", { XX } }, 1712 { "sarA", { Eb, Ib } }, 1713 }, 1714 /* GRP2S */ 1715 { 1716 { "rolQ", { Ev, Ib } }, 1717 { "rorQ", { Ev, Ib } }, 1718 { "rclQ", { Ev, Ib } }, 1719 { "rcrQ", { Ev, Ib } }, 1720 { "shlQ", { Ev, Ib } }, 1721 { "shrQ", { Ev, Ib } }, 1722 { "(bad)", { XX } }, 1723 { "sarQ", { Ev, Ib } }, 1724 }, 1725 /* GRP2b_one */ 1726 { 1727 { "rolA", { Eb, I1 } }, 1728 { "rorA", { Eb, I1 } }, 1729 { "rclA", { Eb, I1 } }, 1730 { "rcrA", { Eb, I1 } }, 1731 { "shlA", { Eb, I1 } }, 1732 { "shrA", { Eb, I1 } }, 1733 { "(bad)", { XX } }, 1734 { "sarA", { Eb, I1 } }, 1735 }, 1736 /* GRP2S_one */ 1737 { 1738 { "rolQ", { Ev, I1 } }, 1739 { "rorQ", { Ev, I1 } }, 1740 { "rclQ", { Ev, I1 } }, 1741 { "rcrQ", { Ev, I1 } }, 1742 { "shlQ", { Ev, I1 } }, 1743 { "shrQ", { Ev, I1 } }, 1744 { "(bad)", { XX } }, 1745 { "sarQ", { Ev, I1 } }, 1746 }, 1747 /* GRP2b_cl */ 1748 { 1749 { "rolA", { Eb, CL } }, 1750 { "rorA", { Eb, CL } }, 1751 { "rclA", { Eb, CL } }, 1752 { "rcrA", { Eb, CL } }, 1753 { "shlA", { Eb, CL } }, 1754 { "shrA", { Eb, CL } }, 1755 { "(bad)", { XX } }, 1756 { "sarA", { Eb, CL } }, 1757 }, 1758 /* GRP2S_cl */ 1759 { 1760 { "rolQ", { Ev, CL } }, 1761 { "rorQ", { Ev, CL } }, 1762 { "rclQ", { Ev, CL } }, 1763 { "rcrQ", { Ev, CL } }, 1764 { "shlQ", { Ev, CL } }, 1765 { "shrQ", { Ev, CL } }, 1766 { "(bad)", { XX } }, 1767 { "sarQ", { Ev, CL } }, 1768 }, 1769 /* GRP3b */ 1770 { 1771 { "testA", { Eb, Ib } }, 1772 { "(bad)", { Eb } }, 1773 { "notA", { Eb } }, 1774 { "negA", { Eb } }, 1775 { "mulA", { Eb } }, /* Don't print the implicit %al register, */ 1776 { "imulA", { Eb } }, /* to distinguish these opcodes from other */ 1777 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */ 1778 { "idivA", { Eb } }, /* and idiv for consistency. */ 1779 }, 1780 /* GRP3S */ 1781 { 1782 { "testQ", { Ev, Iv } }, 1783 { "(bad)", { XX } }, 1784 { "notQ", { Ev } }, 1785 { "negQ", { Ev } }, 1786 { "mulQ", { Ev } }, /* Don't print the implicit register. */ 1787 { "imulQ", { Ev } }, 1788 { "divQ", { Ev } }, 1789 { "idivQ", { Ev } }, 1790 }, 1791 /* GRP4 */ 1792 { 1793 { "incA", { Eb } }, 1794 { "decA", { Eb } }, 1795 { "(bad)", { XX } }, 1796 { "(bad)", { XX } }, 1797 { "(bad)", { XX } }, 1798 { "(bad)", { XX } }, 1799 { "(bad)", { XX } }, 1800 { "(bad)", { XX } }, 1801 }, 1802 /* GRP5 */ 1803 { 1804 { "incQ", { Ev } }, 1805 { "decQ", { Ev } }, 1806 { "callT", { indirEv } }, 1807 { "JcallT", { indirEp } }, 1808 { "jmpT", { indirEv } }, 1809 { "JjmpT", { indirEp } }, 1810 { "pushU", { stackEv } }, 1811 { "(bad)", { XX } }, 1812 }, 1813 /* GRP6 */ 1814 { 1815 { "sldtD", { Sv } }, 1816 { "strD", { Sv } }, 1817 { "lldt", { Ew } }, 1818 { "ltr", { Ew } }, 1819 { "verr", { Ew } }, 1820 { "verw", { Ew } }, 1821 { "(bad)", { XX } }, 1822 { "(bad)", { XX } }, 1823 }, 1824 /* GRP7 */ 1825 { 1826 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } }, 1827 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } }, 1828 { "lgdt{Q|Q||}", { M } }, 1829 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } }, 1830 { "smswD", { Sv } }, 1831 { "(bad)", { XX } }, 1832 { "lmsw", { Ew } }, 1833 { "invlpg", { { INVLPG_Fixup, w_mode } } }, 1834 }, 1835 /* GRP8 */ 1836 { 1837 { "(bad)", { XX } }, 1838 { "(bad)", { XX } }, 1839 { "(bad)", { XX } }, 1840 { "(bad)", { XX } }, 1841 { "btQ", { Ev, Ib } }, 1842 { "btsQ", { Ev, Ib } }, 1843 { "btrQ", { Ev, Ib } }, 1844 { "btcQ", { Ev, Ib } }, 1845 }, 1846 /* GRP9 */ 1847 { 1848 { "(bad)", { XX } }, 1849 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } }, 1850 { "(bad)", { XX } }, 1851 { "(bad)", { XX } }, 1852 { "(bad)", { XX } }, 1853 { "(bad)", { XX } }, 1854 { "", { VM } }, /* See OP_VMX. */ 1855 { "vmptrst", { Mq } }, 1856 }, 1857 /* GRP11_C6 */ 1858 { 1859 { "movA", { Eb, Ib } }, 1860 { "(bad)", { XX } }, 1861 { "(bad)", { XX } }, 1862 { "(bad)", { XX } }, 1863 { "(bad)", { XX } }, 1864 { "(bad)", { XX } }, 1865 { "(bad)", { XX } }, 1866 { "(bad)", { XX } }, 1867 }, 1868 /* GRP11_C7 */ 1869 { 1870 { "movQ", { Ev, Iv } }, 1871 { "(bad)", { XX } }, 1872 { "(bad)", { XX } }, 1873 { "(bad)", { XX } }, 1874 { "(bad)", { XX } }, 1875 { "(bad)", { XX } }, 1876 { "(bad)", { XX } }, 1877 { "(bad)", { XX } }, 1878 }, 1879 /* GRP12 */ 1880 { 1881 { "(bad)", { XX } }, 1882 { "(bad)", { XX } }, 1883 { "psrlw", { MS, Ib } }, 1884 { "(bad)", { XX } }, 1885 { "psraw", { MS, Ib } }, 1886 { "(bad)", { XX } }, 1887 { "psllw", { MS, Ib } }, 1888 { "(bad)", { XX } }, 1889 }, 1890 /* GRP13 */ 1891 { 1892 { "(bad)", { XX } }, 1893 { "(bad)", { XX } }, 1894 { "psrld", { MS, Ib } }, 1895 { "(bad)", { XX } }, 1896 { "psrad", { MS, Ib } }, 1897 { "(bad)", { XX } }, 1898 { "pslld", { MS, Ib } }, 1899 { "(bad)", { XX } }, 1900 }, 1901 /* GRP14 */ 1902 { 1903 { "(bad)", { XX } }, 1904 { "(bad)", { XX } }, 1905 { "psrlq", { MS, Ib } }, 1906 { "psrldq", { MS, Ib } }, 1907 { "(bad)", { XX } }, 1908 { "(bad)", { XX } }, 1909 { "psllq", { MS, Ib } }, 1910 { "pslldq", { MS, Ib } }, 1911 }, 1912 /* GRP15 */ 1913 { 1914 { "fxsave", { Ev } }, 1915 { "fxrstor", { Ev } }, 1916 { "ldmxcsr", { Ev } }, 1917 { "stmxcsr", { Ev } }, 1918 { "(bad)", { XX } }, 1919 { "lfence", { { OP_0fae, 0 } } }, 1920 { "mfence", { { OP_0fae, 0 } } }, 1921 { "clflush", { { OP_0fae, 0 } } }, 1922 }, 1923 /* GRP16 */ 1924 { 1925 { "prefetchnta", { Ev } }, 1926 { "prefetcht0", { Ev } }, 1927 { "prefetcht1", { Ev } }, 1928 { "prefetcht2", { Ev } }, 1929 { "(bad)", { XX } }, 1930 { "(bad)", { XX } }, 1931 { "(bad)", { XX } }, 1932 { "(bad)", { XX } }, 1933 }, 1934 /* GRPAMD */ 1935 { 1936 { "prefetch", { Eb } }, 1937 { "prefetchw", { Eb } }, 1938 { "(bad)", { XX } }, 1939 { "(bad)", { XX } }, 1940 { "(bad)", { XX } }, 1941 { "(bad)", { XX } }, 1942 { "(bad)", { XX } }, 1943 { "(bad)", { XX } }, 1944 }, 1945 /* GRPPADLCK1 */ 1946 { 1947 { "xstore-rng", { { OP_0f07, 0 } } }, 1948 { "xcrypt-ecb", { { OP_0f07, 0 } } }, 1949 { "xcrypt-cbc", { { OP_0f07, 0 } } }, 1950 { "xcrypt-ctr", { { OP_0f07, 0 } } }, 1951 { "xcrypt-cfb", { { OP_0f07, 0 } } }, 1952 { "xcrypt-ofb", { { OP_0f07, 0 } } }, 1953 { "(bad)", { { OP_0f07, 0 } } }, 1954 { "(bad)", { { OP_0f07, 0 } } }, 1955 }, 1956 /* GRPPADLCK2 */ 1957 { 1958 { "montmul", { { OP_0f07, 0 } } }, 1959 { "xsha1", { { OP_0f07, 0 } } }, 1960 { "xsha256", { { OP_0f07, 0 } } }, 1961 { "(bad)", { { OP_0f07, 0 } } }, 1962 { "(bad)", { { OP_0f07, 0 } } }, 1963 { "(bad)", { { OP_0f07, 0 } } }, 1964 { "(bad)", { { OP_0f07, 0 } } }, 1965 { "(bad)", { { OP_0f07, 0 } } }, 1966 } 1967}; 1968 1969static const struct dis386 prefix_user_table[][4] = { 1970 /* PREGRP0 */ 1971 { 1972 { "addps", { XM, EXx } }, 1973 { "addss", { XM, EXd } }, 1974 { "addpd", { XM, EXx } }, 1975 { "addsd", { XM, EXq } }, 1976 }, 1977 /* PREGRP1 */ 1978 { 1979 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */ 1980 { "", { XM, EXx, OPSIMD } }, 1981 { "", { XM, EXx, OPSIMD } }, 1982 { "", { XM, EXx, OPSIMD } }, 1983 }, 1984 /* PREGRP2 */ 1985 { 1986 { "cvtpi2ps", { XM, EMC } }, 1987 { "cvtsi2ssY", { XM, Ev } }, 1988 { "cvtpi2pd", { XM, EMC } }, 1989 { "cvtsi2sdY", { XM, Ev } }, 1990 }, 1991 /* PREGRP3 */ 1992 { 1993 { "cvtps2pi", { MXC, EXx } }, 1994 { "cvtss2siY", { Gv, EXx } }, 1995 { "cvtpd2pi", { MXC, EXx } }, 1996 { "cvtsd2siY", { Gv, EXx } }, 1997 }, 1998 /* PREGRP4 */ 1999 { 2000 { "cvttps2pi", { MXC, EXx } }, 2001 { "cvttss2siY", { Gv, EXx } }, 2002 { "cvttpd2pi", { MXC, EXx } }, 2003 { "cvttsd2siY", { Gv, EXx } }, 2004 }, 2005 /* PREGRP5 */ 2006 { 2007 { "divps", { XM, EXx } }, 2008 { "divss", { XM, EXx } }, 2009 { "divpd", { XM, EXx } }, 2010 { "divsd", { XM, EXx } }, 2011 }, 2012 /* PREGRP6 */ 2013 { 2014 { "maxps", { XM, EXx } }, 2015 { "maxss", { XM, EXx } }, 2016 { "maxpd", { XM, EXx } }, 2017 { "maxsd", { XM, EXx } }, 2018 }, 2019 /* PREGRP7 */ 2020 { 2021 { "minps", { XM, EXx } }, 2022 { "minss", { XM, EXx } }, 2023 { "minpd", { XM, EXx } }, 2024 { "minsd", { XM, EXx } }, 2025 }, 2026 /* PREGRP8 */ 2027 { 2028 { "movups", { XM, EXx } }, 2029 { "movss", { XM, EXx } }, 2030 { "movupd", { XM, EXx } }, 2031 { "movsd", { XM, EXx } }, 2032 }, 2033 /* PREGRP9 */ 2034 { 2035 { "movups", { EXx, XM } }, 2036 { "movss", { EXx, XM } }, 2037 { "movupd", { EXx, XM } }, 2038 { "movsd", { EXx, XM } }, 2039 }, 2040 /* PREGRP10 */ 2041 { 2042 { "mulps", { XM, EXx } }, 2043 { "mulss", { XM, EXx } }, 2044 { "mulpd", { XM, EXx } }, 2045 { "mulsd", { XM, EXx } }, 2046 }, 2047 /* PREGRP11 */ 2048 { 2049 { "rcpps", { XM, EXx } }, 2050 { "rcpss", { XM, EXx } }, 2051 { "(bad)", { XM, EXx } }, 2052 { "(bad)", { XM, EXx } }, 2053 }, 2054 /* PREGRP12 */ 2055 { 2056 { "rsqrtps",{ XM, EXx } }, 2057 { "rsqrtss",{ XM, EXx } }, 2058 { "(bad)", { XM, EXx } }, 2059 { "(bad)", { XM, EXx } }, 2060 }, 2061 /* PREGRP13 */ 2062 { 2063 { "sqrtps", { XM, EXx } }, 2064 { "sqrtss", { XM, EXx } }, 2065 { "sqrtpd", { XM, EXx } }, 2066 { "sqrtsd", { XM, EXx } }, 2067 }, 2068 /* PREGRP14 */ 2069 { 2070 { "subps", { XM, EXx } }, 2071 { "subss", { XM, EXx } }, 2072 { "subpd", { XM, EXx } }, 2073 { "subsd", { XM, EXx } }, 2074 }, 2075 /* PREGRP15 */ 2076 { 2077 { "(bad)", { XM, EXx } }, 2078 { "cvtdq2pd", { XM, EXq } }, 2079 { "cvttpd2dq", { XM, EXx } }, 2080 { "cvtpd2dq", { XM, EXx } }, 2081 }, 2082 /* PREGRP16 */ 2083 { 2084 { "cvtdq2ps", { XM, EXx } }, 2085 { "cvttps2dq", { XM, EXx } }, 2086 { "cvtps2dq", { XM, EXx } }, 2087 { "(bad)", { XM, EXx } }, 2088 }, 2089 /* PREGRP17 */ 2090 { 2091 { "cvtps2pd", { XM, EXq } }, 2092 { "cvtss2sd", { XM, EXx } }, 2093 { "cvtpd2ps", { XM, EXx } }, 2094 { "cvtsd2ss", { XM, EXx } }, 2095 }, 2096 /* PREGRP18 */ 2097 { 2098 { "maskmovq", { MX, MS } }, 2099 { "(bad)", { XM, EXx } }, 2100 { "maskmovdqu", { XM, XS } }, 2101 { "(bad)", { XM, EXx } }, 2102 }, 2103 /* PREGRP19 */ 2104 { 2105 { "movq", { MX, EM } }, 2106 { "movdqu", { XM, EXx } }, 2107 { "movdqa", { XM, EXx } }, 2108 { "(bad)", { XM, EXx } }, 2109 }, 2110 /* PREGRP20 */ 2111 { 2112 { "movq", { EM, MX } }, 2113 { "movdqu", { EXx, XM } }, 2114 { "movdqa", { EXx, XM } }, 2115 { "(bad)", { EXx, XM } }, 2116 }, 2117 /* PREGRP21 */ 2118 { 2119 { "(bad)", { EXx, XM } }, 2120 { "movq2dq",{ XM, MS } }, 2121 { "movq", { EXx, XM } }, 2122 { "movdq2q",{ MX, XS } }, 2123 }, 2124 /* PREGRP22 */ 2125 { 2126 { "pshufw", { MX, EM, Ib } }, 2127 { "pshufhw",{ XM, EXx, Ib } }, 2128 { "pshufd", { XM, EXx, Ib } }, 2129 { "pshuflw",{ XM, EXx, Ib } }, 2130 }, 2131 /* PREGRP23 */ 2132 { 2133 { "movd", { Edq, MX } }, 2134 { "movq", { XM, EXx } }, 2135 { "movd", { Edq, XM } }, 2136 { "(bad)", { Ed, XM } }, 2137 }, 2138 /* PREGRP24 */ 2139 { 2140 { "(bad)", { MX, EXx } }, 2141 { "(bad)", { XM, EXx } }, 2142 { "punpckhqdq", { XM, EXx } }, 2143 { "(bad)", { XM, EXx } }, 2144 }, 2145 /* PREGRP25 */ 2146 { 2147 { "movntq", { EM, MX } }, 2148 { "(bad)", { EM, XM } }, 2149 { "movntdq",{ EM, XM } }, 2150 { "(bad)", { EM, XM } }, 2151 }, 2152 /* PREGRP26 */ 2153 { 2154 { "(bad)", { MX, EXx } }, 2155 { "(bad)", { XM, EXx } }, 2156 { "punpcklqdq", { XM, EXx } }, 2157 { "(bad)", { XM, EXx } }, 2158 }, 2159 /* PREGRP27 */ 2160 { 2161 { "(bad)", { MX, EXx } }, 2162 { "(bad)", { XM, EXx } }, 2163 { "addsubpd", { XM, EXx } }, 2164 { "addsubps", { XM, EXx } }, 2165 }, 2166 /* PREGRP28 */ 2167 { 2168 { "(bad)", { MX, EXx } }, 2169 { "(bad)", { XM, EXx } }, 2170 { "haddpd", { XM, EXx } }, 2171 { "haddps", { XM, EXx } }, 2172 }, 2173 /* PREGRP29 */ 2174 { 2175 { "(bad)", { MX, EXx } }, 2176 { "(bad)", { XM, EXx } }, 2177 { "hsubpd", { XM, EXx } }, 2178 { "hsubps", { XM, EXx } }, 2179 }, 2180 /* PREGRP30 */ 2181 { 2182 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */ 2183 { "movsldup", { XM, EXx } }, 2184 { "movlpd", { XM, EXq } }, 2185 { "movddup", { XM, EXq } }, 2186 }, 2187 /* PREGRP31 */ 2188 { 2189 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } }, 2190 { "movshdup", { XM, EXx } }, 2191 { "movhpd", { XM, EXq } }, 2192 { "(bad)", { XM, EXq } }, 2193 }, 2194 /* PREGRP32 */ 2195 { 2196 { "(bad)", { XM, EXx } }, 2197 { "(bad)", { XM, EXx } }, 2198 { "(bad)", { XM, EXx } }, 2199 { "lddqu", { XM, M } }, 2200 }, 2201 /* PREGRP33 */ 2202 { 2203 {"movntps", { Ev, XM } }, 2204 {"movntss", { Ev, XM } }, 2205 {"movntpd", { Ev, XM } }, 2206 {"movntsd", { Ev, XM } }, 2207 }, 2208 2209 /* PREGRP34 */ 2210 { 2211 {"vmread", { Em, Gm } }, 2212 {"(bad)", { XX } }, 2213 {"extrq", { XS, Ib, Ib } }, 2214 {"insertq", { XM, XS, Ib, Ib } }, 2215 }, 2216 2217 /* PREGRP35 */ 2218 { 2219 {"vmwrite", { Gm, Em } }, 2220 {"(bad)", { XX } }, 2221 {"extrq", { XM, XS } }, 2222 {"insertq", { XM, XS } }, 2223 }, 2224 2225 /* PREGRP36 */ 2226 { 2227 { "bsrS", { Gv, Ev } }, 2228 { "lzcntS", { Gv, Ev } }, 2229 { "bsrS", { Gv, Ev } }, 2230 { "(bad)", { XX } }, 2231 }, 2232 2233 /* PREGRP37 */ 2234 { 2235 { "(bad)", { XX } }, 2236 { "popcntS", { Gv, Ev } }, 2237 { "(bad)", { XX } }, 2238 { "(bad)", { XX } }, 2239 }, 2240 2241 /* PREGRP38 */ 2242 { 2243 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } }, 2244 { "pause", { XX } }, 2245 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } }, 2246 { "(bad)", { XX } }, 2247 }, 2248 2249 /* PREGRP39 */ 2250 { 2251 { "(bad)", { XX } }, 2252 { "(bad)", { XX } }, 2253 { "pblendvb", {XM, EXx, XMM0 } }, 2254 { "(bad)", { XX } }, 2255 }, 2256 2257 /* PREGRP40 */ 2258 { 2259 { "(bad)", { XX } }, 2260 { "(bad)", { XX } }, 2261 { "blendvps", {XM, EXx, XMM0 } }, 2262 { "(bad)", { XX } }, 2263 }, 2264 2265 /* PREGRP41 */ 2266 { 2267 { "(bad)", { XX } }, 2268 { "(bad)", { XX } }, 2269 { "blendvpd", { XM, EXx, XMM0 } }, 2270 { "(bad)", { XX } }, 2271 }, 2272 2273 /* PREGRP42 */ 2274 { 2275 { "(bad)", { XX } }, 2276 { "(bad)", { XX } }, 2277 { "ptest", { XM, EXx } }, 2278 { "(bad)", { XX } }, 2279 }, 2280 2281 /* PREGRP43 */ 2282 { 2283 { "(bad)", { XX } }, 2284 { "(bad)", { XX } }, 2285 { "pmovsxbw", { XM, EXx } }, 2286 { "(bad)", { XX } }, 2287 }, 2288 2289 /* PREGRP44 */ 2290 { 2291 { "(bad)", { XX } }, 2292 { "(bad)", { XX } }, 2293 { "pmovsxbd", { XM, EXx } }, 2294 { "(bad)", { XX } }, 2295 }, 2296 2297 /* PREGRP45 */ 2298 { 2299 { "(bad)", { XX } }, 2300 { "(bad)", { XX } }, 2301 { "pmovsxbq", { XM, EXx } }, 2302 { "(bad)", { XX } }, 2303 }, 2304 2305 /* PREGRP46 */ 2306 { 2307 { "(bad)", { XX } }, 2308 { "(bad)", { XX } }, 2309 { "pmovsxwd", { XM, EXx } }, 2310 { "(bad)", { XX } }, 2311 }, 2312 2313 /* PREGRP47 */ 2314 { 2315 { "(bad)", { XX } }, 2316 { "(bad)", { XX } }, 2317 { "pmovsxwq", { XM, EXx } }, 2318 { "(bad)", { XX } }, 2319 }, 2320 2321 /* PREGRP48 */ 2322 { 2323 { "(bad)", { XX } }, 2324 { "(bad)", { XX } }, 2325 { "pmovsxdq", { XM, EXx } }, 2326 { "(bad)", { XX } }, 2327 }, 2328 2329 /* PREGRP49 */ 2330 { 2331 { "(bad)", { XX } }, 2332 { "(bad)", { XX } }, 2333 { "pmuldq", { XM, EXx } }, 2334 { "(bad)", { XX } }, 2335 }, 2336 2337 /* PREGRP50 */ 2338 { 2339 { "(bad)", { XX } }, 2340 { "(bad)", { XX } }, 2341 { "pcmpeqq", { XM, EXx } }, 2342 { "(bad)", { XX } }, 2343 }, 2344 2345 /* PREGRP51 */ 2346 { 2347 { "(bad)", { XX } }, 2348 { "(bad)", { XX } }, 2349 { "movntdqa", { XM, EM } }, 2350 { "(bad)", { XX } }, 2351 }, 2352 2353 /* PREGRP52 */ 2354 { 2355 { "(bad)", { XX } }, 2356 { "(bad)", { XX } }, 2357 { "packusdw", { XM, EXx } }, 2358 { "(bad)", { XX } }, 2359 }, 2360 2361 /* PREGRP53 */ 2362 { 2363 { "(bad)", { XX } }, 2364 { "(bad)", { XX } }, 2365 { "pmovzxbw", { XM, EXx } }, 2366 { "(bad)", { XX } }, 2367 }, 2368 2369 /* PREGRP54 */ 2370 { 2371 { "(bad)", { XX } }, 2372 { "(bad)", { XX } }, 2373 { "pmovzxbd", { XM, EXx } }, 2374 { "(bad)", { XX } }, 2375 }, 2376 2377 /* PREGRP55 */ 2378 { 2379 { "(bad)", { XX } }, 2380 { "(bad)", { XX } }, 2381 { "pmovzxbq", { XM, EXx } }, 2382 { "(bad)", { XX } }, 2383 }, 2384 2385 /* PREGRP56 */ 2386 { 2387 { "(bad)", { XX } }, 2388 { "(bad)", { XX } }, 2389 { "pmovzxwd", { XM, EXx } }, 2390 { "(bad)", { XX } }, 2391 }, 2392 2393 /* PREGRP57 */ 2394 { 2395 { "(bad)", { XX } }, 2396 { "(bad)", { XX } }, 2397 { "pmovzxwq", { XM, EXx } }, 2398 { "(bad)", { XX } }, 2399 }, 2400 2401 /* PREGRP58 */ 2402 { 2403 { "(bad)", { XX } }, 2404 { "(bad)", { XX } }, 2405 { "pmovzxdq", { XM, EXx } }, 2406 { "(bad)", { XX } }, 2407 }, 2408 2409 /* PREGRP59 */ 2410 { 2411 { "(bad)", { XX } }, 2412 { "(bad)", { XX } }, 2413 { "pminsb", { XM, EXx } }, 2414 { "(bad)", { XX } }, 2415 }, 2416 2417 /* PREGRP60 */ 2418 { 2419 { "(bad)", { XX } }, 2420 { "(bad)", { XX } }, 2421 { "pminsd", { XM, EXx } }, 2422 { "(bad)", { XX } }, 2423 }, 2424 2425 /* PREGRP61 */ 2426 { 2427 { "(bad)", { XX } }, 2428 { "(bad)", { XX } }, 2429 { "pminuw", { XM, EXx } }, 2430 { "(bad)", { XX } }, 2431 }, 2432 2433 /* PREGRP62 */ 2434 { 2435 { "(bad)", { XX } }, 2436 { "(bad)", { XX } }, 2437 { "pminud", { XM, EXx } }, 2438 { "(bad)", { XX } }, 2439 }, 2440 2441 /* PREGRP63 */ 2442 { 2443 { "(bad)", { XX } }, 2444 { "(bad)", { XX } }, 2445 { "pmaxsb", { XM, EXx } }, 2446 { "(bad)", { XX } }, 2447 }, 2448 2449 /* PREGRP64 */ 2450 { 2451 { "(bad)", { XX } }, 2452 { "(bad)", { XX } }, 2453 { "pmaxsd", { XM, EXx } }, 2454 { "(bad)", { XX } }, 2455 }, 2456 2457 /* PREGRP65 */ 2458 { 2459 { "(bad)", { XX } }, 2460 { "(bad)", { XX } }, 2461 { "pmaxuw", { XM, EXx } }, 2462 { "(bad)", { XX } }, 2463 }, 2464 2465 /* PREGRP66 */ 2466 { 2467 { "(bad)", { XX } }, 2468 { "(bad)", { XX } }, 2469 { "pmaxud", { XM, EXx } }, 2470 { "(bad)", { XX } }, 2471 }, 2472 2473 /* PREGRP67 */ 2474 { 2475 { "(bad)", { XX } }, 2476 { "(bad)", { XX } }, 2477 { "pmulld", { XM, EXx } }, 2478 { "(bad)", { XX } }, 2479 }, 2480 2481 /* PREGRP68 */ 2482 { 2483 { "(bad)", { XX } }, 2484 { "(bad)", { XX } }, 2485 { "phminposuw", { XM, EXx } }, 2486 { "(bad)", { XX } }, 2487 }, 2488 2489 /* PREGRP69 */ 2490 { 2491 { "(bad)", { XX } }, 2492 { "(bad)", { XX } }, 2493 { "roundps", { XM, EXx, Ib } }, 2494 { "(bad)", { XX } }, 2495 }, 2496 2497 /* PREGRP70 */ 2498 { 2499 { "(bad)", { XX } }, 2500 { "(bad)", { XX } }, 2501 { "roundpd", { XM, EXx, Ib } }, 2502 { "(bad)", { XX } }, 2503 }, 2504 2505 /* PREGRP71 */ 2506 { 2507 { "(bad)", { XX } }, 2508 { "(bad)", { XX } }, 2509 { "roundss", { XM, EXx, Ib } }, 2510 { "(bad)", { XX } }, 2511 }, 2512 2513 /* PREGRP72 */ 2514 { 2515 { "(bad)", { XX } }, 2516 { "(bad)", { XX } }, 2517 { "roundsd", { XM, EXx, Ib } }, 2518 { "(bad)", { XX } }, 2519 }, 2520 2521 /* PREGRP73 */ 2522 { 2523 { "(bad)", { XX } }, 2524 { "(bad)", { XX } }, 2525 { "blendps", { XM, EXx, Ib } }, 2526 { "(bad)", { XX } }, 2527 }, 2528 2529 /* PREGRP74 */ 2530 { 2531 { "(bad)", { XX } }, 2532 { "(bad)", { XX } }, 2533 { "blendpd", { XM, EXx, Ib } }, 2534 { "(bad)", { XX } }, 2535 }, 2536 2537 /* PREGRP75 */ 2538 { 2539 { "(bad)", { XX } }, 2540 { "(bad)", { XX } }, 2541 { "pblendw", { XM, EXx, Ib } }, 2542 { "(bad)", { XX } }, 2543 }, 2544 2545 /* PREGRP76 */ 2546 { 2547 { "(bad)", { XX } }, 2548 { "(bad)", { XX } }, 2549 { "pextrb", { Edqb, XM, Ib } }, 2550 { "(bad)", { XX } }, 2551 }, 2552 2553 /* PREGRP77 */ 2554 { 2555 { "(bad)", { XX } }, 2556 { "(bad)", { XX } }, 2557 { "pextrw", { Edqw, XM, Ib } }, 2558 { "(bad)", { XX } }, 2559 }, 2560 2561 /* PREGRP78 */ 2562 { 2563 { "(bad)", { XX } }, 2564 { "(bad)", { XX } }, 2565 { "pextrK", { Edq, XM, Ib } }, 2566 { "(bad)", { XX } }, 2567 }, 2568 2569 /* PREGRP79 */ 2570 { 2571 { "(bad)", { XX } }, 2572 { "(bad)", { XX } }, 2573 { "extractps", { Edqd, XM, Ib } }, 2574 { "(bad)", { XX } }, 2575 }, 2576 2577 /* PREGRP80 */ 2578 { 2579 { "(bad)", { XX } }, 2580 { "(bad)", { XX } }, 2581 { "pinsrb", { XM, Edqb, Ib } }, 2582 { "(bad)", { XX } }, 2583 }, 2584 2585 /* PREGRP81 */ 2586 { 2587 { "(bad)", { XX } }, 2588 { "(bad)", { XX } }, 2589 { "insertps", { XM, EXx, Ib } }, 2590 { "(bad)", { XX } }, 2591 }, 2592 2593 /* PREGRP82 */ 2594 { 2595 { "(bad)", { XX } }, 2596 { "(bad)", { XX } }, 2597 { "pinsrK", { XM, Edq, Ib } }, 2598 { "(bad)", { XX } }, 2599 }, 2600 2601 /* PREGRP83 */ 2602 { 2603 { "(bad)", { XX } }, 2604 { "(bad)", { XX } }, 2605 { "dpps", { XM, EXx, Ib } }, 2606 { "(bad)", { XX } }, 2607 }, 2608 2609 /* PREGRP84 */ 2610 { 2611 { "(bad)", { XX } }, 2612 { "(bad)", { XX } }, 2613 { "dppd", { XM, EXx, Ib } }, 2614 { "(bad)", { XX } }, 2615 }, 2616 2617 /* PREGRP85 */ 2618 { 2619 { "(bad)", { XX } }, 2620 { "(bad)", { XX } }, 2621 { "mpsadbw", { XM, EXx, Ib } }, 2622 { "(bad)", { XX } }, 2623 }, 2624 2625 /* PREGRP86 */ 2626 { 2627 { "(bad)", { XX } }, 2628 { "(bad)", { XX } }, 2629 { "pcmpgtq", { XM, EXx } }, 2630 { "(bad)", { XX } }, 2631 }, 2632 2633 /* PREGRP87 */ 2634 { 2635 { "(bad)", { XX } }, 2636 { "(bad)", { XX } }, 2637 { "(bad)", { XX } }, 2638 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } }, 2639 }, 2640 2641 /* PREGRP88 */ 2642 { 2643 { "(bad)", { XX } }, 2644 { "(bad)", { XX } }, 2645 { "(bad)", { XX } }, 2646 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } }, 2647 }, 2648 2649 /* PREGRP89 */ 2650 { 2651 { "(bad)", { XX } }, 2652 { "(bad)", { XX } }, 2653 { "pcmpestrm", { XM, EXx, Ib } }, 2654 { "(bad)", { XX } }, 2655 }, 2656 2657 /* PREGRP90 */ 2658 { 2659 { "(bad)", { XX } }, 2660 { "(bad)", { XX } }, 2661 { "pcmpestri", { XM, EXx, Ib } }, 2662 { "(bad)", { XX } }, 2663 }, 2664 2665 /* PREGRP91 */ 2666 { 2667 { "(bad)", { XX } }, 2668 { "(bad)", { XX } }, 2669 { "pcmpistrm", { XM, EXx, Ib } }, 2670 { "(bad)", { XX } }, 2671 }, 2672 2673 /* PREGRP92 */ 2674 { 2675 { "(bad)", { XX } }, 2676 { "(bad)", { XX } }, 2677 { "pcmpistri", { XM, EXx, Ib } }, 2678 { "(bad)", { XX } }, 2679 }, 2680 2681 /* PREGRP93 */ 2682 { 2683 { "ucomiss",{ XM, EXd } }, 2684 { "(bad)", { XX } }, 2685 { "ucomisd",{ XM, EXq } }, 2686 { "(bad)", { XX } }, 2687 }, 2688 2689 /* PREGRP94 */ 2690 { 2691 { "comiss", { XM, EXd } }, 2692 { "(bad)", { XX } }, 2693 { "comisd", { XM, EXq } }, 2694 { "(bad)", { XX } }, 2695 }, 2696 2697 /* PREGRP95 */ 2698 { 2699 { "punpcklbw",{ MX, EMd } }, 2700 { "(bad)", { XX } }, 2701 { "punpcklbw",{ MX, EMq } }, 2702 { "(bad)", { XX } }, 2703 }, 2704 2705 /* PREGRP96 */ 2706 { 2707 { "punpcklwd",{ MX, EMd } }, 2708 { "(bad)", { XX } }, 2709 { "punpcklwd",{ MX, EMq } }, 2710 { "(bad)", { XX } }, 2711 }, 2712 2713 /* PREGRP97 */ 2714 { 2715 { "punpckldq",{ MX, EMd } }, 2716 { "(bad)", { XX } }, 2717 { "punpckldq",{ MX, EMq } }, 2718 { "(bad)", { XX } }, 2719 }, 2720 2721 /* PREGRP98 */ 2722 { 2723 { "(bad)", { XX } }, 2724 { "(bad)", { XX } }, 2725 { "pclmulqdq", { XM, EXx, Ib } }, 2726 { "(bad)", { XX } }, 2727 }, 2728 2729 /* PREGRP99 */ 2730 { 2731 { "(bad)", { XX } }, 2732 { "(bad)", { XX } }, 2733 { "aesimc", { XM, EXx } }, 2734 { "(bad)", { XX } }, 2735 }, 2736 2737 /* PREGRP100 */ 2738 { 2739 { "(bad)", { XX } }, 2740 { "(bad)", { XX } }, 2741 { "aesenc", { XM, EXx } }, 2742 { "(bad)", { XX } }, 2743 }, 2744 2745 /* PREGRP101 */ 2746 { 2747 { "(bad)", { XX } }, 2748 { "(bad)", { XX } }, 2749 { "aesenclast", { XM, EXx } }, 2750 { "(bad)", { XX } }, 2751 }, 2752 2753 /* PREGRP102 */ 2754 { 2755 { "(bad)", { XX } }, 2756 { "(bad)", { XX } }, 2757 { "aesdec", { XM, EXx } }, 2758 { "(bad)", { XX } }, 2759 }, 2760 2761 /* PREGRP103 */ 2762 { 2763 { "(bad)", { XX } }, 2764 { "(bad)", { XX } }, 2765 { "aesdeclast", { XM, EXx } }, 2766 { "(bad)", { XX } }, 2767 }, 2768 2769 /* PREGRP104 */ 2770 { 2771 { "(bad)", { XX } }, 2772 { "(bad)", { XX } }, 2773 { "aeskeygenassist", { XM, EXx, Ib } }, 2774 { "(bad)", { XX } }, 2775 }, 2776 2777}; 2778 2779static const struct dis386 x86_64_table[][2] = { 2780 { 2781 { "pusha{P|}", { XX } }, 2782 { "(bad)", { XX } }, 2783 }, 2784 { 2785 { "popa{P|}", { XX } }, 2786 { "(bad)", { XX } }, 2787 }, 2788 { 2789 { "bound{S|}", { Gv, Ma } }, 2790 { "(bad)", { XX } }, 2791 }, 2792 { 2793 { "arpl", { Ew, Gw } }, 2794 { "movs{||lq|xd}", { Gv, Ed } }, 2795 }, 2796}; 2797 2798static const struct dis386 three_byte_table[][256] = { 2799 /* THREE_BYTE_0 */ 2800 { 2801 /* 00 */ 2802 { "pshufb", { MX, EM } }, 2803 { "phaddw", { MX, EM } }, 2804 { "phaddd", { MX, EM } }, 2805 { "phaddsw", { MX, EM } }, 2806 { "pmaddubsw", { MX, EM } }, 2807 { "phsubw", { MX, EM } }, 2808 { "phsubd", { MX, EM } }, 2809 { "phsubsw", { MX, EM } }, 2810 /* 08 */ 2811 { "psignb", { MX, EM } }, 2812 { "psignw", { MX, EM } }, 2813 { "psignd", { MX, EM } }, 2814 { "pmulhrsw", { MX, EM } }, 2815 { "(bad)", { XX } }, 2816 { "(bad)", { XX } }, 2817 { "(bad)", { XX } }, 2818 { "(bad)", { XX } }, 2819 /* 10 */ 2820 { PREGRP39 }, 2821 { "(bad)", { XX } }, 2822 { "(bad)", { XX } }, 2823 { "(bad)", { XX } }, 2824 { PREGRP40 }, 2825 { PREGRP41 }, 2826 { "(bad)", { XX } }, 2827 { PREGRP42 }, 2828 /* 18 */ 2829 { "(bad)", { XX } }, 2830 { "(bad)", { XX } }, 2831 { "(bad)", { XX } }, 2832 { "(bad)", { XX } }, 2833 { "pabsb", { MX, EM } }, 2834 { "pabsw", { MX, EM } }, 2835 { "pabsd", { MX, EM } }, 2836 { "(bad)", { XX } }, 2837 /* 20 */ 2838 { PREGRP43 }, 2839 { PREGRP44 }, 2840 { PREGRP45 }, 2841 { PREGRP46 }, 2842 { PREGRP47 }, 2843 { PREGRP48 }, 2844 { "(bad)", { XX } }, 2845 { "(bad)", { XX } }, 2846 /* 28 */ 2847 { PREGRP49 }, 2848 { PREGRP50 }, 2849 { PREGRP51 }, 2850 { PREGRP52 }, 2851 { "(bad)", { XX } }, 2852 { "(bad)", { XX } }, 2853 { "(bad)", { XX } }, 2854 { "(bad)", { XX } }, 2855 /* 30 */ 2856 { PREGRP53 }, 2857 { PREGRP54 }, 2858 { PREGRP55 }, 2859 { PREGRP56 }, 2860 { PREGRP57 }, 2861 { PREGRP58 }, 2862 { "(bad)", { XX } }, 2863 { PREGRP86 }, 2864 /* 38 */ 2865 { PREGRP59 }, 2866 { PREGRP60 }, 2867 { PREGRP61 }, 2868 { PREGRP62 }, 2869 { PREGRP63 }, 2870 { PREGRP64 }, 2871 { PREGRP65 }, 2872 { PREGRP66 }, 2873 /* 40 */ 2874 { PREGRP67 }, 2875 { PREGRP68 }, 2876 { "(bad)", { XX } }, 2877 { "(bad)", { XX } }, 2878 { "(bad)", { XX } }, 2879 { "(bad)", { XX } }, 2880 { "(bad)", { XX } }, 2881 { "(bad)", { XX } }, 2882 /* 48 */ 2883 { "(bad)", { XX } }, 2884 { "(bad)", { XX } }, 2885 { "(bad)", { XX } }, 2886 { "(bad)", { XX } }, 2887 { "(bad)", { XX } }, 2888 { "(bad)", { XX } }, 2889 { "(bad)", { XX } }, 2890 { "(bad)", { XX } }, 2891 /* 50 */ 2892 { "(bad)", { XX } }, 2893 { "(bad)", { XX } }, 2894 { "(bad)", { XX } }, 2895 { "(bad)", { XX } }, 2896 { "(bad)", { XX } }, 2897 { "(bad)", { XX } }, 2898 { "(bad)", { XX } }, 2899 { "(bad)", { XX } }, 2900 /* 58 */ 2901 { "(bad)", { XX } }, 2902 { "(bad)", { XX } }, 2903 { "(bad)", { XX } }, 2904 { "(bad)", { XX } }, 2905 { "(bad)", { XX } }, 2906 { "(bad)", { XX } }, 2907 { "(bad)", { XX } }, 2908 { "(bad)", { XX } }, 2909 /* 60 */ 2910 { "(bad)", { XX } }, 2911 { "(bad)", { XX } }, 2912 { "(bad)", { XX } }, 2913 { "(bad)", { XX } }, 2914 { "(bad)", { XX } }, 2915 { "(bad)", { XX } }, 2916 { "(bad)", { XX } }, 2917 { "(bad)", { XX } }, 2918 /* 68 */ 2919 { "(bad)", { XX } }, 2920 { "(bad)", { XX } }, 2921 { "(bad)", { XX } }, 2922 { "(bad)", { XX } }, 2923 { "(bad)", { XX } }, 2924 { "(bad)", { XX } }, 2925 { "(bad)", { XX } }, 2926 { "(bad)", { XX } }, 2927 /* 70 */ 2928 { "(bad)", { XX } }, 2929 { "(bad)", { XX } }, 2930 { "(bad)", { XX } }, 2931 { "(bad)", { XX } }, 2932 { "(bad)", { XX } }, 2933 { "(bad)", { XX } }, 2934 { "(bad)", { XX } }, 2935 { "(bad)", { XX } }, 2936 /* 78 */ 2937 { "(bad)", { XX } }, 2938 { "(bad)", { XX } }, 2939 { "(bad)", { XX } }, 2940 { "(bad)", { XX } }, 2941 { "(bad)", { XX } }, 2942 { "(bad)", { XX } }, 2943 { "(bad)", { XX } }, 2944 { "(bad)", { XX } }, 2945 /* 80 */ 2946 { "(bad)", { XX } }, 2947 { "(bad)", { XX } }, 2948 { "(bad)", { XX } }, 2949 { "(bad)", { XX } }, 2950 { "(bad)", { XX } }, 2951 { "(bad)", { XX } }, 2952 { "(bad)", { XX } }, 2953 { "(bad)", { XX } }, 2954 /* 88 */ 2955 { "(bad)", { XX } }, 2956 { "(bad)", { XX } }, 2957 { "(bad)", { XX } }, 2958 { "(bad)", { XX } }, 2959 { "(bad)", { XX } }, 2960 { "(bad)", { XX } }, 2961 { "(bad)", { XX } }, 2962 { "(bad)", { XX } }, 2963 /* 90 */ 2964 { "(bad)", { XX } }, 2965 { "(bad)", { XX } }, 2966 { "(bad)", { XX } }, 2967 { "(bad)", { XX } }, 2968 { "(bad)", { XX } }, 2969 { "(bad)", { XX } }, 2970 { "(bad)", { XX } }, 2971 { "(bad)", { XX } }, 2972 /* 98 */ 2973 { "(bad)", { XX } }, 2974 { "(bad)", { XX } }, 2975 { "(bad)", { XX } }, 2976 { "(bad)", { XX } }, 2977 { "(bad)", { XX } }, 2978 { "(bad)", { XX } }, 2979 { "(bad)", { XX } }, 2980 { "(bad)", { XX } }, 2981 /* a0 */ 2982 { "(bad)", { XX } }, 2983 { "(bad)", { XX } }, 2984 { "(bad)", { XX } }, 2985 { "(bad)", { XX } }, 2986 { "(bad)", { XX } }, 2987 { "(bad)", { XX } }, 2988 { "(bad)", { XX } }, 2989 { "(bad)", { XX } }, 2990 /* a8 */ 2991 { "(bad)", { XX } }, 2992 { "(bad)", { XX } }, 2993 { "(bad)", { XX } }, 2994 { "(bad)", { XX } }, 2995 { "(bad)", { XX } }, 2996 { "(bad)", { XX } }, 2997 { "(bad)", { XX } }, 2998 { "(bad)", { XX } }, 2999 /* b0 */ 3000 { "(bad)", { XX } }, 3001 { "(bad)", { XX } }, 3002 { "(bad)", { XX } }, 3003 { "(bad)", { XX } }, 3004 { "(bad)", { XX } }, 3005 { "(bad)", { XX } }, 3006 { "(bad)", { XX } }, 3007 { "(bad)", { XX } }, 3008 /* b8 */ 3009 { "(bad)", { XX } }, 3010 { "(bad)", { XX } }, 3011 { "(bad)", { XX } }, 3012 { "(bad)", { XX } }, 3013 { "(bad)", { XX } }, 3014 { "(bad)", { XX } }, 3015 { "(bad)", { XX } }, 3016 { "(bad)", { XX } }, 3017 /* c0 */ 3018 { "(bad)", { XX } }, 3019 { "(bad)", { XX } }, 3020 { "(bad)", { XX } }, 3021 { "(bad)", { XX } }, 3022 { "(bad)", { XX } }, 3023 { "(bad)", { XX } }, 3024 { "(bad)", { XX } }, 3025 { "(bad)", { XX } }, 3026 /* c8 */ 3027 { "(bad)", { XX } }, 3028 { "(bad)", { XX } }, 3029 { "(bad)", { XX } }, 3030 { "(bad)", { XX } }, 3031 { "(bad)", { XX } }, 3032 { "(bad)", { XX } }, 3033 { "(bad)", { XX } }, 3034 { "(bad)", { XX } }, 3035 /* d0 */ 3036 { "(bad)", { XX } }, 3037 { "(bad)", { XX } }, 3038 { "(bad)", { XX } }, 3039 { "(bad)", { XX } }, 3040 { "(bad)", { XX } }, 3041 { "(bad)", { XX } }, 3042 { "(bad)", { XX } }, 3043 { "(bad)", { XX } }, 3044 /* d8 */ 3045 { "(bad)", { XX } }, 3046 { "(bad)", { XX } }, 3047 { "(bad)", { XX } }, 3048 { PREGRP99 }, 3049 { PREGRP100 }, 3050 { PREGRP101 }, 3051 { PREGRP102 }, 3052 { PREGRP103 }, 3053 /* e0 */ 3054 { "(bad)", { XX } }, 3055 { "(bad)", { XX } }, 3056 { "(bad)", { XX } }, 3057 { "(bad)", { XX } }, 3058 { "(bad)", { XX } }, 3059 { "(bad)", { XX } }, 3060 { "(bad)", { XX } }, 3061 { "(bad)", { XX } }, 3062 /* e8 */ 3063 { "(bad)", { XX } }, 3064 { "(bad)", { XX } }, 3065 { "(bad)", { XX } }, 3066 { "(bad)", { XX } }, 3067 { "(bad)", { XX } }, 3068 { "(bad)", { XX } }, 3069 { "(bad)", { XX } }, 3070 { "(bad)", { XX } }, 3071 /* f0 */ 3072 { PREGRP87 }, 3073 { PREGRP88 }, 3074 { "(bad)", { XX } }, 3075 { "(bad)", { XX } }, 3076 { "(bad)", { XX } }, 3077 { "(bad)", { XX } }, 3078 { "(bad)", { XX } }, 3079 { "(bad)", { XX } }, 3080 /* f8 */ 3081 { "(bad)", { XX } }, 3082 { "(bad)", { XX } }, 3083 { "(bad)", { XX } }, 3084 { "(bad)", { XX } }, 3085 { "(bad)", { XX } }, 3086 { "(bad)", { XX } }, 3087 { "(bad)", { XX } }, 3088 { "(bad)", { XX } }, 3089 }, 3090 /* THREE_BYTE_1 */ 3091 { 3092 /* 00 */ 3093 { "(bad)", { XX } }, 3094 { "(bad)", { XX } }, 3095 { "(bad)", { XX } }, 3096 { "(bad)", { XX } }, 3097 { "(bad)", { XX } }, 3098 { "(bad)", { XX } }, 3099 { "(bad)", { XX } }, 3100 { "(bad)", { XX } }, 3101 /* 08 */ 3102 { PREGRP69 }, 3103 { PREGRP70 }, 3104 { PREGRP71 }, 3105 { PREGRP72 }, 3106 { PREGRP73 }, 3107 { PREGRP74 }, 3108 { PREGRP75 }, 3109 { "palignr", { MX, EM, Ib } }, 3110 /* 10 */ 3111 { "(bad)", { XX } }, 3112 { "(bad)", { XX } }, 3113 { "(bad)", { XX } }, 3114 { "(bad)", { XX } }, 3115 { PREGRP76 }, 3116 { PREGRP77 }, 3117 { PREGRP78 }, 3118 { PREGRP79 }, 3119 /* 18 */ 3120 { "(bad)", { XX } }, 3121 { "(bad)", { XX } }, 3122 { "(bad)", { XX } }, 3123 { "(bad)", { XX } }, 3124 { "(bad)", { XX } }, 3125 { "(bad)", { XX } }, 3126 { "(bad)", { XX } }, 3127 { "(bad)", { XX } }, 3128 /* 20 */ 3129 { PREGRP80 }, 3130 { PREGRP81 }, 3131 { PREGRP82 }, 3132 { "(bad)", { XX } }, 3133 { "(bad)", { XX } }, 3134 { "(bad)", { XX } }, 3135 { "(bad)", { XX } }, 3136 { "(bad)", { XX } }, 3137 /* 28 */ 3138 { "(bad)", { XX } }, 3139 { "(bad)", { XX } }, 3140 { "(bad)", { XX } }, 3141 { "(bad)", { XX } }, 3142 { "(bad)", { XX } }, 3143 { "(bad)", { XX } }, 3144 { "(bad)", { XX } }, 3145 { "(bad)", { XX } }, 3146 /* 30 */ 3147 { "(bad)", { XX } }, 3148 { "(bad)", { XX } }, 3149 { "(bad)", { XX } }, 3150 { "(bad)", { XX } }, 3151 { "(bad)", { XX } }, 3152 { "(bad)", { XX } }, 3153 { "(bad)", { XX } }, 3154 { "(bad)", { XX } }, 3155 /* 38 */ 3156 { "(bad)", { XX } }, 3157 { "(bad)", { XX } }, 3158 { "(bad)", { XX } }, 3159 { "(bad)", { XX } }, 3160 { "(bad)", { XX } }, 3161 { "(bad)", { XX } }, 3162 { "(bad)", { XX } }, 3163 { "(bad)", { XX } }, 3164 /* 40 */ 3165 { PREGRP83 }, 3166 { PREGRP84 }, 3167 { PREGRP85 }, 3168 { "(bad)", { XX } }, 3169 { PREGRP98 }, 3170 { "(bad)", { XX } }, 3171 { "(bad)", { XX } }, 3172 { "(bad)", { XX } }, 3173 /* 48 */ 3174 { "(bad)", { XX } }, 3175 { "(bad)", { XX } }, 3176 { "(bad)", { XX } }, 3177 { "(bad)", { XX } }, 3178 { "(bad)", { XX } }, 3179 { "(bad)", { XX } }, 3180 { "(bad)", { XX } }, 3181 { "(bad)", { XX } }, 3182 /* 50 */ 3183 { "(bad)", { XX } }, 3184 { "(bad)", { XX } }, 3185 { "(bad)", { XX } }, 3186 { "(bad)", { XX } }, 3187 { "(bad)", { XX } }, 3188 { "(bad)", { XX } }, 3189 { "(bad)", { XX } }, 3190 { "(bad)", { XX } }, 3191 /* 58 */ 3192 { "(bad)", { XX } }, 3193 { "(bad)", { XX } }, 3194 { "(bad)", { XX } }, 3195 { "(bad)", { XX } }, 3196 { "(bad)", { XX } }, 3197 { "(bad)", { XX } }, 3198 { "(bad)", { XX } }, 3199 { "(bad)", { XX } }, 3200 /* 60 */ 3201 { PREGRP89 }, 3202 { PREGRP90 }, 3203 { PREGRP91 }, 3204 { PREGRP92 }, 3205 { "(bad)", { XX } }, 3206 { "(bad)", { XX } }, 3207 { "(bad)", { XX } }, 3208 { "(bad)", { XX } }, 3209 /* 68 */ 3210 { "(bad)", { XX } }, 3211 { "(bad)", { XX } }, 3212 { "(bad)", { XX } }, 3213 { "(bad)", { XX } }, 3214 { "(bad)", { XX } }, 3215 { "(bad)", { XX } }, 3216 { "(bad)", { XX } }, 3217 { "(bad)", { XX } }, 3218 /* 70 */ 3219 { "(bad)", { XX } }, 3220 { "(bad)", { XX } }, 3221 { "(bad)", { XX } }, 3222 { "(bad)", { XX } }, 3223 { "(bad)", { XX } }, 3224 { "(bad)", { XX } }, 3225 { "(bad)", { XX } }, 3226 { "(bad)", { XX } }, 3227 /* 78 */ 3228 { "(bad)", { XX } }, 3229 { "(bad)", { XX } }, 3230 { "(bad)", { XX } }, 3231 { "(bad)", { XX } }, 3232 { "(bad)", { XX } }, 3233 { "(bad)", { XX } }, 3234 { "(bad)", { XX } }, 3235 { "(bad)", { XX } }, 3236 /* 80 */ 3237 { "(bad)", { XX } }, 3238 { "(bad)", { XX } }, 3239 { "(bad)", { XX } }, 3240 { "(bad)", { XX } }, 3241 { "(bad)", { XX } }, 3242 { "(bad)", { XX } }, 3243 { "(bad)", { XX } }, 3244 { "(bad)", { XX } }, 3245 /* 88 */ 3246 { "(bad)", { XX } }, 3247 { "(bad)", { XX } }, 3248 { "(bad)", { XX } }, 3249 { "(bad)", { XX } }, 3250 { "(bad)", { XX } }, 3251 { "(bad)", { XX } }, 3252 { "(bad)", { XX } }, 3253 { "(bad)", { XX } }, 3254 /* 90 */ 3255 { "(bad)", { XX } }, 3256 { "(bad)", { XX } }, 3257 { "(bad)", { XX } }, 3258 { "(bad)", { XX } }, 3259 { "(bad)", { XX } }, 3260 { "(bad)", { XX } }, 3261 { "(bad)", { XX } }, 3262 { "(bad)", { XX } }, 3263 /* 98 */ 3264 { "(bad)", { XX } }, 3265 { "(bad)", { XX } }, 3266 { "(bad)", { XX } }, 3267 { "(bad)", { XX } }, 3268 { "(bad)", { XX } }, 3269 { "(bad)", { XX } }, 3270 { "(bad)", { XX } }, 3271 { "(bad)", { XX } }, 3272 /* a0 */ 3273 { "(bad)", { XX } }, 3274 { "(bad)", { XX } }, 3275 { "(bad)", { XX } }, 3276 { "(bad)", { XX } }, 3277 { "(bad)", { XX } }, 3278 { "(bad)", { XX } }, 3279 { "(bad)", { XX } }, 3280 { "(bad)", { XX } }, 3281 /* a8 */ 3282 { "(bad)", { XX } }, 3283 { "(bad)", { XX } }, 3284 { "(bad)", { XX } }, 3285 { "(bad)", { XX } }, 3286 { "(bad)", { XX } }, 3287 { "(bad)", { XX } }, 3288 { "(bad)", { XX } }, 3289 { "(bad)", { XX } }, 3290 /* b0 */ 3291 { "(bad)", { XX } }, 3292 { "(bad)", { XX } }, 3293 { "(bad)", { XX } }, 3294 { "(bad)", { XX } }, 3295 { "(bad)", { XX } }, 3296 { "(bad)", { XX } }, 3297 { "(bad)", { XX } }, 3298 { "(bad)", { XX } }, 3299 /* b8 */ 3300 { "(bad)", { XX } }, 3301 { "(bad)", { XX } }, 3302 { "(bad)", { XX } }, 3303 { "(bad)", { XX } }, 3304 { "(bad)", { XX } }, 3305 { "(bad)", { XX } }, 3306 { "(bad)", { XX } }, 3307 { "(bad)", { XX } }, 3308 /* c0 */ 3309 { "(bad)", { XX } }, 3310 { "(bad)", { XX } }, 3311 { "(bad)", { XX } }, 3312 { "(bad)", { XX } }, 3313 { "(bad)", { XX } }, 3314 { "(bad)", { XX } }, 3315 { "(bad)", { XX } }, 3316 { "(bad)", { XX } }, 3317 /* c8 */ 3318 { "(bad)", { XX } }, 3319 { "(bad)", { XX } }, 3320 { "(bad)", { XX } }, 3321 { "(bad)", { XX } }, 3322 { "(bad)", { XX } }, 3323 { "(bad)", { XX } }, 3324 { "(bad)", { XX } }, 3325 { "(bad)", { XX } }, 3326 /* d0 */ 3327 { "(bad)", { XX } }, 3328 { "(bad)", { XX } }, 3329 { "(bad)", { XX } }, 3330 { "(bad)", { XX } }, 3331 { "(bad)", { XX } }, 3332 { "(bad)", { XX } }, 3333 { "(bad)", { XX } }, 3334 { "(bad)", { XX } }, 3335 /* d8 */ 3336 { "(bad)", { XX } }, 3337 { "(bad)", { XX } }, 3338 { "(bad)", { XX } }, 3339 { "(bad)", { XX } }, 3340 { "(bad)", { XX } }, 3341 { "(bad)", { XX } }, 3342 { "(bad)", { XX } }, 3343 { PREGRP104 }, 3344 /* e0 */ 3345 { "(bad)", { XX } }, 3346 { "(bad)", { XX } }, 3347 { "(bad)", { XX } }, 3348 { "(bad)", { XX } }, 3349 { "(bad)", { XX } }, 3350 { "(bad)", { XX } }, 3351 { "(bad)", { XX } }, 3352 { "(bad)", { XX } }, 3353 /* e8 */ 3354 { "(bad)", { XX } }, 3355 { "(bad)", { XX } }, 3356 { "(bad)", { XX } }, 3357 { "(bad)", { XX } }, 3358 { "(bad)", { XX } }, 3359 { "(bad)", { XX } }, 3360 { "(bad)", { XX } }, 3361 { "(bad)", { XX } }, 3362 /* f0 */ 3363 { "(bad)", { XX } }, 3364 { "(bad)", { XX } }, 3365 { "(bad)", { XX } }, 3366 { "(bad)", { XX } }, 3367 { "(bad)", { XX } }, 3368 { "(bad)", { XX } }, 3369 { "(bad)", { XX } }, 3370 { "(bad)", { XX } }, 3371 /* f8 */ 3372 { "(bad)", { XX } }, 3373 { "(bad)", { XX } }, 3374 { "(bad)", { XX } }, 3375 { "(bad)", { XX } }, 3376 { "(bad)", { XX } }, 3377 { "(bad)", { XX } }, 3378 { "(bad)", { XX } }, 3379 { "(bad)", { XX } }, 3380 } 3381}; 3382 3383#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") 3384 3385static void 3386ckprefix (void) 3387{ 3388 int newrex; 3389 rex = 0; 3390 prefixes = 0; 3391 used_prefixes = 0; 3392 rex_used = 0; 3393 while (1) 3394 { 3395 fetch_data(the_info, codep + 1); 3396 newrex = 0; 3397 switch (*codep) 3398 { 3399 /* REX prefixes family. */ 3400 case 0x40: 3401 case 0x41: 3402 case 0x42: 3403 case 0x43: 3404 case 0x44: 3405 case 0x45: 3406 case 0x46: 3407 case 0x47: 3408 case 0x48: 3409 case 0x49: 3410 case 0x4a: 3411 case 0x4b: 3412 case 0x4c: 3413 case 0x4d: 3414 case 0x4e: 3415 case 0x4f: 3416 if (address_mode == mode_64bit) 3417 newrex = *codep; 3418 else 3419 return; 3420 break; 3421 case 0xf3: 3422 prefixes |= PREFIX_REPZ; 3423 break; 3424 case 0xf2: 3425 prefixes |= PREFIX_REPNZ; 3426 break; 3427 case 0xf0: 3428 prefixes |= PREFIX_LOCK; 3429 break; 3430 case 0x2e: 3431 prefixes |= PREFIX_CS; 3432 break; 3433 case 0x36: 3434 prefixes |= PREFIX_SS; 3435 break; 3436 case 0x3e: 3437 prefixes |= PREFIX_DS; 3438 break; 3439 case 0x26: 3440 prefixes |= PREFIX_ES; 3441 break; 3442 case 0x64: 3443 prefixes |= PREFIX_FS; 3444 break; 3445 case 0x65: 3446 prefixes |= PREFIX_GS; 3447 break; 3448 case 0x66: 3449 prefixes |= PREFIX_DATA; 3450 break; 3451 case 0x67: 3452 prefixes |= PREFIX_ADDR; 3453 break; 3454 case FWAIT_OPCODE: 3455 /* fwait is really an instruction. If there are prefixes 3456 before the fwait, they belong to the fwait, *not* to the 3457 following instruction. */ 3458 if (prefixes || rex) 3459 { 3460 prefixes |= PREFIX_FWAIT; 3461 codep++; 3462 return; 3463 } 3464 prefixes = PREFIX_FWAIT; 3465 break; 3466 default: 3467 return; 3468 } 3469 /* Rex is ignored when followed by another prefix. */ 3470 if (rex) 3471 { 3472 rex_used = rex; 3473 return; 3474 } 3475 rex = newrex; 3476 codep++; 3477 } 3478} 3479 3480/* Return the name of the prefix byte PREF, or NULL if PREF is not a 3481 prefix byte. */ 3482 3483static const char * 3484prefix_name (int pref, int sizeflag) 3485{ 3486 static const char * const rexes [16] = 3487 { 3488 "rex", /* 0x40 */ 3489 "rex.B", /* 0x41 */ 3490 "rex.X", /* 0x42 */ 3491 "rex.XB", /* 0x43 */ 3492 "rex.R", /* 0x44 */ 3493 "rex.RB", /* 0x45 */ 3494 "rex.RX", /* 0x46 */ 3495 "rex.RXB", /* 0x47 */ 3496 "rex.W", /* 0x48 */ 3497 "rex.WB", /* 0x49 */ 3498 "rex.WX", /* 0x4a */ 3499 "rex.WXB", /* 0x4b */ 3500 "rex.WR", /* 0x4c */ 3501 "rex.WRB", /* 0x4d */ 3502 "rex.WRX", /* 0x4e */ 3503 "rex.WRXB", /* 0x4f */ 3504 }; 3505 3506 switch (pref) 3507 { 3508 /* REX prefixes family. */ 3509 case 0x40: 3510 case 0x41: 3511 case 0x42: 3512 case 0x43: 3513 case 0x44: 3514 case 0x45: 3515 case 0x46: 3516 case 0x47: 3517 case 0x48: 3518 case 0x49: 3519 case 0x4a: 3520 case 0x4b: 3521 case 0x4c: 3522 case 0x4d: 3523 case 0x4e: 3524 case 0x4f: 3525 return rexes [pref - 0x40]; 3526 case 0xf3: 3527 return "repz"; 3528 case 0xf2: 3529 return "repnz"; 3530 case 0xf0: 3531 return "lock"; 3532 case 0x2e: 3533 return "cs"; 3534 case 0x36: 3535 return "ss"; 3536 case 0x3e: 3537 return "ds"; 3538 case 0x26: 3539 return "es"; 3540 case 0x64: 3541 return "fs"; 3542 case 0x65: 3543 return "gs"; 3544 case 0x66: 3545 return (sizeflag & DFLAG) ? "data16" : "data32"; 3546 case 0x67: 3547 if (address_mode == mode_64bit) 3548 return (sizeflag & AFLAG) ? "addr32" : "addr64"; 3549 else 3550 return (sizeflag & AFLAG) ? "addr16" : "addr32"; 3551 case FWAIT_OPCODE: 3552 return "fwait"; 3553 default: 3554 return NULL; 3555 } 3556} 3557 3558static char op_out[MAX_OPERANDS][100]; 3559static int op_ad, op_index[MAX_OPERANDS]; 3560static int two_source_ops; 3561static bfd_vma op_address[MAX_OPERANDS]; 3562static bfd_vma op_riprel[MAX_OPERANDS]; 3563static bfd_vma start_pc; 3564 3565/* 3566 * On the 386's of 1988, the maximum length of an instruction is 15 bytes. 3567 * (see topic "Redundant prefixes" in the "Differences from 8086" 3568 * section of the "Virtual 8086 Mode" chapter.) 3569 * 'pc' should be the address of this instruction, it will 3570 * be used to print the target address if this is a relative jump or call 3571 * The function returns the length of this instruction in bytes. 3572 */ 3573 3574static char intel_syntax; 3575static char open_char; 3576static char close_char; 3577static char separator_char; 3578static char scale_char; 3579 3580int 3581print_insn_i386 (bfd_vma pc, disassemble_info *info) 3582{ 3583 intel_syntax = -1; 3584 3585 return print_insn (pc, info); 3586} 3587 3588static int 3589print_insn (bfd_vma pc, disassemble_info *info) 3590{ 3591 const struct dis386 *dp; 3592 int i; 3593 char *op_txt[MAX_OPERANDS]; 3594 int needcomma; 3595 unsigned char uses_DATA_prefix, uses_LOCK_prefix; 3596 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix; 3597 int sizeflag; 3598 const char *p; 3599 struct dis_private priv; 3600 unsigned char op; 3601 3602 if (info->mach == bfd_mach_x86_64_intel_syntax 3603 || info->mach == bfd_mach_x86_64) 3604 address_mode = mode_64bit; 3605 else 3606 address_mode = mode_32bit; 3607 3608 if (intel_syntax == (char) -1) 3609 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax 3610 || info->mach == bfd_mach_x86_64_intel_syntax); 3611 3612 if (info->mach == bfd_mach_i386_i386 3613 || info->mach == bfd_mach_x86_64 3614 || info->mach == bfd_mach_i386_i386_intel_syntax 3615 || info->mach == bfd_mach_x86_64_intel_syntax) 3616 priv.orig_sizeflag = AFLAG | DFLAG; 3617 else if (info->mach == bfd_mach_i386_i8086) 3618 priv.orig_sizeflag = 0; 3619 else 3620 abort (); 3621 3622 for (p = info->disassembler_options; p != NULL; ) 3623 { 3624 if (strncmp (p, "x86-64", 6) == 0) 3625 { 3626 address_mode = mode_64bit; 3627 priv.orig_sizeflag = AFLAG | DFLAG; 3628 } 3629 else if (strncmp (p, "i386", 4) == 0) 3630 { 3631 address_mode = mode_32bit; 3632 priv.orig_sizeflag = AFLAG | DFLAG; 3633 } 3634 else if (strncmp (p, "i8086", 5) == 0) 3635 { 3636 address_mode = mode_16bit; 3637 priv.orig_sizeflag = 0; 3638 } 3639 else if (strncmp (p, "intel", 5) == 0) 3640 { 3641 intel_syntax = 1; 3642 } 3643 else if (strncmp (p, "att", 3) == 0) 3644 { 3645 intel_syntax = 0; 3646 } 3647 else if (strncmp (p, "addr", 4) == 0) 3648 { 3649 if (address_mode == mode_64bit) 3650 { 3651 if (p[4] == '3' && p[5] == '2') 3652 priv.orig_sizeflag &= ~AFLAG; 3653 else if (p[4] == '6' && p[5] == '4') 3654 priv.orig_sizeflag |= AFLAG; 3655 } 3656 else 3657 { 3658 if (p[4] == '1' && p[5] == '6') 3659 priv.orig_sizeflag &= ~AFLAG; 3660 else if (p[4] == '3' && p[5] == '2') 3661 priv.orig_sizeflag |= AFLAG; 3662 } 3663 } 3664 else if (strncmp (p, "data", 4) == 0) 3665 { 3666 if (p[4] == '1' && p[5] == '6') 3667 priv.orig_sizeflag &= ~DFLAG; 3668 else if (p[4] == '3' && p[5] == '2') 3669 priv.orig_sizeflag |= DFLAG; 3670 } 3671 else if (strncmp (p, "suffix", 6) == 0) 3672 priv.orig_sizeflag |= SUFFIX_ALWAYS; 3673 3674 p = strchr (p, ','); 3675 if (p != NULL) 3676 p++; 3677 } 3678 3679 if (intel_syntax) 3680 { 3681 names64 = intel_names64; 3682 names32 = intel_names32; 3683 names16 = intel_names16; 3684 names8 = intel_names8; 3685 names8rex = intel_names8rex; 3686 names_seg = intel_names_seg; 3687 index16 = intel_index16; 3688 open_char = '['; 3689 close_char = ']'; 3690 separator_char = '+'; 3691 scale_char = '*'; 3692 } 3693 else 3694 { 3695 names64 = att_names64; 3696 names32 = att_names32; 3697 names16 = att_names16; 3698 names8 = att_names8; 3699 names8rex = att_names8rex; 3700 names_seg = att_names_seg; 3701 index16 = att_index16; 3702 open_char = '('; 3703 close_char = ')'; 3704 separator_char = ','; 3705 scale_char = ','; 3706 } 3707 3708 /* The output looks better if we put 7 bytes on a line, since that 3709 puts most long word instructions on a single line. */ 3710 info->bytes_per_line = 7; 3711 3712 info->private_data = &priv; 3713 priv.max_fetched = priv.the_buffer; 3714 priv.insn_start = pc; 3715 3716 obuf[0] = 0; 3717 for (i = 0; i < MAX_OPERANDS; ++i) 3718 { 3719 op_out[i][0] = 0; 3720 op_index[i] = -1; 3721 } 3722 3723 the_info = info; 3724 start_pc = pc; 3725 start_codep = priv.the_buffer; 3726 codep = priv.the_buffer; 3727 3728 if (sigsetjmp(priv.bailout, 0) != 0) 3729 { 3730 const char *name; 3731 3732 /* Getting here means we tried for data but didn't get it. That 3733 means we have an incomplete instruction of some sort. Just 3734 print the first byte as a prefix or a .byte pseudo-op. */ 3735 if (codep > priv.the_buffer) 3736 { 3737 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3738 if (name != NULL) 3739 (*info->fprintf_func) (info->stream, "%s", name); 3740 else 3741 { 3742 /* Just print the first byte as a .byte instruction. */ 3743 (*info->fprintf_func) (info->stream, ".byte 0x%x", 3744 (unsigned int) priv.the_buffer[0]); 3745 } 3746 3747 return 1; 3748 } 3749 3750 return -1; 3751 } 3752 3753 obufp = obuf; 3754 ckprefix (); 3755 3756 insn_codep = codep; 3757 sizeflag = priv.orig_sizeflag; 3758 3759 fetch_data(info, codep + 1); 3760 two_source_ops = (*codep == 0x62) || (*codep == 0xc8); 3761 3762 if (((prefixes & PREFIX_FWAIT) 3763 && ((*codep < 0xd8) || (*codep > 0xdf))) 3764 || (rex && rex_used)) 3765 { 3766 const char *name; 3767 3768 /* fwait not followed by floating point instruction, or rex followed 3769 by other prefixes. Print the first prefix. */ 3770 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3771 if (name == NULL) 3772 name = INTERNAL_DISASSEMBLER_ERROR; 3773 (*info->fprintf_func) (info->stream, "%s", name); 3774 return 1; 3775 } 3776 3777 op = 0; 3778 if (*codep == 0x0f) 3779 { 3780 unsigned char threebyte; 3781 fetch_data(info, codep + 2); 3782 threebyte = *++codep; 3783 dp = &dis386_twobyte[threebyte]; 3784 need_modrm = twobyte_has_modrm[*codep]; 3785 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep]; 3786 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep]; 3787 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep]; 3788 uses_LOCK_prefix = (*codep & ~0x02) == 0x20; 3789 codep++; 3790 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) 3791 { 3792 fetch_data(info, codep + 2); 3793 op = *codep++; 3794 switch (threebyte) 3795 { 3796 case 0x38: 3797 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op]; 3798 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op]; 3799 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op]; 3800 break; 3801 case 0x3a: 3802 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op]; 3803 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op]; 3804 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op]; 3805 break; 3806 default: 3807 break; 3808 } 3809 } 3810 } 3811 else 3812 { 3813 dp = &dis386[*codep]; 3814 need_modrm = onebyte_has_modrm[*codep]; 3815 uses_DATA_prefix = 0; 3816 uses_REPNZ_prefix = 0; 3817 /* pause is 0xf3 0x90. */ 3818 uses_REPZ_prefix = *codep == 0x90; 3819 uses_LOCK_prefix = 0; 3820 codep++; 3821 } 3822 3823 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ)) 3824 { 3825 oappend ("repz "); 3826 used_prefixes |= PREFIX_REPZ; 3827 } 3828 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ)) 3829 { 3830 oappend ("repnz "); 3831 used_prefixes |= PREFIX_REPNZ; 3832 } 3833 3834 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK)) 3835 { 3836 oappend ("lock "); 3837 used_prefixes |= PREFIX_LOCK; 3838 } 3839 3840 if (prefixes & PREFIX_ADDR) 3841 { 3842 sizeflag ^= AFLAG; 3843 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax) 3844 { 3845 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 3846 oappend ("addr32 "); 3847 else 3848 oappend ("addr16 "); 3849 used_prefixes |= PREFIX_ADDR; 3850 } 3851 } 3852 3853 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA)) 3854 { 3855 sizeflag ^= DFLAG; 3856 if (dp->op[2].bytemode == cond_jump_mode 3857 && dp->op[0].bytemode == v_mode 3858 && !intel_syntax) 3859 { 3860 if (sizeflag & DFLAG) 3861 oappend ("data32 "); 3862 else 3863 oappend ("data16 "); 3864 used_prefixes |= PREFIX_DATA; 3865 } 3866 } 3867 3868 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) 3869 { 3870 dp = &three_byte_table[dp->op[1].bytemode][op]; 3871 modrm.mod = (*codep >> 6) & 3; 3872 modrm.reg = (*codep >> 3) & 7; 3873 modrm.rm = *codep & 7; 3874 } 3875 else if (need_modrm) 3876 { 3877 fetch_data(info, codep + 1); 3878 modrm.mod = (*codep >> 6) & 3; 3879 modrm.reg = (*codep >> 3) & 7; 3880 modrm.rm = *codep & 7; 3881 } 3882 3883 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE) 3884 { 3885 dofloat (sizeflag); 3886 } 3887 else 3888 { 3889 int index; 3890 if (dp->name == NULL) 3891 { 3892 switch (dp->op[0].bytemode) 3893 { 3894 case USE_GROUPS: 3895 dp = &grps[dp->op[1].bytemode][modrm.reg]; 3896 break; 3897 3898 case USE_PREFIX_USER_TABLE: 3899 index = 0; 3900 used_prefixes |= (prefixes & PREFIX_REPZ); 3901 if (prefixes & PREFIX_REPZ) 3902 index = 1; 3903 else 3904 { 3905 /* We should check PREFIX_REPNZ and PREFIX_REPZ 3906 before PREFIX_DATA. */ 3907 used_prefixes |= (prefixes & PREFIX_REPNZ); 3908 if (prefixes & PREFIX_REPNZ) 3909 index = 3; 3910 else 3911 { 3912 used_prefixes |= (prefixes & PREFIX_DATA); 3913 if (prefixes & PREFIX_DATA) 3914 index = 2; 3915 } 3916 } 3917 dp = &prefix_user_table[dp->op[1].bytemode][index]; 3918 break; 3919 3920 case X86_64_SPECIAL: 3921 index = address_mode == mode_64bit ? 1 : 0; 3922 dp = &x86_64_table[dp->op[1].bytemode][index]; 3923 break; 3924 3925 default: 3926 oappend (INTERNAL_DISASSEMBLER_ERROR); 3927 break; 3928 } 3929 } 3930 3931 if (putop (dp->name, sizeflag) == 0) 3932 { 3933 for (i = 0; i < MAX_OPERANDS; ++i) 3934 { 3935 obufp = op_out[i]; 3936 op_ad = MAX_OPERANDS - 1 - i; 3937 if (dp->op[i].rtn) 3938 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag); 3939 } 3940 } 3941 } 3942 3943 /* See if any prefixes were not used. If so, print the first one 3944 separately. If we don't do this, we'll wind up printing an 3945 instruction stream which does not precisely correspond to the 3946 bytes we are disassembling. */ 3947 if ((prefixes & ~used_prefixes) != 0) 3948 { 3949 const char *name; 3950 3951 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3952 if (name == NULL) 3953 name = INTERNAL_DISASSEMBLER_ERROR; 3954 (*info->fprintf_func) (info->stream, "%s", name); 3955 return 1; 3956 } 3957 if (rex & ~rex_used) 3958 { 3959 const char *name; 3960 name = prefix_name (rex | 0x40, priv.orig_sizeflag); 3961 if (name == NULL) 3962 name = INTERNAL_DISASSEMBLER_ERROR; 3963 (*info->fprintf_func) (info->stream, "%s ", name); 3964 } 3965 3966 obufp = obuf + strlen (obuf); 3967 for (i = strlen (obuf); i < 6; i++) 3968 oappend (" "); 3969 oappend (" "); 3970 (*info->fprintf_func) (info->stream, "%s", obuf); 3971 3972 /* The enter and bound instructions are printed with operands in the same 3973 order as the intel book; everything else is printed in reverse order. */ 3974 if (intel_syntax || two_source_ops) 3975 { 3976 bfd_vma riprel; 3977 3978 for (i = 0; i < MAX_OPERANDS; ++i) 3979 op_txt[i] = op_out[i]; 3980 3981 for (i = 0; i < (MAX_OPERANDS >> 1); ++i) 3982 { 3983 op_ad = op_index[i]; 3984 op_index[i] = op_index[MAX_OPERANDS - 1 - i]; 3985 op_index[MAX_OPERANDS - 1 - i] = op_ad; 3986 riprel = op_riprel[i]; 3987 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i]; 3988 op_riprel[MAX_OPERANDS - 1 - i] = riprel; 3989 } 3990 } 3991 else 3992 { 3993 for (i = 0; i < MAX_OPERANDS; ++i) 3994 op_txt[MAX_OPERANDS - 1 - i] = op_out[i]; 3995 } 3996 3997 needcomma = 0; 3998 for (i = 0; i < MAX_OPERANDS; ++i) 3999 if (*op_txt[i]) 4000 { 4001 if (needcomma) 4002 (*info->fprintf_func) (info->stream, ","); 4003 if (op_index[i] != -1 && !op_riprel[i]) 4004 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info); 4005 else 4006 (*info->fprintf_func) (info->stream, "%s", op_txt[i]); 4007 needcomma = 1; 4008 } 4009 4010 for (i = 0; i < MAX_OPERANDS; i++) 4011 if (op_index[i] != -1 && op_riprel[i]) 4012 { 4013 (*info->fprintf_func) (info->stream, " # "); 4014 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep 4015 + op_address[op_index[i]]), info); 4016 break; 4017 } 4018 return codep - priv.the_buffer; 4019} 4020 4021static const char *float_mem[] = { 4022 /* d8 */ 4023 "fadd{s||s|}", 4024 "fmul{s||s|}", 4025 "fcom{s||s|}", 4026 "fcomp{s||s|}", 4027 "fsub{s||s|}", 4028 "fsubr{s||s|}", 4029 "fdiv{s||s|}", 4030 "fdivr{s||s|}", 4031 /* d9 */ 4032 "fld{s||s|}", 4033 "(bad)", 4034 "fst{s||s|}", 4035 "fstp{s||s|}", 4036 "fldenvIC", 4037 "fldcw", 4038 "fNstenvIC", 4039 "fNstcw", 4040 /* da */ 4041 "fiadd{l||l|}", 4042 "fimul{l||l|}", 4043 "ficom{l||l|}", 4044 "ficomp{l||l|}", 4045 "fisub{l||l|}", 4046 "fisubr{l||l|}", 4047 "fidiv{l||l|}", 4048 "fidivr{l||l|}", 4049 /* db */ 4050 "fild{l||l|}", 4051 "fisttp{l||l|}", 4052 "fist{l||l|}", 4053 "fistp{l||l|}", 4054 "(bad)", 4055 "fld{t||t|}", 4056 "(bad)", 4057 "fstp{t||t|}", 4058 /* dc */ 4059 "fadd{l||l|}", 4060 "fmul{l||l|}", 4061 "fcom{l||l|}", 4062 "fcomp{l||l|}", 4063 "fsub{l||l|}", 4064 "fsubr{l||l|}", 4065 "fdiv{l||l|}", 4066 "fdivr{l||l|}", 4067 /* dd */ 4068 "fld{l||l|}", 4069 "fisttp{ll||ll|}", 4070 "fst{l||l|}", 4071 "fstp{l||l|}", 4072 "frstorIC", 4073 "(bad)", 4074 "fNsaveIC", 4075 "fNstsw", 4076 /* de */ 4077 "fiadd", 4078 "fimul", 4079 "ficom", 4080 "ficomp", 4081 "fisub", 4082 "fisubr", 4083 "fidiv", 4084 "fidivr", 4085 /* df */ 4086 "fild", 4087 "fisttp", 4088 "fist", 4089 "fistp", 4090 "fbld", 4091 "fild{ll||ll|}", 4092 "fbstp", 4093 "fistp{ll||ll|}", 4094}; 4095 4096static const unsigned char float_mem_mode[] = { 4097 /* d8 */ 4098 d_mode, 4099 d_mode, 4100 d_mode, 4101 d_mode, 4102 d_mode, 4103 d_mode, 4104 d_mode, 4105 d_mode, 4106 /* d9 */ 4107 d_mode, 4108 0, 4109 d_mode, 4110 d_mode, 4111 0, 4112 w_mode, 4113 0, 4114 w_mode, 4115 /* da */ 4116 d_mode, 4117 d_mode, 4118 d_mode, 4119 d_mode, 4120 d_mode, 4121 d_mode, 4122 d_mode, 4123 d_mode, 4124 /* db */ 4125 d_mode, 4126 d_mode, 4127 d_mode, 4128 d_mode, 4129 0, 4130 t_mode, 4131 0, 4132 t_mode, 4133 /* dc */ 4134 q_mode, 4135 q_mode, 4136 q_mode, 4137 q_mode, 4138 q_mode, 4139 q_mode, 4140 q_mode, 4141 q_mode, 4142 /* dd */ 4143 q_mode, 4144 q_mode, 4145 q_mode, 4146 q_mode, 4147 0, 4148 0, 4149 0, 4150 w_mode, 4151 /* de */ 4152 w_mode, 4153 w_mode, 4154 w_mode, 4155 w_mode, 4156 w_mode, 4157 w_mode, 4158 w_mode, 4159 w_mode, 4160 /* df */ 4161 w_mode, 4162 w_mode, 4163 w_mode, 4164 w_mode, 4165 t_mode, 4166 q_mode, 4167 t_mode, 4168 q_mode 4169}; 4170 4171#define ST { OP_ST, 0 } 4172#define STi { OP_STi, 0 } 4173 4174#define FGRPd9_2 NULL, { { NULL, 0 } } 4175#define FGRPd9_4 NULL, { { NULL, 1 } } 4176#define FGRPd9_5 NULL, { { NULL, 2 } } 4177#define FGRPd9_6 NULL, { { NULL, 3 } } 4178#define FGRPd9_7 NULL, { { NULL, 4 } } 4179#define FGRPda_5 NULL, { { NULL, 5 } } 4180#define FGRPdb_4 NULL, { { NULL, 6 } } 4181#define FGRPde_3 NULL, { { NULL, 7 } } 4182#define FGRPdf_4 NULL, { { NULL, 8 } } 4183 4184static const struct dis386 float_reg[][8] = { 4185 /* d8 */ 4186 { 4187 { "fadd", { ST, STi } }, 4188 { "fmul", { ST, STi } }, 4189 { "fcom", { STi } }, 4190 { "fcomp", { STi } }, 4191 { "fsub", { ST, STi } }, 4192 { "fsubr", { ST, STi } }, 4193 { "fdiv", { ST, STi } }, 4194 { "fdivr", { ST, STi } }, 4195 }, 4196 /* d9 */ 4197 { 4198 { "fld", { STi } }, 4199 { "fxch", { STi } }, 4200 { FGRPd9_2 }, 4201 { "(bad)", { XX } }, 4202 { FGRPd9_4 }, 4203 { FGRPd9_5 }, 4204 { FGRPd9_6 }, 4205 { FGRPd9_7 }, 4206 }, 4207 /* da */ 4208 { 4209 { "fcmovb", { ST, STi } }, 4210 { "fcmove", { ST, STi } }, 4211 { "fcmovbe",{ ST, STi } }, 4212 { "fcmovu", { ST, STi } }, 4213 { "(bad)", { XX } }, 4214 { FGRPda_5 }, 4215 { "(bad)", { XX } }, 4216 { "(bad)", { XX } }, 4217 }, 4218 /* db */ 4219 { 4220 { "fcmovnb",{ ST, STi } }, 4221 { "fcmovne",{ ST, STi } }, 4222 { "fcmovnbe",{ ST, STi } }, 4223 { "fcmovnu",{ ST, STi } }, 4224 { FGRPdb_4 }, 4225 { "fucomi", { ST, STi } }, 4226 { "fcomi", { ST, STi } }, 4227 { "(bad)", { XX } }, 4228 }, 4229 /* dc */ 4230 { 4231 { "fadd", { STi, ST } }, 4232 { "fmul", { STi, ST } }, 4233 { "(bad)", { XX } }, 4234 { "(bad)", { XX } }, 4235#if SYSV386_COMPAT 4236 { "fsub", { STi, ST } }, 4237 { "fsubr", { STi, ST } }, 4238 { "fdiv", { STi, ST } }, 4239 { "fdivr", { STi, ST } }, 4240#else 4241 { "fsubr", { STi, ST } }, 4242 { "fsub", { STi, ST } }, 4243 { "fdivr", { STi, ST } }, 4244 { "fdiv", { STi, ST } }, 4245#endif 4246 }, 4247 /* dd */ 4248 { 4249 { "ffree", { STi } }, 4250 { "(bad)", { XX } }, 4251 { "fst", { STi } }, 4252 { "fstp", { STi } }, 4253 { "fucom", { STi } }, 4254 { "fucomp", { STi } }, 4255 { "(bad)", { XX } }, 4256 { "(bad)", { XX } }, 4257 }, 4258 /* de */ 4259 { 4260 { "faddp", { STi, ST } }, 4261 { "fmulp", { STi, ST } }, 4262 { "(bad)", { XX } }, 4263 { FGRPde_3 }, 4264#if SYSV386_COMPAT 4265 { "fsubp", { STi, ST } }, 4266 { "fsubrp", { STi, ST } }, 4267 { "fdivp", { STi, ST } }, 4268 { "fdivrp", { STi, ST } }, 4269#else 4270 { "fsubrp", { STi, ST } }, 4271 { "fsubp", { STi, ST } }, 4272 { "fdivrp", { STi, ST } }, 4273 { "fdivp", { STi, ST } }, 4274#endif 4275 }, 4276 /* df */ 4277 { 4278 { "ffreep", { STi } }, 4279 { "(bad)", { XX } }, 4280 { "(bad)", { XX } }, 4281 { "(bad)", { XX } }, 4282 { FGRPdf_4 }, 4283 { "fucomip", { ST, STi } }, 4284 { "fcomip", { ST, STi } }, 4285 { "(bad)", { XX } }, 4286 }, 4287}; 4288 4289static const char *fgrps[][8] = { 4290 /* d9_2 0 */ 4291 { 4292 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4293 }, 4294 4295 /* d9_4 1 */ 4296 { 4297 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", 4298 }, 4299 4300 /* d9_5 2 */ 4301 { 4302 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", 4303 }, 4304 4305 /* d9_6 3 */ 4306 { 4307 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", 4308 }, 4309 4310 /* d9_7 4 */ 4311 { 4312 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", 4313 }, 4314 4315 /* da_5 5 */ 4316 { 4317 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4318 }, 4319 4320 /* db_4 6 */ 4321 { 4322 "feni(287 only)","fdisi(287 only)","fNclex","fNinit", 4323 "fNsetpm(287 only)","(bad)","(bad)","(bad)", 4324 }, 4325 4326 /* de_3 7 */ 4327 { 4328 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4329 }, 4330 4331 /* df_4 8 */ 4332 { 4333 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4334 }, 4335}; 4336 4337static void 4338dofloat (int sizeflag) 4339{ 4340 const struct dis386 *dp; 4341 unsigned char floatop; 4342 4343 floatop = codep[-1]; 4344 4345 if (modrm.mod != 3) 4346 { 4347 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg; 4348 4349 putop (float_mem[fp_indx], sizeflag); 4350 obufp = op_out[0]; 4351 op_ad = 2; 4352 OP_E (float_mem_mode[fp_indx], sizeflag); 4353 return; 4354 } 4355 /* Skip mod/rm byte. */ 4356 MODRM_CHECK; 4357 codep++; 4358 4359 dp = &float_reg[floatop - 0xd8][modrm.reg]; 4360 if (dp->name == NULL) 4361 { 4362 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag); 4363 4364 /* Instruction fnstsw is only one with strange arg. */ 4365 if (floatop == 0xdf && codep[-1] == 0xe0) 4366 pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]); 4367 } 4368 else 4369 { 4370 putop (dp->name, sizeflag); 4371 4372 obufp = op_out[0]; 4373 op_ad = 2; 4374 if (dp->op[0].rtn) 4375 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag); 4376 4377 obufp = op_out[1]; 4378 op_ad = 1; 4379 if (dp->op[1].rtn) 4380 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag); 4381 } 4382} 4383 4384static void 4385OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4386{ 4387 oappend ("%st" + intel_syntax); 4388} 4389 4390static void 4391OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4392{ 4393 snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm); 4394 oappend (scratchbuf + intel_syntax); 4395} 4396 4397/* Capital letters in template are macros. */ 4398static int 4399putop (const char *template, int sizeflag) 4400{ 4401 const char *p; 4402 int alt = 0; 4403 4404 for (p = template; *p; p++) 4405 { 4406 switch (*p) 4407 { 4408 default: 4409 *obufp++ = *p; 4410 break; 4411 case '{': 4412 alt = 0; 4413 if (intel_syntax) 4414 alt += 1; 4415 if (address_mode == mode_64bit) 4416 alt += 2; 4417 while (alt != 0) 4418 { 4419 while (*++p != '|') 4420 { 4421 if (*p == '}') 4422 { 4423 /* Alternative not valid. */ 4424 pstrcpy (obuf, sizeof(obuf), "(bad)"); 4425 obufp = obuf + 5; 4426 return 1; 4427 } 4428 else if (*p == '\0') 4429 abort (); 4430 } 4431 alt--; 4432 } 4433 /* Fall through. */ 4434 case 'I': 4435 alt = 1; 4436 continue; 4437 case '|': 4438 while (*++p != '}') 4439 { 4440 if (*p == '\0') 4441 abort (); 4442 } 4443 break; 4444 case '}': 4445 break; 4446 case 'A': 4447 if (intel_syntax) 4448 break; 4449 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4450 *obufp++ = 'b'; 4451 break; 4452 case 'B': 4453 if (intel_syntax) 4454 break; 4455 if (sizeflag & SUFFIX_ALWAYS) 4456 *obufp++ = 'b'; 4457 break; 4458 case 'C': 4459 if (intel_syntax && !alt) 4460 break; 4461 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS)) 4462 { 4463 if (sizeflag & DFLAG) 4464 *obufp++ = intel_syntax ? 'd' : 'l'; 4465 else 4466 *obufp++ = intel_syntax ? 'w' : 's'; 4467 used_prefixes |= (prefixes & PREFIX_DATA); 4468 } 4469 break; 4470 case 'D': 4471 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS)) 4472 break; 4473 USED_REX (REX_W); 4474 if (modrm.mod == 3) 4475 { 4476 if (rex & REX_W) 4477 *obufp++ = 'q'; 4478 else if (sizeflag & DFLAG) 4479 *obufp++ = intel_syntax ? 'd' : 'l'; 4480 else 4481 *obufp++ = 'w'; 4482 used_prefixes |= (prefixes & PREFIX_DATA); 4483 } 4484 else 4485 *obufp++ = 'w'; 4486 break; 4487 case 'E': /* For jcxz/jecxz */ 4488 if (address_mode == mode_64bit) 4489 { 4490 if (sizeflag & AFLAG) 4491 *obufp++ = 'r'; 4492 else 4493 *obufp++ = 'e'; 4494 } 4495 else 4496 if (sizeflag & AFLAG) 4497 *obufp++ = 'e'; 4498 used_prefixes |= (prefixes & PREFIX_ADDR); 4499 break; 4500 case 'F': 4501 if (intel_syntax) 4502 break; 4503 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS)) 4504 { 4505 if (sizeflag & AFLAG) 4506 *obufp++ = address_mode == mode_64bit ? 'q' : 'l'; 4507 else 4508 *obufp++ = address_mode == mode_64bit ? 'l' : 'w'; 4509 used_prefixes |= (prefixes & PREFIX_ADDR); 4510 } 4511 break; 4512 case 'G': 4513 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS))) 4514 break; 4515 if ((rex & REX_W) || (sizeflag & DFLAG)) 4516 *obufp++ = 'l'; 4517 else 4518 *obufp++ = 'w'; 4519 if (!(rex & REX_W)) 4520 used_prefixes |= (prefixes & PREFIX_DATA); 4521 break; 4522 case 'H': 4523 if (intel_syntax) 4524 break; 4525 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS 4526 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) 4527 { 4528 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); 4529 *obufp++ = ','; 4530 *obufp++ = 'p'; 4531 if (prefixes & PREFIX_DS) 4532 *obufp++ = 't'; 4533 else 4534 *obufp++ = 'n'; 4535 } 4536 break; 4537 case 'J': 4538 if (intel_syntax) 4539 break; 4540 *obufp++ = 'l'; 4541 break; 4542 case 'K': 4543 USED_REX (REX_W); 4544 if (rex & REX_W) 4545 *obufp++ = 'q'; 4546 else 4547 *obufp++ = 'd'; 4548 break; 4549 case 'Z': 4550 if (intel_syntax) 4551 break; 4552 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS)) 4553 { 4554 *obufp++ = 'q'; 4555 break; 4556 } 4557 /* Fall through. */ 4558 case 'L': 4559 if (intel_syntax) 4560 break; 4561 if (sizeflag & SUFFIX_ALWAYS) 4562 *obufp++ = 'l'; 4563 break; 4564 case 'N': 4565 if ((prefixes & PREFIX_FWAIT) == 0) 4566 *obufp++ = 'n'; 4567 else 4568 used_prefixes |= PREFIX_FWAIT; 4569 break; 4570 case 'O': 4571 USED_REX (REX_W); 4572 if (rex & REX_W) 4573 *obufp++ = 'o'; 4574 else if (intel_syntax && (sizeflag & DFLAG)) 4575 *obufp++ = 'q'; 4576 else 4577 *obufp++ = 'd'; 4578 if (!(rex & REX_W)) 4579 used_prefixes |= (prefixes & PREFIX_DATA); 4580 break; 4581 case 'T': 4582 if (intel_syntax) 4583 break; 4584 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4585 { 4586 *obufp++ = 'q'; 4587 break; 4588 } 4589 /* Fall through. */ 4590 case 'P': 4591 if (intel_syntax) 4592 break; 4593 if ((prefixes & PREFIX_DATA) 4594 || (rex & REX_W) 4595 || (sizeflag & SUFFIX_ALWAYS)) 4596 { 4597 USED_REX (REX_W); 4598 if (rex & REX_W) 4599 *obufp++ = 'q'; 4600 else 4601 { 4602 if (sizeflag & DFLAG) 4603 *obufp++ = 'l'; 4604 else 4605 *obufp++ = 'w'; 4606 } 4607 used_prefixes |= (prefixes & PREFIX_DATA); 4608 } 4609 break; 4610 case 'U': 4611 if (intel_syntax) 4612 break; 4613 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4614 { 4615 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4616 *obufp++ = 'q'; 4617 break; 4618 } 4619 /* Fall through. */ 4620 case 'Q': 4621 if (intel_syntax && !alt) 4622 break; 4623 USED_REX (REX_W); 4624 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4625 { 4626 if (rex & REX_W) 4627 *obufp++ = 'q'; 4628 else 4629 { 4630 if (sizeflag & DFLAG) 4631 *obufp++ = intel_syntax ? 'd' : 'l'; 4632 else 4633 *obufp++ = 'w'; 4634 } 4635 used_prefixes |= (prefixes & PREFIX_DATA); 4636 } 4637 break; 4638 case 'R': 4639 USED_REX (REX_W); 4640 if (rex & REX_W) 4641 *obufp++ = 'q'; 4642 else if (sizeflag & DFLAG) 4643 { 4644 if (intel_syntax) 4645 *obufp++ = 'd'; 4646 else 4647 *obufp++ = 'l'; 4648 } 4649 else 4650 *obufp++ = 'w'; 4651 if (intel_syntax && !p[1] 4652 && ((rex & REX_W) || (sizeflag & DFLAG))) 4653 *obufp++ = 'e'; 4654 if (!(rex & REX_W)) 4655 used_prefixes |= (prefixes & PREFIX_DATA); 4656 break; 4657 case 'V': 4658 if (intel_syntax) 4659 break; 4660 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4661 { 4662 if (sizeflag & SUFFIX_ALWAYS) 4663 *obufp++ = 'q'; 4664 break; 4665 } 4666 /* Fall through. */ 4667 case 'S': 4668 if (intel_syntax) 4669 break; 4670 if (sizeflag & SUFFIX_ALWAYS) 4671 { 4672 if (rex & REX_W) 4673 *obufp++ = 'q'; 4674 else 4675 { 4676 if (sizeflag & DFLAG) 4677 *obufp++ = 'l'; 4678 else 4679 *obufp++ = 'w'; 4680 used_prefixes |= (prefixes & PREFIX_DATA); 4681 } 4682 } 4683 break; 4684 case 'X': 4685 if (prefixes & PREFIX_DATA) 4686 *obufp++ = 'd'; 4687 else 4688 *obufp++ = 's'; 4689 used_prefixes |= (prefixes & PREFIX_DATA); 4690 break; 4691 case 'Y': 4692 if (intel_syntax) 4693 break; 4694 if (rex & REX_W) 4695 { 4696 USED_REX (REX_W); 4697 *obufp++ = 'q'; 4698 } 4699 break; 4700 /* implicit operand size 'l' for i386 or 'q' for x86-64 */ 4701 case 'W': 4702 /* operand size flag for cwtl, cbtw */ 4703 USED_REX (REX_W); 4704 if (rex & REX_W) 4705 { 4706 if (intel_syntax) 4707 *obufp++ = 'd'; 4708 else 4709 *obufp++ = 'l'; 4710 } 4711 else if (sizeflag & DFLAG) 4712 *obufp++ = 'w'; 4713 else 4714 *obufp++ = 'b'; 4715 if (!(rex & REX_W)) 4716 used_prefixes |= (prefixes & PREFIX_DATA); 4717 break; 4718 } 4719 alt = 0; 4720 } 4721 *obufp = 0; 4722 return 0; 4723} 4724 4725static void 4726oappend (const char *s) 4727{ 4728 strcpy (obufp, s); 4729 obufp += strlen (s); 4730} 4731 4732static void 4733append_seg (void) 4734{ 4735 if (prefixes & PREFIX_CS) 4736 { 4737 used_prefixes |= PREFIX_CS; 4738 oappend ("%cs:" + intel_syntax); 4739 } 4740 if (prefixes & PREFIX_DS) 4741 { 4742 used_prefixes |= PREFIX_DS; 4743 oappend ("%ds:" + intel_syntax); 4744 } 4745 if (prefixes & PREFIX_SS) 4746 { 4747 used_prefixes |= PREFIX_SS; 4748 oappend ("%ss:" + intel_syntax); 4749 } 4750 if (prefixes & PREFIX_ES) 4751 { 4752 used_prefixes |= PREFIX_ES; 4753 oappend ("%es:" + intel_syntax); 4754 } 4755 if (prefixes & PREFIX_FS) 4756 { 4757 used_prefixes |= PREFIX_FS; 4758 oappend ("%fs:" + intel_syntax); 4759 } 4760 if (prefixes & PREFIX_GS) 4761 { 4762 used_prefixes |= PREFIX_GS; 4763 oappend ("%gs:" + intel_syntax); 4764 } 4765} 4766 4767static void 4768OP_indirE (int bytemode, int sizeflag) 4769{ 4770 if (!intel_syntax) 4771 oappend ("*"); 4772 OP_E (bytemode, sizeflag); 4773} 4774 4775static void 4776print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp) 4777{ 4778 if (address_mode == mode_64bit) 4779 { 4780 if (hex) 4781 { 4782 char tmp[30]; 4783 int i; 4784 buf[0] = '0'; 4785 buf[1] = 'x'; 4786 snprintf_vma (tmp, sizeof(tmp), disp); 4787 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++) { 4788 } 4789 pstrcpy (buf + 2, bufsize - 2, tmp + i); 4790 } 4791 else 4792 { 4793 bfd_signed_vma v = disp; 4794 char tmp[30]; 4795 int i; 4796 if (v < 0) 4797 { 4798 *(buf++) = '-'; 4799 v = -disp; 4800 /* Check for possible overflow on 0x8000000000000000. */ 4801 if (v < 0) 4802 { 4803 pstrcpy (buf, bufsize, "9223372036854775808"); 4804 return; 4805 } 4806 } 4807 if (!v) 4808 { 4809 pstrcpy (buf, bufsize, "0"); 4810 return; 4811 } 4812 4813 i = 0; 4814 tmp[29] = 0; 4815 while (v) 4816 { 4817 tmp[28 - i] = (v % 10) + '0'; 4818 v /= 10; 4819 i++; 4820 } 4821 pstrcpy (buf, bufsize, tmp + 29 - i); 4822 } 4823 } 4824 else 4825 { 4826 if (hex) 4827 snprintf (buf, bufsize, "0x%x", (unsigned int) disp); 4828 else 4829 snprintf (buf, bufsize, "%d", (int) disp); 4830 } 4831} 4832 4833/* Put DISP in BUF as signed hex number. */ 4834 4835static void 4836print_displacement (char *buf, bfd_vma disp) 4837{ 4838 bfd_signed_vma val = disp; 4839 char tmp[30]; 4840 int i, j = 0; 4841 4842 if (val < 0) 4843 { 4844 buf[j++] = '-'; 4845 val = -disp; 4846 4847 /* Check for possible overflow. */ 4848 if (val < 0) 4849 { 4850 switch (address_mode) 4851 { 4852 case mode_64bit: 4853 strcpy (buf + j, "0x8000000000000000"); 4854 break; 4855 case mode_32bit: 4856 strcpy (buf + j, "0x80000000"); 4857 break; 4858 case mode_16bit: 4859 strcpy (buf + j, "0x8000"); 4860 break; 4861 } 4862 return; 4863 } 4864 } 4865 4866 buf[j++] = '0'; 4867 buf[j++] = 'x'; 4868 4869 snprintf_vma (tmp, sizeof(tmp), val); 4870 for (i = 0; tmp[i] == '0'; i++) 4871 continue; 4872 if (tmp[i] == '\0') 4873 i--; 4874 strcpy (buf + j, tmp + i); 4875} 4876 4877static void 4878intel_operand_size (int bytemode, int sizeflag) 4879{ 4880 switch (bytemode) 4881 { 4882 case b_mode: 4883 case dqb_mode: 4884 oappend ("BYTE PTR "); 4885 break; 4886 case w_mode: 4887 case dqw_mode: 4888 oappend ("WORD PTR "); 4889 break; 4890 case stack_v_mode: 4891 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4892 { 4893 oappend ("QWORD PTR "); 4894 used_prefixes |= (prefixes & PREFIX_DATA); 4895 break; 4896 } 4897 /* FALLTHRU */ 4898 case v_mode: 4899 case dq_mode: 4900 USED_REX (REX_W); 4901 if (rex & REX_W) 4902 oappend ("QWORD PTR "); 4903 else if ((sizeflag & DFLAG) || bytemode == dq_mode) 4904 oappend ("DWORD PTR "); 4905 else 4906 oappend ("WORD PTR "); 4907 used_prefixes |= (prefixes & PREFIX_DATA); 4908 break; 4909 case z_mode: 4910 if ((rex & REX_W) || (sizeflag & DFLAG)) 4911 *obufp++ = 'D'; 4912 oappend ("WORD PTR "); 4913 if (!(rex & REX_W)) 4914 used_prefixes |= (prefixes & PREFIX_DATA); 4915 break; 4916 case d_mode: 4917 case dqd_mode: 4918 oappend ("DWORD PTR "); 4919 break; 4920 case q_mode: 4921 oappend ("QWORD PTR "); 4922 break; 4923 case m_mode: 4924 if (address_mode == mode_64bit) 4925 oappend ("QWORD PTR "); 4926 else 4927 oappend ("DWORD PTR "); 4928 break; 4929 case f_mode: 4930 if (sizeflag & DFLAG) 4931 oappend ("FWORD PTR "); 4932 else 4933 oappend ("DWORD PTR "); 4934 used_prefixes |= (prefixes & PREFIX_DATA); 4935 break; 4936 case t_mode: 4937 oappend ("TBYTE PTR "); 4938 break; 4939 case x_mode: 4940 oappend ("XMMWORD PTR "); 4941 break; 4942 case o_mode: 4943 oappend ("OWORD PTR "); 4944 break; 4945 default: 4946 break; 4947 } 4948} 4949 4950static void 4951OP_E (int bytemode, int sizeflag) 4952{ 4953 bfd_vma disp; 4954 int add = 0; 4955 int riprel = 0; 4956 USED_REX (REX_B); 4957 if (rex & REX_B) 4958 add += 8; 4959 4960 /* Skip mod/rm byte. */ 4961 MODRM_CHECK; 4962 codep++; 4963 4964 if (modrm.mod == 3) 4965 { 4966 switch (bytemode) 4967 { 4968 case b_mode: 4969 USED_REX (0); 4970 if (rex) 4971 oappend (names8rex[modrm.rm + add]); 4972 else 4973 oappend (names8[modrm.rm + add]); 4974 break; 4975 case w_mode: 4976 oappend (names16[modrm.rm + add]); 4977 break; 4978 case d_mode: 4979 oappend (names32[modrm.rm + add]); 4980 break; 4981 case q_mode: 4982 oappend (names64[modrm.rm + add]); 4983 break; 4984 case m_mode: 4985 if (address_mode == mode_64bit) 4986 oappend (names64[modrm.rm + add]); 4987 else 4988 oappend (names32[modrm.rm + add]); 4989 break; 4990 case stack_v_mode: 4991 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4992 { 4993 oappend (names64[modrm.rm + add]); 4994 used_prefixes |= (prefixes & PREFIX_DATA); 4995 break; 4996 } 4997 bytemode = v_mode; 4998 /* FALLTHRU */ 4999 case v_mode: 5000 case dq_mode: 5001 case dqb_mode: 5002 case dqd_mode: 5003 case dqw_mode: 5004 USED_REX (REX_W); 5005 if (rex & REX_W) 5006 oappend (names64[modrm.rm + add]); 5007 else if ((sizeflag & DFLAG) || bytemode != v_mode) 5008 oappend (names32[modrm.rm + add]); 5009 else 5010 oappend (names16[modrm.rm + add]); 5011 used_prefixes |= (prefixes & PREFIX_DATA); 5012 break; 5013 case 0: 5014 break; 5015 default: 5016 oappend (INTERNAL_DISASSEMBLER_ERROR); 5017 break; 5018 } 5019 return; 5020 } 5021 5022 disp = 0; 5023 if (intel_syntax) 5024 intel_operand_size (bytemode, sizeflag); 5025 append_seg (); 5026 5027 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 5028 { 5029 /* 32/64 bit address mode */ 5030 int havedisp; 5031 int havesib; 5032 int havebase; 5033 int base; 5034 int index = 0; 5035 int scale = 0; 5036 5037 havesib = 0; 5038 havebase = 1; 5039 base = modrm.rm; 5040 5041 if (base == 4) 5042 { 5043 havesib = 1; 5044 fetch_data(the_info, codep + 1); 5045 index = (*codep >> 3) & 7; 5046 if (address_mode == mode_64bit || index != 0x4) 5047 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */ 5048 scale = (*codep >> 6) & 3; 5049 base = *codep & 7; 5050 USED_REX (REX_X); 5051 if (rex & REX_X) 5052 index += 8; 5053 codep++; 5054 } 5055 base += add; 5056 5057 switch (modrm.mod) 5058 { 5059 case 0: 5060 if ((base & 7) == 5) 5061 { 5062 havebase = 0; 5063 if (address_mode == mode_64bit && !havesib) 5064 riprel = 1; 5065 disp = get32s (); 5066 } 5067 break; 5068 case 1: 5069 fetch_data (the_info, codep + 1); 5070 disp = *codep++; 5071 if ((disp & 0x80) != 0) 5072 disp -= 0x100; 5073 break; 5074 case 2: 5075 disp = get32s (); 5076 break; 5077 } 5078 5079 havedisp = havebase || (havesib && (index != 4 || scale != 0)); 5080 5081 if (!intel_syntax) 5082 if (modrm.mod != 0 || (base & 7) == 5) 5083 { 5084 if (havedisp || riprel) 5085 print_displacement (scratchbuf, disp); 5086 else 5087 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp); 5088 oappend (scratchbuf); 5089 if (riprel) 5090 { 5091 set_op (disp, 1); 5092 oappend ("(%rip)"); 5093 } 5094 } 5095 5096 if (havedisp || (intel_syntax && riprel)) 5097 { 5098 *obufp++ = open_char; 5099 if (intel_syntax && riprel) 5100 { 5101 set_op (disp, 1); 5102 oappend ("rip"); 5103 } 5104 *obufp = '\0'; 5105 if (havebase) 5106 oappend (address_mode == mode_64bit && (sizeflag & AFLAG) 5107 ? names64[base] : names32[base]); 5108 if (havesib) 5109 { 5110 if (index != 4) 5111 { 5112 if (!intel_syntax || havebase) 5113 { 5114 *obufp++ = separator_char; 5115 *obufp = '\0'; 5116 } 5117 oappend (address_mode == mode_64bit && (sizeflag & AFLAG) 5118 ? names64[index] : names32[index]); 5119 } 5120 if (scale != 0 || (!intel_syntax && index != 4)) 5121 { 5122 *obufp++ = scale_char; 5123 *obufp = '\0'; 5124 snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale); 5125 oappend (scratchbuf); 5126 } 5127 } 5128 if (intel_syntax 5129 && (disp || modrm.mod != 0 || (base & 7) == 5)) 5130 { 5131 if ((bfd_signed_vma) disp >= 0) 5132 { 5133 *obufp++ = '+'; 5134 *obufp = '\0'; 5135 } 5136 else if (modrm.mod != 1) 5137 { 5138 *obufp++ = '-'; 5139 *obufp = '\0'; 5140 disp = - (bfd_signed_vma) disp; 5141 } 5142 5143 print_displacement (scratchbuf, disp); 5144 oappend (scratchbuf); 5145 } 5146 5147 *obufp++ = close_char; 5148 *obufp = '\0'; 5149 } 5150 else if (intel_syntax) 5151 { 5152 if (modrm.mod != 0 || (base & 7) == 5) 5153 { 5154 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5155 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 5156 ; 5157 else 5158 { 5159 oappend (names_seg[ds_reg - es_reg]); 5160 oappend (":"); 5161 } 5162 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp); 5163 oappend (scratchbuf); 5164 } 5165 } 5166 } 5167 else 5168 { /* 16 bit address mode */ 5169 switch (modrm.mod) 5170 { 5171 case 0: 5172 if (modrm.rm == 6) 5173 { 5174 disp = get16 (); 5175 if ((disp & 0x8000) != 0) 5176 disp -= 0x10000; 5177 } 5178 break; 5179 case 1: 5180 fetch_data(the_info, codep + 1); 5181 disp = *codep++; 5182 if ((disp & 0x80) != 0) 5183 disp -= 0x100; 5184 break; 5185 case 2: 5186 disp = get16 (); 5187 if ((disp & 0x8000) != 0) 5188 disp -= 0x10000; 5189 break; 5190 } 5191 5192 if (!intel_syntax) 5193 if (modrm.mod != 0 || modrm.rm == 6) 5194 { 5195 print_displacement (scratchbuf, disp); 5196 oappend (scratchbuf); 5197 } 5198 5199 if (modrm.mod != 0 || modrm.rm != 6) 5200 { 5201 *obufp++ = open_char; 5202 *obufp = '\0'; 5203 oappend (index16[modrm.rm]); 5204 if (intel_syntax 5205 && (disp || modrm.mod != 0 || modrm.rm == 6)) 5206 { 5207 if ((bfd_signed_vma) disp >= 0) 5208 { 5209 *obufp++ = '+'; 5210 *obufp = '\0'; 5211 } 5212 else if (modrm.mod != 1) 5213 { 5214 *obufp++ = '-'; 5215 *obufp = '\0'; 5216 disp = - (bfd_signed_vma) disp; 5217 } 5218 5219 print_displacement (scratchbuf, disp); 5220 oappend (scratchbuf); 5221 } 5222 5223 *obufp++ = close_char; 5224 *obufp = '\0'; 5225 } 5226 else if (intel_syntax) 5227 { 5228 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5229 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 5230 ; 5231 else 5232 { 5233 oappend (names_seg[ds_reg - es_reg]); 5234 oappend (":"); 5235 } 5236 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, 5237 disp & 0xffff); 5238 oappend (scratchbuf); 5239 } 5240 } 5241} 5242 5243static void 5244OP_G (int bytemode, int sizeflag) 5245{ 5246 int add = 0; 5247 USED_REX (REX_R); 5248 if (rex & REX_R) 5249 add += 8; 5250 switch (bytemode) 5251 { 5252 case b_mode: 5253 USED_REX (0); 5254 if (rex) 5255 oappend (names8rex[modrm.reg + add]); 5256 else 5257 oappend (names8[modrm.reg + add]); 5258 break; 5259 case w_mode: 5260 oappend (names16[modrm.reg + add]); 5261 break; 5262 case d_mode: 5263 oappend (names32[modrm.reg + add]); 5264 break; 5265 case q_mode: 5266 oappend (names64[modrm.reg + add]); 5267 break; 5268 case v_mode: 5269 case dq_mode: 5270 case dqb_mode: 5271 case dqd_mode: 5272 case dqw_mode: 5273 USED_REX (REX_W); 5274 if (rex & REX_W) 5275 oappend (names64[modrm.reg + add]); 5276 else if ((sizeflag & DFLAG) || bytemode != v_mode) 5277 oappend (names32[modrm.reg + add]); 5278 else 5279 oappend (names16[modrm.reg + add]); 5280 used_prefixes |= (prefixes & PREFIX_DATA); 5281 break; 5282 case m_mode: 5283 if (address_mode == mode_64bit) 5284 oappend (names64[modrm.reg + add]); 5285 else 5286 oappend (names32[modrm.reg + add]); 5287 break; 5288 default: 5289 oappend (INTERNAL_DISASSEMBLER_ERROR); 5290 break; 5291 } 5292} 5293 5294static bfd_vma 5295get64 (void) 5296{ 5297 bfd_vma x; 5298#ifdef BFD64 5299 unsigned int a; 5300 unsigned int b; 5301 5302 fetch_data(the_info, codep + 8); 5303 a = *codep++ & 0xff; 5304 a |= (*codep++ & 0xff) << 8; 5305 a |= (*codep++ & 0xff) << 16; 5306 a |= (*codep++ & 0xff) << 24; 5307 b = *codep++ & 0xff; 5308 b |= (*codep++ & 0xff) << 8; 5309 b |= (*codep++ & 0xff) << 16; 5310 b |= (*codep++ & 0xff) << 24; 5311 x = a + ((bfd_vma) b << 32); 5312#else 5313 abort (); 5314 x = 0; 5315#endif 5316 return x; 5317} 5318 5319static bfd_signed_vma 5320get32 (void) 5321{ 5322 bfd_signed_vma x = 0; 5323 5324 fetch_data(the_info, codep + 4); 5325 x = *codep++ & (bfd_signed_vma) 0xff; 5326 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 5327 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 5328 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 5329 return x; 5330} 5331 5332static bfd_signed_vma 5333get32s (void) 5334{ 5335 bfd_signed_vma x = 0; 5336 5337 fetch_data(the_info, codep + 4); 5338 x = *codep++ & (bfd_signed_vma) 0xff; 5339 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 5340 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 5341 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 5342 5343 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); 5344 5345 return x; 5346} 5347 5348static int 5349get16 (void) 5350{ 5351 int x = 0; 5352 5353 fetch_data(the_info, codep + 2); 5354 x = *codep++ & 0xff; 5355 x |= (*codep++ & 0xff) << 8; 5356 return x; 5357} 5358 5359static void 5360set_op (bfd_vma op, int riprel) 5361{ 5362 op_index[op_ad] = op_ad; 5363 if (address_mode == mode_64bit) 5364 { 5365 op_address[op_ad] = op; 5366 op_riprel[op_ad] = riprel; 5367 } 5368 else 5369 { 5370 /* Mask to get a 32-bit address. */ 5371 op_address[op_ad] = op & 0xffffffff; 5372 op_riprel[op_ad] = riprel & 0xffffffff; 5373 } 5374} 5375 5376static void 5377OP_REG (int code, int sizeflag) 5378{ 5379 const char *s; 5380 int add = 0; 5381 USED_REX (REX_B); 5382 if (rex & REX_B) 5383 add = 8; 5384 5385 switch (code) 5386 { 5387 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 5388 case sp_reg: case bp_reg: case si_reg: case di_reg: 5389 s = names16[code - ax_reg + add]; 5390 break; 5391 case es_reg: case ss_reg: case cs_reg: 5392 case ds_reg: case fs_reg: case gs_reg: 5393 s = names_seg[code - es_reg + add]; 5394 break; 5395 case al_reg: case ah_reg: case cl_reg: case ch_reg: 5396 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 5397 USED_REX (0); 5398 if (rex) 5399 s = names8rex[code - al_reg + add]; 5400 else 5401 s = names8[code - al_reg]; 5402 break; 5403 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: 5404 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: 5405 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 5406 { 5407 s = names64[code - rAX_reg + add]; 5408 break; 5409 } 5410 code += eAX_reg - rAX_reg; 5411 /* Fall through. */ 5412 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 5413 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 5414 USED_REX (REX_W); 5415 if (rex & REX_W) 5416 s = names64[code - eAX_reg + add]; 5417 else if (sizeflag & DFLAG) 5418 s = names32[code - eAX_reg + add]; 5419 else 5420 s = names16[code - eAX_reg + add]; 5421 used_prefixes |= (prefixes & PREFIX_DATA); 5422 break; 5423 default: 5424 s = INTERNAL_DISASSEMBLER_ERROR; 5425 break; 5426 } 5427 oappend (s); 5428} 5429 5430static void 5431OP_IMREG (int code, int sizeflag) 5432{ 5433 const char *s; 5434 5435 switch (code) 5436 { 5437 case indir_dx_reg: 5438 if (intel_syntax) 5439 s = "dx"; 5440 else 5441 s = "(%dx)"; 5442 break; 5443 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 5444 case sp_reg: case bp_reg: case si_reg: case di_reg: 5445 s = names16[code - ax_reg]; 5446 break; 5447 case es_reg: case ss_reg: case cs_reg: 5448 case ds_reg: case fs_reg: case gs_reg: 5449 s = names_seg[code - es_reg]; 5450 break; 5451 case al_reg: case ah_reg: case cl_reg: case ch_reg: 5452 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 5453 USED_REX (0); 5454 if (rex) 5455 s = names8rex[code - al_reg]; 5456 else 5457 s = names8[code - al_reg]; 5458 break; 5459 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 5460 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 5461 USED_REX (REX_W); 5462 if (rex & REX_W) 5463 s = names64[code - eAX_reg]; 5464 else if (sizeflag & DFLAG) 5465 s = names32[code - eAX_reg]; 5466 else 5467 s = names16[code - eAX_reg]; 5468 used_prefixes |= (prefixes & PREFIX_DATA); 5469 break; 5470 case z_mode_ax_reg: 5471 if ((rex & REX_W) || (sizeflag & DFLAG)) 5472 s = *names32; 5473 else 5474 s = *names16; 5475 if (!(rex & REX_W)) 5476 used_prefixes |= (prefixes & PREFIX_DATA); 5477 break; 5478 default: 5479 s = INTERNAL_DISASSEMBLER_ERROR; 5480 break; 5481 } 5482 oappend (s); 5483} 5484 5485static void 5486OP_I (int bytemode, int sizeflag) 5487{ 5488 bfd_signed_vma op; 5489 bfd_signed_vma mask = -1; 5490 5491 switch (bytemode) 5492 { 5493 case b_mode: 5494 fetch_data(the_info, codep + 1); 5495 op = *codep++; 5496 mask = 0xff; 5497 break; 5498 case q_mode: 5499 if (address_mode == mode_64bit) 5500 { 5501 op = get32s (); 5502 break; 5503 } 5504 /* Fall through. */ 5505 case v_mode: 5506 USED_REX (REX_W); 5507 if (rex & REX_W) 5508 op = get32s (); 5509 else if (sizeflag & DFLAG) 5510 { 5511 op = get32 (); 5512 mask = 0xffffffff; 5513 } 5514 else 5515 { 5516 op = get16 (); 5517 mask = 0xfffff; 5518 } 5519 used_prefixes |= (prefixes & PREFIX_DATA); 5520 break; 5521 case w_mode: 5522 mask = 0xfffff; 5523 op = get16 (); 5524 break; 5525 case const_1_mode: 5526 if (intel_syntax) 5527 oappend ("1"); 5528 return; 5529 default: 5530 oappend (INTERNAL_DISASSEMBLER_ERROR); 5531 return; 5532 } 5533 5534 op &= mask; 5535 scratchbuf[0] = '$'; 5536 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op); 5537 oappend (scratchbuf + intel_syntax); 5538 scratchbuf[0] = '\0'; 5539} 5540 5541static void 5542OP_I64 (int bytemode, int sizeflag) 5543{ 5544 bfd_signed_vma op; 5545 bfd_signed_vma mask = -1; 5546 5547 if (address_mode != mode_64bit) 5548 { 5549 OP_I (bytemode, sizeflag); 5550 return; 5551 } 5552 5553 switch (bytemode) 5554 { 5555 case b_mode: 5556 fetch_data(the_info, codep + 1); 5557 op = *codep++; 5558 mask = 0xff; 5559 break; 5560 case v_mode: 5561 USED_REX (REX_W); 5562 if (rex & REX_W) 5563 op = get64 (); 5564 else if (sizeflag & DFLAG) 5565 { 5566 op = get32 (); 5567 mask = 0xffffffff; 5568 } 5569 else 5570 { 5571 op = get16 (); 5572 mask = 0xfffff; 5573 } 5574 used_prefixes |= (prefixes & PREFIX_DATA); 5575 break; 5576 case w_mode: 5577 mask = 0xfffff; 5578 op = get16 (); 5579 break; 5580 default: 5581 oappend (INTERNAL_DISASSEMBLER_ERROR); 5582 return; 5583 } 5584 5585 op &= mask; 5586 scratchbuf[0] = '$'; 5587 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op); 5588 oappend (scratchbuf + intel_syntax); 5589 scratchbuf[0] = '\0'; 5590} 5591 5592static void 5593OP_sI (int bytemode, int sizeflag) 5594{ 5595 bfd_signed_vma op; 5596 5597 switch (bytemode) 5598 { 5599 case b_mode: 5600 fetch_data(the_info, codep + 1); 5601 op = *codep++; 5602 if ((op & 0x80) != 0) 5603 op -= 0x100; 5604 break; 5605 case v_mode: 5606 USED_REX (REX_W); 5607 if (rex & REX_W) 5608 op = get32s (); 5609 else if (sizeflag & DFLAG) 5610 { 5611 op = get32s (); 5612 } 5613 else 5614 { 5615 op = get16 (); 5616 if ((op & 0x8000) != 0) 5617 op -= 0x10000; 5618 } 5619 used_prefixes |= (prefixes & PREFIX_DATA); 5620 break; 5621 case w_mode: 5622 op = get16 (); 5623 if ((op & 0x8000) != 0) 5624 op -= 0x10000; 5625 break; 5626 default: 5627 oappend (INTERNAL_DISASSEMBLER_ERROR); 5628 return; 5629 } 5630 5631 scratchbuf[0] = '$'; 5632 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op); 5633 oappend (scratchbuf + intel_syntax); 5634} 5635 5636static void 5637OP_J (int bytemode, int sizeflag) 5638{ 5639 bfd_vma disp; 5640 bfd_vma mask = -1; 5641 bfd_vma segment = 0; 5642 5643 switch (bytemode) 5644 { 5645 case b_mode: 5646 fetch_data(the_info, codep + 1); 5647 disp = *codep++; 5648 if ((disp & 0x80) != 0) 5649 disp -= 0x100; 5650 break; 5651 case v_mode: 5652 if ((sizeflag & DFLAG) || (rex & REX_W)) 5653 disp = get32s (); 5654 else 5655 { 5656 disp = get16 (); 5657 if ((disp & 0x8000) != 0) 5658 disp -= 0x10000; 5659 /* In 16bit mode, address is wrapped around at 64k within 5660 the same segment. Otherwise, a data16 prefix on a jump 5661 instruction means that the pc is masked to 16 bits after 5662 the displacement is added! */ 5663 mask = 0xffff; 5664 if ((prefixes & PREFIX_DATA) == 0) 5665 segment = ((start_pc + codep - start_codep) 5666 & ~((bfd_vma) 0xffff)); 5667 } 5668 used_prefixes |= (prefixes & PREFIX_DATA); 5669 break; 5670 default: 5671 oappend (INTERNAL_DISASSEMBLER_ERROR); 5672 return; 5673 } 5674 disp = ((start_pc + codep - start_codep + disp) & mask) | segment; 5675 set_op (disp, 0); 5676 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp); 5677 oappend (scratchbuf); 5678} 5679 5680static void 5681OP_SEG (int bytemode, int sizeflag) 5682{ 5683 if (bytemode == w_mode) 5684 oappend (names_seg[modrm.reg]); 5685 else 5686 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag); 5687} 5688 5689static void 5690OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag) 5691{ 5692 int seg, offset; 5693 5694 if (sizeflag & DFLAG) 5695 { 5696 offset = get32 (); 5697 seg = get16 (); 5698 } 5699 else 5700 { 5701 offset = get16 (); 5702 seg = get16 (); 5703 } 5704 used_prefixes |= (prefixes & PREFIX_DATA); 5705 if (intel_syntax) 5706 snprintf (scratchbuf, sizeof(scratchbuf), "0x%x:0x%x", seg, offset); 5707 else 5708 snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset); 5709 oappend (scratchbuf); 5710} 5711 5712static void 5713OP_OFF (int bytemode, int sizeflag) 5714{ 5715 bfd_vma off; 5716 5717 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 5718 intel_operand_size (bytemode, sizeflag); 5719 append_seg (); 5720 5721 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 5722 off = get32 (); 5723 else 5724 off = get16 (); 5725 5726 if (intel_syntax) 5727 { 5728 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5729 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 5730 { 5731 oappend (names_seg[ds_reg - es_reg]); 5732 oappend (":"); 5733 } 5734 } 5735 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off); 5736 oappend (scratchbuf); 5737} 5738 5739static void 5740OP_OFF64 (int bytemode, int sizeflag) 5741{ 5742 bfd_vma off; 5743 5744 if (address_mode != mode_64bit 5745 || (prefixes & PREFIX_ADDR)) 5746 { 5747 OP_OFF (bytemode, sizeflag); 5748 return; 5749 } 5750 5751 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 5752 intel_operand_size (bytemode, sizeflag); 5753 append_seg (); 5754 5755 off = get64 (); 5756 5757 if (intel_syntax) 5758 { 5759 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5760 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 5761 { 5762 oappend (names_seg[ds_reg - es_reg]); 5763 oappend (":"); 5764 } 5765 } 5766 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off); 5767 oappend (scratchbuf); 5768} 5769 5770static void 5771ptr_reg (int code, int sizeflag) 5772{ 5773 const char *s; 5774 5775 *obufp++ = open_char; 5776 used_prefixes |= (prefixes & PREFIX_ADDR); 5777 if (address_mode == mode_64bit) 5778 { 5779 if (!(sizeflag & AFLAG)) 5780 s = names32[code - eAX_reg]; 5781 else 5782 s = names64[code - eAX_reg]; 5783 } 5784 else if (sizeflag & AFLAG) 5785 s = names32[code - eAX_reg]; 5786 else 5787 s = names16[code - eAX_reg]; 5788 oappend (s); 5789 *obufp++ = close_char; 5790 *obufp = 0; 5791} 5792 5793static void 5794OP_ESreg (int code, int sizeflag) 5795{ 5796 if (intel_syntax) 5797 { 5798 switch (codep[-1]) 5799 { 5800 case 0x6d: /* insw/insl */ 5801 intel_operand_size (z_mode, sizeflag); 5802 break; 5803 case 0xa5: /* movsw/movsl/movsq */ 5804 case 0xa7: /* cmpsw/cmpsl/cmpsq */ 5805 case 0xab: /* stosw/stosl */ 5806 case 0xaf: /* scasw/scasl */ 5807 intel_operand_size (v_mode, sizeflag); 5808 break; 5809 default: 5810 intel_operand_size (b_mode, sizeflag); 5811 } 5812 } 5813 oappend ("%es:" + intel_syntax); 5814 ptr_reg (code, sizeflag); 5815} 5816 5817static void 5818OP_DSreg (int code, int sizeflag) 5819{ 5820 if (intel_syntax) 5821 { 5822 switch (codep[-1]) 5823 { 5824 case 0x6f: /* outsw/outsl */ 5825 intel_operand_size (z_mode, sizeflag); 5826 break; 5827 case 0xa5: /* movsw/movsl/movsq */ 5828 case 0xa7: /* cmpsw/cmpsl/cmpsq */ 5829 case 0xad: /* lodsw/lodsl/lodsq */ 5830 intel_operand_size (v_mode, sizeflag); 5831 break; 5832 default: 5833 intel_operand_size (b_mode, sizeflag); 5834 } 5835 } 5836 if ((prefixes 5837 & (PREFIX_CS 5838 | PREFIX_DS 5839 | PREFIX_SS 5840 | PREFIX_ES 5841 | PREFIX_FS 5842 | PREFIX_GS)) == 0) 5843 prefixes |= PREFIX_DS; 5844 append_seg (); 5845 ptr_reg (code, sizeflag); 5846} 5847 5848static void 5849OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5850{ 5851 int add = 0; 5852 if (rex & REX_R) 5853 { 5854 USED_REX (REX_R); 5855 add = 8; 5856 } 5857 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK)) 5858 { 5859 used_prefixes |= PREFIX_LOCK; 5860 add = 8; 5861 } 5862 snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add); 5863 oappend (scratchbuf + intel_syntax); 5864} 5865 5866static void 5867OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5868{ 5869 int add = 0; 5870 USED_REX (REX_R); 5871 if (rex & REX_R) 5872 add = 8; 5873 if (intel_syntax) 5874 snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add); 5875 else 5876 snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add); 5877 oappend (scratchbuf); 5878} 5879 5880static void 5881OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5882{ 5883 snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg); 5884 oappend (scratchbuf + intel_syntax); 5885} 5886 5887static void 5888OP_R (int bytemode, int sizeflag) 5889{ 5890 if (modrm.mod == 3) 5891 OP_E (bytemode, sizeflag); 5892 else 5893 BadOp (); 5894} 5895 5896static void 5897OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5898{ 5899 used_prefixes |= (prefixes & PREFIX_DATA); 5900 if (prefixes & PREFIX_DATA) 5901 { 5902 int add = 0; 5903 USED_REX (REX_R); 5904 if (rex & REX_R) 5905 add = 8; 5906 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add); 5907 } 5908 else 5909 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg); 5910 oappend (scratchbuf + intel_syntax); 5911} 5912 5913static void 5914OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5915{ 5916 int add = 0; 5917 USED_REX (REX_R); 5918 if (rex & REX_R) 5919 add = 8; 5920 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add); 5921 oappend (scratchbuf + intel_syntax); 5922} 5923 5924static void 5925OP_EM (int bytemode, int sizeflag) 5926{ 5927 if (modrm.mod != 3) 5928 { 5929 if (intel_syntax && bytemode == v_mode) 5930 { 5931 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; 5932 used_prefixes |= (prefixes & PREFIX_DATA); 5933 } 5934 OP_E (bytemode, sizeflag); 5935 return; 5936 } 5937 5938 /* Skip mod/rm byte. */ 5939 MODRM_CHECK; 5940 codep++; 5941 used_prefixes |= (prefixes & PREFIX_DATA); 5942 if (prefixes & PREFIX_DATA) 5943 { 5944 int add = 0; 5945 5946 USED_REX (REX_B); 5947 if (rex & REX_B) 5948 add = 8; 5949 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add); 5950 } 5951 else 5952 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm); 5953 oappend (scratchbuf + intel_syntax); 5954} 5955 5956/* cvt* are the only instructions in sse2 which have 5957 both SSE and MMX operands and also have 0x66 prefix 5958 in their opcode. 0x66 was originally used to differentiate 5959 between SSE and MMX instruction(operands). So we have to handle the 5960 cvt* separately using OP_EMC and OP_MXC */ 5961static void 5962OP_EMC (int bytemode, int sizeflag) 5963{ 5964 if (modrm.mod != 3) 5965 { 5966 if (intel_syntax && bytemode == v_mode) 5967 { 5968 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; 5969 used_prefixes |= (prefixes & PREFIX_DATA); 5970 } 5971 OP_E (bytemode, sizeflag); 5972 return; 5973 } 5974 5975 /* Skip mod/rm byte. */ 5976 MODRM_CHECK; 5977 codep++; 5978 used_prefixes |= (prefixes & PREFIX_DATA); 5979 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm); 5980 oappend (scratchbuf + intel_syntax); 5981} 5982 5983static void 5984OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5985{ 5986 used_prefixes |= (prefixes & PREFIX_DATA); 5987 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg); 5988 oappend (scratchbuf + intel_syntax); 5989} 5990 5991static void 5992OP_EX (int bytemode, int sizeflag) 5993{ 5994 int add = 0; 5995 if (modrm.mod != 3) 5996 { 5997 OP_E (bytemode, sizeflag); 5998 return; 5999 } 6000 USED_REX (REX_B); 6001 if (rex & REX_B) 6002 add = 8; 6003 6004 /* Skip mod/rm byte. */ 6005 MODRM_CHECK; 6006 codep++; 6007 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add); 6008 oappend (scratchbuf + intel_syntax); 6009} 6010 6011static void 6012OP_MS (int bytemode, int sizeflag) 6013{ 6014 if (modrm.mod == 3) 6015 OP_EM (bytemode, sizeflag); 6016 else 6017 BadOp (); 6018} 6019 6020static void 6021OP_XS (int bytemode, int sizeflag) 6022{ 6023 if (modrm.mod == 3) 6024 OP_EX (bytemode, sizeflag); 6025 else 6026 BadOp (); 6027} 6028 6029static void 6030OP_M (int bytemode, int sizeflag) 6031{ 6032 if (modrm.mod == 3) 6033 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */ 6034 BadOp (); 6035 else 6036 OP_E (bytemode, sizeflag); 6037} 6038 6039static void 6040OP_0f07 (int bytemode, int sizeflag) 6041{ 6042 if (modrm.mod != 3 || modrm.rm != 0) 6043 BadOp (); 6044 else 6045 OP_E (bytemode, sizeflag); 6046} 6047 6048static void 6049OP_0fae (int bytemode, int sizeflag) 6050{ 6051 if (modrm.mod == 3) 6052 { 6053 if (modrm.reg == 7) 6054 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); 6055 6056 if (modrm.reg < 5 || modrm.rm != 0) 6057 { 6058 BadOp (); /* bad sfence, mfence, or lfence */ 6059 return; 6060 } 6061 } 6062 else if (modrm.reg != 7) 6063 { 6064 BadOp (); /* bad clflush */ 6065 return; 6066 } 6067 6068 OP_E (bytemode, sizeflag); 6069} 6070 6071/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in 6072 32bit mode and "xchg %rax,%rax" in 64bit mode. */ 6073 6074static void 6075NOP_Fixup1 (int bytemode, int sizeflag) 6076{ 6077 if ((prefixes & PREFIX_DATA) != 0 6078 || (rex != 0 6079 && rex != 0x48 6080 && address_mode == mode_64bit)) 6081 OP_REG (bytemode, sizeflag); 6082 else 6083 strcpy (obuf, "nop"); 6084} 6085 6086static void 6087NOP_Fixup2 (int bytemode, int sizeflag) 6088{ 6089 if ((prefixes & PREFIX_DATA) != 0 6090 || (rex != 0 6091 && rex != 0x48 6092 && address_mode == mode_64bit)) 6093 OP_IMREG (bytemode, sizeflag); 6094} 6095 6096static const char *Suffix3DNow[] = { 6097/* 00 */ NULL, NULL, NULL, NULL, 6098/* 04 */ NULL, NULL, NULL, NULL, 6099/* 08 */ NULL, NULL, NULL, NULL, 6100/* 0C */ "pi2fw", "pi2fd", NULL, NULL, 6101/* 10 */ NULL, NULL, NULL, NULL, 6102/* 14 */ NULL, NULL, NULL, NULL, 6103/* 18 */ NULL, NULL, NULL, NULL, 6104/* 1C */ "pf2iw", "pf2id", NULL, NULL, 6105/* 20 */ NULL, NULL, NULL, NULL, 6106/* 24 */ NULL, NULL, NULL, NULL, 6107/* 28 */ NULL, NULL, NULL, NULL, 6108/* 2C */ NULL, NULL, NULL, NULL, 6109/* 30 */ NULL, NULL, NULL, NULL, 6110/* 34 */ NULL, NULL, NULL, NULL, 6111/* 38 */ NULL, NULL, NULL, NULL, 6112/* 3C */ NULL, NULL, NULL, NULL, 6113/* 40 */ NULL, NULL, NULL, NULL, 6114/* 44 */ NULL, NULL, NULL, NULL, 6115/* 48 */ NULL, NULL, NULL, NULL, 6116/* 4C */ NULL, NULL, NULL, NULL, 6117/* 50 */ NULL, NULL, NULL, NULL, 6118/* 54 */ NULL, NULL, NULL, NULL, 6119/* 58 */ NULL, NULL, NULL, NULL, 6120/* 5C */ NULL, NULL, NULL, NULL, 6121/* 60 */ NULL, NULL, NULL, NULL, 6122/* 64 */ NULL, NULL, NULL, NULL, 6123/* 68 */ NULL, NULL, NULL, NULL, 6124/* 6C */ NULL, NULL, NULL, NULL, 6125/* 70 */ NULL, NULL, NULL, NULL, 6126/* 74 */ NULL, NULL, NULL, NULL, 6127/* 78 */ NULL, NULL, NULL, NULL, 6128/* 7C */ NULL, NULL, NULL, NULL, 6129/* 80 */ NULL, NULL, NULL, NULL, 6130/* 84 */ NULL, NULL, NULL, NULL, 6131/* 88 */ NULL, NULL, "pfnacc", NULL, 6132/* 8C */ NULL, NULL, "pfpnacc", NULL, 6133/* 90 */ "pfcmpge", NULL, NULL, NULL, 6134/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", 6135/* 98 */ NULL, NULL, "pfsub", NULL, 6136/* 9C */ NULL, NULL, "pfadd", NULL, 6137/* A0 */ "pfcmpgt", NULL, NULL, NULL, 6138/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", 6139/* A8 */ NULL, NULL, "pfsubr", NULL, 6140/* AC */ NULL, NULL, "pfacc", NULL, 6141/* B0 */ "pfcmpeq", NULL, NULL, NULL, 6142/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw", 6143/* B8 */ NULL, NULL, NULL, "pswapd", 6144/* BC */ NULL, NULL, NULL, "pavgusb", 6145/* C0 */ NULL, NULL, NULL, NULL, 6146/* C4 */ NULL, NULL, NULL, NULL, 6147/* C8 */ NULL, NULL, NULL, NULL, 6148/* CC */ NULL, NULL, NULL, NULL, 6149/* D0 */ NULL, NULL, NULL, NULL, 6150/* D4 */ NULL, NULL, NULL, NULL, 6151/* D8 */ NULL, NULL, NULL, NULL, 6152/* DC */ NULL, NULL, NULL, NULL, 6153/* E0 */ NULL, NULL, NULL, NULL, 6154/* E4 */ NULL, NULL, NULL, NULL, 6155/* E8 */ NULL, NULL, NULL, NULL, 6156/* EC */ NULL, NULL, NULL, NULL, 6157/* F0 */ NULL, NULL, NULL, NULL, 6158/* F4 */ NULL, NULL, NULL, NULL, 6159/* F8 */ NULL, NULL, NULL, NULL, 6160/* FC */ NULL, NULL, NULL, NULL, 6161}; 6162 6163static void 6164OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 6165{ 6166 const char *mnemonic; 6167 6168 fetch_data(the_info, codep + 1); 6169 /* AMD 3DNow! instructions are specified by an opcode suffix in the 6170 place where an 8-bit immediate would normally go. ie. the last 6171 byte of the instruction. */ 6172 obufp = obuf + strlen (obuf); 6173 mnemonic = Suffix3DNow[*codep++ & 0xff]; 6174 if (mnemonic) 6175 oappend (mnemonic); 6176 else 6177 { 6178 /* Since a variable sized modrm/sib chunk is between the start 6179 of the opcode (0x0f0f) and the opcode suffix, we need to do 6180 all the modrm processing first, and don't know until now that 6181 we have a bad opcode. This necessitates some cleaning up. */ 6182 op_out[0][0] = '\0'; 6183 op_out[1][0] = '\0'; 6184 BadOp (); 6185 } 6186} 6187 6188static const char *simd_cmp_op[] = { 6189 "eq", 6190 "lt", 6191 "le", 6192 "unord", 6193 "neq", 6194 "nlt", 6195 "nle", 6196 "ord" 6197}; 6198 6199static void 6200OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 6201{ 6202 unsigned int cmp_type; 6203 6204 fetch_data(the_info, codep + 1); 6205 obufp = obuf + strlen (obuf); 6206 cmp_type = *codep++ & 0xff; 6207 if (cmp_type < 8) 6208 { 6209 char suffix1 = 'p', suffix2 = 's'; 6210 used_prefixes |= (prefixes & PREFIX_REPZ); 6211 if (prefixes & PREFIX_REPZ) 6212 suffix1 = 's'; 6213 else 6214 { 6215 used_prefixes |= (prefixes & PREFIX_DATA); 6216 if (prefixes & PREFIX_DATA) 6217 suffix2 = 'd'; 6218 else 6219 { 6220 used_prefixes |= (prefixes & PREFIX_REPNZ); 6221 if (prefixes & PREFIX_REPNZ) 6222 suffix1 = 's', suffix2 = 'd'; 6223 } 6224 } 6225 snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c", 6226 simd_cmp_op[cmp_type], suffix1, suffix2); 6227 used_prefixes |= (prefixes & PREFIX_REPZ); 6228 oappend (scratchbuf); 6229 } 6230 else 6231 { 6232 /* We have a bad extension byte. Clean up. */ 6233 op_out[0][0] = '\0'; 6234 op_out[1][0] = '\0'; 6235 BadOp (); 6236 } 6237} 6238 6239static void 6240SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED) 6241{ 6242 /* Change movlps/movhps to movhlps/movlhps for 2 register operand 6243 forms of these instructions. */ 6244 if (modrm.mod == 3) 6245 { 6246 char *p = obuf + strlen (obuf); 6247 *(p + 1) = '\0'; 6248 *p = *(p - 1); 6249 *(p - 1) = *(p - 2); 6250 *(p - 2) = *(p - 3); 6251 *(p - 3) = extrachar; 6252 } 6253} 6254 6255static void 6256PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6257{ 6258 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1) 6259 { 6260 /* Override "sidt". */ 6261 size_t olen = strlen (obuf); 6262 char *p = obuf + olen - 4; 6263 const char * const *names = (address_mode == mode_64bit 6264 ? names64 : names32); 6265 6266 /* We might have a suffix when disassembling with -Msuffix. */ 6267 if (*p == 'i') 6268 --p; 6269 6270 /* Remove "addr16/addr32" if we aren't in Intel mode. */ 6271 if (!intel_syntax 6272 && (prefixes & PREFIX_ADDR) 6273 && olen >= (4 + 7) 6274 && *(p - 1) == ' ' 6275 && strncmp (p - 7, "addr", 4) == 0 6276 && (strncmp (p - 3, "16", 2) == 0 6277 || strncmp (p - 3, "32", 2) == 0)) 6278 p -= 7; 6279 6280 if (modrm.rm) 6281 { 6282 /* mwait %eax,%ecx */ 6283 strcpy (p, "mwait"); 6284 if (!intel_syntax) 6285 strcpy (op_out[0], names[0]); 6286 } 6287 else 6288 { 6289 /* monitor %eax,%ecx,%edx" */ 6290 strcpy (p, "monitor"); 6291 if (!intel_syntax) 6292 { 6293 const char * const *op1_names; 6294 if (!(prefixes & PREFIX_ADDR)) 6295 op1_names = (address_mode == mode_16bit 6296 ? names16 : names); 6297 else 6298 { 6299 op1_names = (address_mode != mode_32bit 6300 ? names32 : names16); 6301 used_prefixes |= PREFIX_ADDR; 6302 } 6303 strcpy (op_out[0], op1_names[0]); 6304 strcpy (op_out[2], names[2]); 6305 } 6306 } 6307 if (!intel_syntax) 6308 { 6309 strcpy (op_out[1], names[1]); 6310 two_source_ops = 1; 6311 } 6312 6313 codep++; 6314 } 6315 else 6316 OP_M (0, sizeflag); 6317} 6318 6319static void 6320SVME_Fixup (int bytemode, int sizeflag) 6321{ 6322 const char *alt; 6323 char *p; 6324 6325 switch (*codep) 6326 { 6327 case 0xd8: 6328 alt = "vmrun"; 6329 break; 6330 case 0xd9: 6331 alt = "vmmcall"; 6332 break; 6333 case 0xda: 6334 alt = "vmload"; 6335 break; 6336 case 0xdb: 6337 alt = "vmsave"; 6338 break; 6339 case 0xdc: 6340 alt = "stgi"; 6341 break; 6342 case 0xdd: 6343 alt = "clgi"; 6344 break; 6345 case 0xde: 6346 alt = "skinit"; 6347 break; 6348 case 0xdf: 6349 alt = "invlpga"; 6350 break; 6351 default: 6352 OP_M (bytemode, sizeflag); 6353 return; 6354 } 6355 /* Override "lidt". */ 6356 p = obuf + strlen (obuf) - 4; 6357 /* We might have a suffix. */ 6358 if (*p == 'i') 6359 --p; 6360 strcpy (p, alt); 6361 if (!(prefixes & PREFIX_ADDR)) 6362 { 6363 ++codep; 6364 return; 6365 } 6366 used_prefixes |= PREFIX_ADDR; 6367 switch (*codep++) 6368 { 6369 case 0xdf: 6370 strcpy (op_out[1], names32[1]); 6371 two_source_ops = 1; 6372 /* Fall through. */ 6373 case 0xd8: 6374 case 0xda: 6375 case 0xdb: 6376 *obufp++ = open_char; 6377 if (address_mode == mode_64bit || (sizeflag & AFLAG)) 6378 alt = names32[0]; 6379 else 6380 alt = names16[0]; 6381 strcpy (obufp, alt); 6382 obufp += strlen (alt); 6383 *obufp++ = close_char; 6384 *obufp = '\0'; 6385 break; 6386 } 6387} 6388 6389static void 6390INVLPG_Fixup (int bytemode, int sizeflag) 6391{ 6392 const char *alt; 6393 6394 switch (*codep) 6395 { 6396 case 0xf8: 6397 alt = "swapgs"; 6398 break; 6399 case 0xf9: 6400 alt = "rdtscp"; 6401 break; 6402 default: 6403 OP_M (bytemode, sizeflag); 6404 return; 6405 } 6406 /* Override "invlpg". */ 6407 strcpy (obuf + strlen (obuf) - 6, alt); 6408 codep++; 6409} 6410 6411static void 6412BadOp (void) 6413{ 6414 /* Throw away prefixes and 1st. opcode byte. */ 6415 codep = insn_codep + 1; 6416 oappend ("(bad)"); 6417} 6418 6419static void 6420VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6421{ 6422 if (modrm.mod == 3 6423 && modrm.reg == 0 6424 && modrm.rm >=1 6425 && modrm.rm <= 4) 6426 { 6427 /* Override "sgdt". */ 6428 char *p = obuf + strlen (obuf) - 4; 6429 6430 /* We might have a suffix when disassembling with -Msuffix. */ 6431 if (*p == 'g') 6432 --p; 6433 6434 switch (modrm.rm) 6435 { 6436 case 1: 6437 strcpy (p, "vmcall"); 6438 break; 6439 case 2: 6440 strcpy (p, "vmlaunch"); 6441 break; 6442 case 3: 6443 strcpy (p, "vmresume"); 6444 break; 6445 case 4: 6446 strcpy (p, "vmxoff"); 6447 break; 6448 } 6449 6450 codep++; 6451 } 6452 else 6453 OP_E (0, sizeflag); 6454} 6455 6456static void 6457OP_VMX (int bytemode, int sizeflag) 6458{ 6459 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ)); 6460 if (prefixes & PREFIX_DATA) 6461 strcpy (obuf, "vmclear"); 6462 else if (prefixes & PREFIX_REPZ) 6463 strcpy (obuf, "vmxon"); 6464 else 6465 strcpy (obuf, "vmptrld"); 6466 OP_E (bytemode, sizeflag); 6467} 6468 6469static void 6470REP_Fixup (int bytemode, int sizeflag) 6471{ 6472 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs, 6473 lods and stos. */ 6474 size_t ilen = 0; 6475 6476 if (prefixes & PREFIX_REPZ) 6477 switch (*insn_codep) 6478 { 6479 case 0x6e: /* outsb */ 6480 case 0x6f: /* outsw/outsl */ 6481 case 0xa4: /* movsb */ 6482 case 0xa5: /* movsw/movsl/movsq */ 6483 if (!intel_syntax) 6484 ilen = 5; 6485 else 6486 ilen = 4; 6487 break; 6488 case 0xaa: /* stosb */ 6489 case 0xab: /* stosw/stosl/stosq */ 6490 case 0xac: /* lodsb */ 6491 case 0xad: /* lodsw/lodsl/lodsq */ 6492 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 6493 ilen = 5; 6494 else 6495 ilen = 4; 6496 break; 6497 case 0x6c: /* insb */ 6498 case 0x6d: /* insl/insw */ 6499 if (!intel_syntax) 6500 ilen = 4; 6501 else 6502 ilen = 3; 6503 break; 6504 default: 6505 abort (); 6506 break; 6507 } 6508 6509 if (ilen != 0) 6510 { 6511 size_t olen; 6512 char *p; 6513 6514 olen = strlen (obuf); 6515 p = obuf + olen - ilen - 1 - 4; 6516 /* Handle "repz [addr16|addr32]". */ 6517 if ((prefixes & PREFIX_ADDR)) 6518 p -= 1 + 6; 6519 6520 memmove (p + 3, p + 4, olen - (p + 3 - obuf)); 6521 } 6522 6523 switch (bytemode) 6524 { 6525 case al_reg: 6526 case eAX_reg: 6527 case indir_dx_reg: 6528 OP_IMREG (bytemode, sizeflag); 6529 break; 6530 case eDI_reg: 6531 OP_ESreg (bytemode, sizeflag); 6532 break; 6533 case eSI_reg: 6534 OP_DSreg (bytemode, sizeflag); 6535 break; 6536 default: 6537 abort (); 6538 break; 6539 } 6540} 6541 6542static void 6543CMPXCHG8B_Fixup (int bytemode, int sizeflag) 6544{ 6545 USED_REX (REX_W); 6546 if (rex & REX_W) 6547 { 6548 /* Change cmpxchg8b to cmpxchg16b. */ 6549 char *p = obuf + strlen (obuf) - 2; 6550 strcpy (p, "16b"); 6551 bytemode = o_mode; 6552 } 6553 OP_M (bytemode, sizeflag); 6554} 6555 6556static void 6557XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED) 6558{ 6559 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg); 6560 oappend (scratchbuf + intel_syntax); 6561} 6562 6563static void 6564CRC32_Fixup (int bytemode, int sizeflag) 6565{ 6566 /* Add proper suffix to "crc32". */ 6567 char *p = obuf + strlen (obuf); 6568 6569 switch (bytemode) 6570 { 6571 case b_mode: 6572 if (intel_syntax) 6573 break; 6574 6575 *p++ = 'b'; 6576 break; 6577 case v_mode: 6578 if (intel_syntax) 6579 break; 6580 6581 USED_REX (REX_W); 6582 if (rex & REX_W) 6583 *p++ = 'q'; 6584 else if (sizeflag & DFLAG) 6585 *p++ = 'l'; 6586 else 6587 *p++ = 'w'; 6588 used_prefixes |= (prefixes & PREFIX_DATA); 6589 break; 6590 default: 6591 oappend (INTERNAL_DISASSEMBLER_ERROR); 6592 break; 6593 } 6594 *p = '\0'; 6595 6596 if (modrm.mod == 3) 6597 { 6598 int add; 6599 6600 /* Skip mod/rm byte. */ 6601 MODRM_CHECK; 6602 codep++; 6603 6604 USED_REX (REX_B); 6605 add = (rex & REX_B) ? 8 : 0; 6606 if (bytemode == b_mode) 6607 { 6608 USED_REX (0); 6609 if (rex) 6610 oappend (names8rex[modrm.rm + add]); 6611 else 6612 oappend (names8[modrm.rm + add]); 6613 } 6614 else 6615 { 6616 USED_REX (REX_W); 6617 if (rex & REX_W) 6618 oappend (names64[modrm.rm + add]); 6619 else if ((prefixes & PREFIX_DATA)) 6620 oappend (names16[modrm.rm + add]); 6621 else 6622 oappend (names32[modrm.rm + add]); 6623 } 6624 } 6625 else 6626 OP_E (bytemode, sizeflag); 6627} 6628