android_mips.c revision f5bc01c356e1fa924ed07aadf589b3663873593e
1/* Copyright (C) 2007-2008 The Android Open Source Project
2**
3** This software is licensed under the terms of the GNU General Public
4** License version 2, as published by the Free Software Foundation, and
5** may be copied, distributed, and modified under those terms.
6**
7** This program is distributed in the hope that it will be useful,
8** but WITHOUT ANY WARRANTY; without even the implied warranty of
9** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10** GNU General Public License for more details.
11*/
12#include "hw/hw.h"
13#include "hw/boards.h"
14#include "hw/devices.h"
15#include "net/net.h"
16#include "sysemu/sysemu.h"
17#include "mips.h"
18#include "hw/android/goldfish/device.h"
19#include "android/globals.h"
20#include "audio/audio.h"
21#include "sysemu/blockdev.h"
22#ifdef CONFIG_MEMCHECK
23#include "memcheck/memcheck_api.h"
24#endif  // CONFIG_MEMCHECK
25
26#include "android/utils/debug.h"
27
28#define  D(...)  VERBOSE_PRINT(init,__VA_ARGS__)
29
30#define MIPS_CPU_SAVE_VERSION  1
31#define GOLDFISH_IO_SPACE       0x1f000000
32#define GOLDFISH_INTERRUPT	0x1f000000
33#define GOLDFISH_DEVICEBUS	0x1f001000
34#define GOLDFISH_TTY		0x1f002000
35#define GOLDFISH_RTC		0x1f003000
36#define GOLDFISH_AUDIO		0x1f004000
37#define GOLDFISH_MMC		0x1f005000
38#define GOLDFISH_MEMLOG		0x1f006000
39#define GOLDFISH_DEVICES	0x1f010000
40
41char* audio_input_source = NULL;
42
43void goldfish_memlog_init(uint32_t base);
44
45static struct goldfish_device event0_device = {
46    .name = "goldfish_events",
47    .id = 0,
48    .size = 0x1000,
49    .irq_count = 1
50};
51
52static struct goldfish_device nand_device = {
53    .name = "goldfish_nand",
54    .id = 0,
55    .size = 0x1000
56};
57
58/* Board init.  */
59
60#define TEST_SWITCH 1
61#if TEST_SWITCH
62uint32_t switch_test_write(void *opaque, uint32_t state)
63{
64    goldfish_switch_set_state(opaque, state);
65    return state;
66}
67#endif
68
69#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
70
71#define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
72
73static void android_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
74              const char *kernel_cmdline, const char *initrd_filename)
75{
76    int initrd_size;
77    ram_addr_t initrd_offset;
78    uint64_t kernel_entry, kernel_low, kernel_high;
79    unsigned int cmdline;
80
81    /* Load the kernel.  */
82    if (!kernel_filename) {
83        fprintf(stderr, "Kernel image must be specified\n");
84        exit(1);
85    }
86    if (load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND,
87         (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
88         (uint64_t *)&kernel_high) < 0) {
89    fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
90    exit(1);
91    }
92    env->active_tc.PC = (int32_t)kernel_entry;
93
94    /* load initrd */
95    initrd_size = 0;
96    initrd_offset = 0;
97    if (initrd_filename) {
98    initrd_size = get_image_size (initrd_filename);
99    if (initrd_size > 0) {
100        initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
101            if (initrd_offset + initrd_size > ram_size) {
102        fprintf(stderr,
103                        "qemu: memory too small for initial ram disk '%s'\n",
104                        initrd_filename);
105                exit(1);
106            }
107            initrd_size = load_image_targphys(initrd_filename,
108                                               initrd_offset,
109                                               ram_size - initrd_offset);
110
111    }
112        if (initrd_size == (target_ulong) -1) {
113        fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
114            initrd_filename);
115            exit(1);
116        }
117    }
118
119    /* Store command line in top page of memory
120     * kernel will copy the command line to a loca buffer
121     */
122    cmdline = ram_size - TARGET_PAGE_SIZE;
123    char kernel_cmd[1024];
124    if (initrd_size > 0)
125        sprintf (kernel_cmd, "%s rd_start=0x" TARGET_FMT_lx " rd_size=%li",
126                       kernel_cmdline,
127                       PHYS_TO_VIRT(initrd_offset), initrd_size);
128    else
129        strcpy (kernel_cmd, kernel_cmdline);
130
131    cpu_physical_memory_write(ram_size - TARGET_PAGE_SIZE, (void *)kernel_cmd, strlen(kernel_cmd) + 1);
132
133#if 0
134    if (initrd_size > 0)
135        sprintf (phys_ram_base+cmdline, "%s rd_start=0x" TARGET_FMT_lx " rd_size=%li",
136                       kernel_cmdline,
137                       PHYS_TO_VIRT(initrd_offset), initrd_size);
138    else
139        strcpy (phys_ram_base+cmdline, kernel_cmdline);
140#endif
141
142    env->active_tc.gpr[4] = PHYS_TO_VIRT(cmdline);/* a0 */
143    env->active_tc.gpr[5] = ram_size;       /* a1 */
144    env->active_tc.gpr[6] = 0;          /* a2 */
145    env->active_tc.gpr[7] = 0;          /* a3 */
146
147}
148
149
150static void android_mips_init_(ram_addr_t ram_size,
151    const char *boot_device,
152    const char *kernel_filename,
153    const char *kernel_cmdline,
154    const char *initrd_filename,
155    const char *cpu_model)
156{
157    CPUState *env;
158    qemu_irq *goldfish_pic;
159    int i;
160    ram_addr_t ram_offset;
161
162    if (!cpu_model)
163        cpu_model = "24Kf";
164
165    env = cpu_init(cpu_model);
166
167    register_savevm( "cpu", 0, MIPS_CPU_SAVE_VERSION, cpu_save, cpu_load, env );
168
169    if (ram_size > GOLDFISH_IO_SPACE)
170        ram_size = GOLDFISH_IO_SPACE;   /* avoid overlap of ram and IO regs */
171    ram_offset = qemu_ram_alloc(NULL, "android_mips", ram_size);
172    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
173
174    /* Init internal devices */
175    cpu_mips_irq_init_cpu(env);
176    cpu_mips_clock_init(env);
177
178    goldfish_pic = goldfish_interrupt_init(GOLDFISH_INTERRUPT,
179					   env->irq[2], env->irq[3]);
180    goldfish_device_init(goldfish_pic, GOLDFISH_DEVICES, 0x7f0000, 10, 22);
181
182    goldfish_device_bus_init(GOLDFISH_DEVICEBUS, 1);
183
184    goldfish_timer_and_rtc_init(GOLDFISH_RTC, 3);
185
186    goldfish_tty_add(serial_hds[0], 0, GOLDFISH_TTY, 4);
187    for(i = 1; i < MAX_SERIAL_PORTS; i++) {
188        if(serial_hds[i]) {
189            goldfish_tty_add(serial_hds[i], i, 0, 0);
190        }
191    }
192
193    for(i = 0; i < MAX_NICS; i++) {
194        if (nd_table[i].vlan) {
195            if (nd_table[i].model == NULL
196                || strcmp(nd_table[i].model, "smc91c111") == 0) {
197                struct goldfish_device *smc_device;
198                smc_device = qemu_mallocz(sizeof(*smc_device));
199                smc_device->name = "smc91x";
200                smc_device->id = i;
201                smc_device->size = 0x1000;
202                smc_device->irq_count = 1;
203                goldfish_add_device_no_io(smc_device);
204                smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]);
205            } else {
206                fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
207                exit (1);
208            }
209        }
210    }
211
212    goldfish_fb_init(0);
213#ifdef HAS_AUDIO
214    goldfish_audio_init(GOLDFISH_AUDIO, 0, audio_input_source);
215#endif
216    {
217        DriveInfo* info = drive_get( IF_IDE, 0, 0 );
218        if (info != NULL) {
219            goldfish_mmc_init(GOLDFISH_MMC, 0, info->bdrv);
220	}
221    }
222    goldfish_memlog_init(GOLDFISH_MEMLOG);
223
224    if (android_hw->hw_battery)
225        goldfish_battery_init();
226
227    goldfish_add_device_no_io(&event0_device);
228    events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]);
229
230#ifdef CONFIG_NAND
231    goldfish_add_device_no_io(&nand_device);
232    nand_dev_init(nand_device.base);
233#endif
234#ifdef CONFIG_TRACE
235    extern const char *trace_filename;
236    /* Init trace device if either tracing, or memory checking is enabled. */
237    if (trace_filename != NULL
238#ifdef CONFIG_MEMCHECK
239        || memcheck_enabled
240#endif  // CONFIG_MEMCHECK
241       ) {
242        trace_dev_init();
243    }
244    if (trace_filename != NULL) {
245        D( "Trace file name is set to %s\n", trace_filename );
246    } else  {
247        D("Trace file name is not set\n");
248    }
249#endif
250
251    pipe_dev_init();
252
253#if TEST_SWITCH
254    {
255        void *sw;
256        sw = goldfish_switch_add("test", NULL, NULL, 0);
257        goldfish_switch_set_state(sw, 1);
258        goldfish_switch_add("test2", switch_test_write, sw, 1);
259    }
260#endif
261
262    android_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, initrd_filename);
263}
264
265
266QEMUMachine android_mips_machine = {
267    "android_mips",
268    "MIPS Android Emulator",
269    android_mips_init_,
270    0,
271    0,
272    1,
273    NULL
274};
275
276static void android_mips_init(void)
277{
278    qemu_register_machine(&android_mips_machine);
279}
280
281machine_init(android_mips_init);
282