cpu-common.h revision a2c14f947951612b45024095afd2210aa7368773 
1#ifndef CPU_COMMON_H
2#define CPU_COMMON_H 1
3
4/* CPU interfaces that are target indpendent.  */
5
6#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) || defined(__ia64__)
7#define WORDS_ALIGNED
8#endif
9
10#ifdef TARGET_PHYS_ADDR_BITS
11#include "exec/hwaddr.h"
12#endif
13
14#ifndef NEED_CPU_H
15#include "exec/poison.h"
16#endif
17
18#include "qemu/bswap.h"
19#include "qemu/queue.h"
20
21#if !defined(CONFIG_USER_ONLY)
22
23/* address in the RAM (different from a physical address) */
24typedef unsigned long ram_addr_t;
25
26/* memory API */
27
28typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value);
29typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
30
31void cpu_register_physical_memory_log(hwaddr start_addr,
32                                      ram_addr_t size,
33                                      ram_addr_t phys_offset,
34                                      ram_addr_t region_offset,
35                                      bool log_dirty);
36
37static inline void cpu_register_physical_memory_offset(hwaddr start_addr,
38                                                       ram_addr_t size,
39                                                       ram_addr_t phys_offset,
40                                                       ram_addr_t region_offset)
41{
42    cpu_register_physical_memory_log(start_addr, size, phys_offset,
43                                     region_offset, false);
44}
45
46static inline void cpu_register_physical_memory(hwaddr start_addr,
47                                                ram_addr_t size,
48                                                ram_addr_t phys_offset)
49{
50    cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0);
51}
52
53ram_addr_t cpu_get_physical_page_desc(hwaddr addr);
54ram_addr_t qemu_ram_alloc_from_ptr(DeviceState *dev, const char *name,
55                        ram_addr_t size, void *host);
56ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size);
57void qemu_ram_free(ram_addr_t addr);
58void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
59/* This should only be used for ram local to a device.  */
60void *qemu_get_ram_ptr(ram_addr_t addr);
61/* Same but slower, to use for migration, where the order of
62 * RAMBlocks must not change. */
63void *qemu_safe_ram_ptr(ram_addr_t addr);
64/* This should not be used by devices.  */
65int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
66ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
67
68int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
69                           CPUWriteMemoryFunc * const *mem_write,
70                           void *opaque);
71void cpu_unregister_io_memory(int table_address);
72
73void cpu_physical_memory_rw(hwaddr addr, void *buf,
74                            int len, int is_write);
75static inline void cpu_physical_memory_read(hwaddr addr,
76                                            void *buf, int len)
77{
78    cpu_physical_memory_rw(addr, buf, len, 0);
79}
80static inline void cpu_physical_memory_write(hwaddr addr,
81                                             const void *buf, int len)
82{
83    cpu_physical_memory_rw(addr, (void*)buf, len, 1);
84}
85void *cpu_physical_memory_map(hwaddr addr,
86                              hwaddr *plen,
87                              int is_write);
88void cpu_physical_memory_unmap(void *buffer, hwaddr len,
89                               int is_write, hwaddr access_len);
90void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
91void cpu_unregister_map_client(void *cookie);
92
93uint32_t ldub_phys(hwaddr addr);
94uint32_t lduw_phys(hwaddr addr);
95uint32_t ldl_phys(hwaddr addr);
96uint64_t ldq_phys(hwaddr addr);
97void stl_phys_notdirty(hwaddr addr, uint32_t val);
98void stq_phys_notdirty(hwaddr addr, uint64_t val);
99void stb_phys(hwaddr addr, uint32_t val);
100void stw_phys(hwaddr addr, uint32_t val);
101void stl_phys(hwaddr addr, uint32_t val);
102void stq_phys(hwaddr addr, uint64_t val);
103
104void cpu_physical_memory_write_rom(hwaddr addr,
105                                   const void *buf, int len);
106
107#define IO_MEM_SHIFT       3
108
109#define IO_MEM_RAM         (0 << IO_MEM_SHIFT) /* hardcoded offset */
110#define IO_MEM_ROM         (1 << IO_MEM_SHIFT) /* hardcoded offset */
111#define IO_MEM_UNASSIGNED  (2 << IO_MEM_SHIFT)
112#define IO_MEM_NOTDIRTY    (3 << IO_MEM_SHIFT)
113
114/* Acts like a ROM when read and like a device when written.  */
115#define IO_MEM_ROMD        (1)
116#define IO_MEM_SUBPAGE     (2)
117#define IO_MEM_SUBWIDTH    (4)
118
119#endif
120
121#endif /* !CPU_COMMON_H */
122