1 2/*---------------------------------------------------------------*/ 3/*--- begin ir_defs.c ---*/ 4/*---------------------------------------------------------------*/ 5 6/* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright (C) 2004-2013 OpenWorks LLP 11 info@open-works.net 12 13 This program is free software; you can redistribute it and/or 14 modify it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 2 of the 16 License, or (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, but 19 WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21 General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 26 02110-1301, USA. 27 28 The GNU General Public License is contained in the file COPYING. 29 30 Neither the names of the U.S. Department of Energy nor the 31 University of California nor the names of its contributors may be 32 used to endorse or promote products derived from this software 33 without prior written permission. 34*/ 35 36#include "libvex_basictypes.h" 37#include "libvex_ir.h" 38#include "libvex.h" 39 40#include "main_util.h" 41 42 43/*---------------------------------------------------------------*/ 44/*--- Printing the IR ---*/ 45/*---------------------------------------------------------------*/ 46 47void ppIRType ( IRType ty ) 48{ 49 switch (ty) { 50 case Ity_INVALID: vex_printf("Ity_INVALID"); break; 51 case Ity_I1: vex_printf( "I1"); break; 52 case Ity_I8: vex_printf( "I8"); break; 53 case Ity_I16: vex_printf( "I16"); break; 54 case Ity_I32: vex_printf( "I32"); break; 55 case Ity_I64: vex_printf( "I64"); break; 56 case Ity_I128: vex_printf( "I128"); break; 57 case Ity_F32: vex_printf( "F32"); break; 58 case Ity_F64: vex_printf( "F64"); break; 59 case Ity_F128: vex_printf( "F128"); break; 60 case Ity_D32: vex_printf( "D32"); break; 61 case Ity_D64: vex_printf( "D64"); break; 62 case Ity_D128: vex_printf( "D128"); break; 63 case Ity_V128: vex_printf( "V128"); break; 64 case Ity_V256: vex_printf( "V256"); break; 65 default: vex_printf("ty = 0x%x\n", (Int)ty); 66 vpanic("ppIRType"); 67 } 68} 69 70void ppIRConst ( IRConst* con ) 71{ 72 union { ULong i64; Double f64; UInt i32; Float f32; } u; 73 vassert(sizeof(ULong) == sizeof(Double)); 74 switch (con->tag) { 75 case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break; 76 case Ico_U8: vex_printf( "0x%x:I8", (UInt)(con->Ico.U8)); break; 77 case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break; 78 case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break; 79 case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break; 80 case Ico_F32: u.f32 = con->Ico.F32; 81 vex_printf( "F32{0x%x}", u.i32); 82 break; 83 case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break; 84 case Ico_F64: u.f64 = con->Ico.F64; 85 vex_printf( "F64{0x%llx}", u.i64); 86 break; 87 case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break; 88 case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break; 89 case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break; 90 default: vpanic("ppIRConst"); 91 } 92} 93 94void ppIRCallee ( IRCallee* ce ) 95{ 96 vex_printf("%s", ce->name); 97 if (ce->regparms > 0) 98 vex_printf("[rp=%d]", ce->regparms); 99 if (ce->mcx_mask > 0) 100 vex_printf("[mcx=0x%x]", ce->mcx_mask); 101 vex_printf("{%p}", (void*)ce->addr); 102} 103 104void ppIRRegArray ( IRRegArray* arr ) 105{ 106 vex_printf("(%d:%dx", arr->base, arr->nElems); 107 ppIRType(arr->elemTy); 108 vex_printf(")"); 109} 110 111void ppIRTemp ( IRTemp tmp ) 112{ 113 if (tmp == IRTemp_INVALID) 114 vex_printf("IRTemp_INVALID"); 115 else 116 vex_printf( "t%d", (Int)tmp); 117} 118 119void ppIROp ( IROp op ) 120{ 121 const HChar* str = NULL; 122 IROp base; 123 switch (op) { 124 case Iop_Add8 ... Iop_Add64: 125 str = "Add"; base = Iop_Add8; break; 126 case Iop_Sub8 ... Iop_Sub64: 127 str = "Sub"; base = Iop_Sub8; break; 128 case Iop_Mul8 ... Iop_Mul64: 129 str = "Mul"; base = Iop_Mul8; break; 130 case Iop_Or8 ... Iop_Or64: 131 str = "Or"; base = Iop_Or8; break; 132 case Iop_And8 ... Iop_And64: 133 str = "And"; base = Iop_And8; break; 134 case Iop_Xor8 ... Iop_Xor64: 135 str = "Xor"; base = Iop_Xor8; break; 136 case Iop_Shl8 ... Iop_Shl64: 137 str = "Shl"; base = Iop_Shl8; break; 138 case Iop_Shr8 ... Iop_Shr64: 139 str = "Shr"; base = Iop_Shr8; break; 140 case Iop_Sar8 ... Iop_Sar64: 141 str = "Sar"; base = Iop_Sar8; break; 142 case Iop_CmpEQ8 ... Iop_CmpEQ64: 143 str = "CmpEQ"; base = Iop_CmpEQ8; break; 144 case Iop_CmpNE8 ... Iop_CmpNE64: 145 str = "CmpNE"; base = Iop_CmpNE8; break; 146 case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64: 147 str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break; 148 case Iop_CasCmpNE8 ... Iop_CasCmpNE64: 149 str = "CasCmpNE"; base = Iop_CasCmpNE8; break; 150 case Iop_ExpCmpNE8 ... Iop_ExpCmpNE64: 151 str = "ExpCmpNE"; base = Iop_ExpCmpNE8; break; 152 case Iop_Not8 ... Iop_Not64: 153 str = "Not"; base = Iop_Not8; break; 154 /* other cases must explicitly "return;" */ 155 case Iop_8Uto16: vex_printf("8Uto16"); return; 156 case Iop_8Uto32: vex_printf("8Uto32"); return; 157 case Iop_16Uto32: vex_printf("16Uto32"); return; 158 case Iop_8Sto16: vex_printf("8Sto16"); return; 159 case Iop_8Sto32: vex_printf("8Sto32"); return; 160 case Iop_16Sto32: vex_printf("16Sto32"); return; 161 case Iop_32Sto64: vex_printf("32Sto64"); return; 162 case Iop_32Uto64: vex_printf("32Uto64"); return; 163 case Iop_32to8: vex_printf("32to8"); return; 164 case Iop_16Uto64: vex_printf("16Uto64"); return; 165 case Iop_16Sto64: vex_printf("16Sto64"); return; 166 case Iop_8Uto64: vex_printf("8Uto64"); return; 167 case Iop_8Sto64: vex_printf("8Sto64"); return; 168 case Iop_64to16: vex_printf("64to16"); return; 169 case Iop_64to8: vex_printf("64to8"); return; 170 171 case Iop_Not1: vex_printf("Not1"); return; 172 case Iop_32to1: vex_printf("32to1"); return; 173 case Iop_64to1: vex_printf("64to1"); return; 174 case Iop_1Uto8: vex_printf("1Uto8"); return; 175 case Iop_1Uto32: vex_printf("1Uto32"); return; 176 case Iop_1Uto64: vex_printf("1Uto64"); return; 177 case Iop_1Sto8: vex_printf("1Sto8"); return; 178 case Iop_1Sto16: vex_printf("1Sto16"); return; 179 case Iop_1Sto32: vex_printf("1Sto32"); return; 180 case Iop_1Sto64: vex_printf("1Sto64"); return; 181 182 case Iop_MullS8: vex_printf("MullS8"); return; 183 case Iop_MullS16: vex_printf("MullS16"); return; 184 case Iop_MullS32: vex_printf("MullS32"); return; 185 case Iop_MullS64: vex_printf("MullS64"); return; 186 case Iop_MullU8: vex_printf("MullU8"); return; 187 case Iop_MullU16: vex_printf("MullU16"); return; 188 case Iop_MullU32: vex_printf("MullU32"); return; 189 case Iop_MullU64: vex_printf("MullU64"); return; 190 191 case Iop_Clz64: vex_printf("Clz64"); return; 192 case Iop_Clz32: vex_printf("Clz32"); return; 193 case Iop_Ctz64: vex_printf("Ctz64"); return; 194 case Iop_Ctz32: vex_printf("Ctz32"); return; 195 196 case Iop_CmpLT32S: vex_printf("CmpLT32S"); return; 197 case Iop_CmpLE32S: vex_printf("CmpLE32S"); return; 198 case Iop_CmpLT32U: vex_printf("CmpLT32U"); return; 199 case Iop_CmpLE32U: vex_printf("CmpLE32U"); return; 200 201 case Iop_CmpLT64S: vex_printf("CmpLT64S"); return; 202 case Iop_CmpLE64S: vex_printf("CmpLE64S"); return; 203 case Iop_CmpLT64U: vex_printf("CmpLT64U"); return; 204 case Iop_CmpLE64U: vex_printf("CmpLE64U"); return; 205 206 case Iop_CmpNEZ8: vex_printf("CmpNEZ8"); return; 207 case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return; 208 case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return; 209 case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return; 210 211 case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return; 212 case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return; 213 214 case Iop_Left8: vex_printf("Left8"); return; 215 case Iop_Left16: vex_printf("Left16"); return; 216 case Iop_Left32: vex_printf("Left32"); return; 217 case Iop_Left64: vex_printf("Left64"); return; 218 case Iop_Max32U: vex_printf("Max32U"); return; 219 220 case Iop_CmpORD32U: vex_printf("CmpORD32U"); return; 221 case Iop_CmpORD32S: vex_printf("CmpORD32S"); return; 222 223 case Iop_CmpORD64U: vex_printf("CmpORD64U"); return; 224 case Iop_CmpORD64S: vex_printf("CmpORD64S"); return; 225 226 case Iop_DivU32: vex_printf("DivU32"); return; 227 case Iop_DivS32: vex_printf("DivS32"); return; 228 case Iop_DivU64: vex_printf("DivU64"); return; 229 case Iop_DivS64: vex_printf("DivS64"); return; 230 case Iop_DivU64E: vex_printf("DivU64E"); return; 231 case Iop_DivS64E: vex_printf("DivS64E"); return; 232 case Iop_DivU32E: vex_printf("DivU32E"); return; 233 case Iop_DivS32E: vex_printf("DivS32E"); return; 234 235 case Iop_DivModU64to32: vex_printf("DivModU64to32"); return; 236 case Iop_DivModS64to32: vex_printf("DivModS64to32"); return; 237 238 case Iop_DivModU128to64: vex_printf("DivModU128to64"); return; 239 case Iop_DivModS128to64: vex_printf("DivModS128to64"); return; 240 241 case Iop_DivModS64to64: vex_printf("DivModS64to64"); return; 242 243 case Iop_16HIto8: vex_printf("16HIto8"); return; 244 case Iop_16to8: vex_printf("16to8"); return; 245 case Iop_8HLto16: vex_printf("8HLto16"); return; 246 247 case Iop_32HIto16: vex_printf("32HIto16"); return; 248 case Iop_32to16: vex_printf("32to16"); return; 249 case Iop_16HLto32: vex_printf("16HLto32"); return; 250 251 case Iop_64HIto32: vex_printf("64HIto32"); return; 252 case Iop_64to32: vex_printf("64to32"); return; 253 case Iop_32HLto64: vex_printf("32HLto64"); return; 254 255 case Iop_128HIto64: vex_printf("128HIto64"); return; 256 case Iop_128to64: vex_printf("128to64"); return; 257 case Iop_64HLto128: vex_printf("64HLto128"); return; 258 259 case Iop_CmpF32: vex_printf("CmpF32"); return; 260 case Iop_F32toI32S: vex_printf("F32toI32S"); return; 261 case Iop_F32toI64S: vex_printf("F32toI64S"); return; 262 case Iop_I32StoF32: vex_printf("I32StoF32"); return; 263 case Iop_I64StoF32: vex_printf("I64StoF32"); return; 264 265 case Iop_AddF64: vex_printf("AddF64"); return; 266 case Iop_SubF64: vex_printf("SubF64"); return; 267 case Iop_MulF64: vex_printf("MulF64"); return; 268 case Iop_DivF64: vex_printf("DivF64"); return; 269 case Iop_AddF64r32: vex_printf("AddF64r32"); return; 270 case Iop_SubF64r32: vex_printf("SubF64r32"); return; 271 case Iop_MulF64r32: vex_printf("MulF64r32"); return; 272 case Iop_DivF64r32: vex_printf("DivF64r32"); return; 273 case Iop_AddF32: vex_printf("AddF32"); return; 274 case Iop_SubF32: vex_printf("SubF32"); return; 275 case Iop_MulF32: vex_printf("MulF32"); return; 276 case Iop_DivF32: vex_printf("DivF32"); return; 277 278 /* 128 bit floating point */ 279 case Iop_AddF128: vex_printf("AddF128"); return; 280 case Iop_SubF128: vex_printf("SubF128"); return; 281 case Iop_MulF128: vex_printf("MulF128"); return; 282 case Iop_DivF128: vex_printf("DivF128"); return; 283 case Iop_AbsF128: vex_printf("AbsF128"); return; 284 case Iop_NegF128: vex_printf("NegF128"); return; 285 case Iop_SqrtF128: vex_printf("SqrtF128"); return; 286 case Iop_CmpF128: vex_printf("CmpF128"); return; 287 288 case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return; 289 case Iop_F128HItoF64: vex_printf("F128HItoF64"); return; 290 case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return; 291 case Iop_I32StoF128: vex_printf("I32StoF128"); return; 292 case Iop_I64StoF128: vex_printf("I64StoF128"); return; 293 case Iop_I32UtoF128: vex_printf("I32UtoF128"); return; 294 case Iop_I64UtoF128: vex_printf("I64UtoF128"); return; 295 case Iop_F128toI32S: vex_printf("F128toI32S"); return; 296 case Iop_F128toI64S: vex_printf("F128toI64S"); return; 297 case Iop_F128toI32U: vex_printf("F128toI32U"); return; 298 case Iop_F128toI64U: vex_printf("F128toI64U"); return; 299 case Iop_F32toF128: vex_printf("F32toF128"); return; 300 case Iop_F64toF128: vex_printf("F64toF128"); return; 301 case Iop_F128toF64: vex_printf("F128toF64"); return; 302 case Iop_F128toF32: vex_printf("F128toF32"); return; 303 304 /* s390 specific */ 305 case Iop_MAddF32: vex_printf("s390_MAddF32"); return; 306 case Iop_MSubF32: vex_printf("s390_MSubF32"); return; 307 308 case Iop_ScaleF64: vex_printf("ScaleF64"); return; 309 case Iop_AtanF64: vex_printf("AtanF64"); return; 310 case Iop_Yl2xF64: vex_printf("Yl2xF64"); return; 311 case Iop_Yl2xp1F64: vex_printf("Yl2xp1F64"); return; 312 case Iop_PRemF64: vex_printf("PRemF64"); return; 313 case Iop_PRemC3210F64: vex_printf("PRemC3210F64"); return; 314 case Iop_PRem1F64: vex_printf("PRem1F64"); return; 315 case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return; 316 case Iop_NegF64: vex_printf("NegF64"); return; 317 case Iop_AbsF64: vex_printf("AbsF64"); return; 318 case Iop_NegF32: vex_printf("NegF32"); return; 319 case Iop_AbsF32: vex_printf("AbsF32"); return; 320 case Iop_SqrtF64: vex_printf("SqrtF64"); return; 321 case Iop_SqrtF32: vex_printf("SqrtF32"); return; 322 case Iop_SinF64: vex_printf("SinF64"); return; 323 case Iop_CosF64: vex_printf("CosF64"); return; 324 case Iop_TanF64: vex_printf("TanF64"); return; 325 case Iop_2xm1F64: vex_printf("2xm1F64"); return; 326 327 case Iop_MAddF64: vex_printf("MAddF64"); return; 328 case Iop_MSubF64: vex_printf("MSubF64"); return; 329 case Iop_MAddF64r32: vex_printf("MAddF64r32"); return; 330 case Iop_MSubF64r32: vex_printf("MSubF64r32"); return; 331 332 case Iop_Est5FRSqrt: vex_printf("Est5FRSqrt"); return; 333 case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return; 334 case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return; 335 case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return; 336 case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return; 337 338 case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return; 339 340 case Iop_QAdd32S: vex_printf("QAdd32S"); return; 341 case Iop_QSub32S: vex_printf("QSub32S"); return; 342 case Iop_Add16x2: vex_printf("Add16x2"); return; 343 case Iop_Sub16x2: vex_printf("Sub16x2"); return; 344 case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return; 345 case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return; 346 case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return; 347 case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return; 348 case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return; 349 case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return; 350 case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return; 351 case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return; 352 353 case Iop_Add8x4: vex_printf("Add8x4"); return; 354 case Iop_Sub8x4: vex_printf("Sub8x4"); return; 355 case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return; 356 case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return; 357 case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return; 358 case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return; 359 case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return; 360 case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return; 361 case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return; 362 case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return; 363 case Iop_Sad8Ux4: vex_printf("Sad8Ux4"); return; 364 365 case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return; 366 case Iop_CmpNEZ8x4: vex_printf("CmpNEZ8x4"); return; 367 368 case Iop_CmpF64: vex_printf("CmpF64"); return; 369 370 case Iop_F64toI16S: vex_printf("F64toI16S"); return; 371 case Iop_F64toI32S: vex_printf("F64toI32S"); return; 372 case Iop_F64toI64S: vex_printf("F64toI64S"); return; 373 case Iop_F64toI64U: vex_printf("F64toI64U"); return; 374 case Iop_F32toI32U: vex_printf("F32toI32U"); return; 375 case Iop_F32toI64U: vex_printf("F32toI64U"); return; 376 377 case Iop_F64toI32U: vex_printf("F64toI32U"); return; 378 379 case Iop_I32StoF64: vex_printf("I32StoF64"); return; 380 case Iop_I64StoF64: vex_printf("I64StoF64"); return; 381 case Iop_I64UtoF64: vex_printf("I64UtoF64"); return; 382 case Iop_I32UtoF32: vex_printf("I32UtoF32"); return; 383 case Iop_I64UtoF32: vex_printf("I64UtoF32"); return; 384 385 case Iop_I32UtoF64: vex_printf("I32UtoF64"); return; 386 387 case Iop_F32toF64: vex_printf("F32toF64"); return; 388 case Iop_F64toF32: vex_printf("F64toF32"); return; 389 390 case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return; 391 case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return; 392 case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return; 393 394 case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return; 395 case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return; 396 case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return; 397 case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return; 398 399 case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return; 400 case Iop_I32StoFx4: vex_printf("I32StoFx4"); return; 401 402 case Iop_F32toF16x4: vex_printf("F32toF16x4"); return; 403 case Iop_F16toF32x4: vex_printf("F16toF32x4"); return; 404 405 case Iop_Rsqrte32Fx4: vex_printf("VRsqrte32Fx4"); return; 406 case Iop_Rsqrte32x4: vex_printf("VRsqrte32x4"); return; 407 case Iop_Rsqrte32Fx2: vex_printf("VRsqrte32Fx2"); return; 408 case Iop_Rsqrte32x2: vex_printf("VRsqrte32x2"); return; 409 410 case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return; 411 case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return; 412 413 case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return; 414 case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return; 415 416 case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return; 417 case Iop_I32StoFx2: vex_printf("I32StoFx2"); return; 418 419 case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return; 420 case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return; 421 422 case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return; 423 case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return; 424 case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return; 425 case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return; 426 427 case Iop_Abs8x8: vex_printf("Abs8x8"); return; 428 case Iop_Abs16x4: vex_printf("Abs16x4"); return; 429 case Iop_Abs32x2: vex_printf("Abs32x2"); return; 430 case Iop_Add8x8: vex_printf("Add8x8"); return; 431 case Iop_Add16x4: vex_printf("Add16x4"); return; 432 case Iop_Add32x2: vex_printf("Add32x2"); return; 433 case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return; 434 case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return; 435 case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return; 436 case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return; 437 case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return; 438 case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return; 439 case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return; 440 case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return; 441 case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return; 442 case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return; 443 case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return; 444 case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return; 445 case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return; 446 case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return; 447 case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return; 448 case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return; 449 case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return; 450 case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return; 451 case Iop_Sub8x8: vex_printf("Sub8x8"); return; 452 case Iop_Sub16x4: vex_printf("Sub16x4"); return; 453 case Iop_Sub32x2: vex_printf("Sub32x2"); return; 454 case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return; 455 case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return; 456 case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return; 457 case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return; 458 case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return; 459 case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return; 460 case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return; 461 case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return; 462 case Iop_Mul8x8: vex_printf("Mul8x8"); return; 463 case Iop_Mul16x4: vex_printf("Mul16x4"); return; 464 case Iop_Mul32x2: vex_printf("Mul32x2"); return; 465 case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return; 466 case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return; 467 case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return; 468 case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return; 469 case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return; 470 case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return; 471 case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return; 472 case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return; 473 case Iop_QDMulLong16Sx4: vex_printf("QDMulLong16Sx4"); return; 474 case Iop_QDMulLong32Sx2: vex_printf("QDMulLong32Sx2"); return; 475 case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return; 476 case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return; 477 case Iop_Max8Sx8: vex_printf("Max8Sx8"); return; 478 case Iop_Max16Sx4: vex_printf("Max16Sx4"); return; 479 case Iop_Max32Sx2: vex_printf("Max32Sx2"); return; 480 case Iop_Max8Ux8: vex_printf("Max8Ux8"); return; 481 case Iop_Max16Ux4: vex_printf("Max16Ux4"); return; 482 case Iop_Max32Ux2: vex_printf("Max32Ux2"); return; 483 case Iop_Min8Sx8: vex_printf("Min8Sx8"); return; 484 case Iop_Min16Sx4: vex_printf("Min16Sx4"); return; 485 case Iop_Min32Sx2: vex_printf("Min32Sx2"); return; 486 case Iop_Min8Ux8: vex_printf("Min8Ux8"); return; 487 case Iop_Min16Ux4: vex_printf("Min16Ux4"); return; 488 case Iop_Min32Ux2: vex_printf("Min32Ux2"); return; 489 case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return; 490 case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return; 491 case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return; 492 case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return; 493 case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return; 494 case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return; 495 case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return; 496 case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return; 497 case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return; 498 case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return; 499 case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return; 500 case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return; 501 case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return; 502 case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return; 503 case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return; 504 case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return; 505 case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return; 506 case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return; 507 case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return; 508 case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return; 509 case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return; 510 case Iop_Cnt8x8: vex_printf("Cnt8x8"); return; 511 case Iop_Clz8Sx8: vex_printf("Clz8Sx8"); return; 512 case Iop_Clz16Sx4: vex_printf("Clz16Sx4"); return; 513 case Iop_Clz32Sx2: vex_printf("Clz32Sx2"); return; 514 case Iop_Cls8Sx8: vex_printf("Cls8Sx8"); return; 515 case Iop_Cls16Sx4: vex_printf("Cls16Sx4"); return; 516 case Iop_Cls32Sx2: vex_printf("Cls32Sx2"); return; 517 case Iop_ShlN8x8: vex_printf("ShlN8x8"); return; 518 case Iop_ShlN16x4: vex_printf("ShlN16x4"); return; 519 case Iop_ShlN32x2: vex_printf("ShlN32x2"); return; 520 case Iop_ShrN8x8: vex_printf("ShrN8x8"); return; 521 case Iop_ShrN16x4: vex_printf("ShrN16x4"); return; 522 case Iop_ShrN32x2: vex_printf("ShrN32x2"); return; 523 case Iop_SarN8x8: vex_printf("SarN8x8"); return; 524 case Iop_SarN16x4: vex_printf("SarN16x4"); return; 525 case Iop_SarN32x2: vex_printf("SarN32x2"); return; 526 case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return; 527 case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return; 528 case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return; 529 case Iop_QNarrowBin64Sto32Sx4: vex_printf("QNarrowBin64Sto32Sx4"); return; 530 case Iop_QNarrowBin64Uto32Ux4: vex_printf("QNarrowBin64Uto32Ux4"); return; 531 case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return; 532 case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return; 533 case Iop_NarrowBin64to32x4: vex_printf("NarrowBin64to32x4"); return; 534 case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return; 535 case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return; 536 case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return; 537 case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return; 538 case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return; 539 case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return; 540 case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return; 541 case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return; 542 case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return; 543 case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return; 544 case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return; 545 case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return; 546 case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return; 547 case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return; 548 case Iop_Shl8x8: vex_printf("Shl8x8"); return; 549 case Iop_Shl16x4: vex_printf("Shl16x4"); return; 550 case Iop_Shl32x2: vex_printf("Shl32x2"); return; 551 case Iop_Shr8x8: vex_printf("Shr8x8"); return; 552 case Iop_Shr16x4: vex_printf("Shr16x4"); return; 553 case Iop_Shr32x2: vex_printf("Shr32x2"); return; 554 case Iop_QShl8x8: vex_printf("QShl8x8"); return; 555 case Iop_QShl16x4: vex_printf("QShl16x4"); return; 556 case Iop_QShl32x2: vex_printf("QShl32x2"); return; 557 case Iop_QShl64x1: vex_printf("QShl64x1"); return; 558 case Iop_QSal8x8: vex_printf("QSal8x8"); return; 559 case Iop_QSal16x4: vex_printf("QSal16x4"); return; 560 case Iop_QSal32x2: vex_printf("QSal32x2"); return; 561 case Iop_QSal64x1: vex_printf("QSal64x1"); return; 562 case Iop_QShlN8x8: vex_printf("QShlN8x8"); return; 563 case Iop_QShlN16x4: vex_printf("QShlN16x4"); return; 564 case Iop_QShlN32x2: vex_printf("QShlN32x2"); return; 565 case Iop_QShlN64x1: vex_printf("QShlN64x1"); return; 566 case Iop_QShlN8Sx8: vex_printf("QShlN8Sx8"); return; 567 case Iop_QShlN16Sx4: vex_printf("QShlN16Sx4"); return; 568 case Iop_QShlN32Sx2: vex_printf("QShlN32Sx2"); return; 569 case Iop_QShlN64Sx1: vex_printf("QShlN64Sx1"); return; 570 case Iop_QSalN8x8: vex_printf("QSalN8x8"); return; 571 case Iop_QSalN16x4: vex_printf("QSalN16x4"); return; 572 case Iop_QSalN32x2: vex_printf("QSalN32x2"); return; 573 case Iop_QSalN64x1: vex_printf("QSalN64x1"); return; 574 case Iop_Sar8x8: vex_printf("Sar8x8"); return; 575 case Iop_Sar16x4: vex_printf("Sar16x4"); return; 576 case Iop_Sar32x2: vex_printf("Sar32x2"); return; 577 case Iop_Sal8x8: vex_printf("Sal8x8"); return; 578 case Iop_Sal16x4: vex_printf("Sal16x4"); return; 579 case Iop_Sal32x2: vex_printf("Sal32x2"); return; 580 case Iop_Sal64x1: vex_printf("Sal64x1"); return; 581 case Iop_Perm8x8: vex_printf("Perm8x8"); return; 582 case Iop_Reverse16_8x8: vex_printf("Reverse16_8x8"); return; 583 case Iop_Reverse32_8x8: vex_printf("Reverse32_8x8"); return; 584 case Iop_Reverse32_16x4: vex_printf("Reverse32_16x4"); return; 585 case Iop_Reverse64_8x8: vex_printf("Reverse64_8x8"); return; 586 case Iop_Reverse64_16x4: vex_printf("Reverse64_16x4"); return; 587 case Iop_Reverse64_32x2: vex_printf("Reverse64_32x2"); return; 588 case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return; 589 case Iop_GetMSBs8x8: vex_printf("GetMSBs8x8"); return; 590 case Iop_GetMSBs8x16: vex_printf("GetMSBs8x16"); return; 591 592 case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return; 593 case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return; 594 case Iop_CmpNEZ8x8: vex_printf("CmpNEZ8x8"); return; 595 596 case Iop_Add32Fx4: vex_printf("Add32Fx4"); return; 597 case Iop_Add32Fx2: vex_printf("Add32Fx2"); return; 598 case Iop_Add32F0x4: vex_printf("Add32F0x4"); return; 599 case Iop_Add64Fx2: vex_printf("Add64Fx2"); return; 600 case Iop_Add64F0x2: vex_printf("Add64F0x2"); return; 601 602 case Iop_Div32Fx4: vex_printf("Div32Fx4"); return; 603 case Iop_Div32F0x4: vex_printf("Div32F0x4"); return; 604 case Iop_Div64Fx2: vex_printf("Div64Fx2"); return; 605 case Iop_Div64F0x2: vex_printf("Div64F0x2"); return; 606 607 case Iop_Max32Fx8: vex_printf("Max32Fx8"); return; 608 case Iop_Max32Fx4: vex_printf("Max32Fx4"); return; 609 case Iop_Max32Fx2: vex_printf("Max32Fx2"); return; 610 case Iop_PwMax32Fx4: vex_printf("PwMax32Fx4"); return; 611 case Iop_PwMax32Fx2: vex_printf("PwMax32Fx2"); return; 612 case Iop_Max32F0x4: vex_printf("Max32F0x4"); return; 613 case Iop_Max64Fx4: vex_printf("Max64Fx4"); return; 614 case Iop_Max64Fx2: vex_printf("Max64Fx2"); return; 615 case Iop_Max64F0x2: vex_printf("Max64F0x2"); return; 616 617 case Iop_Min32Fx8: vex_printf("Min32Fx8"); return; 618 case Iop_Min32Fx4: vex_printf("Min32Fx4"); return; 619 case Iop_Min32Fx2: vex_printf("Min32Fx2"); return; 620 case Iop_PwMin32Fx4: vex_printf("PwMin32Fx4"); return; 621 case Iop_PwMin32Fx2: vex_printf("PwMin32Fx2"); return; 622 case Iop_Min32F0x4: vex_printf("Min32F0x4"); return; 623 case Iop_Min64Fx4: vex_printf("Min64Fx4"); return; 624 case Iop_Min64Fx2: vex_printf("Min64Fx2"); return; 625 case Iop_Min64F0x2: vex_printf("Min64F0x2"); return; 626 627 case Iop_Mul32Fx4: vex_printf("Mul32Fx4"); return; 628 case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return; 629 case Iop_Mul64Fx2: vex_printf("Mul64Fx2"); return; 630 case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return; 631 632 case Iop_Recip32x2: vex_printf("Recip32x2"); return; 633 case Iop_Recip32Fx2: vex_printf("Recip32Fx2"); return; 634 case Iop_Recip32Fx4: vex_printf("Recip32Fx4"); return; 635 case Iop_Recip32Fx8: vex_printf("Recip32Fx8"); return; 636 case Iop_Recip32x4: vex_printf("Recip32x4"); return; 637 case Iop_Recip32F0x4: vex_printf("Recip32F0x4"); return; 638 case Iop_Recip64Fx2: vex_printf("Recip64Fx2"); return; 639 case Iop_Recip64F0x2: vex_printf("Recip64F0x2"); return; 640 case Iop_Recps32Fx2: vex_printf("VRecps32Fx2"); return; 641 case Iop_Recps32Fx4: vex_printf("VRecps32Fx4"); return; 642 case Iop_Abs32Fx4: vex_printf("Abs32Fx4"); return; 643 case Iop_Abs64Fx2: vex_printf("Abs64Fx2"); return; 644 case Iop_Rsqrts32Fx4: vex_printf("VRsqrts32Fx4"); return; 645 case Iop_Rsqrts32Fx2: vex_printf("VRsqrts32Fx2"); return; 646 647 case Iop_RSqrt32Fx4: vex_printf("RSqrt32Fx4"); return; 648 case Iop_RSqrt32F0x4: vex_printf("RSqrt32F0x4"); return; 649 case Iop_RSqrt32Fx8: vex_printf("RSqrt32Fx8"); return; 650 case Iop_RSqrt64Fx2: vex_printf("RSqrt64Fx2"); return; 651 case Iop_RSqrt64F0x2: vex_printf("RSqrt64F0x2"); return; 652 653 case Iop_Sqrt32Fx4: vex_printf("Sqrt32Fx4"); return; 654 case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return; 655 case Iop_Sqrt64Fx2: vex_printf("Sqrt64Fx2"); return; 656 case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return; 657 case Iop_Sqrt32Fx8: vex_printf("Sqrt32Fx8"); return; 658 case Iop_Sqrt64Fx4: vex_printf("Sqrt64Fx4"); return; 659 660 case Iop_Sub32Fx4: vex_printf("Sub32Fx4"); return; 661 case Iop_Sub32Fx2: vex_printf("Sub32Fx2"); return; 662 case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return; 663 case Iop_Sub64Fx2: vex_printf("Sub64Fx2"); return; 664 case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return; 665 666 case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return; 667 case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return; 668 case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return; 669 case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return; 670 case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return; 671 case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return; 672 case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return; 673 case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return; 674 case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return; 675 case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return; 676 case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return; 677 case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return; 678 case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return; 679 680 case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return; 681 case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return; 682 case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return; 683 case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return; 684 case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return; 685 case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return; 686 case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return; 687 case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return; 688 689 case Iop_Neg64Fx2: vex_printf("Neg64Fx2"); return; 690 case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return; 691 case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return; 692 693 case Iop_V128to64: vex_printf("V128to64"); return; 694 case Iop_V128HIto64: vex_printf("V128HIto64"); return; 695 case Iop_64HLtoV128: vex_printf("64HLtoV128"); return; 696 697 case Iop_64UtoV128: vex_printf("64UtoV128"); return; 698 case Iop_SetV128lo64: vex_printf("SetV128lo64"); return; 699 700 case Iop_ZeroHI64ofV128: vex_printf("ZeroHI64ofV128"); return; 701 case Iop_ZeroHI96ofV128: vex_printf("ZeroHI96ofV128"); return; 702 case Iop_ZeroHI112ofV128: vex_printf("ZeroHI112ofV128"); return; 703 case Iop_ZeroHI120ofV128: vex_printf("ZeroHI120ofV128"); return; 704 705 case Iop_32UtoV128: vex_printf("32UtoV128"); return; 706 case Iop_V128to32: vex_printf("V128to32"); return; 707 case Iop_SetV128lo32: vex_printf("SetV128lo32"); return; 708 709 case Iop_Dup8x16: vex_printf("Dup8x16"); return; 710 case Iop_Dup16x8: vex_printf("Dup16x8"); return; 711 case Iop_Dup32x4: vex_printf("Dup32x4"); return; 712 case Iop_Dup8x8: vex_printf("Dup8x8"); return; 713 case Iop_Dup16x4: vex_printf("Dup16x4"); return; 714 case Iop_Dup32x2: vex_printf("Dup32x2"); return; 715 716 case Iop_NotV128: vex_printf("NotV128"); return; 717 case Iop_AndV128: vex_printf("AndV128"); return; 718 case Iop_OrV128: vex_printf("OrV128"); return; 719 case Iop_XorV128: vex_printf("XorV128"); return; 720 721 case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return; 722 case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return; 723 case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return; 724 case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return; 725 726 case Iop_Abs8x16: vex_printf("Abs8x16"); return; 727 case Iop_Abs16x8: vex_printf("Abs16x8"); return; 728 case Iop_Abs32x4: vex_printf("Abs32x4"); return; 729 730 case Iop_Add8x16: vex_printf("Add8x16"); return; 731 case Iop_Add16x8: vex_printf("Add16x8"); return; 732 case Iop_Add32x4: vex_printf("Add32x4"); return; 733 case Iop_Add64x2: vex_printf("Add64x2"); return; 734 case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return; 735 case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return; 736 case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return; 737 case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return; 738 case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return; 739 case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return; 740 case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return; 741 case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return; 742 case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return; 743 case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return; 744 case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return; 745 case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return; 746 case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return; 747 case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return; 748 case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return; 749 case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return; 750 case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return; 751 752 case Iop_Sub8x16: vex_printf("Sub8x16"); return; 753 case Iop_Sub16x8: vex_printf("Sub16x8"); return; 754 case Iop_Sub32x4: vex_printf("Sub32x4"); return; 755 case Iop_Sub64x2: vex_printf("Sub64x2"); return; 756 case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return; 757 case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return; 758 case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return; 759 case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return; 760 case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return; 761 case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return; 762 case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return; 763 case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return; 764 765 case Iop_Mul8x16: vex_printf("Mul8x16"); return; 766 case Iop_Mul16x8: vex_printf("Mul16x8"); return; 767 case Iop_Mul32x4: vex_printf("Mul32x4"); return; 768 case Iop_Mull8Ux8: vex_printf("Mull8Ux8"); return; 769 case Iop_Mull8Sx8: vex_printf("Mull8Sx8"); return; 770 case Iop_Mull16Ux4: vex_printf("Mull16Ux4"); return; 771 case Iop_Mull16Sx4: vex_printf("Mull16Sx4"); return; 772 case Iop_Mull32Ux2: vex_printf("Mull32Ux2"); return; 773 case Iop_Mull32Sx2: vex_printf("Mull32Sx2"); return; 774 case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return; 775 case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return; 776 case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return; 777 case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return; 778 case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return; 779 case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return; 780 case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return; 781 case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return; 782 case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return; 783 case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return; 784 785 case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return; 786 case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return; 787 case Iop_MullEven32Ux4: vex_printf("MullEven32Ux4"); return; 788 case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return; 789 case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return; 790 case Iop_MullEven32Sx4: vex_printf("MullEven32Sx4"); return; 791 792 case Iop_PolynomialMulAdd8x16: 793 vex_printf("PolynomialMulAdd8x16"); return; 794 case Iop_PolynomialMulAdd16x8: 795 vex_printf("PolynomialMulAdd16x8"); return; 796 case Iop_PolynomialMulAdd32x4: 797 vex_printf("PolynomialMulAdd32x4"); return; 798 case Iop_PolynomialMulAdd64x2: 799 vex_printf("PolynomialMulAdd64x2"); return; 800 801 case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return; 802 case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return; 803 case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return; 804 case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return; 805 case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return; 806 case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return; 807 808 case Iop_Max8Sx16: vex_printf("Max8Sx16"); return; 809 case Iop_Max16Sx8: vex_printf("Max16Sx8"); return; 810 case Iop_Max32Sx4: vex_printf("Max32Sx4"); return; 811 case Iop_Max64Sx2: vex_printf("Max64Sx2"); return; 812 case Iop_Max8Ux16: vex_printf("Max8Ux16"); return; 813 case Iop_Max16Ux8: vex_printf("Max16Ux8"); return; 814 case Iop_Max32Ux4: vex_printf("Max32Ux4"); return; 815 case Iop_Max64Ux2: vex_printf("Max64Ux2"); return; 816 817 case Iop_Min8Sx16: vex_printf("Min8Sx16"); return; 818 case Iop_Min16Sx8: vex_printf("Min16Sx8"); return; 819 case Iop_Min32Sx4: vex_printf("Min32Sx4"); return; 820 case Iop_Min64Sx2: vex_printf("Min64Sx2"); return; 821 case Iop_Min8Ux16: vex_printf("Min8Ux16"); return; 822 case Iop_Min16Ux8: vex_printf("Min16Ux8"); return; 823 case Iop_Min32Ux4: vex_printf("Min32Ux4"); return; 824 case Iop_Min64Ux2: vex_printf("Min64Ux2"); return; 825 826 case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return; 827 case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return; 828 case Iop_CmpEQ32x4: vex_printf("CmpEQ32x4"); return; 829 case Iop_CmpEQ64x2: vex_printf("CmpEQ64x2"); return; 830 case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return; 831 case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return; 832 case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return; 833 case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return; 834 case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return; 835 case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return; 836 case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return; 837 case Iop_CmpGT64Ux2: vex_printf("CmpGT64Ux2"); return; 838 839 case Iop_Cnt8x16: vex_printf("Cnt8x16"); return; 840 case Iop_Clz8Sx16: vex_printf("Clz8Sx16"); return; 841 case Iop_Clz16Sx8: vex_printf("Clz16Sx8"); return; 842 case Iop_Clz32Sx4: vex_printf("Clz32Sx4"); return; 843 case Iop_Clz64x2: vex_printf("Clz64x2"); return; 844 case Iop_Cls8Sx16: vex_printf("Cls8Sx16"); return; 845 case Iop_Cls16Sx8: vex_printf("Cls16Sx8"); return; 846 case Iop_Cls32Sx4: vex_printf("Cls32Sx4"); return; 847 case Iop_AddLV8Ux16: vex_printf("AddLV8Ux16"); return; 848 case Iop_AddLV16Ux8: vex_printf("AddLV16Ux8"); return; 849 case Iop_AddLV32Ux4: vex_printf("AddLV32Ux4"); return; 850 case Iop_AddLV8Sx16: vex_printf("AddLV8Sx16"); return; 851 case Iop_AddLV16Sx8: vex_printf("AddLV16Sx8"); return; 852 case Iop_AddLV32Sx4: vex_printf("AddLV32Sx4"); return; 853 854 case Iop_ShlV128: vex_printf("ShlV128"); return; 855 case Iop_ShrV128: vex_printf("ShrV128"); return; 856 857 case Iop_ShlN8x16: vex_printf("ShlN8x16"); return; 858 case Iop_ShlN16x8: vex_printf("ShlN16x8"); return; 859 case Iop_ShlN32x4: vex_printf("ShlN32x4"); return; 860 case Iop_ShlN64x2: vex_printf("ShlN64x2"); return; 861 case Iop_ShrN8x16: vex_printf("ShrN8x16"); return; 862 case Iop_ShrN16x8: vex_printf("ShrN16x8"); return; 863 case Iop_ShrN32x4: vex_printf("ShrN32x4"); return; 864 case Iop_ShrN64x2: vex_printf("ShrN64x2"); return; 865 case Iop_SarN8x16: vex_printf("SarN8x16"); return; 866 case Iop_SarN16x8: vex_printf("SarN16x8"); return; 867 case Iop_SarN32x4: vex_printf("SarN32x4"); return; 868 case Iop_SarN64x2: vex_printf("SarN64x2"); return; 869 870 case Iop_Shl8x16: vex_printf("Shl8x16"); return; 871 case Iop_Shl16x8: vex_printf("Shl16x8"); return; 872 case Iop_Shl32x4: vex_printf("Shl32x4"); return; 873 case Iop_Shl64x2: vex_printf("Shl64x2"); return; 874 case Iop_QSal8x16: vex_printf("QSal8x16"); return; 875 case Iop_QSal16x8: vex_printf("QSal16x8"); return; 876 case Iop_QSal32x4: vex_printf("QSal32x4"); return; 877 case Iop_QSal64x2: vex_printf("QSal64x2"); return; 878 case Iop_QShl8x16: vex_printf("QShl8x16"); return; 879 case Iop_QShl16x8: vex_printf("QShl16x8"); return; 880 case Iop_QShl32x4: vex_printf("QShl32x4"); return; 881 case Iop_QShl64x2: vex_printf("QShl64x2"); return; 882 case Iop_QSalN8x16: vex_printf("QSalN8x16"); return; 883 case Iop_QSalN16x8: vex_printf("QSalN16x8"); return; 884 case Iop_QSalN32x4: vex_printf("QSalN32x4"); return; 885 case Iop_QSalN64x2: vex_printf("QSalN64x2"); return; 886 case Iop_QShlN8x16: vex_printf("QShlN8x16"); return; 887 case Iop_QShlN16x8: vex_printf("QShlN16x8"); return; 888 case Iop_QShlN32x4: vex_printf("QShlN32x4"); return; 889 case Iop_QShlN64x2: vex_printf("QShlN64x2"); return; 890 case Iop_QShlN8Sx16: vex_printf("QShlN8Sx16"); return; 891 case Iop_QShlN16Sx8: vex_printf("QShlN16Sx8"); return; 892 case Iop_QShlN32Sx4: vex_printf("QShlN32Sx4"); return; 893 case Iop_QShlN64Sx2: vex_printf("QShlN64Sx2"); return; 894 case Iop_Shr8x16: vex_printf("Shr8x16"); return; 895 case Iop_Shr16x8: vex_printf("Shr16x8"); return; 896 case Iop_Shr32x4: vex_printf("Shr32x4"); return; 897 case Iop_Shr64x2: vex_printf("Shr64x2"); return; 898 case Iop_Sar8x16: vex_printf("Sar8x16"); return; 899 case Iop_Sar16x8: vex_printf("Sar16x8"); return; 900 case Iop_Sar32x4: vex_printf("Sar32x4"); return; 901 case Iop_Sar64x2: vex_printf("Sar64x2"); return; 902 case Iop_Sal8x16: vex_printf("Sal8x16"); return; 903 case Iop_Sal16x8: vex_printf("Sal16x8"); return; 904 case Iop_Sal32x4: vex_printf("Sal32x4"); return; 905 case Iop_Sal64x2: vex_printf("Sal64x2"); return; 906 case Iop_Rol8x16: vex_printf("Rol8x16"); return; 907 case Iop_Rol16x8: vex_printf("Rol16x8"); return; 908 case Iop_Rol32x4: vex_printf("Rol32x4"); return; 909 case Iop_Rol64x2: vex_printf("Rol64x2"); return; 910 911 case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return; 912 case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return; 913 case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return; 914 case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return; 915 case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return; 916 case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return; 917 case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return; 918 case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return; 919 case Iop_NarrowUn16to8x8: vex_printf("NarrowUn16to8x8"); return; 920 case Iop_NarrowUn32to16x4: vex_printf("NarrowUn32to16x4"); return; 921 case Iop_NarrowUn64to32x2: vex_printf("NarrowUn64to32x2"); return; 922 case Iop_QNarrowUn16Uto8Ux8: vex_printf("QNarrowUn16Uto8Ux8"); return; 923 case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return; 924 case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return; 925 case Iop_QNarrowUn16Sto8Sx8: vex_printf("QNarrowUn16Sto8Sx8"); return; 926 case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return; 927 case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return; 928 case Iop_QNarrowUn16Sto8Ux8: vex_printf("QNarrowUn16Sto8Ux8"); return; 929 case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return; 930 case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return; 931 case Iop_Widen8Uto16x8: vex_printf("Widen8Uto16x8"); return; 932 case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return; 933 case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return; 934 case Iop_Widen8Sto16x8: vex_printf("Widen8Sto16x8"); return; 935 case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return; 936 case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return; 937 938 case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return; 939 case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return; 940 case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return; 941 case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return; 942 case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return; 943 case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return; 944 case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return; 945 case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return; 946 947 case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return; 948 case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return; 949 case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return; 950 case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return; 951 case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return; 952 case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return; 953 954 case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return; 955 case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return; 956 case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return; 957 case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return; 958 case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return; 959 case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return; 960 961 case Iop_GetElem8x16: vex_printf("GetElem8x16"); return; 962 case Iop_GetElem16x8: vex_printf("GetElem16x8"); return; 963 case Iop_GetElem32x4: vex_printf("GetElem32x4"); return; 964 case Iop_GetElem64x2: vex_printf("GetElem64x2"); return; 965 966 case Iop_GetElem8x8: vex_printf("GetElem8x8"); return; 967 case Iop_GetElem16x4: vex_printf("GetElem16x4"); return; 968 case Iop_GetElem32x2: vex_printf("GetElem32x2"); return; 969 case Iop_SetElem8x8: vex_printf("SetElem8x8"); return; 970 case Iop_SetElem16x4: vex_printf("SetElem16x4"); return; 971 case Iop_SetElem32x2: vex_printf("SetElem32x2"); return; 972 973 case Iop_Extract64: vex_printf("Extract64"); return; 974 case Iop_ExtractV128: vex_printf("ExtractV128"); return; 975 976 case Iop_Perm8x16: vex_printf("Perm8x16"); return; 977 case Iop_Perm32x4: vex_printf("Perm32x4"); return; 978 case Iop_Reverse16_8x16: vex_printf("Reverse16_8x16"); return; 979 case Iop_Reverse32_8x16: vex_printf("Reverse32_8x16"); return; 980 case Iop_Reverse32_16x8: vex_printf("Reverse32_16x8"); return; 981 case Iop_Reverse64_8x16: vex_printf("Reverse64_8x16"); return; 982 case Iop_Reverse64_16x8: vex_printf("Reverse64_16x8"); return; 983 case Iop_Reverse64_32x4: vex_printf("Reverse64_32x4"); return; 984 985 case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return; 986 case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return; 987 case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return; 988 case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return; 989 case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return; 990 case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return; 991 case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return; 992 case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return; 993 994 case Iop_D32toD64: vex_printf("D32toD64"); return; 995 case Iop_D64toD32: vex_printf("D64toD32"); return; 996 case Iop_AddD64: vex_printf("AddD64"); return; 997 case Iop_SubD64: vex_printf("SubD64"); return; 998 case Iop_MulD64: vex_printf("MulD64"); return; 999 case Iop_DivD64: vex_printf("DivD64"); return; 1000 case Iop_ShlD64: vex_printf("ShlD64"); return; 1001 case Iop_ShrD64: vex_printf("ShrD64"); return; 1002 case Iop_D64toI32S: vex_printf("D64toI32S"); return; 1003 case Iop_D64toI32U: vex_printf("D64toI32U"); return; 1004 case Iop_D64toI64S: vex_printf("D64toI64S"); return; 1005 case Iop_D64toI64U: vex_printf("D64toI64U"); return; 1006 case Iop_I32StoD64: vex_printf("I32StoD64"); return; 1007 case Iop_I32UtoD64: vex_printf("I32UtoD64"); return; 1008 case Iop_I64StoD64: vex_printf("I64StoD64"); return; 1009 case Iop_I64UtoD64: vex_printf("I64UtoD64"); return; 1010 case Iop_I32StoD128: vex_printf("I32StoD128"); return; 1011 case Iop_I32UtoD128: vex_printf("I32UtoD128"); return; 1012 case Iop_I64StoD128: vex_printf("I64StoD128"); return; 1013 case Iop_I64UtoD128: vex_printf("I64UtoD128"); return; 1014 case Iop_D64toD128: vex_printf("D64toD128"); return; 1015 case Iop_D128toD64: vex_printf("D128toD64"); return; 1016 case Iop_D128toI32S: vex_printf("D128toI32S"); return; 1017 case Iop_D128toI32U: vex_printf("D128toI32U"); return; 1018 case Iop_D128toI64S: vex_printf("D128toI64S"); return; 1019 case Iop_D128toI64U: vex_printf("D128toI64U"); return; 1020 case Iop_F32toD32: vex_printf("F32toD32"); return; 1021 case Iop_F32toD64: vex_printf("F32toD64"); return; 1022 case Iop_F32toD128: vex_printf("F32toD128"); return; 1023 case Iop_F64toD32: vex_printf("F64toD32"); return; 1024 case Iop_F64toD64: vex_printf("F64toD64"); return; 1025 case Iop_F64toD128: vex_printf("F64toD128"); return; 1026 case Iop_F128toD32: vex_printf("F128toD32"); return; 1027 case Iop_F128toD64: vex_printf("F128toD64"); return; 1028 case Iop_F128toD128: vex_printf("F128toD128"); return; 1029 case Iop_D32toF32: vex_printf("D32toF32"); return; 1030 case Iop_D32toF64: vex_printf("D32toF64"); return; 1031 case Iop_D32toF128: vex_printf("D32toF128"); return; 1032 case Iop_D64toF32: vex_printf("D64toF32"); return; 1033 case Iop_D64toF64: vex_printf("D64toF64"); return; 1034 case Iop_D64toF128: vex_printf("D64toF128"); return; 1035 case Iop_D128toF32: vex_printf("D128toF32"); return; 1036 case Iop_D128toF64: vex_printf("D128toF64"); return; 1037 case Iop_D128toF128: vex_printf("D128toF128"); return; 1038 case Iop_AddD128: vex_printf("AddD128"); return; 1039 case Iop_SubD128: vex_printf("SubD128"); return; 1040 case Iop_MulD128: vex_printf("MulD128"); return; 1041 case Iop_DivD128: vex_printf("DivD128"); return; 1042 case Iop_ShlD128: vex_printf("ShlD128"); return; 1043 case Iop_ShrD128: vex_printf("ShrD128"); return; 1044 case Iop_RoundD64toInt: vex_printf("Iop_RoundD64toInt"); return; 1045 case Iop_RoundD128toInt: vex_printf("Iop_RoundD128toInt"); return; 1046 case Iop_QuantizeD64: vex_printf("Iop_QuantizeD64"); return; 1047 case Iop_QuantizeD128: vex_printf("Iop_QuantizeD128"); return; 1048 case Iop_ExtractExpD64: vex_printf("Iop_ExtractExpD64"); return; 1049 case Iop_ExtractExpD128: vex_printf("Iop_ExtractExpD128"); return; 1050 case Iop_ExtractSigD64: vex_printf("Iop_ExtractSigD64"); return; 1051 case Iop_ExtractSigD128: vex_printf("Iop_ExtractSigD128"); return; 1052 case Iop_InsertExpD64: vex_printf("Iop_InsertExpD64"); return; 1053 case Iop_InsertExpD128: vex_printf("Iop_InsertExpD128"); return; 1054 case Iop_CmpD64: vex_printf("CmpD64"); return; 1055 case Iop_CmpD128: vex_printf("CmpD128"); return; 1056 case Iop_CmpExpD64: vex_printf("CmpExpD64"); return; 1057 case Iop_CmpExpD128: vex_printf("CmpExpD128"); return; 1058 case Iop_D64HLtoD128: vex_printf("D64HLtoD128"); return; 1059 case Iop_D128HItoD64: vex_printf("D128HItoD64"); return; 1060 case Iop_D128LOtoD64: vex_printf("D128LOtoD64"); return; 1061 case Iop_SignificanceRoundD64: vex_printf("Iop_SignificanceRoundD64"); 1062 return; 1063 case Iop_SignificanceRoundD128: vex_printf("Iop_SignificanceRoundD128"); 1064 return; 1065 case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return; 1066 case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return; 1067 case Iop_V256to64_0: vex_printf("V256to64_0"); return; 1068 case Iop_V256to64_1: vex_printf("V256to64_1"); return; 1069 case Iop_V256to64_2: vex_printf("V256to64_2"); return; 1070 case Iop_V256to64_3: vex_printf("V256to64_3"); return; 1071 case Iop_64x4toV256: vex_printf("64x4toV256"); return; 1072 case Iop_V256toV128_0: vex_printf("V256toV128_0"); return; 1073 case Iop_V256toV128_1: vex_printf("V256toV128_1"); return; 1074 case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return; 1075 case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return; 1076 case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return; 1077 case Iop_Add64Fx4: vex_printf("Add64Fx4"); return; 1078 case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return; 1079 case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return; 1080 case Iop_Div64Fx4: vex_printf("Div64Fx4"); return; 1081 case Iop_Add32Fx8: vex_printf("Add32Fx8"); return; 1082 case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return; 1083 case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return; 1084 case Iop_Div32Fx8: vex_printf("Div32Fx8"); return; 1085 case Iop_AndV256: vex_printf("AndV256"); return; 1086 case Iop_OrV256: vex_printf("OrV256"); return; 1087 case Iop_XorV256: vex_printf("XorV256"); return; 1088 case Iop_NotV256: vex_printf("NotV256"); return; 1089 case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return; 1090 case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return; 1091 case Iop_CmpNEZ16x16: vex_printf("CmpNEZ16x16"); return; 1092 case Iop_CmpNEZ8x32: vex_printf("CmpNEZ8x32"); return; 1093 1094 case Iop_Add8x32: vex_printf("Add8x32"); return; 1095 case Iop_Add16x16: vex_printf("Add16x16"); return; 1096 case Iop_Add32x8: vex_printf("Add32x8"); return; 1097 case Iop_Add64x4: vex_printf("Add64x4"); return; 1098 case Iop_Sub8x32: vex_printf("Sub8x32"); return; 1099 case Iop_Sub16x16: vex_printf("Sub16x16"); return; 1100 case Iop_Sub32x8: vex_printf("Sub32x8"); return; 1101 case Iop_Sub64x4: vex_printf("Sub64x4"); return; 1102 case Iop_QAdd8Ux32: vex_printf("QAdd8Ux32"); return; 1103 case Iop_QAdd16Ux16: vex_printf("QAdd16Ux16"); return; 1104 case Iop_QAdd8Sx32: vex_printf("QAdd8Sx32"); return; 1105 case Iop_QAdd16Sx16: vex_printf("QAdd16Sx16"); return; 1106 case Iop_QSub8Ux32: vex_printf("QSub8Ux32"); return; 1107 case Iop_QSub16Ux16: vex_printf("QSub16Ux16"); return; 1108 case Iop_QSub8Sx32: vex_printf("QSub8Sx32"); return; 1109 case Iop_QSub16Sx16: vex_printf("QSub16Sx16"); return; 1110 1111 case Iop_Mul16x16: vex_printf("Mul16x16"); return; 1112 case Iop_Mul32x8: vex_printf("Mul32x8"); return; 1113 case Iop_MulHi16Ux16: vex_printf("MulHi16Ux16"); return; 1114 case Iop_MulHi16Sx16: vex_printf("MulHi16Sx16"); return; 1115 1116 case Iop_Avg8Ux32: vex_printf("Avg8Ux32"); return; 1117 case Iop_Avg16Ux16: vex_printf("Avg16Ux16"); return; 1118 1119 case Iop_Max8Sx32: vex_printf("Max8Sx32"); return; 1120 case Iop_Max16Sx16: vex_printf("Max16Sx16"); return; 1121 case Iop_Max32Sx8: vex_printf("Max32Sx8"); return; 1122 case Iop_Max8Ux32: vex_printf("Max8Ux32"); return; 1123 case Iop_Max16Ux16: vex_printf("Max16Ux16"); return; 1124 case Iop_Max32Ux8: vex_printf("Max32Ux8"); return; 1125 1126 case Iop_Min8Sx32: vex_printf("Min8Sx32"); return; 1127 case Iop_Min16Sx16: vex_printf("Min16Sx16"); return; 1128 case Iop_Min32Sx8: vex_printf("Min32Sx8"); return; 1129 case Iop_Min8Ux32: vex_printf("Min8Ux32"); return; 1130 case Iop_Min16Ux16: vex_printf("Min16Ux16"); return; 1131 case Iop_Min32Ux8: vex_printf("Min32Ux8"); return; 1132 1133 case Iop_CmpEQ8x32: vex_printf("CmpEQ8x32"); return; 1134 case Iop_CmpEQ16x16: vex_printf("CmpEQ16x16"); return; 1135 case Iop_CmpEQ32x8: vex_printf("CmpEQ32x8"); return; 1136 case Iop_CmpEQ64x4: vex_printf("CmpEQ64x4"); return; 1137 case Iop_CmpGT8Sx32: vex_printf("CmpGT8Sx32"); return; 1138 case Iop_CmpGT16Sx16: vex_printf("CmpGT16Sx16"); return; 1139 case Iop_CmpGT32Sx8: vex_printf("CmpGT32Sx8"); return; 1140 case Iop_CmpGT64Sx4: vex_printf("CmpGT64Sx4"); return; 1141 1142 case Iop_ShlN16x16: vex_printf("ShlN16x16"); return; 1143 case Iop_ShlN32x8: vex_printf("ShlN32x8"); return; 1144 case Iop_ShlN64x4: vex_printf("ShlN64x4"); return; 1145 case Iop_ShrN16x16: vex_printf("ShrN16x16"); return; 1146 case Iop_ShrN32x8: vex_printf("ShrN32x8"); return; 1147 case Iop_ShrN64x4: vex_printf("ShrN64x4"); return; 1148 case Iop_SarN16x16: vex_printf("SarN16x16"); return; 1149 case Iop_SarN32x8: vex_printf("SarN32x8"); return; 1150 1151 case Iop_Perm32x8: vex_printf("Perm32x8"); return; 1152 1153 case Iop_CipherV128: vex_printf("CipherV128"); return; 1154 case Iop_CipherLV128: vex_printf("CipherLV128"); return; 1155 case Iop_NCipherV128: vex_printf("NCipherV128"); return; 1156 case Iop_NCipherLV128: vex_printf("NCipherLV128"); return; 1157 case Iop_CipherSV128: vex_printf("CipherSV128"); return; 1158 1159 case Iop_SHA256: vex_printf("SHA256"); return; 1160 case Iop_SHA512: vex_printf("SHA512"); return; 1161 case Iop_BCDAdd: vex_printf("BCDAdd"); return; 1162 case Iop_BCDSub: vex_printf("BCDSub"); return; 1163 1164 case Iop_PwBitMtxXpose64x2: vex_printf("BitMatrixTranspose64x2"); return; 1165 1166 default: vpanic("ppIROp(1)"); 1167 } 1168 1169 vassert(str); 1170 switch (op - base) { 1171 case 0: vex_printf("%s",str); vex_printf("8"); break; 1172 case 1: vex_printf("%s",str); vex_printf("16"); break; 1173 case 2: vex_printf("%s",str); vex_printf("32"); break; 1174 case 3: vex_printf("%s",str); vex_printf("64"); break; 1175 default: vpanic("ppIROp(2)"); 1176 } 1177} 1178 1179void ppIRExpr ( IRExpr* e ) 1180{ 1181 Int i; 1182 switch (e->tag) { 1183 case Iex_Binder: 1184 vex_printf("BIND-%d", e->Iex.Binder.binder); 1185 break; 1186 case Iex_Get: 1187 vex_printf( "GET:" ); 1188 ppIRType(e->Iex.Get.ty); 1189 vex_printf("(%d)", e->Iex.Get.offset); 1190 break; 1191 case Iex_GetI: 1192 vex_printf( "GETI" ); 1193 ppIRRegArray(e->Iex.GetI.descr); 1194 vex_printf("["); 1195 ppIRExpr(e->Iex.GetI.ix); 1196 vex_printf(",%d]", e->Iex.GetI.bias); 1197 break; 1198 case Iex_RdTmp: 1199 ppIRTemp(e->Iex.RdTmp.tmp); 1200 break; 1201 case Iex_Qop: { 1202 IRQop *qop = e->Iex.Qop.details; 1203 ppIROp(qop->op); 1204 vex_printf( "(" ); 1205 ppIRExpr(qop->arg1); 1206 vex_printf( "," ); 1207 ppIRExpr(qop->arg2); 1208 vex_printf( "," ); 1209 ppIRExpr(qop->arg3); 1210 vex_printf( "," ); 1211 ppIRExpr(qop->arg4); 1212 vex_printf( ")" ); 1213 break; 1214 } 1215 case Iex_Triop: { 1216 IRTriop *triop = e->Iex.Triop.details; 1217 ppIROp(triop->op); 1218 vex_printf( "(" ); 1219 ppIRExpr(triop->arg1); 1220 vex_printf( "," ); 1221 ppIRExpr(triop->arg2); 1222 vex_printf( "," ); 1223 ppIRExpr(triop->arg3); 1224 vex_printf( ")" ); 1225 break; 1226 } 1227 case Iex_Binop: 1228 ppIROp(e->Iex.Binop.op); 1229 vex_printf( "(" ); 1230 ppIRExpr(e->Iex.Binop.arg1); 1231 vex_printf( "," ); 1232 ppIRExpr(e->Iex.Binop.arg2); 1233 vex_printf( ")" ); 1234 break; 1235 case Iex_Unop: 1236 ppIROp(e->Iex.Unop.op); 1237 vex_printf( "(" ); 1238 ppIRExpr(e->Iex.Unop.arg); 1239 vex_printf( ")" ); 1240 break; 1241 case Iex_Load: 1242 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" ); 1243 ppIRType(e->Iex.Load.ty); 1244 vex_printf( "(" ); 1245 ppIRExpr(e->Iex.Load.addr); 1246 vex_printf( ")" ); 1247 break; 1248 case Iex_Const: 1249 ppIRConst(e->Iex.Const.con); 1250 break; 1251 case Iex_CCall: 1252 ppIRCallee(e->Iex.CCall.cee); 1253 vex_printf("("); 1254 for (i = 0; e->Iex.CCall.args[i] != NULL; i++) { 1255 IRExpr* arg = e->Iex.CCall.args[i]; 1256 ppIRExpr(arg); 1257 1258 if (e->Iex.CCall.args[i+1] != NULL) { 1259 vex_printf(","); 1260 } 1261 } 1262 vex_printf("):"); 1263 ppIRType(e->Iex.CCall.retty); 1264 break; 1265 case Iex_ITE: 1266 vex_printf("ITE("); 1267 ppIRExpr(e->Iex.ITE.cond); 1268 vex_printf(","); 1269 ppIRExpr(e->Iex.ITE.iftrue); 1270 vex_printf(","); 1271 ppIRExpr(e->Iex.ITE.iffalse); 1272 vex_printf(")"); 1273 break; 1274 case Iex_VECRET: 1275 vex_printf("VECRET"); 1276 break; 1277 case Iex_BBPTR: 1278 vex_printf("BBPTR"); 1279 break; 1280 default: 1281 vpanic("ppIRExpr"); 1282 } 1283} 1284 1285void ppIREffect ( IREffect fx ) 1286{ 1287 switch (fx) { 1288 case Ifx_None: vex_printf("noFX"); return; 1289 case Ifx_Read: vex_printf("RdFX"); return; 1290 case Ifx_Write: vex_printf("WrFX"); return; 1291 case Ifx_Modify: vex_printf("MoFX"); return; 1292 default: vpanic("ppIREffect"); 1293 } 1294} 1295 1296void ppIRDirty ( IRDirty* d ) 1297{ 1298 Int i; 1299 if (d->tmp != IRTemp_INVALID) { 1300 ppIRTemp(d->tmp); 1301 vex_printf(" = "); 1302 } 1303 vex_printf("DIRTY "); 1304 ppIRExpr(d->guard); 1305 if (d->mFx != Ifx_None) { 1306 vex_printf(" "); 1307 ppIREffect(d->mFx); 1308 vex_printf("-mem("); 1309 ppIRExpr(d->mAddr); 1310 vex_printf(",%d)", d->mSize); 1311 } 1312 for (i = 0; i < d->nFxState; i++) { 1313 vex_printf(" "); 1314 ppIREffect(d->fxState[i].fx); 1315 vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset, 1316 (UInt)d->fxState[i].size); 1317 if (d->fxState[i].nRepeats > 0) { 1318 vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats, 1319 (UInt)d->fxState[i].repeatLen); 1320 } 1321 vex_printf(")"); 1322 } 1323 vex_printf(" ::: "); 1324 ppIRCallee(d->cee); 1325 vex_printf("("); 1326 for (i = 0; d->args[i] != NULL; i++) { 1327 IRExpr* arg = d->args[i]; 1328 ppIRExpr(arg); 1329 1330 if (d->args[i+1] != NULL) { 1331 vex_printf(","); 1332 } 1333 } 1334 vex_printf(")"); 1335} 1336 1337void ppIRCAS ( IRCAS* cas ) 1338{ 1339 /* Print even structurally invalid constructions, as an aid to 1340 debugging. */ 1341 if (cas->oldHi != IRTemp_INVALID) { 1342 ppIRTemp(cas->oldHi); 1343 vex_printf(","); 1344 } 1345 ppIRTemp(cas->oldLo); 1346 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" ); 1347 ppIRExpr(cas->addr); 1348 vex_printf("::"); 1349 if (cas->expdHi) { 1350 ppIRExpr(cas->expdHi); 1351 vex_printf(","); 1352 } 1353 ppIRExpr(cas->expdLo); 1354 vex_printf("->"); 1355 if (cas->dataHi) { 1356 ppIRExpr(cas->dataHi); 1357 vex_printf(","); 1358 } 1359 ppIRExpr(cas->dataLo); 1360 vex_printf(")"); 1361} 1362 1363void ppIRPutI ( IRPutI* puti ) 1364{ 1365 vex_printf( "PUTI" ); 1366 ppIRRegArray(puti->descr); 1367 vex_printf("["); 1368 ppIRExpr(puti->ix); 1369 vex_printf(",%d] = ", puti->bias); 1370 ppIRExpr(puti->data); 1371} 1372 1373void ppIRStoreG ( IRStoreG* sg ) 1374{ 1375 vex_printf("if ("); 1376 ppIRExpr(sg->guard); 1377 vex_printf(") ST%s(", sg->end==Iend_LE ? "le" : "be"); 1378 ppIRExpr(sg->addr); 1379 vex_printf(") = "); 1380 ppIRExpr(sg->data); 1381} 1382 1383void ppIRLoadGOp ( IRLoadGOp cvt ) 1384{ 1385 switch (cvt) { 1386 case ILGop_INVALID: vex_printf("ILGop_INVALID"); break; 1387 case ILGop_Ident32: vex_printf("Ident32"); break; 1388 case ILGop_16Uto32: vex_printf("16Uto32"); break; 1389 case ILGop_16Sto32: vex_printf("16Sto32"); break; 1390 case ILGop_8Uto32: vex_printf("8Uto32"); break; 1391 case ILGop_8Sto32: vex_printf("8Sto32"); break; 1392 default: vpanic("ppIRLoadGOp"); 1393 } 1394} 1395 1396void ppIRLoadG ( IRLoadG* lg ) 1397{ 1398 ppIRTemp(lg->dst); 1399 vex_printf(" = if-strict ("); 1400 ppIRExpr(lg->guard); 1401 vex_printf(") "); 1402 ppIRLoadGOp(lg->cvt); 1403 vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be"); 1404 ppIRExpr(lg->addr); 1405 vex_printf(")) else "); 1406 ppIRExpr(lg->alt); 1407} 1408 1409void ppIRJumpKind ( IRJumpKind kind ) 1410{ 1411 switch (kind) { 1412 case Ijk_Boring: vex_printf("Boring"); break; 1413 case Ijk_Call: vex_printf("Call"); break; 1414 case Ijk_Ret: vex_printf("Return"); break; 1415 case Ijk_ClientReq: vex_printf("ClientReq"); break; 1416 case Ijk_Yield: vex_printf("Yield"); break; 1417 case Ijk_EmWarn: vex_printf("EmWarn"); break; 1418 case Ijk_EmFail: vex_printf("EmFail"); break; 1419 case Ijk_NoDecode: vex_printf("NoDecode"); break; 1420 case Ijk_MapFail: vex_printf("MapFail"); break; 1421 case Ijk_InvalICache: vex_printf("InvalICache"); break; 1422 case Ijk_FlushDCache: vex_printf("FlushDCache"); break; 1423 case Ijk_NoRedir: vex_printf("NoRedir"); break; 1424 case Ijk_SigILL: vex_printf("SigILL"); break; 1425 case Ijk_SigTRAP: vex_printf("SigTRAP"); break; 1426 case Ijk_SigSEGV: vex_printf("SigSEGV"); break; 1427 case Ijk_SigBUS: vex_printf("SigBUS"); break; 1428 case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break; 1429 case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break; 1430 case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break; 1431 case Ijk_Sys_int32: vex_printf("Sys_int32"); break; 1432 case Ijk_Sys_int128: vex_printf("Sys_int128"); break; 1433 case Ijk_Sys_int129: vex_printf("Sys_int129"); break; 1434 case Ijk_Sys_int130: vex_printf("Sys_int130"); break; 1435 case Ijk_Sys_sysenter: vex_printf("Sys_sysenter"); break; 1436 default: vpanic("ppIRJumpKind"); 1437 } 1438} 1439 1440void ppIRMBusEvent ( IRMBusEvent event ) 1441{ 1442 switch (event) { 1443 case Imbe_Fence: 1444 vex_printf("Fence"); break; 1445 case Imbe_CancelReservation: 1446 vex_printf("CancelReservation"); break; 1447 default: 1448 vpanic("ppIRMBusEvent"); 1449 } 1450} 1451 1452void ppIRStmt ( IRStmt* s ) 1453{ 1454 if (!s) { 1455 vex_printf("!!! IRStmt* which is NULL !!!"); 1456 return; 1457 } 1458 switch (s->tag) { 1459 case Ist_NoOp: 1460 vex_printf("IR-NoOp"); 1461 break; 1462 case Ist_IMark: 1463 vex_printf( "------ IMark(0x%llx, %d, %u) ------", 1464 s->Ist.IMark.addr, s->Ist.IMark.len, 1465 (UInt)s->Ist.IMark.delta); 1466 break; 1467 case Ist_AbiHint: 1468 vex_printf("====== AbiHint("); 1469 ppIRExpr(s->Ist.AbiHint.base); 1470 vex_printf(", %d, ", s->Ist.AbiHint.len); 1471 ppIRExpr(s->Ist.AbiHint.nia); 1472 vex_printf(") ======"); 1473 break; 1474 case Ist_Put: 1475 vex_printf( "PUT(%d) = ", s->Ist.Put.offset); 1476 ppIRExpr(s->Ist.Put.data); 1477 break; 1478 case Ist_PutI: 1479 ppIRPutI(s->Ist.PutI.details); 1480 break; 1481 case Ist_WrTmp: 1482 ppIRTemp(s->Ist.WrTmp.tmp); 1483 vex_printf( " = " ); 1484 ppIRExpr(s->Ist.WrTmp.data); 1485 break; 1486 case Ist_Store: 1487 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" ); 1488 ppIRExpr(s->Ist.Store.addr); 1489 vex_printf( ") = "); 1490 ppIRExpr(s->Ist.Store.data); 1491 break; 1492 case Ist_StoreG: 1493 ppIRStoreG(s->Ist.StoreG.details); 1494 break; 1495 case Ist_LoadG: 1496 ppIRLoadG(s->Ist.LoadG.details); 1497 break; 1498 case Ist_CAS: 1499 ppIRCAS(s->Ist.CAS.details); 1500 break; 1501 case Ist_LLSC: 1502 if (s->Ist.LLSC.storedata == NULL) { 1503 ppIRTemp(s->Ist.LLSC.result); 1504 vex_printf(" = LD%s-Linked(", 1505 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1506 ppIRExpr(s->Ist.LLSC.addr); 1507 vex_printf(")"); 1508 } else { 1509 ppIRTemp(s->Ist.LLSC.result); 1510 vex_printf(" = ( ST%s-Cond(", 1511 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1512 ppIRExpr(s->Ist.LLSC.addr); 1513 vex_printf(") = "); 1514 ppIRExpr(s->Ist.LLSC.storedata); 1515 vex_printf(" )"); 1516 } 1517 break; 1518 case Ist_Dirty: 1519 ppIRDirty(s->Ist.Dirty.details); 1520 break; 1521 case Ist_MBE: 1522 vex_printf("IR-"); 1523 ppIRMBusEvent(s->Ist.MBE.event); 1524 break; 1525 case Ist_Exit: 1526 vex_printf( "if (" ); 1527 ppIRExpr(s->Ist.Exit.guard); 1528 vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP); 1529 ppIRConst(s->Ist.Exit.dst); 1530 vex_printf("; exit-"); 1531 ppIRJumpKind(s->Ist.Exit.jk); 1532 vex_printf(" } "); 1533 break; 1534 default: 1535 vpanic("ppIRStmt"); 1536 } 1537} 1538 1539void ppIRTypeEnv ( IRTypeEnv* env ) { 1540 UInt i; 1541 for (i = 0; i < env->types_used; i++) { 1542 if (i % 8 == 0) 1543 vex_printf( " "); 1544 ppIRTemp(i); 1545 vex_printf( ":"); 1546 ppIRType(env->types[i]); 1547 if (i % 8 == 7) 1548 vex_printf( "\n"); 1549 else 1550 vex_printf( " "); 1551 } 1552 if (env->types_used > 0 && env->types_used % 8 != 7) 1553 vex_printf( "\n"); 1554} 1555 1556void ppIRSB ( IRSB* bb ) 1557{ 1558 Int i; 1559 vex_printf("IRSB {\n"); 1560 ppIRTypeEnv(bb->tyenv); 1561 vex_printf("\n"); 1562 for (i = 0; i < bb->stmts_used; i++) { 1563 vex_printf( " "); 1564 ppIRStmt(bb->stmts[i]); 1565 vex_printf( "\n"); 1566 } 1567 vex_printf( " PUT(%d) = ", bb->offsIP ); 1568 ppIRExpr( bb->next ); 1569 vex_printf( "; exit-"); 1570 ppIRJumpKind(bb->jumpkind); 1571 vex_printf( "\n}\n"); 1572} 1573 1574 1575/*---------------------------------------------------------------*/ 1576/*--- Constructors ---*/ 1577/*---------------------------------------------------------------*/ 1578 1579 1580/* Constructors -- IRConst */ 1581 1582IRConst* IRConst_U1 ( Bool bit ) 1583{ 1584 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1585 c->tag = Ico_U1; 1586 c->Ico.U1 = bit; 1587 /* call me paranoid; I don't care :-) */ 1588 vassert(bit == False || bit == True); 1589 return c; 1590} 1591IRConst* IRConst_U8 ( UChar u8 ) 1592{ 1593 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1594 c->tag = Ico_U8; 1595 c->Ico.U8 = u8; 1596 return c; 1597} 1598IRConst* IRConst_U16 ( UShort u16 ) 1599{ 1600 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1601 c->tag = Ico_U16; 1602 c->Ico.U16 = u16; 1603 return c; 1604} 1605IRConst* IRConst_U32 ( UInt u32 ) 1606{ 1607 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1608 c->tag = Ico_U32; 1609 c->Ico.U32 = u32; 1610 return c; 1611} 1612IRConst* IRConst_U64 ( ULong u64 ) 1613{ 1614 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1615 c->tag = Ico_U64; 1616 c->Ico.U64 = u64; 1617 return c; 1618} 1619IRConst* IRConst_F32 ( Float f32 ) 1620{ 1621 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1622 c->tag = Ico_F32; 1623 c->Ico.F32 = f32; 1624 return c; 1625} 1626IRConst* IRConst_F32i ( UInt f32i ) 1627{ 1628 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1629 c->tag = Ico_F32i; 1630 c->Ico.F32i = f32i; 1631 return c; 1632} 1633IRConst* IRConst_F64 ( Double f64 ) 1634{ 1635 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1636 c->tag = Ico_F64; 1637 c->Ico.F64 = f64; 1638 return c; 1639} 1640IRConst* IRConst_F64i ( ULong f64i ) 1641{ 1642 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1643 c->tag = Ico_F64i; 1644 c->Ico.F64i = f64i; 1645 return c; 1646} 1647IRConst* IRConst_V128 ( UShort con ) 1648{ 1649 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1650 c->tag = Ico_V128; 1651 c->Ico.V128 = con; 1652 return c; 1653} 1654IRConst* IRConst_V256 ( UInt con ) 1655{ 1656 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1657 c->tag = Ico_V256; 1658 c->Ico.V256 = con; 1659 return c; 1660} 1661 1662/* Constructors -- IRCallee */ 1663 1664IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr ) 1665{ 1666 IRCallee* ce = LibVEX_Alloc(sizeof(IRCallee)); 1667 ce->regparms = regparms; 1668 ce->name = name; 1669 ce->addr = addr; 1670 ce->mcx_mask = 0; 1671 vassert(regparms >= 0 && regparms <= 3); 1672 vassert(name != NULL); 1673 vassert(addr != 0); 1674 return ce; 1675} 1676 1677 1678/* Constructors -- IRRegArray */ 1679 1680IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems ) 1681{ 1682 IRRegArray* arr = LibVEX_Alloc(sizeof(IRRegArray)); 1683 arr->base = base; 1684 arr->elemTy = elemTy; 1685 arr->nElems = nElems; 1686 vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)); 1687 vassert(!(arr->elemTy == Ity_I1)); 1688 vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)); 1689 return arr; 1690} 1691 1692 1693/* Constructors -- IRExpr */ 1694 1695IRExpr* IRExpr_Binder ( Int binder ) { 1696 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1697 e->tag = Iex_Binder; 1698 e->Iex.Binder.binder = binder; 1699 return e; 1700} 1701IRExpr* IRExpr_Get ( Int off, IRType ty ) { 1702 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1703 e->tag = Iex_Get; 1704 e->Iex.Get.offset = off; 1705 e->Iex.Get.ty = ty; 1706 return e; 1707} 1708IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) { 1709 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1710 e->tag = Iex_GetI; 1711 e->Iex.GetI.descr = descr; 1712 e->Iex.GetI.ix = ix; 1713 e->Iex.GetI.bias = bias; 1714 return e; 1715} 1716IRExpr* IRExpr_RdTmp ( IRTemp tmp ) { 1717 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1718 e->tag = Iex_RdTmp; 1719 e->Iex.RdTmp.tmp = tmp; 1720 return e; 1721} 1722IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2, 1723 IRExpr* arg3, IRExpr* arg4 ) { 1724 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1725 IRQop* qop = LibVEX_Alloc(sizeof(IRQop)); 1726 qop->op = op; 1727 qop->arg1 = arg1; 1728 qop->arg2 = arg2; 1729 qop->arg3 = arg3; 1730 qop->arg4 = arg4; 1731 e->tag = Iex_Qop; 1732 e->Iex.Qop.details = qop; 1733 return e; 1734} 1735IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1, 1736 IRExpr* arg2, IRExpr* arg3 ) { 1737 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1738 IRTriop* triop = LibVEX_Alloc(sizeof(IRTriop)); 1739 triop->op = op; 1740 triop->arg1 = arg1; 1741 triop->arg2 = arg2; 1742 triop->arg3 = arg3; 1743 e->tag = Iex_Triop; 1744 e->Iex.Triop.details = triop; 1745 return e; 1746} 1747IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) { 1748 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1749 e->tag = Iex_Binop; 1750 e->Iex.Binop.op = op; 1751 e->Iex.Binop.arg1 = arg1; 1752 e->Iex.Binop.arg2 = arg2; 1753 return e; 1754} 1755IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) { 1756 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1757 e->tag = Iex_Unop; 1758 e->Iex.Unop.op = op; 1759 e->Iex.Unop.arg = arg; 1760 return e; 1761} 1762IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) { 1763 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1764 e->tag = Iex_Load; 1765 e->Iex.Load.end = end; 1766 e->Iex.Load.ty = ty; 1767 e->Iex.Load.addr = addr; 1768 vassert(end == Iend_LE || end == Iend_BE); 1769 return e; 1770} 1771IRExpr* IRExpr_Const ( IRConst* con ) { 1772 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1773 e->tag = Iex_Const; 1774 e->Iex.Const.con = con; 1775 return e; 1776} 1777IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) { 1778 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1779 e->tag = Iex_CCall; 1780 e->Iex.CCall.cee = cee; 1781 e->Iex.CCall.retty = retty; 1782 e->Iex.CCall.args = args; 1783 return e; 1784} 1785IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse ) { 1786 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1787 e->tag = Iex_ITE; 1788 e->Iex.ITE.cond = cond; 1789 e->Iex.ITE.iftrue = iftrue; 1790 e->Iex.ITE.iffalse = iffalse; 1791 return e; 1792} 1793IRExpr* IRExpr_VECRET ( void ) { 1794 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1795 e->tag = Iex_VECRET; 1796 return e; 1797} 1798IRExpr* IRExpr_BBPTR ( void ) { 1799 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1800 e->tag = Iex_BBPTR; 1801 return e; 1802} 1803 1804 1805/* Constructors for NULL-terminated IRExpr expression vectors, 1806 suitable for use as arg lists in clean/dirty helper calls. */ 1807 1808IRExpr** mkIRExprVec_0 ( void ) { 1809 IRExpr** vec = LibVEX_Alloc(1 * sizeof(IRExpr*)); 1810 vec[0] = NULL; 1811 return vec; 1812} 1813IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) { 1814 IRExpr** vec = LibVEX_Alloc(2 * sizeof(IRExpr*)); 1815 vec[0] = arg1; 1816 vec[1] = NULL; 1817 return vec; 1818} 1819IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) { 1820 IRExpr** vec = LibVEX_Alloc(3 * sizeof(IRExpr*)); 1821 vec[0] = arg1; 1822 vec[1] = arg2; 1823 vec[2] = NULL; 1824 return vec; 1825} 1826IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) { 1827 IRExpr** vec = LibVEX_Alloc(4 * sizeof(IRExpr*)); 1828 vec[0] = arg1; 1829 vec[1] = arg2; 1830 vec[2] = arg3; 1831 vec[3] = NULL; 1832 return vec; 1833} 1834IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1835 IRExpr* arg4 ) { 1836 IRExpr** vec = LibVEX_Alloc(5 * sizeof(IRExpr*)); 1837 vec[0] = arg1; 1838 vec[1] = arg2; 1839 vec[2] = arg3; 1840 vec[3] = arg4; 1841 vec[4] = NULL; 1842 return vec; 1843} 1844IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1845 IRExpr* arg4, IRExpr* arg5 ) { 1846 IRExpr** vec = LibVEX_Alloc(6 * sizeof(IRExpr*)); 1847 vec[0] = arg1; 1848 vec[1] = arg2; 1849 vec[2] = arg3; 1850 vec[3] = arg4; 1851 vec[4] = arg5; 1852 vec[5] = NULL; 1853 return vec; 1854} 1855IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1856 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) { 1857 IRExpr** vec = LibVEX_Alloc(7 * sizeof(IRExpr*)); 1858 vec[0] = arg1; 1859 vec[1] = arg2; 1860 vec[2] = arg3; 1861 vec[3] = arg4; 1862 vec[4] = arg5; 1863 vec[5] = arg6; 1864 vec[6] = NULL; 1865 return vec; 1866} 1867IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1868 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 1869 IRExpr* arg7 ) { 1870 IRExpr** vec = LibVEX_Alloc(8 * sizeof(IRExpr*)); 1871 vec[0] = arg1; 1872 vec[1] = arg2; 1873 vec[2] = arg3; 1874 vec[3] = arg4; 1875 vec[4] = arg5; 1876 vec[5] = arg6; 1877 vec[6] = arg7; 1878 vec[7] = NULL; 1879 return vec; 1880} 1881IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1882 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 1883 IRExpr* arg7, IRExpr* arg8 ) { 1884 IRExpr** vec = LibVEX_Alloc(9 * sizeof(IRExpr*)); 1885 vec[0] = arg1; 1886 vec[1] = arg2; 1887 vec[2] = arg3; 1888 vec[3] = arg4; 1889 vec[4] = arg5; 1890 vec[5] = arg6; 1891 vec[6] = arg7; 1892 vec[7] = arg8; 1893 vec[8] = NULL; 1894 return vec; 1895} 1896 1897 1898/* Constructors -- IRDirty */ 1899 1900IRDirty* emptyIRDirty ( void ) { 1901 IRDirty* d = LibVEX_Alloc(sizeof(IRDirty)); 1902 d->cee = NULL; 1903 d->guard = NULL; 1904 d->args = NULL; 1905 d->tmp = IRTemp_INVALID; 1906 d->mFx = Ifx_None; 1907 d->mAddr = NULL; 1908 d->mSize = 0; 1909 d->nFxState = 0; 1910 return d; 1911} 1912 1913 1914/* Constructors -- IRCAS */ 1915 1916IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo, 1917 IREndness end, IRExpr* addr, 1918 IRExpr* expdHi, IRExpr* expdLo, 1919 IRExpr* dataHi, IRExpr* dataLo ) { 1920 IRCAS* cas = LibVEX_Alloc(sizeof(IRCAS)); 1921 cas->oldHi = oldHi; 1922 cas->oldLo = oldLo; 1923 cas->end = end; 1924 cas->addr = addr; 1925 cas->expdHi = expdHi; 1926 cas->expdLo = expdLo; 1927 cas->dataHi = dataHi; 1928 cas->dataLo = dataLo; 1929 return cas; 1930} 1931 1932 1933/* Constructors -- IRPutI */ 1934 1935IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix, 1936 Int bias, IRExpr* data ) 1937{ 1938 IRPutI* puti = LibVEX_Alloc(sizeof(IRPutI)); 1939 puti->descr = descr; 1940 puti->ix = ix; 1941 puti->bias = bias; 1942 puti->data = data; 1943 return puti; 1944} 1945 1946 1947/* Constructors -- IRStoreG and IRLoadG */ 1948 1949IRStoreG* mkIRStoreG ( IREndness end, 1950 IRExpr* addr, IRExpr* data, IRExpr* guard ) 1951{ 1952 IRStoreG* sg = LibVEX_Alloc(sizeof(IRStoreG)); 1953 sg->end = end; 1954 sg->addr = addr; 1955 sg->data = data; 1956 sg->guard = guard; 1957 return sg; 1958} 1959 1960IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt, 1961 IRTemp dst, IRExpr* addr, IRExpr* alt, IRExpr* guard ) 1962{ 1963 IRLoadG* lg = LibVEX_Alloc(sizeof(IRLoadG)); 1964 lg->end = end; 1965 lg->cvt = cvt; 1966 lg->dst = dst; 1967 lg->addr = addr; 1968 lg->alt = alt; 1969 lg->guard = guard; 1970 return lg; 1971} 1972 1973 1974/* Constructors -- IRStmt */ 1975 1976IRStmt* IRStmt_NoOp ( void ) 1977{ 1978 /* Just use a single static closure. */ 1979 static IRStmt static_closure; 1980 static_closure.tag = Ist_NoOp; 1981 return &static_closure; 1982} 1983IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta ) { 1984 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1985 s->tag = Ist_IMark; 1986 s->Ist.IMark.addr = addr; 1987 s->Ist.IMark.len = len; 1988 s->Ist.IMark.delta = delta; 1989 return s; 1990} 1991IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) { 1992 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1993 s->tag = Ist_AbiHint; 1994 s->Ist.AbiHint.base = base; 1995 s->Ist.AbiHint.len = len; 1996 s->Ist.AbiHint.nia = nia; 1997 return s; 1998} 1999IRStmt* IRStmt_Put ( Int off, IRExpr* data ) { 2000 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2001 s->tag = Ist_Put; 2002 s->Ist.Put.offset = off; 2003 s->Ist.Put.data = data; 2004 return s; 2005} 2006IRStmt* IRStmt_PutI ( IRPutI* details ) { 2007 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2008 s->tag = Ist_PutI; 2009 s->Ist.PutI.details = details; 2010 return s; 2011} 2012IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) { 2013 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2014 s->tag = Ist_WrTmp; 2015 s->Ist.WrTmp.tmp = tmp; 2016 s->Ist.WrTmp.data = data; 2017 return s; 2018} 2019IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) { 2020 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2021 s->tag = Ist_Store; 2022 s->Ist.Store.end = end; 2023 s->Ist.Store.addr = addr; 2024 s->Ist.Store.data = data; 2025 vassert(end == Iend_LE || end == Iend_BE); 2026 return s; 2027} 2028IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data, 2029 IRExpr* guard ) { 2030 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2031 s->tag = Ist_StoreG; 2032 s->Ist.StoreG.details = mkIRStoreG(end, addr, data, guard); 2033 vassert(end == Iend_LE || end == Iend_BE); 2034 return s; 2035} 2036IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst, 2037 IRExpr* addr, IRExpr* alt, IRExpr* guard ) { 2038 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2039 s->tag = Ist_LoadG; 2040 s->Ist.LoadG.details = mkIRLoadG(end, cvt, dst, addr, alt, guard); 2041 return s; 2042} 2043IRStmt* IRStmt_CAS ( IRCAS* cas ) { 2044 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2045 s->tag = Ist_CAS; 2046 s->Ist.CAS.details = cas; 2047 return s; 2048} 2049IRStmt* IRStmt_LLSC ( IREndness end, 2050 IRTemp result, IRExpr* addr, IRExpr* storedata ) { 2051 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2052 s->tag = Ist_LLSC; 2053 s->Ist.LLSC.end = end; 2054 s->Ist.LLSC.result = result; 2055 s->Ist.LLSC.addr = addr; 2056 s->Ist.LLSC.storedata = storedata; 2057 return s; 2058} 2059IRStmt* IRStmt_Dirty ( IRDirty* d ) 2060{ 2061 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2062 s->tag = Ist_Dirty; 2063 s->Ist.Dirty.details = d; 2064 return s; 2065} 2066IRStmt* IRStmt_MBE ( IRMBusEvent event ) 2067{ 2068 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2069 s->tag = Ist_MBE; 2070 s->Ist.MBE.event = event; 2071 return s; 2072} 2073IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst, 2074 Int offsIP ) { 2075 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 2076 s->tag = Ist_Exit; 2077 s->Ist.Exit.guard = guard; 2078 s->Ist.Exit.jk = jk; 2079 s->Ist.Exit.dst = dst; 2080 s->Ist.Exit.offsIP = offsIP; 2081 return s; 2082} 2083 2084 2085/* Constructors -- IRTypeEnv */ 2086 2087IRTypeEnv* emptyIRTypeEnv ( void ) 2088{ 2089 IRTypeEnv* env = LibVEX_Alloc(sizeof(IRTypeEnv)); 2090 env->types = LibVEX_Alloc(8 * sizeof(IRType)); 2091 env->types_size = 8; 2092 env->types_used = 0; 2093 return env; 2094} 2095 2096 2097/* Constructors -- IRSB */ 2098 2099IRSB* emptyIRSB ( void ) 2100{ 2101 IRSB* bb = LibVEX_Alloc(sizeof(IRSB)); 2102 bb->tyenv = emptyIRTypeEnv(); 2103 bb->stmts_used = 0; 2104 bb->stmts_size = 8; 2105 bb->stmts = LibVEX_Alloc(bb->stmts_size * sizeof(IRStmt*)); 2106 bb->next = NULL; 2107 bb->jumpkind = Ijk_Boring; 2108 bb->offsIP = 0; 2109 return bb; 2110} 2111 2112 2113/*---------------------------------------------------------------*/ 2114/*--- (Deep) copy constructors. These make complete copies ---*/ 2115/*--- the original, which can be modified without affecting ---*/ 2116/*--- the original. ---*/ 2117/*---------------------------------------------------------------*/ 2118 2119/* Copying IR Expr vectors (for call args). */ 2120 2121/* Shallow copy of an IRExpr vector */ 2122 2123IRExpr** shallowCopyIRExprVec ( IRExpr** vec ) 2124{ 2125 Int i; 2126 IRExpr** newvec; 2127 for (i = 0; vec[i]; i++) 2128 ; 2129 newvec = LibVEX_Alloc((i+1)*sizeof(IRExpr*)); 2130 for (i = 0; vec[i]; i++) 2131 newvec[i] = vec[i]; 2132 newvec[i] = NULL; 2133 return newvec; 2134} 2135 2136/* Deep copy of an IRExpr vector */ 2137 2138IRExpr** deepCopyIRExprVec ( IRExpr** vec ) 2139{ 2140 Int i; 2141 IRExpr** newvec = shallowCopyIRExprVec( vec ); 2142 for (i = 0; newvec[i]; i++) 2143 newvec[i] = deepCopyIRExpr(newvec[i]); 2144 return newvec; 2145} 2146 2147/* Deep copy constructors for all heap-allocated IR types follow. */ 2148 2149IRConst* deepCopyIRConst ( IRConst* c ) 2150{ 2151 switch (c->tag) { 2152 case Ico_U1: return IRConst_U1(c->Ico.U1); 2153 case Ico_U8: return IRConst_U8(c->Ico.U8); 2154 case Ico_U16: return IRConst_U16(c->Ico.U16); 2155 case Ico_U32: return IRConst_U32(c->Ico.U32); 2156 case Ico_U64: return IRConst_U64(c->Ico.U64); 2157 case Ico_F32: return IRConst_F32(c->Ico.F32); 2158 case Ico_F32i: return IRConst_F32i(c->Ico.F32i); 2159 case Ico_F64: return IRConst_F64(c->Ico.F64); 2160 case Ico_F64i: return IRConst_F64i(c->Ico.F64i); 2161 case Ico_V128: return IRConst_V128(c->Ico.V128); 2162 default: vpanic("deepCopyIRConst"); 2163 } 2164} 2165 2166IRCallee* deepCopyIRCallee ( IRCallee* ce ) 2167{ 2168 IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr); 2169 ce2->mcx_mask = ce->mcx_mask; 2170 return ce2; 2171} 2172 2173IRRegArray* deepCopyIRRegArray ( IRRegArray* d ) 2174{ 2175 return mkIRRegArray(d->base, d->elemTy, d->nElems); 2176} 2177 2178IRExpr* deepCopyIRExpr ( IRExpr* e ) 2179{ 2180 switch (e->tag) { 2181 case Iex_Get: 2182 return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty); 2183 case Iex_GetI: 2184 return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr), 2185 deepCopyIRExpr(e->Iex.GetI.ix), 2186 e->Iex.GetI.bias); 2187 case Iex_RdTmp: 2188 return IRExpr_RdTmp(e->Iex.RdTmp.tmp); 2189 case Iex_Qop: { 2190 IRQop* qop = e->Iex.Qop.details; 2191 2192 return IRExpr_Qop(qop->op, 2193 deepCopyIRExpr(qop->arg1), 2194 deepCopyIRExpr(qop->arg2), 2195 deepCopyIRExpr(qop->arg3), 2196 deepCopyIRExpr(qop->arg4)); 2197 } 2198 case Iex_Triop: { 2199 IRTriop *triop = e->Iex.Triop.details; 2200 2201 return IRExpr_Triop(triop->op, 2202 deepCopyIRExpr(triop->arg1), 2203 deepCopyIRExpr(triop->arg2), 2204 deepCopyIRExpr(triop->arg3)); 2205 } 2206 case Iex_Binop: 2207 return IRExpr_Binop(e->Iex.Binop.op, 2208 deepCopyIRExpr(e->Iex.Binop.arg1), 2209 deepCopyIRExpr(e->Iex.Binop.arg2)); 2210 case Iex_Unop: 2211 return IRExpr_Unop(e->Iex.Unop.op, 2212 deepCopyIRExpr(e->Iex.Unop.arg)); 2213 case Iex_Load: 2214 return IRExpr_Load(e->Iex.Load.end, 2215 e->Iex.Load.ty, 2216 deepCopyIRExpr(e->Iex.Load.addr)); 2217 case Iex_Const: 2218 return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con)); 2219 case Iex_CCall: 2220 return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee), 2221 e->Iex.CCall.retty, 2222 deepCopyIRExprVec(e->Iex.CCall.args)); 2223 2224 case Iex_ITE: 2225 return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond), 2226 deepCopyIRExpr(e->Iex.ITE.iftrue), 2227 deepCopyIRExpr(e->Iex.ITE.iffalse)); 2228 case Iex_VECRET: 2229 return IRExpr_VECRET(); 2230 2231 case Iex_BBPTR: 2232 return IRExpr_BBPTR(); 2233 2234 default: 2235 vpanic("deepCopyIRExpr"); 2236 } 2237} 2238 2239IRDirty* deepCopyIRDirty ( IRDirty* d ) 2240{ 2241 Int i; 2242 IRDirty* d2 = emptyIRDirty(); 2243 d2->cee = deepCopyIRCallee(d->cee); 2244 d2->guard = deepCopyIRExpr(d->guard); 2245 d2->args = deepCopyIRExprVec(d->args); 2246 d2->tmp = d->tmp; 2247 d2->mFx = d->mFx; 2248 d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr); 2249 d2->mSize = d->mSize; 2250 d2->nFxState = d->nFxState; 2251 for (i = 0; i < d2->nFxState; i++) 2252 d2->fxState[i] = d->fxState[i]; 2253 return d2; 2254} 2255 2256IRCAS* deepCopyIRCAS ( IRCAS* cas ) 2257{ 2258 return mkIRCAS( cas->oldHi, cas->oldLo, cas->end, 2259 deepCopyIRExpr(cas->addr), 2260 cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi), 2261 deepCopyIRExpr(cas->expdLo), 2262 cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi), 2263 deepCopyIRExpr(cas->dataLo) ); 2264} 2265 2266IRPutI* deepCopyIRPutI ( IRPutI * puti ) 2267{ 2268 return mkIRPutI( deepCopyIRRegArray(puti->descr), 2269 deepCopyIRExpr(puti->ix), 2270 puti->bias, 2271 deepCopyIRExpr(puti->data)); 2272} 2273 2274IRStmt* deepCopyIRStmt ( IRStmt* s ) 2275{ 2276 switch (s->tag) { 2277 case Ist_NoOp: 2278 return IRStmt_NoOp(); 2279 case Ist_AbiHint: 2280 return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base), 2281 s->Ist.AbiHint.len, 2282 deepCopyIRExpr(s->Ist.AbiHint.nia)); 2283 case Ist_IMark: 2284 return IRStmt_IMark(s->Ist.IMark.addr, 2285 s->Ist.IMark.len, 2286 s->Ist.IMark.delta); 2287 case Ist_Put: 2288 return IRStmt_Put(s->Ist.Put.offset, 2289 deepCopyIRExpr(s->Ist.Put.data)); 2290 case Ist_PutI: 2291 return IRStmt_PutI(deepCopyIRPutI(s->Ist.PutI.details)); 2292 case Ist_WrTmp: 2293 return IRStmt_WrTmp(s->Ist.WrTmp.tmp, 2294 deepCopyIRExpr(s->Ist.WrTmp.data)); 2295 case Ist_Store: 2296 return IRStmt_Store(s->Ist.Store.end, 2297 deepCopyIRExpr(s->Ist.Store.addr), 2298 deepCopyIRExpr(s->Ist.Store.data)); 2299 case Ist_StoreG: { 2300 IRStoreG* sg = s->Ist.StoreG.details; 2301 return IRStmt_StoreG(sg->end, 2302 deepCopyIRExpr(sg->addr), 2303 deepCopyIRExpr(sg->data), 2304 deepCopyIRExpr(sg->guard)); 2305 } 2306 case Ist_LoadG: { 2307 IRLoadG* lg = s->Ist.LoadG.details; 2308 return IRStmt_LoadG(lg->end, lg->cvt, lg->dst, 2309 deepCopyIRExpr(lg->addr), 2310 deepCopyIRExpr(lg->alt), 2311 deepCopyIRExpr(lg->guard)); 2312 } 2313 case Ist_CAS: 2314 return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details)); 2315 case Ist_LLSC: 2316 return IRStmt_LLSC(s->Ist.LLSC.end, 2317 s->Ist.LLSC.result, 2318 deepCopyIRExpr(s->Ist.LLSC.addr), 2319 s->Ist.LLSC.storedata 2320 ? deepCopyIRExpr(s->Ist.LLSC.storedata) 2321 : NULL); 2322 case Ist_Dirty: 2323 return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details)); 2324 case Ist_MBE: 2325 return IRStmt_MBE(s->Ist.MBE.event); 2326 case Ist_Exit: 2327 return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard), 2328 s->Ist.Exit.jk, 2329 deepCopyIRConst(s->Ist.Exit.dst), 2330 s->Ist.Exit.offsIP); 2331 default: 2332 vpanic("deepCopyIRStmt"); 2333 } 2334} 2335 2336IRTypeEnv* deepCopyIRTypeEnv ( IRTypeEnv* src ) 2337{ 2338 Int i; 2339 IRTypeEnv* dst = LibVEX_Alloc(sizeof(IRTypeEnv)); 2340 dst->types_size = src->types_size; 2341 dst->types_used = src->types_used; 2342 dst->types = LibVEX_Alloc(dst->types_size * sizeof(IRType)); 2343 for (i = 0; i < src->types_used; i++) 2344 dst->types[i] = src->types[i]; 2345 return dst; 2346} 2347 2348IRSB* deepCopyIRSB ( IRSB* bb ) 2349{ 2350 Int i; 2351 IRStmt** sts2; 2352 IRSB* bb2 = deepCopyIRSBExceptStmts(bb); 2353 bb2->stmts_used = bb2->stmts_size = bb->stmts_used; 2354 sts2 = LibVEX_Alloc(bb2->stmts_used * sizeof(IRStmt*)); 2355 for (i = 0; i < bb2->stmts_used; i++) 2356 sts2[i] = deepCopyIRStmt(bb->stmts[i]); 2357 bb2->stmts = sts2; 2358 return bb2; 2359} 2360 2361IRSB* deepCopyIRSBExceptStmts ( IRSB* bb ) 2362{ 2363 IRSB* bb2 = emptyIRSB(); 2364 bb2->tyenv = deepCopyIRTypeEnv(bb->tyenv); 2365 bb2->next = deepCopyIRExpr(bb->next); 2366 bb2->jumpkind = bb->jumpkind; 2367 bb2->offsIP = bb->offsIP; 2368 return bb2; 2369} 2370 2371 2372/*---------------------------------------------------------------*/ 2373/*--- Primop types ---*/ 2374/*---------------------------------------------------------------*/ 2375 2376static 2377void typeOfPrimop ( IROp op, 2378 /*OUTs*/ 2379 IRType* t_dst, 2380 IRType* t_arg1, IRType* t_arg2, 2381 IRType* t_arg3, IRType* t_arg4 ) 2382{ 2383# define UNARY(_ta1,_td) \ 2384 *t_dst = (_td); *t_arg1 = (_ta1); break 2385# define BINARY(_ta1,_ta2,_td) \ 2386 *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break 2387# define TERNARY(_ta1,_ta2,_ta3,_td) \ 2388 *t_dst = (_td); *t_arg1 = (_ta1); \ 2389 *t_arg2 = (_ta2); *t_arg3 = (_ta3); break 2390# define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td) \ 2391 *t_dst = (_td); *t_arg1 = (_ta1); \ 2392 *t_arg2 = (_ta2); *t_arg3 = (_ta3); \ 2393 *t_arg4 = (_ta4); break 2394# define COMPARISON(_ta) \ 2395 *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break; 2396# define UNARY_COMPARISON(_ta) \ 2397 *t_dst = Ity_I1; *t_arg1 = (_ta); break; 2398 2399 /* Rounding mode values are always Ity_I32, encoded as per 2400 IRRoundingMode */ 2401 const IRType ity_RMode = Ity_I32; 2402 2403 *t_dst = Ity_INVALID; 2404 *t_arg1 = Ity_INVALID; 2405 *t_arg2 = Ity_INVALID; 2406 *t_arg3 = Ity_INVALID; 2407 *t_arg4 = Ity_INVALID; 2408 switch (op) { 2409 case Iop_Add8: case Iop_Sub8: case Iop_Mul8: 2410 case Iop_Or8: case Iop_And8: case Iop_Xor8: 2411 BINARY(Ity_I8,Ity_I8, Ity_I8); 2412 2413 case Iop_Add16: case Iop_Sub16: case Iop_Mul16: 2414 case Iop_Or16: case Iop_And16: case Iop_Xor16: 2415 BINARY(Ity_I16,Ity_I16, Ity_I16); 2416 2417 case Iop_CmpORD32U: 2418 case Iop_CmpORD32S: 2419 case Iop_Add32: case Iop_Sub32: case Iop_Mul32: 2420 case Iop_Or32: case Iop_And32: case Iop_Xor32: 2421 case Iop_Max32U: 2422 case Iop_QAdd32S: case Iop_QSub32S: 2423 case Iop_Add16x2: case Iop_Sub16x2: 2424 case Iop_QAdd16Sx2: case Iop_QAdd16Ux2: 2425 case Iop_QSub16Sx2: case Iop_QSub16Ux2: 2426 case Iop_HAdd16Ux2: case Iop_HAdd16Sx2: 2427 case Iop_HSub16Ux2: case Iop_HSub16Sx2: 2428 case Iop_Add8x4: case Iop_Sub8x4: 2429 case Iop_QAdd8Sx4: case Iop_QAdd8Ux4: 2430 case Iop_QSub8Sx4: case Iop_QSub8Ux4: 2431 case Iop_HAdd8Ux4: case Iop_HAdd8Sx4: 2432 case Iop_HSub8Ux4: case Iop_HSub8Sx4: 2433 case Iop_Sad8Ux4: 2434 BINARY(Ity_I32,Ity_I32, Ity_I32); 2435 2436 case Iop_Add64: case Iop_Sub64: case Iop_Mul64: 2437 case Iop_Or64: case Iop_And64: case Iop_Xor64: 2438 case Iop_CmpORD64U: 2439 case Iop_CmpORD64S: 2440 case Iop_Avg8Ux8: case Iop_Avg16Ux4: 2441 case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2: 2442 case Iop_Add32Fx2: case Iop_Sub32Fx2: 2443 case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2: 2444 case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2: 2445 case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2: 2446 case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2: 2447 case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8: 2448 case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4: 2449 case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2: 2450 case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8: 2451 case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4: 2452 case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8: 2453 case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4: 2454 case Iop_Perm8x8: 2455 case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2: 2456 case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2: 2457 case Iop_Max32Fx2: case Iop_Min32Fx2: 2458 case Iop_PwMax32Fx2: case Iop_PwMin32Fx2: 2459 case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2: 2460 case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2: 2461 case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2: 2462 case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2: 2463 case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2: 2464 case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2: 2465 case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2: 2466 case Iop_Mul32Fx2: 2467 case Iop_PolynomialMul8x8: 2468 case Iop_MulHi16Sx4: case Iop_MulHi16Ux4: 2469 case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2: 2470 case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2: 2471 case Iop_QAdd8Sx8: case Iop_QAdd16Sx4: 2472 case Iop_QAdd32Sx2: case Iop_QAdd64Sx1: 2473 case Iop_QAdd8Ux8: case Iop_QAdd16Ux4: 2474 case Iop_QAdd32Ux2: case Iop_QAdd64Ux1: 2475 case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2: 2476 case Iop_PwAdd32Fx2: 2477 case Iop_QNarrowBin32Sto16Sx4: 2478 case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8: 2479 case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4: 2480 case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2: 2481 case Iop_QSub8Sx8: case Iop_QSub16Sx4: 2482 case Iop_QSub32Sx2: case Iop_QSub64Sx1: 2483 case Iop_QSub8Ux8: case Iop_QSub16Ux4: 2484 case Iop_QSub32Ux2: case Iop_QSub64Ux1: 2485 case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2: 2486 case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2: 2487 case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2: 2488 case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1: 2489 case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1: 2490 case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1: 2491 case Iop_Recps32Fx2: 2492 case Iop_Rsqrts32Fx2: 2493 BINARY(Ity_I64,Ity_I64, Ity_I64); 2494 2495 case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8: 2496 case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8: 2497 case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8: 2498 case Iop_QShlN8x8: case Iop_QShlN16x4: 2499 case Iop_QShlN32x2: case Iop_QShlN64x1: 2500 case Iop_QShlN8Sx8: case Iop_QShlN16Sx4: 2501 case Iop_QShlN32Sx2: case Iop_QShlN64Sx1: 2502 case Iop_QSalN8x8: case Iop_QSalN16x4: 2503 case Iop_QSalN32x2: case Iop_QSalN64x1: 2504 BINARY(Ity_I64,Ity_I8, Ity_I64); 2505 2506 case Iop_Shl8: case Iop_Shr8: case Iop_Sar8: 2507 BINARY(Ity_I8,Ity_I8, Ity_I8); 2508 case Iop_Shl16: case Iop_Shr16: case Iop_Sar16: 2509 BINARY(Ity_I16,Ity_I8, Ity_I16); 2510 case Iop_Shl32: case Iop_Shr32: case Iop_Sar32: 2511 BINARY(Ity_I32,Ity_I8, Ity_I32); 2512 case Iop_Shl64: case Iop_Shr64: case Iop_Sar64: 2513 BINARY(Ity_I64,Ity_I8, Ity_I64); 2514 2515 case Iop_Not8: 2516 UNARY(Ity_I8, Ity_I8); 2517 case Iop_Not16: 2518 UNARY(Ity_I16, Ity_I16); 2519 case Iop_Not32: 2520 case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4: 2521 UNARY(Ity_I32, Ity_I32); 2522 2523 case Iop_Not64: 2524 case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8: 2525 case Iop_Cnt8x8: 2526 case Iop_Clz8Sx8: case Iop_Clz16Sx4: case Iop_Clz32Sx2: 2527 case Iop_Cls8Sx8: case Iop_Cls16Sx4: case Iop_Cls32Sx2: 2528 case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2: 2529 case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2: 2530 case Iop_Reverse64_8x8: case Iop_Reverse64_16x4: case Iop_Reverse64_32x2: 2531 case Iop_Reverse32_8x8: case Iop_Reverse32_16x4: 2532 case Iop_Reverse16_8x8: 2533 case Iop_FtoI32Sx2_RZ: case Iop_FtoI32Ux2_RZ: 2534 case Iop_I32StoFx2: case Iop_I32UtoFx2: 2535 case Iop_Recip32x2: case Iop_Recip32Fx2: 2536 case Iop_Abs32Fx2: 2537 case Iop_Rsqrte32Fx2: 2538 case Iop_Rsqrte32x2: 2539 case Iop_Neg32Fx2: 2540 case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2: 2541 UNARY(Ity_I64, Ity_I64); 2542 2543 case Iop_CmpEQ8: case Iop_CmpNE8: 2544 case Iop_CasCmpEQ8: case Iop_CasCmpNE8: case Iop_ExpCmpNE8: 2545 COMPARISON(Ity_I8); 2546 case Iop_CmpEQ16: case Iop_CmpNE16: 2547 case Iop_CasCmpEQ16: case Iop_CasCmpNE16: case Iop_ExpCmpNE16: 2548 COMPARISON(Ity_I16); 2549 case Iop_CmpEQ32: case Iop_CmpNE32: 2550 case Iop_CasCmpEQ32: case Iop_CasCmpNE32: case Iop_ExpCmpNE32: 2551 case Iop_CmpLT32S: case Iop_CmpLE32S: 2552 case Iop_CmpLT32U: case Iop_CmpLE32U: 2553 COMPARISON(Ity_I32); 2554 case Iop_CmpEQ64: case Iop_CmpNE64: 2555 case Iop_CasCmpEQ64: case Iop_CasCmpNE64: case Iop_ExpCmpNE64: 2556 case Iop_CmpLT64S: case Iop_CmpLE64S: 2557 case Iop_CmpLT64U: case Iop_CmpLE64U: 2558 COMPARISON(Ity_I64); 2559 2560 case Iop_CmpNEZ8: UNARY_COMPARISON(Ity_I8); 2561 case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16); 2562 case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32); 2563 case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64); 2564 2565 case Iop_Left8: UNARY(Ity_I8, Ity_I8); 2566 case Iop_Left16: UNARY(Ity_I16,Ity_I16); 2567 case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32); 2568 case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64); 2569 2570 case Iop_GetMSBs8x8: UNARY(Ity_I64, Ity_I8); 2571 case Iop_GetMSBs8x16: UNARY(Ity_V128, Ity_I16); 2572 2573 case Iop_MullU8: case Iop_MullS8: 2574 BINARY(Ity_I8,Ity_I8, Ity_I16); 2575 case Iop_MullU16: case Iop_MullS16: 2576 BINARY(Ity_I16,Ity_I16, Ity_I32); 2577 case Iop_MullU32: case Iop_MullS32: 2578 BINARY(Ity_I32,Ity_I32, Ity_I64); 2579 case Iop_MullU64: case Iop_MullS64: 2580 BINARY(Ity_I64,Ity_I64, Ity_I128); 2581 2582 case Iop_Clz32: case Iop_Ctz32: 2583 UNARY(Ity_I32, Ity_I32); 2584 2585 case Iop_Clz64: case Iop_Ctz64: 2586 UNARY(Ity_I64, Ity_I64); 2587 2588 case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E: 2589 BINARY(Ity_I32,Ity_I32, Ity_I32); 2590 2591 case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E: 2592 BINARY(Ity_I64,Ity_I64, Ity_I64); 2593 2594 case Iop_DivModU64to32: case Iop_DivModS64to32: 2595 BINARY(Ity_I64,Ity_I32, Ity_I64); 2596 2597 case Iop_DivModU128to64: case Iop_DivModS128to64: 2598 BINARY(Ity_I128,Ity_I64, Ity_I128); 2599 2600 case Iop_DivModS64to64: 2601 BINARY(Ity_I64,Ity_I64, Ity_I128); 2602 2603 case Iop_16HIto8: case Iop_16to8: 2604 UNARY(Ity_I16, Ity_I8); 2605 case Iop_8HLto16: 2606 BINARY(Ity_I8,Ity_I8, Ity_I16); 2607 2608 case Iop_32HIto16: case Iop_32to16: 2609 UNARY(Ity_I32, Ity_I16); 2610 case Iop_16HLto32: 2611 BINARY(Ity_I16,Ity_I16, Ity_I32); 2612 2613 case Iop_64HIto32: case Iop_64to32: 2614 UNARY(Ity_I64, Ity_I32); 2615 case Iop_32HLto64: 2616 BINARY(Ity_I32,Ity_I32, Ity_I64); 2617 2618 case Iop_128HIto64: case Iop_128to64: 2619 UNARY(Ity_I128, Ity_I64); 2620 case Iop_64HLto128: 2621 BINARY(Ity_I64,Ity_I64, Ity_I128); 2622 2623 case Iop_Not1: UNARY(Ity_I1, Ity_I1); 2624 case Iop_1Uto8: UNARY(Ity_I1, Ity_I8); 2625 case Iop_1Sto8: UNARY(Ity_I1, Ity_I8); 2626 case Iop_1Sto16: UNARY(Ity_I1, Ity_I16); 2627 case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32); 2628 case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64); 2629 case Iop_32to1: UNARY(Ity_I32, Ity_I1); 2630 case Iop_64to1: UNARY(Ity_I64, Ity_I1); 2631 2632 case Iop_8Uto32: case Iop_8Sto32: 2633 UNARY(Ity_I8, Ity_I32); 2634 2635 case Iop_8Uto16: case Iop_8Sto16: 2636 UNARY(Ity_I8, Ity_I16); 2637 2638 case Iop_16Uto32: case Iop_16Sto32: 2639 UNARY(Ity_I16, Ity_I32); 2640 2641 case Iop_32Sto64: case Iop_32Uto64: 2642 UNARY(Ity_I32, Ity_I64); 2643 2644 case Iop_8Uto64: case Iop_8Sto64: 2645 UNARY(Ity_I8, Ity_I64); 2646 2647 case Iop_16Uto64: case Iop_16Sto64: 2648 UNARY(Ity_I16, Ity_I64); 2649 case Iop_64to16: 2650 UNARY(Ity_I64, Ity_I16); 2651 2652 case Iop_32to8: UNARY(Ity_I32, Ity_I8); 2653 case Iop_64to8: UNARY(Ity_I64, Ity_I8); 2654 2655 case Iop_AddF64: case Iop_SubF64: 2656 case Iop_MulF64: case Iop_DivF64: 2657 case Iop_AddF64r32: case Iop_SubF64r32: 2658 case Iop_MulF64r32: case Iop_DivF64r32: 2659 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2660 2661 case Iop_AddF32: case Iop_SubF32: 2662 case Iop_MulF32: case Iop_DivF32: 2663 TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32); 2664 2665 case Iop_NegF64: case Iop_AbsF64: 2666 UNARY(Ity_F64, Ity_F64); 2667 2668 case Iop_NegF32: case Iop_AbsF32: 2669 UNARY(Ity_F32, Ity_F32); 2670 2671 case Iop_SqrtF64: 2672 BINARY(ity_RMode,Ity_F64, Ity_F64); 2673 2674 case Iop_SqrtF32: 2675 case Iop_RoundF32toInt: 2676 BINARY(ity_RMode,Ity_F32, Ity_F32); 2677 2678 case Iop_CmpF32: 2679 BINARY(Ity_F32,Ity_F32, Ity_I32); 2680 2681 case Iop_CmpF64: 2682 BINARY(Ity_F64,Ity_F64, Ity_I32); 2683 2684 case Iop_CmpF128: 2685 BINARY(Ity_F128,Ity_F128, Ity_I32); 2686 2687 case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16); 2688 case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32); 2689 case Iop_F64toI64S: case Iop_F64toI64U: 2690 BINARY(ity_RMode,Ity_F64, Ity_I64); 2691 2692 case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32); 2693 2694 case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64); 2695 case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2696 case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2697 case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2698 2699 case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64); 2700 2701 case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32); 2702 case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64); 2703 case Iop_F32toI32U: BINARY(ity_RMode,Ity_F32, Ity_I32); 2704 case Iop_F32toI64U: BINARY(ity_RMode,Ity_F32, Ity_I64); 2705 2706 case Iop_I32UtoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); 2707 case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); 2708 case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2709 2710 case Iop_F32toF64: UNARY(Ity_F32, Ity_F64); 2711 case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32); 2712 2713 case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64); 2714 case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64); 2715 case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32); 2716 case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32); 2717 2718 case Iop_AtanF64: case Iop_Yl2xF64: case Iop_Yl2xp1F64: 2719 case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64: 2720 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2721 2722 case Iop_PRemC3210F64: case Iop_PRem1C3210F64: 2723 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32); 2724 2725 case Iop_SinF64: case Iop_CosF64: case Iop_TanF64: 2726 case Iop_2xm1F64: 2727 case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64); 2728 2729 case Iop_MAddF64: case Iop_MSubF64: 2730 case Iop_MAddF64r32: case Iop_MSubF64r32: 2731 QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64); 2732 2733 case Iop_Est5FRSqrt: 2734 case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF: 2735 case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO: 2736 UNARY(Ity_F64, Ity_F64); 2737 case Iop_RoundF64toF32: 2738 BINARY(ity_RMode,Ity_F64, Ity_F64); 2739 case Iop_TruncF64asF32: 2740 UNARY(Ity_F64, Ity_F32); 2741 2742 case Iop_I32UtoFx4: 2743 case Iop_I32StoFx4: 2744 case Iop_QFtoI32Ux4_RZ: 2745 case Iop_QFtoI32Sx4_RZ: 2746 case Iop_FtoI32Ux4_RZ: 2747 case Iop_FtoI32Sx4_RZ: 2748 case Iop_RoundF32x4_RM: 2749 case Iop_RoundF32x4_RP: 2750 case Iop_RoundF32x4_RN: 2751 case Iop_RoundF32x4_RZ: 2752 case Iop_Abs64Fx2: case Iop_Abs32Fx4: 2753 case Iop_Rsqrte32Fx4: 2754 case Iop_Rsqrte32x4: 2755 UNARY(Ity_V128, Ity_V128); 2756 2757 case Iop_64HLtoV128: 2758 BINARY(Ity_I64,Ity_I64, Ity_V128); 2759 2760 case Iop_V128to64: case Iop_V128HIto64: 2761 case Iop_NarrowUn16to8x8: 2762 case Iop_NarrowUn32to16x4: 2763 case Iop_NarrowUn64to32x2: 2764 case Iop_QNarrowUn16Uto8Ux8: 2765 case Iop_QNarrowUn32Uto16Ux4: 2766 case Iop_QNarrowUn64Uto32Ux2: 2767 case Iop_QNarrowUn16Sto8Sx8: 2768 case Iop_QNarrowUn32Sto16Sx4: 2769 case Iop_QNarrowUn64Sto32Sx2: 2770 case Iop_QNarrowUn16Sto8Ux8: 2771 case Iop_QNarrowUn32Sto16Ux4: 2772 case Iop_QNarrowUn64Sto32Ux2: 2773 case Iop_F32toF16x4: 2774 UNARY(Ity_V128, Ity_I64); 2775 2776 case Iop_Widen8Uto16x8: 2777 case Iop_Widen16Uto32x4: 2778 case Iop_Widen32Uto64x2: 2779 case Iop_Widen8Sto16x8: 2780 case Iop_Widen16Sto32x4: 2781 case Iop_Widen32Sto64x2: 2782 case Iop_F16toF32x4: 2783 UNARY(Ity_I64, Ity_V128); 2784 2785 case Iop_V128to32: UNARY(Ity_V128, Ity_I32); 2786 case Iop_32UtoV128: UNARY(Ity_I32, Ity_V128); 2787 case Iop_64UtoV128: UNARY(Ity_I64, Ity_V128); 2788 case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128); 2789 case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128); 2790 2791 case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128); 2792 case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128); 2793 case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128); 2794 case Iop_Dup8x8: UNARY(Ity_I8, Ity_I64); 2795 case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64); 2796 case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64); 2797 2798 case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4: 2799 case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2: 2800 case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4: 2801 case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2: 2802 case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4: 2803 case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4: 2804 case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2: 2805 case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4: 2806 case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2: 2807 case Iop_Add32F0x4: 2808 case Iop_Add64F0x2: 2809 case Iop_Div32F0x4: 2810 case Iop_Div64F0x2: 2811 case Iop_Max32Fx4: case Iop_Max32F0x4: 2812 case Iop_PwMax32Fx4: case Iop_PwMin32Fx4: 2813 case Iop_Max64Fx2: case Iop_Max64F0x2: 2814 case Iop_Min32Fx4: case Iop_Min32F0x4: 2815 case Iop_Min64Fx2: case Iop_Min64F0x2: 2816 case Iop_Mul32F0x4: 2817 case Iop_Mul64F0x2: 2818 case Iop_Sub32F0x4: 2819 case Iop_Sub64F0x2: 2820 case Iop_AndV128: case Iop_OrV128: case Iop_XorV128: 2821 case Iop_Add8x16: case Iop_Add16x8: 2822 case Iop_Add32x4: case Iop_Add64x2: 2823 case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: 2824 case Iop_QAdd32Ux4: //case Iop_QAdd64Ux2: 2825 case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: 2826 case Iop_QAdd32Sx4: case Iop_QAdd64Sx2: 2827 case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4: 2828 case Iop_Sub8x16: case Iop_Sub16x8: 2829 case Iop_Sub32x4: case Iop_Sub64x2: 2830 case Iop_QSub8Ux16: case Iop_QSub16Ux8: 2831 case Iop_QSub32Ux4: //case Iop_QSub64Ux2: 2832 case Iop_QSub8Sx16: case Iop_QSub16Sx8: 2833 case Iop_QSub32Sx4: case Iop_QSub64Sx2: 2834 case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4: 2835 case Iop_PolynomialMul8x16: 2836 case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8: 2837 case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2: 2838 case Iop_MulHi16Ux8: case Iop_MulHi32Ux4: 2839 case Iop_MulHi16Sx8: case Iop_MulHi32Sx4: 2840 case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4: 2841 case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4: 2842 case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4: 2843 case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4: 2844 case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: 2845 case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: 2846 case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: 2847 case Iop_Max64Sx2: 2848 case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: 2849 case Iop_Max64Ux2: 2850 case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: 2851 case Iop_Min64Sx2: 2852 case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: 2853 case Iop_Min64Ux2: 2854 case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: 2855 case Iop_CmpEQ64x2: 2856 case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4: 2857 case Iop_CmpGT64Sx2: 2858 case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4: 2859 case Iop_CmpGT64Ux2: 2860 case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2: 2861 case Iop_QShl8x16: case Iop_QShl16x8: 2862 case Iop_QShl32x4: case Iop_QShl64x2: 2863 case Iop_QSal8x16: case Iop_QSal16x8: 2864 case Iop_QSal32x4: case Iop_QSal64x2: 2865 case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2: 2866 case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2: 2867 case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2: 2868 case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:case Iop_Rol64x2: 2869 case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8: 2870 case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8: 2871 case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8: 2872 case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4: 2873 case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8: 2874 case Iop_NarrowBin64to32x4: 2875 case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8: 2876 case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2: 2877 case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8: 2878 case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2: 2879 case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16: 2880 case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8: 2881 case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4: 2882 case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16: 2883 case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8: 2884 case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4: 2885 case Iop_Perm8x16: case Iop_Perm32x4: 2886 case Iop_Recps32Fx4: 2887 case Iop_Rsqrts32Fx4: 2888 case Iop_CipherV128: 2889 case Iop_CipherLV128: 2890 case Iop_NCipherV128: 2891 case Iop_NCipherLV128: 2892 BINARY(Ity_V128,Ity_V128, Ity_V128); 2893 2894 case Iop_PolynomialMull8x8: 2895 case Iop_Mull8Ux8: case Iop_Mull8Sx8: 2896 case Iop_Mull16Ux4: case Iop_Mull16Sx4: 2897 case Iop_Mull32Ux2: case Iop_Mull32Sx2: 2898 BINARY(Ity_I64, Ity_I64, Ity_V128); 2899 2900 case Iop_NotV128: 2901 case Iop_Recip32Fx4: case Iop_Recip32F0x4: 2902 case Iop_Recip32x4: 2903 case Iop_Recip64Fx2: case Iop_Recip64F0x2: 2904 case Iop_RSqrt32Fx4: case Iop_RSqrt32F0x4: 2905 case Iop_RSqrt64Fx2: case Iop_RSqrt64F0x2: 2906 case Iop_Sqrt32Fx4: case Iop_Sqrt32F0x4: 2907 case Iop_Sqrt64Fx2: case Iop_Sqrt64F0x2: 2908 case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8: 2909 case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: 2910 case Iop_Cnt8x16: 2911 case Iop_Clz8Sx16: case Iop_Clz16Sx8: case Iop_Clz32Sx4: case Iop_Clz64x2: 2912 case Iop_Cls8Sx16: case Iop_Cls16Sx8: case Iop_Cls32Sx4: 2913 case Iop_AddLV8Ux16: case Iop_AddLV16Ux8: case Iop_AddLV32Ux4: 2914 case Iop_AddLV8Sx16: case Iop_AddLV16Sx8: case Iop_AddLV32Sx4: 2915 case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4: 2916 case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4: 2917 case Iop_Reverse64_8x16: case Iop_Reverse64_16x8: case Iop_Reverse64_32x4: 2918 case Iop_Reverse32_8x16: case Iop_Reverse32_16x8: 2919 case Iop_Reverse16_8x16: 2920 case Iop_Neg64Fx2: case Iop_Neg32Fx4: 2921 case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: 2922 case Iop_CipherSV128: 2923 case Iop_PwBitMtxXpose64x2: 2924 case Iop_ZeroHI64ofV128: case Iop_ZeroHI96ofV128: 2925 case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128: 2926 UNARY(Ity_V128, Ity_V128); 2927 2928 case Iop_ShlV128: case Iop_ShrV128: 2929 case Iop_ShlN8x16: case Iop_ShlN16x8: 2930 case Iop_ShlN32x4: case Iop_ShlN64x2: 2931 case Iop_ShrN8x16: case Iop_ShrN16x8: 2932 case Iop_ShrN32x4: case Iop_ShrN64x2: 2933 case Iop_SarN8x16: case Iop_SarN16x8: 2934 case Iop_SarN32x4: case Iop_SarN64x2: 2935 case Iop_QShlN8x16: case Iop_QShlN16x8: 2936 case Iop_QShlN32x4: case Iop_QShlN64x2: 2937 case Iop_QShlN8Sx16: case Iop_QShlN16Sx8: 2938 case Iop_QShlN32Sx4: case Iop_QShlN64Sx2: 2939 case Iop_QSalN8x16: case Iop_QSalN16x8: 2940 case Iop_QSalN32x4: case Iop_QSalN64x2: 2941 case Iop_SHA256: case Iop_SHA512: 2942 BINARY(Ity_V128,Ity_I8, Ity_V128); 2943 2944 case Iop_F32ToFixed32Ux4_RZ: 2945 case Iop_F32ToFixed32Sx4_RZ: 2946 case Iop_Fixed32UToF32x4_RN: 2947 case Iop_Fixed32SToF32x4_RN: 2948 BINARY(Ity_V128, Ity_I8, Ity_V128); 2949 2950 case Iop_F32ToFixed32Ux2_RZ: 2951 case Iop_F32ToFixed32Sx2_RZ: 2952 case Iop_Fixed32UToF32x2_RN: 2953 case Iop_Fixed32SToF32x2_RN: 2954 BINARY(Ity_I64, Ity_I8, Ity_I64); 2955 2956 case Iop_GetElem8x16: 2957 BINARY(Ity_V128, Ity_I8, Ity_I8); 2958 case Iop_GetElem16x8: 2959 BINARY(Ity_V128, Ity_I8, Ity_I16); 2960 case Iop_GetElem32x4: 2961 BINARY(Ity_V128, Ity_I8, Ity_I32); 2962 case Iop_GetElem64x2: 2963 BINARY(Ity_V128, Ity_I8, Ity_I64); 2964 case Iop_GetElem8x8: 2965 BINARY(Ity_I64, Ity_I8, Ity_I8); 2966 case Iop_GetElem16x4: 2967 BINARY(Ity_I64, Ity_I8, Ity_I16); 2968 case Iop_GetElem32x2: 2969 BINARY(Ity_I64, Ity_I8, Ity_I32); 2970 case Iop_SetElem8x8: 2971 TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64); 2972 case Iop_SetElem16x4: 2973 TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64); 2974 case Iop_SetElem32x2: 2975 TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64); 2976 2977 case Iop_Extract64: 2978 TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64); 2979 case Iop_ExtractV128: 2980 TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128); 2981 2982 case Iop_BCDAdd: 2983 case Iop_BCDSub: 2984 TERNARY(Ity_V128,Ity_V128, Ity_I8, Ity_V128); 2985 case Iop_QDMulLong16Sx4: case Iop_QDMulLong32Sx2: 2986 BINARY(Ity_I64, Ity_I64, Ity_V128); 2987 2988 /* s390 specific */ 2989 case Iop_MAddF32: 2990 case Iop_MSubF32: 2991 QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32); 2992 2993 case Iop_F64HLtoF128: 2994 BINARY(Ity_F64,Ity_F64, Ity_F128); 2995 2996 case Iop_F128HItoF64: 2997 case Iop_F128LOtoF64: 2998 UNARY(Ity_F128, Ity_F64); 2999 3000 case Iop_AddF128: 3001 case Iop_SubF128: 3002 case Iop_MulF128: 3003 case Iop_DivF128: 3004 TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128); 3005 3006 case Iop_Add64Fx2: case Iop_Sub64Fx2: 3007 case Iop_Mul64Fx2: case Iop_Div64Fx2: 3008 case Iop_Add32Fx4: case Iop_Sub32Fx4: 3009 case Iop_Mul32Fx4: case Iop_Div32Fx4: 3010 TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128); 3011 3012 case Iop_Add64Fx4: case Iop_Sub64Fx4: 3013 case Iop_Mul64Fx4: case Iop_Div64Fx4: 3014 case Iop_Add32Fx8: case Iop_Sub32Fx8: 3015 case Iop_Mul32Fx8: case Iop_Div32Fx8: 3016 TERNARY(ity_RMode,Ity_V256,Ity_V256, Ity_V256); 3017 3018 case Iop_NegF128: 3019 case Iop_AbsF128: 3020 UNARY(Ity_F128, Ity_F128); 3021 3022 case Iop_SqrtF128: 3023 BINARY(ity_RMode,Ity_F128, Ity_F128); 3024 3025 case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128); 3026 case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128); 3027 3028 case Iop_I32UtoF128: UNARY(Ity_I32, Ity_F128); 3029 case Iop_I64UtoF128: UNARY(Ity_I64, Ity_F128); 3030 3031 case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32); 3032 case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64); 3033 3034 case Iop_F128toI32U: BINARY(ity_RMode,Ity_F128, Ity_I32); 3035 case Iop_F128toI64U: BINARY(ity_RMode,Ity_F128, Ity_I64); 3036 3037 case Iop_F32toF128: UNARY(Ity_F32, Ity_F128); 3038 case Iop_F64toF128: UNARY(Ity_F64, Ity_F128); 3039 3040 case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32); 3041 case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64); 3042 3043 case Iop_D32toD64: 3044 UNARY(Ity_D32, Ity_D64); 3045 3046 case Iop_ExtractExpD64: 3047 UNARY(Ity_D64, Ity_I64); 3048 3049 case Iop_ExtractSigD64: 3050 UNARY(Ity_D64, Ity_I64); 3051 3052 case Iop_InsertExpD64: 3053 BINARY(Ity_I64,Ity_D64, Ity_D64); 3054 3055 case Iop_ExtractExpD128: 3056 UNARY(Ity_D128, Ity_I64); 3057 3058 case Iop_ExtractSigD128: 3059 UNARY(Ity_D128, Ity_I64); 3060 3061 case Iop_InsertExpD128: 3062 BINARY(Ity_I64,Ity_D128, Ity_D128); 3063 3064 case Iop_D64toD128: 3065 UNARY(Ity_D64, Ity_D128); 3066 3067 case Iop_ReinterpD64asI64: 3068 UNARY(Ity_D64, Ity_I64); 3069 3070 case Iop_ReinterpI64asD64: 3071 UNARY(Ity_I64, Ity_D64); 3072 3073 case Iop_RoundD64toInt: 3074 BINARY(ity_RMode,Ity_D64, Ity_D64); 3075 3076 case Iop_RoundD128toInt: 3077 BINARY(ity_RMode,Ity_D128, Ity_D128); 3078 3079 case Iop_I32StoD128: 3080 case Iop_I32UtoD128: 3081 UNARY(Ity_I32, Ity_D128); 3082 3083 case Iop_I64StoD128: 3084 UNARY(Ity_I64, Ity_D128); 3085 3086 case Iop_I64UtoD128: 3087 UNARY(Ity_I64, Ity_D128); 3088 3089 case Iop_DPBtoBCD: 3090 case Iop_BCDtoDPB: 3091 UNARY(Ity_I64, Ity_I64); 3092 3093 case Iop_D128HItoD64: 3094 case Iop_D128LOtoD64: 3095 UNARY(Ity_D128, Ity_D64); 3096 3097 case Iop_D128toI64S: 3098 BINARY(ity_RMode, Ity_D128, Ity_I64); 3099 3100 case Iop_D128toI64U: 3101 BINARY(ity_RMode, Ity_D128, Ity_I64); 3102 3103 case Iop_D128toI32S: 3104 case Iop_D128toI32U: 3105 BINARY(ity_RMode, Ity_D128, Ity_I32); 3106 3107 case Iop_D64HLtoD128: 3108 BINARY(Ity_D64, Ity_D64, Ity_D128); 3109 3110 case Iop_ShlD64: 3111 case Iop_ShrD64: 3112 BINARY(Ity_D64, Ity_I8, Ity_D64 ); 3113 3114 case Iop_D64toD32: 3115 BINARY(ity_RMode, Ity_D64, Ity_D32); 3116 3117 case Iop_D64toI32S: 3118 case Iop_D64toI32U: 3119 BINARY(ity_RMode, Ity_D64, Ity_I32); 3120 3121 case Iop_D64toI64S: 3122 BINARY(ity_RMode, Ity_D64, Ity_I64); 3123 3124 case Iop_D64toI64U: 3125 BINARY(ity_RMode, Ity_D64, Ity_I64); 3126 3127 case Iop_I32StoD64: 3128 case Iop_I32UtoD64: 3129 UNARY(Ity_I32, Ity_D64); 3130 3131 case Iop_I64StoD64: 3132 BINARY(ity_RMode, Ity_I64, Ity_D64); 3133 3134 case Iop_I64UtoD64: 3135 BINARY(ity_RMode, Ity_I64, Ity_D64); 3136 3137 case Iop_F32toD32: 3138 BINARY(ity_RMode, Ity_F32, Ity_D32); 3139 3140 case Iop_F32toD64: 3141 BINARY(ity_RMode, Ity_F32, Ity_D64); 3142 3143 case Iop_F32toD128: 3144 BINARY(ity_RMode, Ity_F32, Ity_D128); 3145 3146 case Iop_F64toD32: 3147 BINARY(ity_RMode, Ity_F64, Ity_D32); 3148 3149 case Iop_F64toD64: 3150 BINARY(ity_RMode, Ity_F64, Ity_D64); 3151 3152 case Iop_F64toD128: 3153 BINARY(ity_RMode, Ity_F64, Ity_D128); 3154 3155 case Iop_F128toD32: 3156 BINARY(ity_RMode, Ity_F128, Ity_D32); 3157 3158 case Iop_F128toD64: 3159 BINARY(ity_RMode, Ity_F128, Ity_D64); 3160 3161 case Iop_F128toD128: 3162 BINARY(ity_RMode, Ity_F128, Ity_D128); 3163 3164 case Iop_D32toF32: 3165 BINARY(ity_RMode, Ity_D32, Ity_F32); 3166 3167 case Iop_D32toF64: 3168 BINARY(ity_RMode, Ity_D32, Ity_F64); 3169 3170 case Iop_D32toF128: 3171 BINARY(ity_RMode, Ity_D32, Ity_F128); 3172 3173 case Iop_D64toF32: 3174 BINARY(ity_RMode, Ity_D64, Ity_F32); 3175 3176 case Iop_D64toF64: 3177 BINARY(ity_RMode, Ity_D64, Ity_F64); 3178 3179 case Iop_D64toF128: 3180 BINARY(ity_RMode, Ity_D64, Ity_F128); 3181 3182 case Iop_D128toF32: 3183 BINARY(ity_RMode, Ity_D128, Ity_F32); 3184 3185 case Iop_D128toF64: 3186 BINARY(ity_RMode, Ity_D128, Ity_F64); 3187 3188 case Iop_D128toF128: 3189 BINARY(ity_RMode, Ity_D128, Ity_F128); 3190 3191 case Iop_CmpD64: 3192 case Iop_CmpExpD64: 3193 BINARY(Ity_D64,Ity_D64, Ity_I32); 3194 3195 case Iop_CmpD128: 3196 case Iop_CmpExpD128: 3197 BINARY(Ity_D128,Ity_D128, Ity_I32); 3198 3199 case Iop_QuantizeD64: 3200 TERNARY(ity_RMode,Ity_D64,Ity_D64, Ity_D64); 3201 3202 case Iop_SignificanceRoundD64: 3203 TERNARY(ity_RMode, Ity_I8,Ity_D64, Ity_D64); 3204 3205 case Iop_QuantizeD128: 3206 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128); 3207 3208 case Iop_SignificanceRoundD128: 3209 TERNARY(ity_RMode, Ity_I8,Ity_D128, Ity_D128); 3210 3211 case Iop_ShlD128: 3212 case Iop_ShrD128: 3213 BINARY(Ity_D128, Ity_I8, Ity_D128 ); 3214 3215 case Iop_AddD64: 3216 case Iop_SubD64: 3217 case Iop_MulD64: 3218 case Iop_DivD64: 3219 TERNARY( ity_RMode, Ity_D64, Ity_D64, Ity_D64 ); 3220 3221 case Iop_D128toD64: 3222 BINARY( ity_RMode, Ity_D128, Ity_D64 ); 3223 3224 case Iop_AddD128: 3225 case Iop_SubD128: 3226 case Iop_MulD128: 3227 case Iop_DivD128: 3228 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128); 3229 3230 case Iop_V256to64_0: case Iop_V256to64_1: 3231 case Iop_V256to64_2: case Iop_V256to64_3: 3232 UNARY(Ity_V256, Ity_I64); 3233 3234 case Iop_64x4toV256: 3235 QUATERNARY(Ity_I64, Ity_I64, Ity_I64, Ity_I64, Ity_V256); 3236 3237 case Iop_AndV256: case Iop_OrV256: 3238 case Iop_XorV256: 3239 case Iop_Max32Fx8: case Iop_Min32Fx8: 3240 case Iop_Max64Fx4: case Iop_Min64Fx4: 3241 case Iop_Add8x32: case Iop_Add16x16: 3242 case Iop_Add32x8: case Iop_Add64x4: 3243 case Iop_Sub8x32: case Iop_Sub16x16: 3244 case Iop_Sub32x8: case Iop_Sub64x4: 3245 case Iop_Mul16x16: case Iop_Mul32x8: 3246 case Iop_MulHi16Ux16: case Iop_MulHi16Sx16: 3247 case Iop_Avg8Ux32: case Iop_Avg16Ux16: 3248 case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: 3249 case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: 3250 case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: 3251 case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: 3252 case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: 3253 case Iop_CmpEQ32x8: case Iop_CmpEQ64x4: 3254 case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16: 3255 case Iop_CmpGT32Sx8: case Iop_CmpGT64Sx4: 3256 case Iop_QAdd8Ux32: case Iop_QAdd16Ux16: 3257 case Iop_QAdd8Sx32: case Iop_QAdd16Sx16: 3258 case Iop_QSub8Ux32: case Iop_QSub16Ux16: 3259 case Iop_QSub8Sx32: case Iop_QSub16Sx16: 3260 case Iop_Perm32x8: 3261 BINARY(Ity_V256,Ity_V256, Ity_V256); 3262 3263 case Iop_V256toV128_1: case Iop_V256toV128_0: 3264 UNARY(Ity_V256, Ity_V128); 3265 3266 case Iop_V128HLtoV256: 3267 BINARY(Ity_V128,Ity_V128, Ity_V256); 3268 3269 case Iop_NotV256: 3270 case Iop_RSqrt32Fx8: 3271 case Iop_Sqrt32Fx8: 3272 case Iop_Sqrt64Fx4: 3273 case Iop_Recip32Fx8: 3274 case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16: 3275 case Iop_CmpNEZ64x4: case Iop_CmpNEZ32x8: 3276 UNARY(Ity_V256, Ity_V256); 3277 3278 case Iop_ShlN16x16: case Iop_ShlN32x8: 3279 case Iop_ShlN64x4: 3280 case Iop_ShrN16x16: case Iop_ShrN32x8: 3281 case Iop_ShrN64x4: 3282 case Iop_SarN16x16: case Iop_SarN32x8: 3283 BINARY(Ity_V256,Ity_I8, Ity_V256); 3284 3285 default: 3286 ppIROp(op); 3287 vpanic("typeOfPrimop"); 3288 } 3289# undef UNARY 3290# undef BINARY 3291# undef TERNARY 3292# undef COMPARISON 3293# undef UNARY_COMPARISON 3294} 3295 3296 3297/*---------------------------------------------------------------*/ 3298/*--- Helper functions for the IR -- IR Basic Blocks ---*/ 3299/*---------------------------------------------------------------*/ 3300 3301void addStmtToIRSB ( IRSB* bb, IRStmt* st ) 3302{ 3303 Int i; 3304 if (bb->stmts_used == bb->stmts_size) { 3305 IRStmt** stmts2 = LibVEX_Alloc(2 * bb->stmts_size * sizeof(IRStmt*)); 3306 for (i = 0; i < bb->stmts_size; i++) 3307 stmts2[i] = bb->stmts[i]; 3308 bb->stmts = stmts2; 3309 bb->stmts_size *= 2; 3310 } 3311 vassert(bb->stmts_used < bb->stmts_size); 3312 bb->stmts[bb->stmts_used] = st; 3313 bb->stmts_used++; 3314} 3315 3316 3317/*---------------------------------------------------------------*/ 3318/*--- Helper functions for the IR -- IR Type Environments ---*/ 3319/*---------------------------------------------------------------*/ 3320 3321/* Allocate a new IRTemp, given its type. */ 3322 3323IRTemp newIRTemp ( IRTypeEnv* env, IRType ty ) 3324{ 3325 vassert(env); 3326 vassert(env->types_used >= 0); 3327 vassert(env->types_size >= 0); 3328 vassert(env->types_used <= env->types_size); 3329 if (env->types_used < env->types_size) { 3330 env->types[env->types_used] = ty; 3331 return env->types_used++; 3332 } else { 3333 Int i; 3334 Int new_size = env->types_size==0 ? 8 : 2*env->types_size; 3335 IRType* new_types 3336 = LibVEX_Alloc(new_size * sizeof(IRType)); 3337 for (i = 0; i < env->types_used; i++) 3338 new_types[i] = env->types[i]; 3339 env->types = new_types; 3340 env->types_size = new_size; 3341 return newIRTemp(env, ty); 3342 } 3343} 3344 3345 3346/*---------------------------------------------------------------*/ 3347/*--- Helper functions for the IR -- finding types of exprs ---*/ 3348/*---------------------------------------------------------------*/ 3349 3350inline 3351IRType typeOfIRTemp ( IRTypeEnv* env, IRTemp tmp ) 3352{ 3353 vassert(tmp >= 0); 3354 vassert(tmp < env->types_used); 3355 return env->types[tmp]; 3356} 3357 3358IRType typeOfIRConst ( IRConst* con ) 3359{ 3360 switch (con->tag) { 3361 case Ico_U1: return Ity_I1; 3362 case Ico_U8: return Ity_I8; 3363 case Ico_U16: return Ity_I16; 3364 case Ico_U32: return Ity_I32; 3365 case Ico_U64: return Ity_I64; 3366 case Ico_F32: return Ity_F32; 3367 case Ico_F32i: return Ity_F32; 3368 case Ico_F64: return Ity_F64; 3369 case Ico_F64i: return Ity_F64; 3370 case Ico_V128: return Ity_V128; 3371 case Ico_V256: return Ity_V256; 3372 default: vpanic("typeOfIRConst"); 3373 } 3374} 3375 3376void typeOfIRLoadGOp ( IRLoadGOp cvt, 3377 /*OUT*/IRType* t_res, /*OUT*/IRType* t_arg ) 3378{ 3379 switch (cvt) { 3380 case ILGop_Ident32: 3381 *t_res = Ity_I32; *t_arg = Ity_I32; break; 3382 case ILGop_16Uto32: case ILGop_16Sto32: 3383 *t_res = Ity_I32; *t_arg = Ity_I16; break; 3384 case ILGop_8Uto32: case ILGop_8Sto32: 3385 *t_res = Ity_I32; *t_arg = Ity_I8; break; 3386 default: 3387 vpanic("typeOfIRLoadGOp"); 3388 } 3389} 3390 3391IRType typeOfIRExpr ( IRTypeEnv* tyenv, IRExpr* e ) 3392{ 3393 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 3394 start: 3395 switch (e->tag) { 3396 case Iex_Load: 3397 return e->Iex.Load.ty; 3398 case Iex_Get: 3399 return e->Iex.Get.ty; 3400 case Iex_GetI: 3401 return e->Iex.GetI.descr->elemTy; 3402 case Iex_RdTmp: 3403 return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp); 3404 case Iex_Const: 3405 return typeOfIRConst(e->Iex.Const.con); 3406 case Iex_Qop: 3407 typeOfPrimop(e->Iex.Qop.details->op, 3408 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3409 return t_dst; 3410 case Iex_Triop: 3411 typeOfPrimop(e->Iex.Triop.details->op, 3412 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3413 return t_dst; 3414 case Iex_Binop: 3415 typeOfPrimop(e->Iex.Binop.op, 3416 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3417 return t_dst; 3418 case Iex_Unop: 3419 typeOfPrimop(e->Iex.Unop.op, 3420 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3421 return t_dst; 3422 case Iex_CCall: 3423 return e->Iex.CCall.retty; 3424 case Iex_ITE: 3425 e = e->Iex.ITE.iffalse; 3426 goto start; 3427 /* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */ 3428 case Iex_Binder: 3429 vpanic("typeOfIRExpr: Binder is not a valid expression"); 3430 case Iex_VECRET: 3431 vpanic("typeOfIRExpr: VECRET is not a valid expression"); 3432 case Iex_BBPTR: 3433 vpanic("typeOfIRExpr: BBPTR is not a valid expression"); 3434 default: 3435 ppIRExpr(e); 3436 vpanic("typeOfIRExpr"); 3437 } 3438} 3439 3440/* Is this any value actually in the enumeration 'IRType' ? */ 3441Bool isPlausibleIRType ( IRType ty ) 3442{ 3443 switch (ty) { 3444 case Ity_INVALID: case Ity_I1: 3445 case Ity_I8: case Ity_I16: case Ity_I32: 3446 case Ity_I64: case Ity_I128: 3447 case Ity_F32: case Ity_F64: case Ity_F128: 3448 case Ity_D32: case Ity_D64: case Ity_D128: 3449 case Ity_V128: case Ity_V256: 3450 return True; 3451 default: 3452 return False; 3453 } 3454} 3455 3456 3457/*---------------------------------------------------------------*/ 3458/*--- Sanity checking -- FLATNESS ---*/ 3459/*---------------------------------------------------------------*/ 3460 3461/* Check that the canonical flatness constraints hold on an 3462 IRStmt. The only place where any expression is allowed to be 3463 non-atomic is the RHS of IRStmt_Tmp. */ 3464 3465/* Relies on: 3466 inline static Bool isAtom ( IRExpr* e ) { 3467 return e->tag == Iex_RdTmp || e->tag == Iex_Const; 3468 } 3469*/ 3470 3471static inline Bool isIRAtom_or_VECRET_or_BBPTR ( IRExpr* e ) { 3472 if (isIRAtom(e)) { 3473 return True; 3474 } 3475 3476 return UNLIKELY(is_IRExpr_VECRET_or_BBPTR(e)); 3477} 3478 3479Bool isFlatIRStmt ( IRStmt* st ) 3480{ 3481 Int i; 3482 IRExpr* e; 3483 IRDirty* di; 3484 IRCAS* cas; 3485 IRPutI* puti; 3486 IRQop* qop; 3487 IRTriop* triop; 3488 3489 switch (st->tag) { 3490 case Ist_AbiHint: 3491 return isIRAtom(st->Ist.AbiHint.base) 3492 && isIRAtom(st->Ist.AbiHint.nia); 3493 case Ist_Put: 3494 return isIRAtom(st->Ist.Put.data); 3495 case Ist_PutI: 3496 puti = st->Ist.PutI.details; 3497 return toBool( isIRAtom(puti->ix) 3498 && isIRAtom(puti->data) ); 3499 case Ist_WrTmp: 3500 /* This is the only interesting case. The RHS can be any 3501 expression, *but* all its subexpressions *must* be 3502 atoms. */ 3503 e = st->Ist.WrTmp.data; 3504 switch (e->tag) { 3505 case Iex_Binder: return True; 3506 case Iex_Get: return True; 3507 case Iex_GetI: return isIRAtom(e->Iex.GetI.ix); 3508 case Iex_RdTmp: return True; 3509 case Iex_Qop: qop = e->Iex.Qop.details; 3510 return toBool( 3511 isIRAtom(qop->arg1) 3512 && isIRAtom(qop->arg2) 3513 && isIRAtom(qop->arg3) 3514 && isIRAtom(qop->arg4)); 3515 case Iex_Triop: triop = e->Iex.Triop.details; 3516 return toBool( 3517 isIRAtom(triop->arg1) 3518 && isIRAtom(triop->arg2) 3519 && isIRAtom(triop->arg3)); 3520 case Iex_Binop: return toBool( 3521 isIRAtom(e->Iex.Binop.arg1) 3522 && isIRAtom(e->Iex.Binop.arg2)); 3523 case Iex_Unop: return isIRAtom(e->Iex.Unop.arg); 3524 case Iex_Load: return isIRAtom(e->Iex.Load.addr); 3525 case Iex_Const: return True; 3526 case Iex_CCall: for (i = 0; e->Iex.CCall.args[i]; i++) 3527 if (!isIRAtom(e->Iex.CCall.args[i])) 3528 return False; 3529 return True; 3530 case Iex_ITE: return toBool ( 3531 isIRAtom(e->Iex.ITE.cond) 3532 && isIRAtom(e->Iex.ITE.iftrue) 3533 && isIRAtom(e->Iex.ITE.iffalse)); 3534 default: vpanic("isFlatIRStmt(e)"); 3535 } 3536 /*notreached*/ 3537 vassert(0); 3538 case Ist_Store: 3539 return toBool( isIRAtom(st->Ist.Store.addr) 3540 && isIRAtom(st->Ist.Store.data) ); 3541 case Ist_StoreG: { 3542 IRStoreG* sg = st->Ist.StoreG.details; 3543 return toBool( isIRAtom(sg->addr) 3544 && isIRAtom(sg->data) && isIRAtom(sg->guard) ); 3545 } 3546 case Ist_LoadG: { 3547 IRLoadG* lg = st->Ist.LoadG.details; 3548 return toBool( isIRAtom(lg->addr) 3549 && isIRAtom(lg->alt) && isIRAtom(lg->guard) ); 3550 } 3551 case Ist_CAS: 3552 cas = st->Ist.CAS.details; 3553 return toBool( isIRAtom(cas->addr) 3554 && (cas->expdHi ? isIRAtom(cas->expdHi) : True) 3555 && isIRAtom(cas->expdLo) 3556 && (cas->dataHi ? isIRAtom(cas->dataHi) : True) 3557 && isIRAtom(cas->dataLo) ); 3558 case Ist_LLSC: 3559 return toBool( isIRAtom(st->Ist.LLSC.addr) 3560 && (st->Ist.LLSC.storedata 3561 ? isIRAtom(st->Ist.LLSC.storedata) : True) ); 3562 case Ist_Dirty: 3563 di = st->Ist.Dirty.details; 3564 if (!isIRAtom(di->guard)) 3565 return False; 3566 for (i = 0; di->args[i]; i++) 3567 if (!isIRAtom_or_VECRET_or_BBPTR(di->args[i])) 3568 return False; 3569 if (di->mAddr && !isIRAtom(di->mAddr)) 3570 return False; 3571 return True; 3572 case Ist_NoOp: 3573 case Ist_IMark: 3574 case Ist_MBE: 3575 return True; 3576 case Ist_Exit: 3577 return isIRAtom(st->Ist.Exit.guard); 3578 default: 3579 vpanic("isFlatIRStmt(st)"); 3580 } 3581} 3582 3583 3584/*---------------------------------------------------------------*/ 3585/*--- Sanity checking ---*/ 3586/*---------------------------------------------------------------*/ 3587 3588/* Checks: 3589 3590 Everything is type-consistent. No ill-typed anything. 3591 The target address at the end of the BB is a 32- or 64- 3592 bit expression, depending on the guest's word size. 3593 3594 Each temp is assigned only once, before its uses. 3595*/ 3596 3597static inline Int countArgs ( IRExpr** args ) 3598{ 3599 Int i; 3600 for (i = 0; args[i]; i++) 3601 ; 3602 return i; 3603} 3604 3605static 3606__attribute((noreturn)) 3607void sanityCheckFail ( IRSB* bb, IRStmt* stmt, const HChar* what ) 3608{ 3609 vex_printf("\nIR SANITY CHECK FAILURE\n\n"); 3610 ppIRSB(bb); 3611 if (stmt) { 3612 vex_printf("\nIN STATEMENT:\n\n"); 3613 ppIRStmt(stmt); 3614 } 3615 vex_printf("\n\nERROR = %s\n\n", what ); 3616 vpanic("sanityCheckFail: exiting due to bad IR"); 3617} 3618 3619static Bool saneIRRegArray ( IRRegArray* arr ) 3620{ 3621 if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */) 3622 return False; 3623 if (arr->elemTy == Ity_I1) 3624 return False; 3625 if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */) 3626 return False; 3627 return True; 3628} 3629 3630static Bool saneIRCallee ( IRCallee* cee ) 3631{ 3632 if (cee->name == NULL) 3633 return False; 3634 if (cee->addr == 0) 3635 return False; 3636 if (cee->regparms < 0 || cee->regparms > 3) 3637 return False; 3638 return True; 3639} 3640 3641static Bool saneIRConst ( IRConst* con ) 3642{ 3643 switch (con->tag) { 3644 case Ico_U1: 3645 return toBool( con->Ico.U1 == True || con->Ico.U1 == False ); 3646 default: 3647 /* Is there anything we can meaningfully check? I don't 3648 think so. */ 3649 return True; 3650 } 3651} 3652 3653/* Traverse a Stmt/Expr, inspecting IRTemp uses. Report any out of 3654 range ones. Report any which are read and for which the current 3655 def_count is zero. */ 3656 3657static 3658void useBeforeDef_Temp ( IRSB* bb, IRStmt* stmt, IRTemp tmp, Int* def_counts ) 3659{ 3660 if (tmp < 0 || tmp >= bb->tyenv->types_used) 3661 sanityCheckFail(bb,stmt, "out of range Temp in IRExpr"); 3662 if (def_counts[tmp] < 1) 3663 sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr"); 3664} 3665 3666static 3667void useBeforeDef_Expr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, Int* def_counts ) 3668{ 3669 Int i; 3670 switch (expr->tag) { 3671 case Iex_Get: 3672 break; 3673 case Iex_GetI: 3674 useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts); 3675 break; 3676 case Iex_RdTmp: 3677 useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts); 3678 break; 3679 case Iex_Qop: { 3680 IRQop* qop = expr->Iex.Qop.details; 3681 useBeforeDef_Expr(bb,stmt,qop->arg1,def_counts); 3682 useBeforeDef_Expr(bb,stmt,qop->arg2,def_counts); 3683 useBeforeDef_Expr(bb,stmt,qop->arg3,def_counts); 3684 useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts); 3685 break; 3686 } 3687 case Iex_Triop: { 3688 IRTriop* triop = expr->Iex.Triop.details; 3689 useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts); 3690 useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts); 3691 useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts); 3692 break; 3693 } 3694 case Iex_Binop: 3695 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts); 3696 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts); 3697 break; 3698 case Iex_Unop: 3699 useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts); 3700 break; 3701 case Iex_Load: 3702 useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts); 3703 break; 3704 case Iex_Const: 3705 break; 3706 case Iex_CCall: 3707 for (i = 0; expr->Iex.CCall.args[i]; i++) { 3708 IRExpr* arg = expr->Iex.CCall.args[i]; 3709 if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) { 3710 /* These aren't allowed in CCall lists. Let's detect 3711 and throw them out here, though, rather than 3712 segfaulting a bit later on. */ 3713 sanityCheckFail(bb,stmt, "IRExprP__* value in CCall arg list"); 3714 } else { 3715 useBeforeDef_Expr(bb,stmt,arg,def_counts); 3716 } 3717 } 3718 break; 3719 case Iex_ITE: 3720 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.cond,def_counts); 3721 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iftrue,def_counts); 3722 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iffalse,def_counts); 3723 break; 3724 default: 3725 vpanic("useBeforeDef_Expr"); 3726 } 3727} 3728 3729static 3730void useBeforeDef_Stmt ( IRSB* bb, IRStmt* stmt, Int* def_counts ) 3731{ 3732 Int i; 3733 IRDirty* d; 3734 IRCAS* cas; 3735 IRPutI* puti; 3736 IRLoadG* lg; 3737 IRStoreG* sg; 3738 switch (stmt->tag) { 3739 case Ist_IMark: 3740 break; 3741 case Ist_AbiHint: 3742 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts); 3743 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts); 3744 break; 3745 case Ist_Put: 3746 useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts); 3747 break; 3748 case Ist_PutI: 3749 puti = stmt->Ist.PutI.details; 3750 useBeforeDef_Expr(bb,stmt,puti->ix,def_counts); 3751 useBeforeDef_Expr(bb,stmt,puti->data,def_counts); 3752 break; 3753 case Ist_WrTmp: 3754 useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts); 3755 break; 3756 case Ist_Store: 3757 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts); 3758 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts); 3759 break; 3760 case Ist_StoreG: 3761 sg = stmt->Ist.StoreG.details; 3762 useBeforeDef_Expr(bb,stmt,sg->addr,def_counts); 3763 useBeforeDef_Expr(bb,stmt,sg->data,def_counts); 3764 useBeforeDef_Expr(bb,stmt,sg->guard,def_counts); 3765 break; 3766 case Ist_LoadG: 3767 lg = stmt->Ist.LoadG.details; 3768 useBeforeDef_Expr(bb,stmt,lg->addr,def_counts); 3769 useBeforeDef_Expr(bb,stmt,lg->alt,def_counts); 3770 useBeforeDef_Expr(bb,stmt,lg->guard,def_counts); 3771 break; 3772 case Ist_CAS: 3773 cas = stmt->Ist.CAS.details; 3774 useBeforeDef_Expr(bb,stmt,cas->addr,def_counts); 3775 if (cas->expdHi) 3776 useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts); 3777 useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts); 3778 if (cas->dataHi) 3779 useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts); 3780 useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts); 3781 break; 3782 case Ist_LLSC: 3783 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts); 3784 if (stmt->Ist.LLSC.storedata != NULL) 3785 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts); 3786 break; 3787 case Ist_Dirty: 3788 d = stmt->Ist.Dirty.details; 3789 for (i = 0; d->args[i] != NULL; i++) { 3790 IRExpr* arg = d->args[i]; 3791 if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) { 3792 /* This is ensured by isFlatIRStmt */ 3793 ; 3794 } else { 3795 useBeforeDef_Expr(bb,stmt,arg,def_counts); 3796 } 3797 } 3798 if (d->mFx != Ifx_None) 3799 useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts); 3800 break; 3801 case Ist_NoOp: 3802 case Ist_MBE: 3803 break; 3804 case Ist_Exit: 3805 useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts); 3806 break; 3807 default: 3808 vpanic("useBeforeDef_Stmt"); 3809 } 3810} 3811 3812static 3813void tcExpr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, IRType gWordTy ) 3814{ 3815 Int i; 3816 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 3817 IRTypeEnv* tyenv = bb->tyenv; 3818 switch (expr->tag) { 3819 case Iex_Get: 3820 case Iex_RdTmp: 3821 break; 3822 case Iex_GetI: 3823 tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy ); 3824 if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32) 3825 sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32"); 3826 if (!saneIRRegArray(expr->Iex.GetI.descr)) 3827 sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr"); 3828 break; 3829 case Iex_Qop: { 3830 IRType ttarg1, ttarg2, ttarg3, ttarg4; 3831 IRQop* qop = expr->Iex.Qop.details; 3832 tcExpr(bb,stmt, qop->arg1, gWordTy ); 3833 tcExpr(bb,stmt, qop->arg2, gWordTy ); 3834 tcExpr(bb,stmt, qop->arg3, gWordTy ); 3835 tcExpr(bb,stmt, qop->arg4, gWordTy ); 3836 typeOfPrimop(qop->op, 3837 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3838 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 3839 || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) { 3840 vex_printf(" op name: " ); 3841 ppIROp(qop->op); 3842 vex_printf("\n"); 3843 sanityCheckFail(bb,stmt, 3844 "Iex.Qop: wrong arity op\n" 3845 "... name of op precedes BB printout\n"); 3846 } 3847 ttarg1 = typeOfIRExpr(tyenv, qop->arg1); 3848 ttarg2 = typeOfIRExpr(tyenv, qop->arg2); 3849 ttarg3 = typeOfIRExpr(tyenv, qop->arg3); 3850 ttarg4 = typeOfIRExpr(tyenv, qop->arg4); 3851 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 3852 || t_arg3 != ttarg3 || t_arg4 != ttarg4) { 3853 vex_printf(" op name: "); 3854 ppIROp(qop->op); 3855 vex_printf("\n"); 3856 vex_printf(" op type is ("); 3857 ppIRType(t_arg1); 3858 vex_printf(","); 3859 ppIRType(t_arg2); 3860 vex_printf(","); 3861 ppIRType(t_arg3); 3862 vex_printf(","); 3863 ppIRType(t_arg4); 3864 vex_printf(") -> "); 3865 ppIRType (t_dst); 3866 vex_printf("\narg tys are ("); 3867 ppIRType(ttarg1); 3868 vex_printf(","); 3869 ppIRType(ttarg2); 3870 vex_printf(","); 3871 ppIRType(ttarg3); 3872 vex_printf(","); 3873 ppIRType(ttarg4); 3874 vex_printf(")\n"); 3875 sanityCheckFail(bb,stmt, 3876 "Iex.Qop: arg tys don't match op tys\n" 3877 "... additional details precede BB printout\n"); 3878 } 3879 break; 3880 } 3881 case Iex_Triop: { 3882 IRType ttarg1, ttarg2, ttarg3; 3883 IRTriop *triop = expr->Iex.Triop.details; 3884 tcExpr(bb,stmt, triop->arg1, gWordTy ); 3885 tcExpr(bb,stmt, triop->arg2, gWordTy ); 3886 tcExpr(bb,stmt, triop->arg3, gWordTy ); 3887 typeOfPrimop(triop->op, 3888 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3889 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 3890 || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) { 3891 vex_printf(" op name: " ); 3892 ppIROp(triop->op); 3893 vex_printf("\n"); 3894 sanityCheckFail(bb,stmt, 3895 "Iex.Triop: wrong arity op\n" 3896 "... name of op precedes BB printout\n"); 3897 } 3898 ttarg1 = typeOfIRExpr(tyenv, triop->arg1); 3899 ttarg2 = typeOfIRExpr(tyenv, triop->arg2); 3900 ttarg3 = typeOfIRExpr(tyenv, triop->arg3); 3901 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) { 3902 vex_printf(" op name: "); 3903 ppIROp(triop->op); 3904 vex_printf("\n"); 3905 vex_printf(" op type is ("); 3906 ppIRType(t_arg1); 3907 vex_printf(","); 3908 ppIRType(t_arg2); 3909 vex_printf(","); 3910 ppIRType(t_arg3); 3911 vex_printf(") -> "); 3912 ppIRType (t_dst); 3913 vex_printf("\narg tys are ("); 3914 ppIRType(ttarg1); 3915 vex_printf(","); 3916 ppIRType(ttarg2); 3917 vex_printf(","); 3918 ppIRType(ttarg3); 3919 vex_printf(")\n"); 3920 sanityCheckFail(bb,stmt, 3921 "Iex.Triop: arg tys don't match op tys\n" 3922 "... additional details precede BB printout\n"); 3923 } 3924 break; 3925 } 3926 case Iex_Binop: { 3927 IRType ttarg1, ttarg2; 3928 tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy ); 3929 tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy ); 3930 typeOfPrimop(expr->Iex.Binop.op, 3931 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3932 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 3933 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) { 3934 vex_printf(" op name: " ); 3935 ppIROp(expr->Iex.Binop.op); 3936 vex_printf("\n"); 3937 sanityCheckFail(bb,stmt, 3938 "Iex.Binop: wrong arity op\n" 3939 "... name of op precedes BB printout\n"); 3940 } 3941 ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1); 3942 ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2); 3943 if (t_arg1 != ttarg1 || t_arg2 != ttarg2) { 3944 vex_printf(" op name: "); 3945 ppIROp(expr->Iex.Binop.op); 3946 vex_printf("\n"); 3947 vex_printf(" op type is ("); 3948 ppIRType(t_arg1); 3949 vex_printf(","); 3950 ppIRType(t_arg2); 3951 vex_printf(") -> "); 3952 ppIRType (t_dst); 3953 vex_printf("\narg tys are ("); 3954 ppIRType(ttarg1); 3955 vex_printf(","); 3956 ppIRType(ttarg2); 3957 vex_printf(")\n"); 3958 sanityCheckFail(bb,stmt, 3959 "Iex.Binop: arg tys don't match op tys\n" 3960 "... additional details precede BB printout\n"); 3961 } 3962 break; 3963 } 3964 case Iex_Unop: 3965 tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy ); 3966 typeOfPrimop(expr->Iex.Unop.op, 3967 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3968 if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID 3969 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) 3970 sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op"); 3971 if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg)) 3972 sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty"); 3973 break; 3974 case Iex_Load: 3975 tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy); 3976 if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy) 3977 sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type"); 3978 if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE) 3979 sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness"); 3980 break; 3981 case Iex_CCall: 3982 if (!saneIRCallee(expr->Iex.CCall.cee)) 3983 sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee"); 3984 if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args)) 3985 sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args"); 3986 for (i = 0; expr->Iex.CCall.args[i]; i++) { 3987 if (i >= 32) 3988 sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args"); 3989 IRExpr* arg = expr->Iex.CCall.args[i]; 3990 if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) 3991 sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/BBPTR"); 3992 tcExpr(bb,stmt, arg, gWordTy); 3993 } 3994 if (expr->Iex.CCall.retty == Ity_I1) 3995 sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1"); 3996 for (i = 0; expr->Iex.CCall.args[i]; i++) 3997 if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1) 3998 sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1"); 3999 break; 4000 case Iex_Const: 4001 if (!saneIRConst(expr->Iex.Const.con)) 4002 sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const"); 4003 break; 4004 case Iex_ITE: 4005 tcExpr(bb,stmt, expr->Iex.ITE.cond, gWordTy); 4006 tcExpr(bb,stmt, expr->Iex.ITE.iftrue, gWordTy); 4007 tcExpr(bb,stmt, expr->Iex.ITE.iffalse, gWordTy); 4008 if (typeOfIRExpr(tyenv, expr->Iex.ITE.cond) != Ity_I1) 4009 sanityCheckFail(bb,stmt,"Iex.ITE.cond: cond :: Ity_I1"); 4010 if (typeOfIRExpr(tyenv, expr->Iex.ITE.iftrue) 4011 != typeOfIRExpr(tyenv, expr->Iex.ITE.iffalse)) 4012 sanityCheckFail(bb,stmt,"Iex.ITE: iftrue/iffalse mismatch"); 4013 break; 4014 default: 4015 vpanic("tcExpr"); 4016 } 4017} 4018 4019 4020static 4021void tcStmt ( IRSB* bb, IRStmt* stmt, IRType gWordTy ) 4022{ 4023 Int i; 4024 IRDirty* d; 4025 IRCAS* cas; 4026 IRPutI* puti; 4027 IRType tyExpd, tyData; 4028 IRTypeEnv* tyenv = bb->tyenv; 4029 switch (stmt->tag) { 4030 case Ist_IMark: 4031 /* Somewhat heuristic, but rule out totally implausible 4032 instruction sizes and deltas. */ 4033 if (stmt->Ist.IMark.len < 0 || stmt->Ist.IMark.len > 20) 4034 sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible"); 4035 if (stmt->Ist.IMark.delta > 1) 4036 sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible"); 4037 break; 4038 case Ist_AbiHint: 4039 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy) 4040 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: " 4041 "not :: guest word type"); 4042 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy) 4043 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: " 4044 "not :: guest word type"); 4045 break; 4046 case Ist_Put: 4047 tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy ); 4048 if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1) 4049 sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1"); 4050 break; 4051 case Ist_PutI: 4052 puti = stmt->Ist.PutI.details; 4053 tcExpr( bb, stmt, puti->data, gWordTy ); 4054 tcExpr( bb, stmt, puti->ix, gWordTy ); 4055 if (typeOfIRExpr(tyenv,puti->data) == Ity_I1) 4056 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1"); 4057 if (typeOfIRExpr(tyenv,puti->data) 4058 != puti->descr->elemTy) 4059 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty"); 4060 if (typeOfIRExpr(tyenv,puti->ix) != Ity_I32) 4061 sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32"); 4062 if (!saneIRRegArray(puti->descr)) 4063 sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr"); 4064 break; 4065 case Ist_WrTmp: 4066 tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy ); 4067 if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp) 4068 != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data)) 4069 sanityCheckFail(bb,stmt, 4070 "IRStmt.Put.Tmp: tmp and expr do not match"); 4071 break; 4072 case Ist_Store: 4073 tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy ); 4074 tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy ); 4075 if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy) 4076 sanityCheckFail(bb,stmt, 4077 "IRStmt.Store.addr: not :: guest word type"); 4078 if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1) 4079 sanityCheckFail(bb,stmt, 4080 "IRStmt.Store.data: cannot Store :: Ity_I1"); 4081 if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE) 4082 sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness"); 4083 break; 4084 case Ist_StoreG: { 4085 IRStoreG* sg = stmt->Ist.StoreG.details; 4086 tcExpr( bb, stmt, sg->addr, gWordTy ); 4087 tcExpr( bb, stmt, sg->data, gWordTy ); 4088 tcExpr( bb, stmt, sg->guard, gWordTy ); 4089 if (typeOfIRExpr(tyenv, sg->addr) != gWordTy) 4090 sanityCheckFail(bb,stmt,"IRStmtG...addr: not :: guest word type"); 4091 if (typeOfIRExpr(tyenv, sg->data) == Ity_I1) 4092 sanityCheckFail(bb,stmt,"IRStmtG...data: cannot Store :: Ity_I1"); 4093 if (typeOfIRExpr(tyenv, sg->guard) != Ity_I1) 4094 sanityCheckFail(bb,stmt,"IRStmtG...guard: not :: Ity_I1"); 4095 if (sg->end != Iend_LE && sg->end != Iend_BE) 4096 sanityCheckFail(bb,stmt,"IRStmtG...end: bogus endianness"); 4097 break; 4098 } 4099 case Ist_LoadG: { 4100 IRLoadG* lg = stmt->Ist.LoadG.details; 4101 tcExpr( bb, stmt, lg->addr, gWordTy ); 4102 tcExpr( bb, stmt, lg->alt, gWordTy ); 4103 tcExpr( bb, stmt, lg->guard, gWordTy ); 4104 if (typeOfIRExpr(tyenv, lg->guard) != Ity_I1) 4105 sanityCheckFail(bb,stmt,"IRStmt.LoadG.guard: not :: Ity_I1"); 4106 if (typeOfIRExpr(tyenv, lg->addr) != gWordTy) 4107 sanityCheckFail(bb,stmt,"IRStmt.LoadG.addr: not " 4108 ":: guest word type"); 4109 if (typeOfIRExpr(tyenv, lg->alt) != typeOfIRTemp(tyenv, lg->dst)) 4110 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/alt type mismatch"); 4111 IRTemp cvtRes = Ity_INVALID, cvtArg = Ity_INVALID; 4112 typeOfIRLoadGOp(lg->cvt, &cvtRes, &cvtArg); 4113 if (cvtRes != typeOfIRTemp(tyenv, lg->dst)) 4114 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/loaded type mismatch"); 4115 break; 4116 } 4117 case Ist_CAS: 4118 cas = stmt->Ist.CAS.details; 4119 /* make sure it's definitely either a CAS or a DCAS */ 4120 if (cas->oldHi == IRTemp_INVALID 4121 && cas->expdHi == NULL && cas->dataHi == NULL) { 4122 /* fine; it's a single cas */ 4123 } 4124 else 4125 if (cas->oldHi != IRTemp_INVALID 4126 && cas->expdHi != NULL && cas->dataHi != NULL) { 4127 /* fine; it's a double cas */ 4128 } 4129 else { 4130 /* it's some el-mutanto hybrid */ 4131 goto bad_cas; 4132 } 4133 /* check the address type */ 4134 tcExpr( bb, stmt, cas->addr, gWordTy ); 4135 if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas; 4136 /* check types on the {old,expd,data}Lo components agree */ 4137 tyExpd = typeOfIRExpr(tyenv, cas->expdLo); 4138 tyData = typeOfIRExpr(tyenv, cas->dataLo); 4139 if (tyExpd != tyData) goto bad_cas; 4140 if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo)) 4141 goto bad_cas; 4142 /* check the base element type is sane */ 4143 if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32 4144 || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) { 4145 /* fine */ 4146 } else { 4147 goto bad_cas; 4148 } 4149 /* If it's a DCAS, check types on the {old,expd,data}Hi 4150 components too */ 4151 if (cas->oldHi != IRTemp_INVALID) { 4152 tyExpd = typeOfIRExpr(tyenv, cas->expdHi); 4153 tyData = typeOfIRExpr(tyenv, cas->dataHi); 4154 if (tyExpd != tyData) goto bad_cas; 4155 if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi)) 4156 goto bad_cas; 4157 /* and finally check that oldLo and oldHi have the same 4158 type. This forces equivalence amongst all 6 types. */ 4159 if (typeOfIRTemp(tyenv, cas->oldHi) 4160 != typeOfIRTemp(tyenv, cas->oldLo)) 4161 goto bad_cas; 4162 } 4163 break; 4164 bad_cas: 4165 sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed"); 4166 break; 4167 case Ist_LLSC: { 4168 IRType tyRes; 4169 if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy) 4170 sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type"); 4171 if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE) 4172 sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness"); 4173 tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result); 4174 if (stmt->Ist.LLSC.storedata == NULL) { 4175 /* it's a LL */ 4176 if (tyRes != Ity_I64 && tyRes != Ity_I32 4177 && tyRes != Ity_I16 && tyRes != Ity_I8) 4178 sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus"); 4179 } else { 4180 /* it's a SC */ 4181 if (tyRes != Ity_I1) 4182 sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1"); 4183 tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata); 4184 if (tyData != Ity_I64 && tyData != Ity_I32 4185 && tyData != Ity_I16 && tyData != Ity_I8) 4186 sanityCheckFail(bb,stmt, 4187 "Ist.LLSC(SC).result :: storedata bogus"); 4188 } 4189 break; 4190 } 4191 case Ist_Dirty: { 4192 /* Mostly check for various kinds of ill-formed dirty calls. */ 4193 d = stmt->Ist.Dirty.details; 4194 if (d->cee == NULL) goto bad_dirty; 4195 if (!saneIRCallee(d->cee)) goto bad_dirty; 4196 if (d->cee->regparms > countArgs(d->args)) goto bad_dirty; 4197 if (d->mFx == Ifx_None) { 4198 if (d->mAddr != NULL || d->mSize != 0) 4199 goto bad_dirty; 4200 } else { 4201 if (d->mAddr == NULL || d->mSize == 0) 4202 goto bad_dirty; 4203 } 4204 if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE) 4205 goto bad_dirty; 4206 for (i = 0; i < d->nFxState; i++) { 4207 if (d->fxState[i].fx == Ifx_None) goto bad_dirty; 4208 if (d->fxState[i].size <= 0) goto bad_dirty; 4209 if (d->fxState[i].nRepeats == 0) { 4210 if (d->fxState[i].repeatLen != 0) goto bad_dirty; 4211 } else { 4212 if (d->fxState[i].repeatLen <= d->fxState[i].size) 4213 goto bad_dirty; 4214 /* the % is safe because of the .size check above */ 4215 if ((d->fxState[i].repeatLen % d->fxState[i].size) != 0) 4216 goto bad_dirty; 4217 } 4218 } 4219 /* check guard */ 4220 if (d->guard == NULL) goto bad_dirty; 4221 tcExpr( bb, stmt, d->guard, gWordTy ); 4222 if (typeOfIRExpr(tyenv, d->guard) != Ity_I1) 4223 sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1"); 4224 /* check types, minimally */ 4225 IRType retTy = Ity_INVALID; 4226 if (d->tmp != IRTemp_INVALID) { 4227 retTy = typeOfIRTemp(tyenv, d->tmp); 4228 if (retTy == Ity_I1) 4229 sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1"); 4230 } 4231 UInt nVECRETs = 0, nBBPTRs = 0; 4232 for (i = 0; d->args[i] != NULL; i++) { 4233 if (i >= 32) 4234 sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args"); 4235 IRExpr* arg = d->args[i]; 4236 if (UNLIKELY(arg->tag == Iex_VECRET)) { 4237 nVECRETs++; 4238 } else if (UNLIKELY(arg->tag == Iex_BBPTR)) { 4239 nBBPTRs++; 4240 } else { 4241 if (typeOfIRExpr(tyenv, arg) == Ity_I1) 4242 sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1"); 4243 } 4244 if (nBBPTRs > 1) { 4245 sanityCheckFail(bb,stmt,"IRStmt.Dirty.args: > 1 BBPTR arg"); 4246 } 4247 if (nVECRETs == 1) { 4248 /* Fn must return V128 or V256. */ 4249 if (retTy != Ity_V128 && retTy != Ity_V256) 4250 sanityCheckFail(bb,stmt, 4251 "IRStmt.Dirty.args: VECRET present, " 4252 "but fn does not return V128 or V256"); 4253 } else if (nVECRETs == 0) { 4254 /* Fn must not return V128 or V256 */ 4255 if (retTy == Ity_V128 || retTy == Ity_V256) 4256 sanityCheckFail(bb,stmt, 4257 "IRStmt.Dirty.args: VECRET not present, " 4258 "but fn returns V128 or V256"); 4259 } else { 4260 sanityCheckFail(bb,stmt, 4261 "IRStmt.Dirty.args: > 1 VECRET present"); 4262 } 4263 } 4264 if (nBBPTRs > 1) { 4265 sanityCheckFail(bb,stmt, 4266 "IRStmt.Dirty.args: > 1 BBPTR present"); 4267 } 4268 /* If you ask for the baseblock pointer, you have to make 4269 some declaration about access to the guest state too. */ 4270 if (d->nFxState == 0 && nBBPTRs != 0) { 4271 sanityCheckFail(bb,stmt, 4272 "IRStmt.Dirty.args: BBPTR requested, " 4273 "but no fxState declared"); 4274 } 4275 break; 4276 bad_dirty: 4277 sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed"); 4278 break; 4279 } 4280 case Ist_NoOp: 4281 break; 4282 case Ist_MBE: 4283 switch (stmt->Ist.MBE.event) { 4284 case Imbe_Fence: case Imbe_CancelReservation: 4285 break; 4286 default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown"); 4287 break; 4288 } 4289 break; 4290 case Ist_Exit: 4291 tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy ); 4292 if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1) 4293 sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1"); 4294 if (!saneIRConst(stmt->Ist.Exit.dst)) 4295 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst"); 4296 if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy) 4297 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type"); 4298 /* because it would intersect with host_EvC_* */ 4299 if (stmt->Ist.Exit.offsIP < 16) 4300 sanityCheckFail(bb,stmt,"IRStmt.Exit.offsIP: too low"); 4301 break; 4302 default: 4303 vpanic("tcStmt"); 4304 } 4305} 4306 4307void sanityCheckIRSB ( IRSB* bb, const HChar* caller, 4308 Bool require_flat, IRType guest_word_size ) 4309{ 4310 Int i; 4311 IRStmt* stmt; 4312 Int n_temps = bb->tyenv->types_used; 4313 Int* def_counts = LibVEX_Alloc(n_temps * sizeof(Int)); 4314 4315 if (0) 4316 vex_printf("sanityCheck: %s\n", caller); 4317 4318 vassert(guest_word_size == Ity_I32 4319 || guest_word_size == Ity_I64); 4320 4321 if (bb->stmts_used < 0 || bb->stmts_size < 8 4322 || bb->stmts_used > bb->stmts_size) 4323 /* this BB is so strange we can't even print it */ 4324 vpanic("sanityCheckIRSB: stmts array limits wierd"); 4325 4326 /* Ensure each temp has a plausible type. */ 4327 for (i = 0; i < n_temps; i++) { 4328 IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i); 4329 if (!isPlausibleIRType(ty)) { 4330 vex_printf("Temp t%d declared with implausible type 0x%x\n", 4331 i, (UInt)ty); 4332 sanityCheckFail(bb,NULL,"Temp declared with implausible type"); 4333 } 4334 } 4335 4336 /* Check for flatness, if required. */ 4337 if (require_flat) { 4338 for (i = 0; i < bb->stmts_used; i++) { 4339 stmt = bb->stmts[i]; 4340 if (!stmt) 4341 sanityCheckFail(bb, stmt, "IRStmt: is NULL"); 4342 if (!isFlatIRStmt(stmt)) 4343 sanityCheckFail(bb, stmt, "IRStmt: is not flat"); 4344 } 4345 if (!isIRAtom(bb->next)) 4346 sanityCheckFail(bb, NULL, "bb->next is not an atom"); 4347 } 4348 4349 /* Count the defs of each temp. Only one def is allowed. 4350 Also, check that each used temp has already been defd. */ 4351 4352 for (i = 0; i < n_temps; i++) 4353 def_counts[i] = 0; 4354 4355 for (i = 0; i < bb->stmts_used; i++) { 4356 IRDirty* d; 4357 IRCAS* cas; 4358 IRLoadG* lg; 4359 stmt = bb->stmts[i]; 4360 /* Check any temps used by this statement. */ 4361 useBeforeDef_Stmt(bb,stmt,def_counts); 4362 4363 /* Now make note of any temps defd by this statement. */ 4364 switch (stmt->tag) { 4365 case Ist_WrTmp: 4366 if (stmt->Ist.WrTmp.tmp < 0 || stmt->Ist.WrTmp.tmp >= n_temps) 4367 sanityCheckFail(bb, stmt, 4368 "IRStmt.Tmp: destination tmp is out of range"); 4369 def_counts[stmt->Ist.WrTmp.tmp]++; 4370 if (def_counts[stmt->Ist.WrTmp.tmp] > 1) 4371 sanityCheckFail(bb, stmt, 4372 "IRStmt.Tmp: destination tmp is assigned more than once"); 4373 break; 4374 case Ist_LoadG: 4375 lg = stmt->Ist.LoadG.details; 4376 if (lg->dst < 0 || lg->dst >= n_temps) 4377 sanityCheckFail(bb, stmt, 4378 "IRStmt.LoadG: destination tmp is out of range"); 4379 def_counts[lg->dst]++; 4380 if (def_counts[lg->dst] > 1) 4381 sanityCheckFail(bb, stmt, 4382 "IRStmt.LoadG: destination tmp is assigned more than once"); 4383 break; 4384 case Ist_Dirty: 4385 d = stmt->Ist.Dirty.details; 4386 if (d->tmp != IRTemp_INVALID) { 4387 if (d->tmp < 0 || d->tmp >= n_temps) 4388 sanityCheckFail(bb, stmt, 4389 "IRStmt.Dirty: destination tmp is out of range"); 4390 def_counts[d->tmp]++; 4391 if (def_counts[d->tmp] > 1) 4392 sanityCheckFail(bb, stmt, 4393 "IRStmt.Dirty: destination tmp is assigned more than once"); 4394 } 4395 break; 4396 case Ist_CAS: 4397 cas = stmt->Ist.CAS.details; 4398 if (cas->oldHi != IRTemp_INVALID) { 4399 if (cas->oldHi < 0 || cas->oldHi >= n_temps) 4400 sanityCheckFail(bb, stmt, 4401 "IRStmt.CAS: destination tmpHi is out of range"); 4402 def_counts[cas->oldHi]++; 4403 if (def_counts[cas->oldHi] > 1) 4404 sanityCheckFail(bb, stmt, 4405 "IRStmt.CAS: destination tmpHi is assigned more than once"); 4406 } 4407 if (cas->oldLo < 0 || cas->oldLo >= n_temps) 4408 sanityCheckFail(bb, stmt, 4409 "IRStmt.CAS: destination tmpLo is out of range"); 4410 def_counts[cas->oldLo]++; 4411 if (def_counts[cas->oldLo] > 1) 4412 sanityCheckFail(bb, stmt, 4413 "IRStmt.CAS: destination tmpLo is assigned more than once"); 4414 break; 4415 case Ist_LLSC: 4416 if (stmt->Ist.LLSC.result < 0 || stmt->Ist.LLSC.result >= n_temps) 4417 sanityCheckFail(bb, stmt, 4418 "IRStmt.LLSC: destination tmp is out of range"); 4419 def_counts[stmt->Ist.LLSC.result]++; 4420 if (def_counts[stmt->Ist.LLSC.result] > 1) 4421 sanityCheckFail(bb, stmt, 4422 "IRStmt.LLSC: destination tmp is assigned more than once"); 4423 break; 4424 default: 4425 /* explicitly handle the rest, so as to keep gcc quiet */ 4426 break; 4427 } 4428 } 4429 4430 /* Typecheck everything. */ 4431 for (i = 0; i < bb->stmts_used; i++) 4432 if (bb->stmts[i]) 4433 tcStmt( bb, bb->stmts[i], guest_word_size ); 4434 if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size) 4435 sanityCheckFail(bb, NULL, "bb->next field has wrong type"); 4436 /* because it would intersect with host_EvC_* */ 4437 if (bb->offsIP < 16) 4438 sanityCheckFail(bb, NULL, "bb->offsIP: too low"); 4439 4440} 4441 4442/*---------------------------------------------------------------*/ 4443/*--- Misc helper functions ---*/ 4444/*---------------------------------------------------------------*/ 4445 4446Bool eqIRConst ( IRConst* c1, IRConst* c2 ) 4447{ 4448 if (c1->tag != c2->tag) 4449 return False; 4450 4451 switch (c1->tag) { 4452 case Ico_U1: return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) ); 4453 case Ico_U8: return toBool( c1->Ico.U8 == c2->Ico.U8 ); 4454 case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 ); 4455 case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 ); 4456 case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 ); 4457 case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 ); 4458 case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i ); 4459 case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 ); 4460 case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i ); 4461 case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 ); 4462 case Ico_V256: return toBool( c1->Ico.V256 == c2->Ico.V256 ); 4463 default: vpanic("eqIRConst"); 4464 } 4465} 4466 4467Bool eqIRRegArray ( IRRegArray* descr1, IRRegArray* descr2 ) 4468{ 4469 return toBool( descr1->base == descr2->base 4470 && descr1->elemTy == descr2->elemTy 4471 && descr1->nElems == descr2->nElems ); 4472} 4473 4474Int sizeofIRType ( IRType ty ) 4475{ 4476 switch (ty) { 4477 case Ity_I8: return 1; 4478 case Ity_I16: return 2; 4479 case Ity_I32: return 4; 4480 case Ity_I64: return 8; 4481 case Ity_I128: return 16; 4482 case Ity_F32: return 4; 4483 case Ity_F64: return 8; 4484 case Ity_F128: return 16; 4485 case Ity_D32: return 4; 4486 case Ity_D64: return 8; 4487 case Ity_D128: return 16; 4488 case Ity_V128: return 16; 4489 case Ity_V256: return 32; 4490 default: vex_printf("\n"); ppIRType(ty); vex_printf("\n"); 4491 vpanic("sizeofIRType"); 4492 } 4493} 4494 4495IRType integerIRTypeOfSize ( Int szB ) 4496{ 4497 switch (szB) { 4498 case 8: return Ity_I64; 4499 case 4: return Ity_I32; 4500 case 2: return Ity_I16; 4501 case 1: return Ity_I8; 4502 default: vpanic("integerIRTypeOfSize"); 4503 } 4504} 4505 4506IRExpr* mkIRExpr_HWord ( HWord hw ) 4507{ 4508 vassert(sizeof(void*) == sizeof(HWord)); 4509 if (sizeof(HWord) == 4) 4510 return IRExpr_Const(IRConst_U32((UInt)hw)); 4511 if (sizeof(HWord) == 8) 4512 return IRExpr_Const(IRConst_U64((ULong)hw)); 4513 vpanic("mkIRExpr_HWord"); 4514} 4515 4516IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr, 4517 IRExpr** args ) 4518{ 4519 IRDirty* d = emptyIRDirty(); 4520 d->cee = mkIRCallee ( regparms, name, addr ); 4521 d->guard = IRExpr_Const(IRConst_U1(True)); 4522 d->args = args; 4523 return d; 4524} 4525 4526IRDirty* unsafeIRDirty_1_N ( IRTemp dst, 4527 Int regparms, const HChar* name, void* addr, 4528 IRExpr** args ) 4529{ 4530 IRDirty* d = emptyIRDirty(); 4531 d->cee = mkIRCallee ( regparms, name, addr ); 4532 d->guard = IRExpr_Const(IRConst_U1(True)); 4533 d->args = args; 4534 d->tmp = dst; 4535 return d; 4536} 4537 4538IRExpr* mkIRExprCCall ( IRType retty, 4539 Int regparms, const HChar* name, void* addr, 4540 IRExpr** args ) 4541{ 4542 return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ), 4543 retty, args ); 4544} 4545 4546Bool eqIRAtom ( IRExpr* a1, IRExpr* a2 ) 4547{ 4548 vassert(isIRAtom(a1)); 4549 vassert(isIRAtom(a2)); 4550 if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp) 4551 return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp); 4552 if (a1->tag == Iex_Const && a2->tag == Iex_Const) 4553 return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con); 4554 return False; 4555} 4556 4557/*---------------------------------------------------------------*/ 4558/*--- end ir_defs.c ---*/ 4559/*---------------------------------------------------------------*/ 4560