vfp.c revision 663860b1408516d02ebfcb3a9999a134e6cfb223 
1#include <stdio.h>
2
3unsigned int mem[] = {
4   0x4095A266, 0x66666666,
5   0xBFF00000, 0x00000000,
6   0x3FF00000, 0x00000000,
7   0x252a2e2b, 0x262d2d2a,
8   0xFFFFFFFF, 0xFFFFFFFF,
9   0x41D26580, 0xB487E5C9,
10   0x42026580, 0xB750E388,
11   0x3E45798E, 0xE2308C3A,
12   0x3FBF9ADD, 0x3746F65F
13};
14
15float fs_f[] = {
16   0, 456.2489562, 3, -1,
17   1384.6, -7.2945676, 1000000000, -5786.47,
18   1752, 0.0024575, 0.00000001, -248562.76,
19   -45786.476, 456.2489562, 34.00046, 45786.476,
20   1752065, 107, -45667.24, -7.2945676,
21   -347856.475, 356047.56, -1.0, 23.04
22};
23
24double fs_d[] = {
25   0, 456.2489562, 3, -1,
26   1384.6, -7.2945676, 1000000000, -5786.47,
27   1752, 0.0024575, 0.00000001, -248562.76,
28   -45786.476, 456.2489562, 34.00046, 45786.476,
29   1752065, 107, -45667.24, -7.2945676,
30   -347856.475, 356047.56, -1.0, 23.04
31};
32
33double mem1[] = {
34   0, 0, 0, 0,
35   0, 0, 0, 0,
36   0, 0, 0, 0,
37   0, 0, 0, 0
38};
39
40float mem1f[] = {
41   0, 0, 0, 0,
42   0, 0, 0, 0,
43   0, 0, 0, 0,
44   0, 0, 0, 0
45};
46// ldc1 $f0, 0($t1)
47#define TESTINSN5LOAD(instruction, RTval, offset, RT) \
48{ \
49    double out; \
50    int out1; \
51    int out2; \
52   __asm__ volatile( \
53     "move $t1, %3\n\t" \
54     "li $t0, " #RTval"\n\t" \
55     instruction "\n\t" \
56     "mov.d %0, $" #RT "\n\t" \
57     "mfc1 %1, $" #RT "\n\t" \
58     "mfc1 %2, $f1\n\t" \
59     : "=&f" (out), "=&r" (out1), "=&r" (out2) \
60	 : "r" (mem), "r" (RTval) \
61	 : "cc", "memory" \
62	 ); \
63   printf("%s :: ft 0x%x%x\n", \
64          instruction, out1, out2); \
65}
66
67// lwc1 $f0, 0($t1)
68#define TESTINSN5LOADw(instruction, RTval, offset, RT) \
69{ \
70    double out; \
71    int out1; \
72   __asm__ volatile( \
73     "move $t1, %2\n\t" \
74     "li $t0, " #RTval"\n\t" \
75     instruction "\n\t" \
76     "mov.d %0, $" #RT "\n\t" \
77     "mfc1 %1, $" #RT "\n\t" \
78     : "=&f" (out), "=&r" (out1) \
79	 : "r" (mem), "r" (RTval) \
80	 : "cc", "memory" \
81	 ); \
82   printf("%s :: ft 0x%x\n", \
83          instruction, out1); \
84}
85
86// lwxc1 $f0, $a3($v0)
87#define TESTINSN6LOADw(instruction, indexVal, fd, index, base) \
88{ \
89    int out; \
90   __asm__ volatile( \
91     "move $" #base ", %1\n\t" \
92     "li $" #index ", " #indexVal"\n\t" \
93     instruction "\n\t" \
94     "mfc1 %0, $" #fd "\n\t" \
95     : "=&r" (out) \
96	 : "r" (mem) \
97	 : "cc", "memory" \
98	 ); \
99   printf("%s :: ft 0x%x\n", \
100          instruction, out); \
101}
102
103// ldxc1 $f0, $a3($v0)
104#define TESTINSN6LOADd(instruction, indexVal, fd, index, base) \
105{ \
106    int out; \
107    int out1; \
108    int out2; \
109   __asm__ volatile( \
110     "move $" #base ", %3\n\t" \
111     "li $" #index ", " #indexVal"\n\t" \
112     instruction "\n\t" \
113     "mov.d %0, $" #fd "\n\t" \
114     "mfc1 %1, $" #fd "\n\t" \
115     "mfc1 %2, $f1\n\t" \
116     : "=&f" (out), "=&r" (out1), "=&r" (out2) \
117	 : "r" (mem) \
118	 : "cc", "memory" \
119	 ); \
120   printf("%s :: ft 0x%x\n", \
121          instruction, out); \
122}
123// sdc1 $f0, 0($t0)
124#define TESTINST1(offset) \
125{ \
126    unsigned int out; \
127   __asm__ volatile( \
128     "move $t0, %1\n\t" \
129     "move $t1, %2\n\t" \
130     "ldc1 $f0, "#offset"($t1)\n\t" \
131     "sdc1 $f0, "#offset"($t0) \n\t" \
132     "lw %0, "#offset"($t0)\n\t" \
133     : "=&r" (out) \
134	 : "r" (mem1), "r" (fs_d) \
135	 : "t1", "t0", "cc", "memory" \
136	 ); \
137   printf("sdc1 $f0, 0($t0) :: out: 0x%x\n", \
138           out); \
139}
140
141// sdxc1 $f0, $t2($t0)
142#define TESTINST1a(offset) \
143{ \
144    unsigned int out; \
145    unsigned int out1; \
146   __asm__ volatile( \
147     "move $t0, %2\n\t" \
148     "move $t1, %3\n\t" \
149     "li $t2, "#offset"\n\t" \
150     "ldc1 $f0, "#offset"($t1)\n\t" \
151     "sdxc1 $f0, $t2($t0) \n\t" \
152     "lw %0, "#offset"($t0)\n\t" \
153     "addi $t0, $t0, 4 \n\t" \
154     "lw %1, "#offset"($t0)\n\t" \
155     : "=&r" (out), "=&r" (out1) \
156	 : "r" (mem1), "r" (fs_d) \
157	 : "t2", "t1", "t0", "cc", "memory" \
158	 ); \
159   printf("sdc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \
160           out, out1); \
161}
162
163// swc1 $f0, 0($t0)
164#define TESTINST2(offset) \
165{ \
166    unsigned int out; \
167   __asm__ volatile( \
168     "move $t0, %1\n\t" \
169     "move $t1, %2\n\t" \
170     "lwc1 $f0, "#offset"($t1)\n\t" \
171     "swc1 $f0, "#offset"($t0) \n\t" \
172     "lw %0, "#offset"($t0)\n\t" \
173     : "=&r" (out) \
174	 : "r" (mem1f), "r" (fs_f) \
175	 : "t1", "t0", "cc", "memory" \
176	 ); \
177   printf("swc1 $f0, 0($t0) :: out: 0x%x\n", \
178           out); \
179}
180
181// SWXC1 $f0, $t2($t0)
182#define TESTINST2a(offset) \
183{ \
184    unsigned int out; \
185   __asm__ volatile( \
186     "move $t0, %1\n\t" \
187     "move $t1, %2\n\t" \
188     "li $t2, "#offset" \n\t" \
189     "lwc1 $f0, "#offset"($t1)\n\t" \
190     "swxc1 $f0, $t2($t0) \n\t" \
191     "lw %0, "#offset"($t0)\n\t" \
192     : "=&r" (out) \
193	 : "r" (mem1f), "r" (fs_f) \
194	 : "t2", "t1", "t0", "cc", "memory" \
195	 ); \
196   printf("swxc1 $f0, 0($t0) :: out: 0x%x\n", \
197           out); \
198}
199void ppMem(double *mem, int len)
200{
201   int i;
202   printf("MEM1:\n");
203   for (i = 0; i < len; i=i+4)
204   {
205      printf("%lf, %lf, %lf, %lf\n", mem[i], mem[i+1], mem[i+2], mem[i+3]);
206      mem[i] = 0;
207      mem[i+1] = 0;
208      mem[i+2] = 0;
209      mem[i+3] = 0;
210   }
211}
212
213void ppMemF(float *mem, int len)
214{
215   int i;
216   printf("MEM1:\n");
217   for (i = 0; i < len; i=i+4)
218   {
219      printf("%lf, %lf, %lf, %lf\n", mem[i], mem[i+1], mem[i+2], mem[i+3]);
220      mem[i] = 0;
221      mem[i+1] = 0;
222      mem[i+2] = 0;
223      mem[i+3] = 0;
224   }
225}
226
227int main()
228{
229   printf("LDC1\n");
230   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
231   TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
232   TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
233   TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
234   TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
235   TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
236   TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
237   TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
238   TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0);
239   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
240   TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
241   TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
242   TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
243   TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
244   TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
245   TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
246   TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
247   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
248   TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
249   TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
250   TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
251   TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
252   TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
253   TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
254   TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
255   TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0);
256   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
257
258   printf("LWC1\n");
259   TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
260   TESTINSN5LOADw("lwc1 $f0, 4($t1)", 0, 4, f0);
261   TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0);
262   TESTINSN5LOADw("lwc1 $f0, 12($t1)", 0, 12, f0);
263   TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0);
264   TESTINSN5LOADw("lwc1 $f0, 20($t1)", 0, 20, f0);
265   TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0);
266   TESTINSN5LOADw("lwc1 $f0, 28($t1)", 0, 28, f0);
267   TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0);
268   TESTINSN5LOADw("lwc1 $f0, 36($t1)", 0, 36, f0);
269   TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0);
270   TESTINSN5LOADw("lwc1 $f0, 44($t1)", 0, 44, f0);
271   TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0);
272   TESTINSN5LOADw("lwc1 $f0, 52($t1)", 0, 52, f0);
273   TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0);
274   TESTINSN5LOADw("lwc1 $f0, 60($t1)", 0, 60, f0);
275   TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0);
276   TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
277   TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0);
278   TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0);
279   TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0);
280   TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0);
281   TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0);
282   TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0);
283   TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0);
284   TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0);
285   TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
286
287#if (__mips==32) && (__mips_isa_rev>=2)
288   printf("LWXC1\n");
289   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0);
290   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0);
291   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0);
292   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0);
293   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0);
294   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0);
295   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0);
296   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0);
297   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0);
298   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0);
299   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0);
300   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0);
301   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0);
302   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0);
303   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0);
304   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 60, f0, a3, v0);
305   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 64, f0, a3, v0);
306   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0);
307   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0);
308   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0);
309   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0);
310   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0);
311   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0);
312   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0);
313   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0);
314   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0);
315   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0);
316   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0);
317   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0);
318   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0);
319   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0);
320   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0);
321
322   printf("LDXC1\n");
323   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
324   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
325   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
326   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
327   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
328   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
329   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
330   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
331   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
332   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
333   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
334   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
335   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
336   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
337   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
338   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
339   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
340   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
341   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
342   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
343   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
344   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
345   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
346   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
347   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
348   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
349   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
350   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
351   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
352   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
353   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
354   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
355#endif
356
357   printf("SDC1\n");
358   TESTINST1(0);
359   TESTINST1(8);
360   TESTINST1(16);
361   TESTINST1(24);
362   TESTINST1(32);
363   TESTINST1(40);
364   TESTINST1(48);
365   TESTINST1(56);
366   TESTINST1(64);
367   ppMem(mem1, 16);
368
369#if (__mips==32) && (__mips_isa_rev>=2)
370   printf("SDXC1\n");
371   TESTINST1a(0);
372   TESTINST1a(8);
373   TESTINST1a(16);
374   TESTINST1a(24);
375   TESTINST1a(32);
376   TESTINST1a(40);
377   TESTINST1a(48);
378   TESTINST1a(56);
379   TESTINST1a(64);
380   ppMem(mem1, 16);
381#endif
382
383   printf("SWC1\n");
384   TESTINST2(0);
385   TESTINST2(8);
386   TESTINST2(16);
387   TESTINST2(24);
388   TESTINST2(32);
389   TESTINST2(40);
390   TESTINST2(48);
391   TESTINST2(56);
392   TESTINST2(64);
393   ppMemF(mem1f, 16);
394
395#if (__mips==32) && (__mips_isa_rev>=2)
396   printf("SWXC1\n");
397   TESTINST2a(0);
398   TESTINST2a(8);
399   TESTINST2a(16);
400   TESTINST2a(24);
401   TESTINST2a(32);
402   TESTINST2a(40);
403   TESTINST2a(48);
404   TESTINST2a(56);
405   TESTINST2a(64);
406   ppMemF(mem1f, 16);
407#endif
408
409   return 0;
410}
411
412