Makefile.am revision 436e89c602e787e7a27dd6624b09beed41a0da8a
1
2include $(top_srcdir)/Makefile.tool-tests.am
3
4dist_noinst_SCRIPTS = filter_stderr
5
6EXTRA_DIST = \
7	arithmetic_instruction.stdout.exp-mips64 \
8	arithmetic_instruction.stdout.exp-mips64r2 arithmetic_instruction.stderr.exp \
9	arithmetic_instruction.vgtest \
10	branch_and_jump_instructions.stdout.exp \
11	branch_and_jump_instructions.stderr.exp branch_and_jump_instructions.vgtest \
12	branches.stdout.exp branches.stderr.exp branches.vgtest \
13	cvm_ins.stdout.exp cvm_ins.stdout.exp-non-octeon \
14	cvm_ins.stderr.exp cvm_ins.vgtest \
15	cvm_lx_ins.stdout.exp-LE cvm_lx_ins.stdout.exp-BE \
16	cvm_lx_ins.stdout.exp-non-octeon \
17	cvm_lx_ins.stderr.exp cvm_lx_ins.vgtest \
18	extract_insert_bit_field.stdout.exp-mips64 \
19	extract_insert_bit_field.stdout.exp-mips64r2 \
20	extract_insert_bit_field.stderr.exp extract_insert_bit_field.vgtest \
21	fpu_arithmetic.stdout.exp fpu_arithmetic.stderr.exp fpu_arithmetic.vgtest \
22	fpu_branches.stdout.exp fpu_branches.stderr.exp fpu_branches.vgtest \
23	fpu_control_word.stdout.exp fpu_control_word.stderr.exp \
24	fpu_control_word.vgtest \
25	fpu_load_store.stdout.exp-BE fpu_load_store.stdout.exp-LE \
26	fpu_load_store.stderr.exp fpu_load_store.vgtest \
27	load_indexed_instructions.stdout.exp-BE \
28	load_indexed_instructions.stdout.exp-LE \
29	load_indexed_instructions.stdout.exp-non-octeon \
30	load_indexed_instructions.stderr.exp load_indexed_instructions.vgtest \
31	load_store.stdout.exp-BE load_store.stdout.exp-LE load_store.stderr.exp \
32	load_store.vgtest \
33	load_store_multiple.stdout.exp-BE load_store_multiple.stdout.exp-LE \
34	load_store_multiple.stderr.exp load_store_multiple.vgtest \
35	load_store_unaligned.stdout.exp load_store_unaligned.stderr.exp \
36	load_store_unaligned.vgtest \
37	logical_instructions.stdout.exp logical_instructions.stderr.exp \
38	logical_instructions.vgtest \
39	move_instructions.stdout.exp-BE move_instructions.stdout.exp-LE \
40	move_instructions.stderr.exp move_instructions.vgtest \
41	rotate_swap.stdout.exp-mips64 rotate_swap.stdout.exp-mips64r2 \
42	rotate_swap.stderr.exp rotate_swap.vgtest \
43	round.stdout.exp round.stderr.exp round.vgtest \
44	shift_instructions.stdout.exp-mips64 shift_instructions.stdout.exp-mips64r2 \
45	shift_instructions.stderr.exp shift_instructions.vgtest \
46	test_block_size.stdout.exp test_block_size.stderr.exp \
47	test_block_size.vgtest \
48	test_fcsr.stdout.exp test_fcsr.stderr.exp \
49	test_fcsr.vgtest \
50	test_math.stdout.exp test_math.stderr.exp test_math.vgtest \
51	unaligned_load.stdout.exp-BE unaligned_load.stdout.exp-LE \
52	unaligned_load.stderr.exp unaligned_load.vgtest \
53	unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \
54	unaligned_load_store.stderr.exp unaligned_load_store.vgtest \
55	const.h macro_fpu.h macro_int.h macro_load_store.h rounding_mode.h
56
57check_PROGRAMS = \
58	allexec \
59	arithmetic_instruction \
60	branch_and_jump_instructions \
61	branches \
62	cvm_ins \
63	cvm_lx_ins \
64	extract_insert_bit_field \
65	fpu_arithmetic \
66	fpu_branches \
67	fpu_control_word \
68	fpu_load_store \
69	load_indexed_instructions \
70	load_store \
71	load_store_multiple \
72	load_store_unaligned \
73	logical_instructions \
74	move_instructions \
75	rotate_swap \
76	round \
77	shift_instructions \
78	test_block_size \
79	test_fcsr \
80	test_math \
81	unaligned_load \
82	unaligned_load_store
83
84AM_CFLAGS    += @FLAG_M64@
85AM_CXXFLAGS  += @FLAG_M64@
86AM_CCASFLAGS += @FLAG_M64@
87
88allexec_CFLAGS          = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
89
90cvm_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON@
91cvm_lx_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
92load_indexed_instructions_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
93fpu_arithmetic_CFLAGS = $(AM_CFLAGS) -lm
94
95# C++ tests
96test_math_SOURCES          = test_math.cpp
97