1ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// Copyright 2013, ARM Limited 2ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// All rights reserved. 3ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// 4ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// Redistribution and use in source and binary forms, with or without 5ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// modification, are permitted provided that the following conditions are met: 6ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// 7ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// * Redistributions of source code must retain the above copyright notice, 8ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// this list of conditions and the following disclaimer. 9ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// * Redistributions in binary form must reproduce the above copyright notice, 10ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// this list of conditions and the following disclaimer in the documentation 11ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// and/or other materials provided with the distribution. 12ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// * Neither the name of ARM Limited nor the names of its contributors may be 13ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// used to endorse or promote products derived from this software without 14ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// specific prior written permission. 15ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// 16ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 27ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl#include "examples.h" 28ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 29ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl#define BUF_SIZE (4096) 30ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl#define __ masm-> 31ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 32ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixlvoid GenerateAbs(MacroAssembler* masm) { 33ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // int64_t abs(int64_t x) 34ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // Argument location: 35ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // x -> x0 36ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 37ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // This example uses a conditional instruction (cneg) to compute the 38ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // absolute value of an integer. 39ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl __ Cmp(x0, 0); 40ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl __ Cneg(x0, x0, mi); 41ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl __ Ret(); 42ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl} 43ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 44ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 45ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl#ifndef TEST_EXAMPLES 46ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixlint main(void) { 47ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // Create and initialize the assembler and the simulator. 48ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl byte assm_buf[BUF_SIZE]; 49ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl MacroAssembler masm(assm_buf, BUF_SIZE); 50ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl Decoder decoder; 51ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl Simulator simulator(&decoder); 52ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 53ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // Generate the code for the example function. 54ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl Label abs; 55ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl masm.Bind(&abs); 56ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl GenerateAbs(&masm); 57ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl masm.FinalizeCode(); 58ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 59ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl // Run the example function. 60ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl int64_t input_value = -42; 61ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl simulator.set_xreg(0, input_value); 62ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl simulator.RunFrom(abs.target()); 63ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl printf("abs(%ld) = %ld\n", input_value, simulator.xreg(0)); 64ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl 65ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl return 0; 66ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl} 67ad96eda8944ab1c1ba55715c50d9d6f0a3ed1dcarmvixl#endif 68