1/*
2 * Copyright (c) 2011 Intel Corporation. All Rights Reserved.
3 * Copyright (c) Imagination Technologies Limited, UK
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial portions
15 * of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
20 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#ifndef _COREFLAGS_H_
27#define _COREFLAGS_H_
28
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34
35#define SERIALIZED_PIPES 1
36
37
38#if defined(ENCFMT_H264MVC) || !defined(TOPAZ_MTX_HW)
39#	define ENCFMT_H264
40#	define _ENABLE_MVC_        /* Defined for enabling MVC specific code */
41#	define _MVC_RC_  1         /* Defined for enabling MVC rate control code, later on it will be replaced by _ENABLE_MVC_ */
42#endif
43
44#if defined(RCMODE_ALL) && !defined(ENCFMT_H264)
45	#		error "H264 is not defined when RCMODE is ALL."
46#endif
47
48#if defined(RCMODE_ALL) && (defined(ENCFMT_JPEG) || defined(ENCFMT_JPEG) || defined(ENCFMT_JPEG) || defined(ENCFMT_MPG4) || defined(ENCFMT_MPG2) || defined(ENCFMT_H263) || defined(ENCFMT_H264MVC))
49	#		error "RCMODE_ALL is only allowed for H264."
50#endif
51
52#if defined(RCMODE_ALL) || !defined(TOPAZ_MTX_HW)
53#	define RCMODE_CBR
54#	define RCMODE_VBR
55#	define RCMODE_VCM
56#	define __COREFLAGS_RC_ALLOWED__ 1
57#endif
58
59#define TOPAZHP_MAX_NUM_STREAMS 2
60
61/*
62	Hierarhical B picture support is disabled:
63		* for H264 VCM mode, as VCM mode is not expected to use B pictures at all
64*/
65#if  !defined(TOPAZ_MTX_HW) || \
66		(defined(ENCFMT_H264) && !(defined(RCMODE_VCM))) \
67		|| defined(RCMODE_ALL)
68#	define INCLUDE_HIER_SUPPORT	1
69#else
70#	define INCLUDE_HIER_SUPPORT	0
71#endif
72
73// Add this back in for SEI inclusion
74#if !defined(RCMODE_NONE)
75#	if  (!defined(TOPAZ_MTX_HW) || ((defined(RCMODE_VBR) || defined(RCMODE_CBR) || defined(RCMODE_VCM) || defined(RCMODE_LLRC)) && defined(ENCFMT_H264)))
76#		define SEI_INSERTION 1
77#	endif
78#endif
79
80#if	(!defined(TOPAZ_MTX_HW) || defined(ENCFMT_H264))
81#	define WEIGHTED_PREDICTION 1
82#	define MULTI_REF_P
83#	define LONG_TERM_REFS
84#	define CUSTOM_QUANTIZATION
85#endif
86
87// Firmware bias table control is not compatible with parallel encoding
88//#define FIRMWARE_BIAS
89
90/* This define controls whether the hard VCM bitrate limit is applied to I frames */
91//#define TOPAZHP_IMPOSE_VCM_BITRATE_LIMIT_ON_INTRA
92
93#if INCLUDE_HIER_SUPPORT
94#if ( !defined(TOPAZ_MTX_HW) || !defined(ENCFMT_H264MVC) )
95#	define MAX_REF_B_LEVELS_FW	(MAX_REF_B_LEVELS)
96#else
97#	define MAX_REF_B_LEVELS_FW	2
98#endif
99#else
100#	define MAX_REF_B_LEVELS_FW	0
101#endif
102
103#ifdef MULTI_REF_P
104#	define MAX_REF_I_OR_P_LEVELS_FW	(MAX_REF_I_OR_P_LEVELS)
105#else
106#	define MAX_REF_I_OR_P_LEVELS_FW	2
107#endif
108
109#define MAX_REF_LEVELS_FW	(MAX_REF_B_LEVELS_FW + MAX_REF_I_OR_P_LEVELS_FW)
110#define MAX_PIC_NODES_FW	(MAX_REF_LEVELS_FW + 1)
111
112
113#if defined(TOPAZ_MTX_HW)
114#	if defined(ENABLE_FORCED_INLINE)
115/*
116	__attribute__((always_inline)) should be only used when all C code is compiled by
117	GCC to a blob object with `-combine` swithch.
118*/
119#		define MTX_INLINE  inline __attribute__((always_inline))
120#else
121#		define MTX_INLINE  inline
122#endif
123#else
124#	define MTX_INLINE
125#endif
126
127/*
128	Check that only one `RCMODE_` symbol is defined.
129
130	If `RCMODE_NONE` is set, block any possebility for RC sources to be included.
131*/
132
133
134#if defined(RCMODE_NONE)
135#	define __COREFLAGS_RC_ALLOWED__	0
136#else
137#	define __COREFLAGS_RC_ALLOWED__ 1
138#endif
139
140/*
141	Determine possible rate control modes.
142*/
143#if !defined(TOPAZ_MTX_HW)
144#	define	CBR_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
145#	define  VCM_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
146#	define  VBR_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
147#	define  ERC_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
148#else
149#	if defined(RCMODE_CBR)
150#		define	CBR_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
151#	else
152#		define	CBR_RC_MODE_POSSIBLE	FALSE
153#	endif
154#	if defined(ENCFMT_H264) && (defined(RCMODE_VCM) || defined(RCMODE_LLRC))
155		/* VCM is possible only for H264 */
156#		define  VCM_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
157#	else
158#		define	VCM_RC_MODE_POSSIBLE	FALSE
159#	endif
160#	if defined(RCMODE_VBR)
161#		define  VBR_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
162#	else
163#		define	VBR_RC_MODE_POSSIBLE	FALSE
164#	endif
165#	if defined(RCMODE_ERC)
166#		define  ERC_RC_MODE_POSSIBLE	__COREFLAGS_RC_ALLOWED__
167#	else
168#		define	ERC_RC_MODE_POSSIBLE	FALSE
169#	endif
170#endif
171
172
173#define RATE_CONTROL_AVAILABLE (\
174		CBR_RC_MODE_POSSIBLE || VCM_RC_MODE_POSSIBLE || \
175		VBR_RC_MODE_POSSIBLE || ERC_RC_MODE_POSSIBLE\
176	)
177#define RC_MODE_POSSIBLE(MODE) (MODE ## _RC_MODE_POSSIBLE)
178
179#define RC_MODES_POSSIBLE2(M1, M2) \
180	(RC_MODE_POSSIBLE(M1) || RC_MODE_POSSIBLE(M2))
181
182#define RC_MODES_POSSIBLE3(M1, M2, M3) \
183	(RC_MODES_POSSIBLE2(M1, M2) || RC_MODE_POSSIBLE(M3))
184
185/*
186	Declare `CUR_ENCODE_RC_MODE` as proper function only in FAKE_MTX.
187	Alternatively, declare it as constant.
188*/
189#if defined(FAKE_MTX) || defined(RCMODE_ALL)
190#	define	CUR_ENCODE_RC_MODE (GLOBALS(g_sEncContext).eRCMode)
191#elif defined(RCMODE_NONE)
192#	define CUR_ENCODE_RC_MODE (IMG_RCMODE_NONE)
193#elif defined(RCMODE_CBR)
194#	define CUR_ENCODE_RC_MODE (IMG_RCMODE_CBR)
195#elif defined(RCMODE_VBR)
196#	define CUR_ENCODE_RC_MODE (IMG_RCMODE_VBR)
197#elif defined(RCMODE_ERC)
198#	define CUR_ENCODE_RC_MODE (IMG_RCMODE_ERC)
199#elif defined(RCMODE_LLRC)
200#	define CUR_ENCODE_RC_MODE (IMG_RCMODE_LLRC)
201#elif defined(RCMODE_VCM)
202#	define CUR_ENCODE_RC_MODE (IMG_RCMODE_VCM)
203#endif
204
205
206#define USE_VCM_HW_SUPPORT 1
207
208#define INPUT_SCALER_SUPPORTED 0	/* controls the firmwares ability to support the optional hardware input scaler */
209
210#define SECURE_MODE_POSSIBLE 1		/* controls the firmwares ability to support secure mode firmware upload */
211
212#endif  // #ifndef _COREFLAGS_H_
213