17e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang/* 2f91c8768670386683a281cc39141e21bdda9c97fKun Wang * Copyright (c) 2011 Intel Corporation. All Rights Reserved. 33f3d1e8746d2b793c982ac19a73061e006b1b178Kun Wang * Copyright (c) Imagination Technologies Limited, UK 47e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang * 5f91c8768670386683a281cc39141e21bdda9c97fKun Wang * Permission is hereby granted, free of charge, to any person obtaining a 6f91c8768670386683a281cc39141e21bdda9c97fKun Wang * copy of this software and associated documentation files (the 7f91c8768670386683a281cc39141e21bdda9c97fKun Wang * "Software"), to deal in the Software without restriction, including 8f91c8768670386683a281cc39141e21bdda9c97fKun Wang * without limitation the rights to use, copy, modify, merge, publish, 9f91c8768670386683a281cc39141e21bdda9c97fKun Wang * distribute, sub license, and/or sell copies of the Software, and to 10f91c8768670386683a281cc39141e21bdda9c97fKun Wang * permit persons to whom the Software is furnished to do so, subject to 11f91c8768670386683a281cc39141e21bdda9c97fKun Wang * the following conditions: 123f3d1e8746d2b793c982ac19a73061e006b1b178Kun Wang * 13f91c8768670386683a281cc39141e21bdda9c97fKun Wang * The above copyright notice and this permission notice (including the 14f91c8768670386683a281cc39141e21bdda9c97fKun Wang * next paragraph) shall be included in all copies or substantial portions 15f91c8768670386683a281cc39141e21bdda9c97fKun Wang * of the Software. 163f3d1e8746d2b793c982ac19a73061e006b1b178Kun Wang * 17f91c8768670386683a281cc39141e21bdda9c97fKun Wang * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18f91c8768670386683a281cc39141e21bdda9c97fKun Wang * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19f91c8768670386683a281cc39141e21bdda9c97fKun Wang * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 20f91c8768670386683a281cc39141e21bdda9c97fKun Wang * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 21f91c8768670386683a281cc39141e21bdda9c97fKun Wang * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22f91c8768670386683a281cc39141e21bdda9c97fKun Wang * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23f91c8768670386683a281cc39141e21bdda9c97fKun Wang * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 247e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang */ 257e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 26f91c8768670386683a281cc39141e21bdda9c97fKun Wang 277e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang/*! 287e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang****************************************************************************** 297e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang @file : dma_api.h 307e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 317e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang @brief 327e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 337e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang @date 02/11/2005 347e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 357e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang \n<b>Description:</b>\n 367e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang This file contains header file for the MTX DMAC API. 377e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 387e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang The MTX DMAC API can operate synchronously or asynchronously. 397e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 40bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang In synchronous case, the API uses an internal callback function 41bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang to detect state transitions and the SEMA API to block whilst 42bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang waiting for the transfer to complete. 437e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 44bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang In the asynchronous case, the caller is responsible for 45bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang detecting and handling the state transitions and synchronising 46bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang with other processes/processing. 477e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 487e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang \n<b>Platform:</b>\n 497e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang MSVDX/MTX 507e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 517e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang******************************************************************************/ 527e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang/* 537e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang****************************************************************************** 547e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang Modifications :- 557e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 567e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang $Log: dma_api.h $ 577e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 58dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 597e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 60dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 617e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 62dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 637e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 64dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 657e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 66dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 677e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 68dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 697e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 70dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 717e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 72dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 737e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 74dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 757e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 76dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 777e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 78dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 797e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 80dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 817e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 82dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 837e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 84dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 857e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 86dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 877e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 88dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 897e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 90dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 917e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 92dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 937e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 94dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 957e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 96dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 977e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 98dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 997e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 100dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 1017e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 102dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun --- Revision Logs Removed --- 1037e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 1047e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 1057e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang*****************************************************************************/ 1067e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 1077e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 1087e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#if !defined (__DMA_API_H__) 1097e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#define __DMA_API_H__ 1107e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 1117e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#include <img_types.h> 1127e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#include "msvdx_dmac_regs_io2.h" 1137e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#include "msvdx_dmac_linked_list.h" 1147e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 1157e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#if (__cplusplus) 116bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wangextern "C" { 1177e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#endif 1187e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 119dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 120dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 121dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines the DMAC status 122dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 123dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 124bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_STATUS_IDLE, //!< The DMAC is idle. 125bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_STATUS_BUSY, //!< The DMAC is busy - a DMA is in progress. 126bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_STATUS_COMPLETE, /*!< The DMAC operation has completed - return by 127bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_GetStatus()once before the DMAC returns 128bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang to #DMA_STATUS_IDLE. */ 129bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_STATUS_TIMEOUT, /*!< The DMAC operation has timed-out - return by 130bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_GetStatus()once before the DMAC returns 131bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang to #DMA_STATUS_IDLE. */ 1327e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 133bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang } 134bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_eStatus; 135dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 136dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 137dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 138dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines the DMA channel Ids 139dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 140dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 141bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_CHANNEL_MTX = 0x0, //!< DMA channel for MTX 142bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_CHANNEL_RESERVED, //!< DMA channel 1 is reserved for VEC use 143bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_CHANNEL_SR1, //!< DMA channel for 1st shift register 144bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_CHANNEL_SR2, //!< DMA channel for 2nd shift register 145bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_CHANNEL_SR3, //!< DMA channel for 3rd shift register 146bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_CHANNEL_SR4, //!< DMA channel for 4th shift register 147dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 148dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_eChannelId; 149dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 150dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 151dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 152dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Used with DMA_SyncAction() and DMA_AsyncAction() to indicate whether 153dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun the peripheral is the mtx or not. 154dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 155dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun enum { 156bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_PERIPH_IS_NOT_MTX = 0, //!< The peripheral is not the mtx. 157bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_PERIPH_IS_MTX = 1, //!< The peripheral is the mtx. 158dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun }; 159dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 160dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 161dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 162dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines the byte swap settings. 163dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 164dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 165dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_BSWAP_NO_SWAP = 0x0, //!< No byte swapping will be performed. 166dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_BSWAP_REVERSE = 0x1, //!< Byte order will be reversed. 167dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 168dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_eBSwap; 169dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 170dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 171dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 172dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines the peripheral width settings 173dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 174dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 175dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_PWIDTH_32_BIT = 0x0, //!< Peripheral width 32-bit. 176dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_PWIDTH_16_BIT = 0x1, //!< Peripheral width 16-bit. 177dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_PWIDTH_8_BIT = 0x2, //!< Peripheral width 8-bit. 178dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 179dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_ePW; 180dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 181dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 182dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 183dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines the direction of the DMA transfer 184dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 185dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 186dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_DIR_MEM_TO_PERIPH = 0x0, //!< Data from memory to peripheral. 187dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_DIR_PERIPH_TO_MEM = 0x1, //!< Data from peripheral to memory. 188dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 189dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_eDir; 190dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 191dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 192dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 193dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines whether the peripheral address is to be incremented 194dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 195dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 196bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_PERIPH_INCR_ON = 0x1, //!< Peripheral address will be incremented 197bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_PERIPH_INCR_OFF = 0x0, //!< Peripheral address will not be incremented 198dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 199dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_ePeriphIncr; 200dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 201dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 202dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 203dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines how much the peripheral address is incremented by 204dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 205dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 206bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_PERIPH_INCR_1 = 0x2, //!< Increment peripheral address by 1 207bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_PERIPH_INCR_2 = 0x1, //!< Increment peripheral address by 2 208bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_PERIPH_INCR_4 = 0x0, //!< Increment peripheral address by 4 209dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 210dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_ePeriphIncrSize; 211dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 212dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 213dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 214dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines whether the 2d mode is enabled or disabled 215dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 216dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 217bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_MODE_2D_ON = 0x1, //!< the 2d mode will be used 218bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_MODE_2D_OFF = 0x0, //!< the 2d mode will not be used 219dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 220dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_eMode2D; 221dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 222dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 223dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 224dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 225dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD0 226dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 227dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 228dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 229dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 0 in a dmac linked list entry. 230dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 231bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList : pointer to start of linked list entry 232dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 233dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Input BSWAP : big/little endian byte swap (see DMA_eBSwap). 234dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 235bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input DIR : transfer direction (see DMA_eDir). 236dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 237bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input PW : peripheral width (see DMA_ePW). 238dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 239dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 240dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 241dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 242bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD0(pList, BSWAP, DIR, PW) \ 243bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do{ \ 244bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_BSWAP, BSWAP); \ 245bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_DIR, DIR); \ 246bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_PW, PW); \ 247bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang }while(0) 2487e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 2497e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 250dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 251dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 2527e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 253dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD1 2547e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 255dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 2567e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 257dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 1 in a dmac linked list entry. 2587e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 259bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList : pointer to start of linked list entry 2607e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 261bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input INCR : whether to increment the peripeheral address (see DMA_ePeriphIncr) 2627e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 263bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input PI : how much to increment the peripheral address by (see DMA_ePeriphIncrSize) 2647e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 265bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input LEN : length of transfer in peripheral width units 2667e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 267dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 268dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 269dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 270bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD1(pList, INCR, PI, LEN) \ 271bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do { \ 272bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_PI, PI); \ 273bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_INCR, INCR); \ 274bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_LEN, LEN); \ 275bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang }while(0) 2767e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 277dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 278dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 2797e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 280dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD2 2817e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 282dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 2837e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 284dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 2 in a dmac linked list entry. 2857e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 286bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList : pointer to start of linked list entry 2877e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 288bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input PERI_ADDR : the perihperal address to transfer to/from 2897e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 290dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 291dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 292dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 293bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD2(pList, PERI_ADDR) \ 294bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do { \ 295bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_ADDR, PERI_ADDR); \ 296bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang }while(0) 2977e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 298dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 299dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 3007e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 301dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD3 3027e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 303dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 3047e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 305dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 3 in a dmac linked list entry. 3067e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 307bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList : pointer to start of linked list entry 3087e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 309bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input ACC_DEL : access delay (see DMA_eAccDel) 3107e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 311bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input BURST : burst size (see DMA_eBurst) 3127e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 313dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 314dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 315dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 316bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD3(pList, ACC_DEL, BURST , EXTSA ) \ 317bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do { \ 318bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_ACC_DEL, ACC_DEL); \ 319bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_BURST, BURST); \ 320bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_EXT_SA, EXTSA); \ 321bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang }while(0) 3227e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 323dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 324dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 3257e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 326dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD4 3277e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 328dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 3297e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 330dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 4 in a dmac linked list entry. 3317e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 332bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList : pointer to start of linked list entry 3337e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 334bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input MODE_2D : enable/disable 2d mode (see DMA_eMode2D) 3357e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 336bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input REP_COUNT : repeat count (the number of rows transferred) 3377e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 338dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 339dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 340dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 341bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD4(pList, MODE_2D, REP_COUNT) \ 342bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do { \ 343bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_MODE_2D, MODE_2D); \ 344bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_REP_COUNT, REP_COUNT); \ 345bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang } while(0) 3467e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 347dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 348dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 3497e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 350dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD5 3517e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 352dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 3537e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 354dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 5 in a dmac linked list entry. 3557e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 356bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList : pointer to start of linked list entry 3577e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 358bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input LINE_ADD_OFF : number of bytes from the end of one row to the start of the next row 359bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (only applicable when using 2D transfer mode) 3607e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 361bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input ROW_LENGTH : number of bytes per row 362bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (only applicable when using 2D transfer mode) 3637e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 364dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 365dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 366dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 367bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD5(pList, LINE_ADD_OFF, ROW_LENGTH) \ 368bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do{ \ 369bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_LINE_ADD_OFF, LINE_ADD_OFF); \ 370bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_ROW_LENGTH, ROW_LENGTH); \ 371bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang }while(0) 3727e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 373dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 374dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 3757e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 376dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD6 3777e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 378dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 3797e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 380dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 6 in a dmac linked list entry. 3817e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 382bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList : pointer to start of linked list entry 3837e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 384bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input SA : the host memory address to transfer to/from 3857e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 386dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 387dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 388dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 389bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD6(pList, SA) \ 390bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do{ \ 391bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_SA, SA); \ 392bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang }while(0) 3937e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 394dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 395dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 3967e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 397dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_LL_SET_WD7 3987e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 399dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 4007e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 401dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Set word 7 in a dmac linked list entry. 4027e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 403bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pList: pointer to start of linked list entry 4047e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 405bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input LISTPTR: pointer to next linked list entry 4067e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 407dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun If the linked list entry is in MTX memory (eListLocation == DMA_LIST_IS_IN_MTX_MEM) then 408dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun LISTPTR is a pointer to the start of the next linked list entry. If the linked list entry 409dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun is in HOST memory (eListLocation == DMA_LIST_IS_IN_SYS_MEM) then LISTPTR is a pointer to the 410dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun start of the next linked list entry, but right shifted by 4 bits (i.e. ptr >> 4). If this 411dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun is the last entry in the linked list sequence then LISTPTR must be set to NULL. 4127e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 413dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return nothing 414dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 415dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 416bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_LL_SET_WD7(pList, LISTPTR) \ 417bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang do { \ 418bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_LISTPTR, LISTPTR); \ 419bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang MEMIO_WRITE_FIELD(pList, DMAC_LL_LIST_FIN, (LISTPTR) ? 0 : 1); \ 420bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang }while(0) 4217e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 4227e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 423dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 424dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 4257e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 426dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_VALUE_COUNT 4277e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 428dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 4297e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 430dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This MACRO is used to aid the generation of the ui32Count member of the DMA_sParams 431dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun structure required by DMA_SyncAction() and DMA_AsyncAction(). If this is not suitable 432dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun for a given application then the programmer is free to fill in the fields in any way they 433dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun see fit. 4347e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 435dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Input BSWAP : Big/little endian byte swap (see DMA_eBSwap). 4367e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 437dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Input PW : The width of the peripheral DMA register (see DMA_ePW). 4387e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 439dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Input DIR : The direction of the transfer (see DMA_eDir). 440dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 441bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input PERIPH_INCR : How much to increment the peripheral address by (see DMA_ePeriphIncr). 442dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 443bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input COUNT : The length of the transfer in transfer units. 444dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 445dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Return img_uint32 : The value of the generated word. 446dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 447dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 448bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_VALUE_COUNT(BSWAP,PW,DIR,PERIPH_INCR,COUNT) \ 449bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang \ 450bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((BSWAP) & DMAC_DMAC_COUNT_BSWAP_LSBMASK) << DMAC_DMAC_COUNT_BSWAP_SHIFT) | \ 451bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((PW) & DMAC_DMAC_COUNT_PW_LSBMASK) << DMAC_DMAC_COUNT_PW_SHIFT) | \ 452bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((DIR) & DMAC_DMAC_COUNT_DIR_LSBMASK) << DMAC_DMAC_COUNT_DIR_SHIFT) | \ 453bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((PERIPH_INCR) & DMAC_DMAC_COUNT_PI_LSBMASK) << DMAC_DMAC_COUNT_PI_SHIFT) | \ 454bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((COUNT) & DMAC_DMAC_COUNT_CNT_LSBMASK) << DMAC_DMAC_COUNT_CNT_SHIFT) 4557e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 456dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 457dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 458dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines the access delay settings. 459dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 460dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 461bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_ACC_DEL_0 = 0x0, //!< Access delay zero clock cycles 462dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_ACC_DEL_256 = 0x1, //!< Access delay 256 clock cycles 463dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_ACC_DEL_512 = 0x2, //!< Access delay 512 clock cycles 464dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_ACC_DEL_768 = 0x3, //!< Access delay 768 clock cycles 465dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_ACC_DEL_1024 = 0x4, //!< Access delay 1024 clock cycles 466dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_ACC_DEL_1280 = 0x5, //!< Access delay 1280 clock cycles 467dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_ACC_DEL_1536 = 0x6, //!< Access delay 1536 clock cycles 468dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_ACC_DEL_1792 = 0x7, //!< Access delay 1792 clock cycles 469dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 470dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_eAccDel; 471dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 472dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 473dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 474dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines whether the peripheral address is static or auto-incremented. 475dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 476dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 477bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_INCR_OFF = 0, //!< Static peripheral address. 478bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_INCR_ON = 1 //!< Incrementing peripheral address. 479dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 480dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_eIncr; 481dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 482dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 483dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 484dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This type defines the burst size setting. 485dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 486dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 487bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_0 = 0x0, //!< burst size of 0 488bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_1 = 0x1, //!< burst size of 1 489bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_2 = 0x2, //!< burst size of 2 490bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_3 = 0x3, //!< burst size of 3 491bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_4 = 0x4, //!< burst size of 4 492bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_5 = 0x5, //!< burst size of 5 493bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_6 = 0x6, //!< burst size of 6 494bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_BURST_7 = 0x7, //!< burst size of 7 495dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 496dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_eBurst; 497dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 498dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 499dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 500dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 501dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_VALUE_PERIPH_PARAM 502dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 503dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 504dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 505dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This MACRO is used to aid the generation of the ui32PeripheralParam member of the 506dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_sParams structure required by DMA_SyncAction() and DMA_AsyncAction(). If this is 507dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun not suitable for a given application then the programmer is free to fill in the fields in 508dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun any way they see fit. 509dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 510bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input ACC_DEL: The access delay (see DMA_eAccDel). 511dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 512bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input INCR: Whether the peripheral address is incremented (see DMA_eIncr). 513dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 514bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input BURST: The burst size. This should correspond to the amount of data that the 515bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang peripheral will either be able to supply or accept from its FIFO (see DMA_eBurst). 516dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 517bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return img_uint32: The value of the generated word. 518dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 519dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 520bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang#define DMA_VALUE_PERIPH_PARAM(ACC_DEL,INCR,BURST) \ 521bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang \ 522bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((ACC_DEL) & DMAC_DMAC_PERIPH_ACC_DEL_LSBMASK) << DMAC_DMAC_PERIPH_ACC_DEL_SHIFT) | \ 523bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((INCR) & DMAC_DMAC_PERIPH_INCR_LSBMASK) << DMAC_DMAC_PERIPH_INCR_SHIFT) | \ 524bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang (((BURST) & DMAC_DMAC_PERIPH_BURST_LSBMASK) << DMAC_DMAC_PERIPH_BURST_SHIFT) 5257e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 5267e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 5277e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 528dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 529dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 530dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun Used to describe the location of the linked list structure 531dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 532dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef enum { 533dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_LIST_IS_IN_MTX_MEM, 534dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_LIST_IS_IN_SYS_MEM, 535dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_LIST_LOCATION; 5367e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 537dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 538dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 539dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMAC linked list structure 540dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 541dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef struct { 542bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_0; //!< Word 0 of the linked list (see DMA_LL_SET_WD0). 543bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_1; //!< Word 1 of the linked list (see DMA_LL_SET_WD1). 544bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_2; //!< Word 2 of the linked list (see DMA_LL_SET_WD2). 545bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_3; //!< Word 3 of the linked list (see DMA_LL_SET_WD3). 546bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_4; //!< Word 4 of the linked list (see DMA_LL_SET_WD4). 547bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_5; //!< Word 5 of the linked list (see DMA_LL_SET_WD5). 548bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_6; //!< Word 6 of the linked list (see DMA_LL_SET_WD6). 549bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Word_7; //!< Word 7 of the linked list (see DMA_LL_SET_WD7). 5507e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 551dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_sLinkedList; 5527e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 553dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 554dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 555dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMAC Parameter structure 556dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 557dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef struct { 558bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32PerHold; //!< peripheral hold register (see PER_HOLD register in TRM) 559bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_LIST_LOCATION eListLocation; //!< is the linked list in mtx memory or system memory 560bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_sLinkedList * psDmaLinkedList; //!< pointer to first element in the linked list 561bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_UINT32 ui32Ext_sa; 562dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun } DMA_sParams; 5637e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 564dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 565dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 5667e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 567dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_Initialise 5687e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 569dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 5707e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 571dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This function initialises the DMAC. Only has effect on the first call, second 572dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun and subsequent calls are ignored. 5737e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 574bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel to initialise. 5757e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 576bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return None. 5777e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 578dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 579dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun extern IMG_VOID DMA_Initialise(DMA_eChannelId eChannel); 5807e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 581dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 582dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 5837e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 584dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_Reset 5857e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 586dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 5877e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 588dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This function resets the DMAC, cancels any pending DMAC operation and 589dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun return the DMAC to the idle state - #DMA_STATUS_IDLE. 5907e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 591bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel to reset. 5927e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 593bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return None. 5947e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 595dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 596dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun extern IMG_VOID DMA_Reset(DMA_eChannelId eChannel); 5977e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 598dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 599dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 6007e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 601dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_SyncAction 6027e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 603dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 6047e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 605dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This function is used to initiate a synchronous (blocking) DMAC tranfer. 6067e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 607dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun An internal callback function is registered using DMA_RegisterStatusCallback() 608dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun to detect and act upon status transitions. 6097e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 610dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun The DMAC driver also uses the SEMA API, SEMA_ID_B to block whilst waiting 611dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun for the DMAC transfer to complete. The callback function will set the 612dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun semaphore when the 6137e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 614dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun NOTE: The DMAC must be in the idle state - #DMA_STATUS_IDLE - when the 615dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun transfer is initiated. 6167e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 617bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel to use. 6187e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 619bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input psParams : A pointer to a #DMA_sParams structure set with the 620bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang required DMAC setup. 6217e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 622bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input bMtx : If true then the peripheral address specifies an 623bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang offset in MTX memory 6247e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 625bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return DMA_eStatus : The completion status - #DMA_STATUS_COMPLETE or 626bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang #DMA_STATUS_TIMEOUT. 6277e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 628dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 629dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun extern DMA_eStatus DMA_SyncAction( 630bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_eChannelId eChannel, 631bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_sParams * psParams, 632bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_BOOL bMtx 633bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang ); 6347e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 635dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 636dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 6377e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 638dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_AsyncAction 6397e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 640dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 6417e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 642dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This function is used to initiate an asynchronous (non-blocking) DMAC tranfer. 6437e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 644dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun NOTE: The DMAC must be in the idle state - #DMA_STATUS_IDLE - when the 645dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun transfer is initiated. 6467e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 647bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel to use. 6487e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 649bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input psDmacLinkedList : A pointer to a #DMA_sLinkedList structure set with the 650bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang required DMAC setup. 6517e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 652bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input bPeriphIsMtx : If true then the peripheral address specifies an 653bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang offset in MTX memory. 6547e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 655dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun NOTE: If eListLocation is DMA_LIST_IS_IN_SYS_MEM and bPeriphIsMtx is IMG_TRUE the linked list can only contain a single entry. 6567e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 657dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun NOTE: If eListLocation is DMA_LIST_IS_IN_MTX_MEM then bPeriphIsMtx applies to all entries in the linked list (i.e. 658bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang they all use the mtx as the peripheral, or none of them use the mtx as the peripheral). 6597e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 660bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return None. 6617e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 662dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 663dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun extern IMG_VOID DMA_AsyncAction( 664bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_eChannelId eChannel, 665bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_sParams * psParams, 666bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang IMG_BOOL bPeriphIsMtx 667bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang ); 6687e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 669dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 670dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 6717e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 672dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_WaitForTransfer 6737e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 674dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 6757e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 676dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This function waits for the current transfer to complete or timeout. 6777e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 678bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel to wait use. 6797e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 680bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return DMA_eStatus : DMA_STATUS_COMPLETE when transfer has completed or DMA_STATUS_IDLE 681bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang if there wasn't an active transfer in progress to wait for. 6827e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 683dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 684dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun extern DMA_eStatus DMA_WaitForTransfer(DMA_eChannelId eChannel); 6857e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 686dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 687dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 6887e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 689dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_GetStatus 6907e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 691dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 6927e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 693dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This function returns the status of the DMAC. 6947e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 695bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel to get the status of. 6967e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 697bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return DMA_eStatus : The status of the DMAC. 6987e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 699dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 700dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun extern DMA_eStatus DMA_GetStatus(DMA_eChannelId eChannel); 7017e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 702dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 703dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 7047e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 705dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_pfnStatusCallback 7067e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 707dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 7087e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 709dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This is the prototype for a status callback functions. 7107e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 711bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel that the status change is being reported on. 7127e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 713bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input DMA_eStatus : The "new" state of the DMAC. 7147e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 715bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return None. 7167e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 717dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 718dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun typedef IMG_VOID(*DMA_pfnStatusCallback)( 719bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_eChannelId eChannel, 720bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_eStatus eStatus 721dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ); 7227e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 7237e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 724dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun /*! 725dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ****************************************************************************** 7267e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 727dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Function DMA_RegisterStatusCallback 7287e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 729dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun @Description 7307e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 731dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun This function is used to register a status callback function. The caller 732dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun provides the address of a function that will be called when a change in the 733dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun status occurs - see #DMA_eStatus. 7347e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 735dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun NOTE: This can happen asynchronously (at interrupt level) on a 736dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun #DMA_STATUS_COMPLETE or #DMA_STATUS_TIMEOUT - or synchronously when 737dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun DMA_Action() is called and the state changes to #DMA_STATUS_BUSY or 738dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun when DMA_GetStatus() or DMA_Reset() are called and the state returns to 739dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun #DMA_STATUS_IDLE. 7407e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 741dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun NOTE: Only one callback function can be registered with the API. The 742dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun callback function is persistent and is not removed by subsequent calls 743dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun to DMA_Initialise() or DMA_Reset(). 744dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 745dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun NOTE: The function asserts if a callback function has already been set. 746dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 747bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input eChannel : The channel that the status change is being reported on. 748dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 749bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Input pfnStatusCallback : A pointer to a status callback function. 750dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 751bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang @Return None. 752dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun 753dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun ******************************************************************************/ 754dc1209519284865899ca8d990b3a2c7dbca8ae08wangkun extern IMG_VOID DMA_RegisterStatusCallback( 755bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_eChannelId eChannel, 756bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang DMA_pfnStatusCallback pfnStatusCallback 757bde3ed7517cc876cb2a6e174ea2a96a75938e787Kun Wang ); 7587e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 7597e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 7607e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#if (__cplusplus) 7617e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang} 7627e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#endif 7637e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang 7647e8d39a9d261ff6b5256d7cf9c7a127947b2b2a5Fei,Jiang#endif /* __DMA_API_H__ */ 765