| d55c5b19487ef22383a32548f1143f1dfac2478f |
14-Oct-2013 |
Todd Fiala <tfiala@google.com> |
Add Android.mk support for building LLDB on Linux host.
This change adds support for building LLDB with the following
build command from the top level:
make FORCE_BUILD_LLVM_COMPONENTS=true ANDROID_BUILD_LLDB=true lldb
There are known issues with the google linux host gcc 4.6.2+ variant
currently used to build host executables. A follow up change will
apply a temporary work-around that will be used until either the
compiler is fixed or a new compiler is used.
Change-Id: I18451f73cbe2264074cd8fba6397680855352a93
RM/Android.mk
|
| abfef87c9819e401cc7514fcc9ce81ba20f278ad |
25-Jun-2013 |
Sean Callanan <scallanan@apple.com> |
Fixed the instruction emulation so that it doesn't
print to standard output as part of normal
operation.
<rdar://problem/14247606>
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@184797 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 7e20fea4aff79b345ab504f88844796ccd2901cb |
24-Jun-2013 |
Andy Gibbs <andyg1001@hotmail.co.uk> |
Fix some more mismatched integer types causing compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@184737 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulationStateARM.cpp
|
| 0d91b809feae0708ec372a30d0da53959eeb062c |
25-May-2013 |
Filipe Cabecinhas <me@filcab.net> |
Update countTrailingZeros function usage to match llvm's r182667.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@182683 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 0e191607adcb0ea8ebd06c278be648a7f5c0097f |
10-May-2013 |
Greg Clayton <gclayton@apple.com> |
<rdar://problem/13854277>
<rdar://problem/13594769>
Main changes in this patch include:
- cleanup plug-in interface and use ConstStrings for plug-in names
- Modfiied the BSD Archive plug-in to be able to pick out the correct .o file when .a files contain multiple .o files with the same name by using the timestamp
- Modified SymbolFileDWARFDebugMap to properly verify the timestamp on .o files it loads to ensure we don't load updated .o files and cause problems when debugging
The plug-in interface changes:
Modified the lldb_private::PluginInterface class that all plug-ins inherit from:
Changed:
virtual const char * GetPluginName() = 0;
To:
virtual ConstString GetPluginName() = 0;
Removed:
virtual const char * GetShortPluginName() = 0;
- Fixed up all plug-in to adhere to the new interface and to return lldb_private::ConstString values for the plug-in names.
- Fixed all plug-ins to return simple names with no prefixes. Some plug-ins had prefixes and most ones didn't, so now they all don't have prefixed names, just simple names like "linux", "gdb-remote", etc.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@181631 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 102b2c2681c9a830afe25bfea35557421905e42c |
19-Apr-2013 |
Greg Clayton <gclayton@apple.com> |
After discussing with Chris Lattner, we require C++11, so lets get rid of the macros and just use C++11.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@179805 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 81a96aa6242f7b559770f5dc62316253cb8cb0d4 |
18-Apr-2013 |
Greg Clayton <gclayton@apple.com> |
Since we use C++11, we should switch over to using std::unique_ptr when C++11 is being used. To do this, we follow what we have done for shared pointers and we define a STD_UNIQUE_PTR macro that can be used and it will "do the right thing". Due to some API differences in std::unique_ptr and due to the fact that we need to be able to compile without C++11, we can't use move semantics so some code needed to change so that it can compile with either C++.
Anyone wanting to use a unique_ptr or auto_ptr should now use the "STD_UNIQUE_PTR(TYPE)" macro.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@179779 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| aebeefd3adb11cf535b9a7b6ad4e9c39e005a7b5 |
21-Feb-2013 |
Daniel Malea <daniel.malea@intel.com> |
Adding CMake build system to LLDB. Some known issues remain:
- generate-vers.pl has to be called by cmake to generate the version number
- parallel builds not yet supported; dependency on clang must be explicitly specified
Tested on Linux.
- Building on Mac will require code-signing logic to be implemented.
- Building on Windows will require OS-detection logic and some selective directory inclusion
Thanks to Carlo Kok (who originally prepared these CMakefiles for Windows) and Ben Langmuir
who ported them to Linux!
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@175795 91177308-0d34-0410-b5e6-96231b3b80d8
RM/CMakeLists.txt
MakeLists.txt
|
| d35b7b3bfd21f4fd6b048693563eef1b772ae197 |
07-Dec-2012 |
Daniel Malea <daniel.malea@intel.com> |
More Linux warnings fixes (remove default labels as needed):
- as per http://llvm.org/docs/CodingStandards.html#don-t-use-default-labels-in-fully-covered-switches-over-enumerations
Patch by Matt Kopec!
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@169633 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 0a6822658ec5f61f42b6b144345b972a4253995f |
31-Oct-2012 |
Jason Molenda <jmolenda@apple.com> |
Fix the bit pattern for vst1 in EmulateInstructionARM::GetThumbOpcodeForInstruction
so it is recognized correctly. The second patch needed for <rdar://problem/10652166>.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@167094 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 37816a3429a075e19b74f64fd642d5a5d7ec6f2f |
26-Oct-2012 |
Jason Molenda <jmolenda@apple.com> |
Add a new capability to RegisterContextLLDB: To recognize when the
Full UnwindPlan is trying to do an impossible unwind; in that case
invalidate the Full UnwindPlan and replace it with the architecture
default unwind plan.
This is a scenario that happens occasionally with arm unwinds in
particular; the instruction analysis based full unwindplan can
mis-parse the functions and the stack walk stops prematurely. Now
we can do a simpleminded frame-chain walk to find the caller frame
and continue the unwind. It's not ideal but given the complicated
nature of analyzing the arm functions, and the lack of eh_frame
information on iOS, it is a distinct improvement and fixes some
long-standing problems with the unwinder on that platform.
This is fixing <rdar://problem/12091421>. I may re-use this
invalidate feature in the future if I can identify other cases where
the full unwindplan's unwind information is clearly incorrect.
This checkin also includes some cleanup for the volatile register
definition in the arm ABI plugin for <rdar://problem/10652166>
although work remains to be done for that bug.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@166757 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 73844aa19a7360b662e2be710fc3c969d6c86606 |
22-Aug-2012 |
Greg Clayton <gclayton@apple.com> |
Reimplemented the code that backed the "settings" in lldb. There were many issues with the previous implementation:
- no setting auto completion
- very manual and error prone way of getting/setting variables
- tons of code duplication
- useless instance names for processes, threads
Now settings can easily be defined like option values. The new settings makes use of the "OptionValue" classes so we can re-use the option value code that we use to set settings in command options. No more instances, just "does the right thing".
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@162366 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
RM/EmulationStateARM.cpp
RM/EmulationStateARM.h
|
| 4a379b1194f3e6b308cd6e80b45d6ca5dd0aafd7 |
17-Jul-2012 |
Greg Clayton <gclayton@apple.com> |
Ran the static analyzer on the codebase and found a few things.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@160338 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 68fa4ec4361d1ea5a78a8a7eba2b8015e3dd68f7 |
14-Jul-2012 |
Jason Molenda <jmolenda@apple.com> |
Switch nearly all of the use of the UnwindPlan::Row's to go through
a shared pointer to ease some memory management issues with a patch
I'm working on.
The main complication with using SPs for these objects is that most
methods that build up an UnwindPlan will construct a Row to a given
instruction point in a function, then add additional regsaves in
the next instruction point to that row and push it again. A little
care is needed to not mutate the previous instruction point's Row
once these are switched to being held behing shared pointers.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@160214 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| b170aee2daacc83e3d71c3e3acc9d56c89893a7b |
08-May-2012 |
Greg Clayton <gclayton@apple.com> |
<rdar://problem/11358639>
Switch over to the "*-apple-macosx" for desktop and "*-apple-ios" for iOS triples.
Also make the selection process for auto selecting platforms based off of an arch much better.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@156354 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 663067fa1a4992523d771c823368f54979249cf9 |
18-Apr-2012 |
Greg Clayton <gclayton@apple.com> |
Make sure EmulateInstructionARM doesn't have to have "armv4", "armv6", "armv7" as the exact architecture name, the arch name can just start with any of these strings. We need to be able to recognize different variants that might come along and not fail to backtrace completely (which happens when we aren't able to find an architecture that matches) when we don't have exact matches.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@155045 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 82a17a29a99ceef3353ac669ed44749d6106212c |
18-Apr-2012 |
Jason Molenda <jmolenda@apple.com> |
Add armv7s to recognized cpu type for arm instruction emulation.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@154974 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| c9c364f939b95612bedc316b3efbedacc614c855 |
13-Mar-2012 |
Johnny Chen <johnny.chen@apple.com> |
rdar://problem/11031743
For EmulateInstructionARM::EmulatePUSH(), fix the logical branch for when pc is pushed to behave
like the other cases where:
context.SetRegisterToRegisterPlusOffset (reg_info, sp_reg, addr - sp);
is called to inform of the operation to set a register value to a memory location calculated from
a base register plus an offset.
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@152670 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| b51693999473f5dc7cb9681bbbc4a65028eea35b |
01-Nov-2011 |
Greg Clayton <gclayton@apple.com> |
Fixed some warnings after enabling some stricter warnings in the Xcode project
settings.
Also fixed an issue where we weren't creating anonymous namepaces correctly:
<rdar://problem/10371295>
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@143403 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 6ac9e54dfd1d3e4be4326e0f1740e6a5971c4759 |
16-Aug-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix two logic errors uncovered by the static analyzer.
For the default case (illegal encoding type), just return false instead of break.
A8.6.84 LDRSH (register)
A8.6.309 VLD1 (single element to all lanes)
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@137699 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| a1c7e46b8260cba74e04d4ae0f748c602148deb9 |
12-Aug-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix a logic error (Division by zero) uncovered by the static analyzer.
A8.6.391 VST1 (multiple single elements)
alignment = if align == '00' then 1 else 4 << UInt(align);
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@137477 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 65f39ed3847cdf09381de6dce8abfa28caa96486 |
12-Aug-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix some warnings from static analyzer.
The initialization of 'replicated_element' to 0 is needed, otherwise we get a garbage value to start with.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@137405 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 107e53da8bdca540db8b734ed237688eaeee85c5 |
06-Jul-2011 |
Greg Clayton <gclayton@apple.com> |
Fixed some issues with ARM backtraces by not processing any push/pop
instructions if they are conditional. Also fixed issues where the PC wasn't
getting bit zero stripped for ARM targets when a stack frame was thumb. We
now properly call through the GetOpcodeLoadAddress() functions to make sure
the addresses are properly stripped for any targets that may decorate up
their addresses.
We now don't pass the SIGSTOP signals along. We can revisit this soon, but
currently this was interfering with debugging some older ARM targets that
don't have vCont support in the GDB server.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@134461 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 6dc5a1aaee217d49d91f157390b0de06a0f71681 |
03-Jun-2011 |
Johnny Chen <johnny.chen@apple.com> |
Bail out if we have an invalid thumb instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@132511 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 6cc6097f14959ec7d19a388f11697cc50bf12542 |
03-Jun-2011 |
Johnny Chen <johnny.chen@apple.com> |
Turn the commented-out assert()'s into appropriate bail-out actions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@132507 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| a4438a727670dc08eafd86f2bc8f91fc397f1333 |
03-Jun-2011 |
Johnny Chen <johnny.chen@apple.com> |
When emulating an ill-formed instruction, we should bail out instead of asserting and bringing down the whole process.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@132506 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e1f47bb8c6221abf3a2fe1571b09f208d71d025e |
03-Jun-2011 |
Greg Clayton <gclayton@apple.com> |
Remove asserts that will crash LLDB. These should be changed to return
true/false in an extra boolean parameter and not cause the the binary that
us using the LLDB framework to crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@132501 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| f5ae76b9618790c637aa67039242f851764dabd1 |
02-Jun-2011 |
Johnny Chen <johnny.chen@apple.com> |
EmulateShiftReg() also accepts shifter type of SRType_ROR.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@132484 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 04d397c5e251eaa5f520dbe6381d2a82303350e1 |
23-May-2011 |
Greg Clayton <gclayton@apple.com> |
Fixed an issue in the EmulateInstructionARM there the IT opcode was trying to
parse NOP instructions. I added the new table entries for the NOP for the
plain NOP, Yield, WFE, WFI, and SEV variants. Modified the opcode emulation
function EmulateInstructionARM::EmulateMOVRdSP(...) to notify us when it is
creating a frame. Also added an abtract way to detect the frame pointer
register for both the standard ARM ABI and for Darwin.
Fixed GDBRemoteRegisterContext::WriteAllRegisterValues(...) to correctly be
able to individually write register values back if case the 'G' packet is
not implemented or returns an error.
Modified the StopInfoMachException to "trace" stop reasons. On ARM we currently
use the BVR/BCR register pairs to say "stop when the PC is not equal to the
current PC value", and this results in a EXC_BREAKPOINT mach exception that
has 0x102 in the code.
Modified debugserver to create the short option string from long option
definitions to make sure it doesn't get out of date. The short option string
was missing many of the newer short option values due to a modification of
the long options defs, and not modifying the short option string.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@131911 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| b9e8f6e7a374d9313f89193e90ae41ef91712e5b |
18-May-2011 |
Greg Clayton <gclayton@apple.com> |
Added a way to resolve an load address from a target:
bool
Address::SetLoadAddress (lldb::addr_t load_addr, Target *target);
Added an == and != operator to RegisterValue.
Modified the ThreadPlanTracer to use RegisterValue objects to store the
register values when single stepping. Also modified the output to be a bit
less wide.
Fixed the ABIMacOSX_arm to not overwrite stuff on the stack. Also made the
trivial function call be able to set the ARM/Thumbness of the target
correctly, and also sets the return value ARM/Thumbness.
Fixed the encoding on the arm s0-s31 and d16 - d31 registers when the default
register set from a standard GDB server register sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@131517 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 75906e4ec98af3717e415727a8d663a4e246bb4f |
11-May-2011 |
Greg Clayton <gclayton@apple.com> |
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their
respective ABI plugins as they were plug-ins that supplied ABI specfic info.
Also hookep up the UnwindAssemblyInstEmulation so that it can generate the
unwind plans for ARM.
Changed the way ABI plug-ins are handed out when you get an instance from
the plug-in manager. They used to return pointers that would be mananged
individually by each client that requested them, but now they are handed out
as shared pointers since there is no state in the ABI objects, they can be
shared.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@131193 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 061b79dbf1fefaf157d414747e98a463a0f32eda |
09-May-2011 |
Greg Clayton <gclayton@apple.com> |
While implementing unwind information using UnwindAssemblyInstEmulation I ran
into some cleanup I have been wanting to do when reading/writing registers.
Previously all RegisterContext subclasses would need to implement:
virtual bool
ReadRegisterBytes (uint32_t reg, DataExtractor &data);
virtual bool
WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0);
There is now a new class specifically designed to hold register values:
lldb_private::RegisterValue
The new register context calls that subclasses must implement are:
virtual bool
ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value) = 0;
virtual bool
WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value) = 0;
The RegisterValue class must be big enough to handle any register value. The
class contains an enumeration for the value type, and then a union for the
data value. Any integer/float values are stored directly in an appropriate
host integer/float. Anything bigger is stored in a byte buffer that has a length
and byte order. The RegisterValue class also knows how to copy register value
bytes into in a buffer with a specified byte order which can be used to write
the register value down into memory, and this does the right thing when not
all bytes from the register values are needed (getting a uint8 from a uint32
register value..).
All RegiterContext and other sources have been switched over to using the new
regiter value class.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@131096 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulationStateARM.cpp
RM/EmulationStateARM.h
|
| 3063c95c54ac0303287c34f9f5af7ba7b6b8f0bc |
30-Apr-2011 |
Greg Clayton <gclayton@apple.com> |
Added the start of the CFI row production using the
emulate instruction classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@130556 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 57b3c6b12812b0a7a79f896855c787bd4d893ecb |
28-Apr-2011 |
Greg Clayton <gclayton@apple.com> |
Added a new OptionValue subclass for lldb::Format: OptionValueFormat. Added
new OptionGroup subclasses for:
- output file for use with options:
long opts: --outfile <path> --append--output
short opts: -o <path> -A
- format for use with options:
long opts: --format <format>
- variable object display controls for depth, pointer depth, wether to show
types, show summary, show location, flat output, use objc "po" style summary.
Modified ValueObjectMemory to be able to be created either with a TypeSP or
a ClangASTType.
Switched "memory read" over to use OptionGroup subclasses: one for the outfile
options, one for the command specific options, and one for the format.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@130334 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulationStateARM.cpp
|
| c07d451bb046e47215bd73fda0235362cc6b1a47 |
27-Apr-2011 |
Greg Clayton <gclayton@apple.com> |
Got the EmulateInstruction CFI code a lot closer to producing CFI data.
Switch the EmulateInstruction to use the standard RegisterInfo structure
that is defined in the lldb private types intead of passing the reg kind and
reg num everywhere. EmulateInstruction subclasses also need to provide
RegisterInfo structs given a reg kind and reg num. This eliminates the need
for the GetRegisterName() virtual function and allows more complete information
to be passed around in the read/write register callbacks. Subclasses should
always provide RegiterInfo structs with the generic register info filled in as
well as at least one kind of register number in the RegisterInfo.kinds[] array.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@130256 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
RM/EmulationStateARM.cpp
RM/EmulationStateARM.h
|
| 1d29a85815ee049b4f30271161c3b494eef41e8c |
26-Apr-2011 |
Johnny Chen <johnny.chen@apple.com> |
Modify EmulateInstructionARM::SetArchitecture() to treat "arm" and "thumb" as wild card architectures
for now, in order to fix the test failure for the 'arm_emulation' directory.
There might be a better way.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@130227 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 888a7334344778d1a4edbd58b5852ae4d53ffed9 |
26-Apr-2011 |
Greg Clayton <gclayton@apple.com> |
Changed the emulate instruction function to take emulate options which
are defined as enumerations. Current bits include:
eEmulateInstructionOptionAutoAdvancePC
eEmulateInstructionOptionIgnoreConditions
Modified the EmulateInstruction class to have a few more pure virtuals that
can help clients understand how many instructions the emulator can handle:
virtual bool
SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0;
Where instruction types are defined as:
//------------------------------------------------------------------
/// Instruction types
//------------------------------------------------------------------
typedef enum InstructionType
{
eInstructionTypeAny, // Support for any instructions at all (at least one)
eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp
eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer
eInstructionTypeAll // All instructions of any kind
} InstructionType;
This allows use to tell what an emulator can do and also allows us to request
these abilities when we are finding the plug-in interface.
Added the ability for an EmulateInstruction class to get the register names
for any registers that are part of the emulation. This helps with being able
to dump and log effectively.
The UnwindAssembly class now stores the architecture it was created with in
case it is needed later in the unwinding process.
Added a function that can tell us DWARF register names for ARM that goes
along with the source/Utility/ARM_DWARF_Registers.h file:
source/Utility/ARM_DWARF_Registers.c
Took some of plug-ins out of the lldb_private namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@130189 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
RM/EmulationStateARM.cpp
RM/EmulationStateARM.h
|
| dfb2e20724a90a4a10558ddaee18b72a1c51e499 |
22-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Change code for reading emulation data files to read the new file
format. (The newly formatted files will go in as a separate commit in a
few minutes).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@129981 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
RM/EmulationStateARM.cpp
RM/EmulationStateARM.h
|
| 6b8d3b5e7f0507aca2ee1c0937d7ec80fa2a9c5b |
20-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Add the infrastructure to test instruction emulations automatically.
The idea is that the instruction to be emulated is actually executed
on the hardware to be emulated, with the before and after state of the
hardware being captured and 'freeze-dried' into .dat files. The
emulation testing code then loads the before & after state from the
.dat file, emulates the instruction using the before state, and
compares the resulting state to the 'after' state. If they match, the
emulation is accurate, otherwise there is a problem.
The final format of the .dat files needs a bit more work; the plan is
to generalize them a bit and to convert the plain values to key-value pairs.
But I wanted to get this first pass committed.
This commit adds arm instruction emulation testing to the testsuite, along with
many initial .dat files.
It also fixes a bug in the llvm disassembler, where 32-bit thumb opcodes
were getting their upper & lower 16-bits reversed.
There is a new Instruction sub-class, that is intended to be loaded
from a .dat file rather than read from an executable. There is also a
new EmulationStateARM class, for handling the before & after states.
EmulationStates for other architetures can be added later when we
emulate their instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@129832 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
RM/EmulationStateARM.cpp
RM/EmulationStateARM.h
|
| 55e569e255b7e1bd510d55820385db2a5ba1426e |
13-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Fix bug where source & target registers were swapped in an
emulation function.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@129474 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 523c554292bc09fd8519379d628b5e9090acbd36 |
13-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Fix various minor bugs in the ARM instruction emulation code.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@129422 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 1f954f59df9ce7bf58d0353ab0949656561210d4 |
11-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Implement ARM emulation function to handle "SUBS PC, LR and related instructions".
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@129279 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 0fe5a535b87841a5c422f4a79d55c21bf07b50ca |
09-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Fix various things in the instruction emulation code:
- Add ability to control whether or not the emulator advances the
PC register (in the emulation state), if the instruction itself
does not change the pc value..
- Fix a few typos in asm description strings.
- Fix bug in the carry flag calculation.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@129168 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 62794e44893c724bbba5cd6f14bad9974f852748 |
08-Apr-2011 |
Stephen Wilson <wilsons@start.ca> |
Add the ARM instruction emulation makefile.
I forgot to 'svn add' this file in r129119.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@129120 91177308-0d34-0410-b5e6-96231b3b80d8
RM/Makefile
|
| af59180d46b42665dba3ea581fc501bb9fcb1fb7 |
06-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Add Emulate and DumpEmulation to Instruction class.
Move InstructionLLVM out of DisassemblerLLVM class.
Add instruction emulation function calls to SBInstruction and SBInstructionList APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128956 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 080bf61255afcffd7ccfe0402d3715f77f6627b9 |
05-Apr-2011 |
Caroline Tice <ctice@apple.com> |
Add the rest of the mechanisms to make ARM instruction emulation usable/possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128907 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 8d24b4a3a3351a0db1dabfaf26bdf2eae16b1775 |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fix a few typos in the previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128671 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 93767b8fceecd605d3e3dc3803b7d51823f17b2f |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate VLD1 (single element to all lanes) ARM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128669 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 7b880943399074cc7de69aa02e0da426f52e274e |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate VST1 (single element from one lane) ARM
instruction (more floating point stores).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128661 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 1e542e30870bbced43d8438d125979dc9522ec07 |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate VST1 (multiple single elements) ARM
instruction (floating point store).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128656 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| b6281b1d94e75876211a589bc9c4e2756feab04e |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate VLD1 (single element to one lane) floating point
register load instruction (ARM) .
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128646 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 9121b35e4d2742ce9627bdfeea7cffed123d7bba |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate VLD1 (multiple single elements) ARM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128637 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 424652f4258d968dffb5175c4649f6f8afef4217 |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate VSTR ARM instruction (store a floating point register).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128614 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 917ad35280b65c53419eebbd1c07881d08b3e7d9 |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate the VLDR Arm instruction (load a floating poitn register).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128613 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| bf5a66b583ecf050cf82a6bbe7f284863670968a |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add "Bits64" utility function.
Add code to emulate VSTM ARM instruction (store multiple floating point registers).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128609 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 4f6055840a3d5006a60d54c139b1f8975ed0c638 |
31-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Modify ARM instruction tables to allow for specifying floating point variants.
Add code to emulate VLDM ARM instruction (loading multiplt floating point registers).
Add function declarations for other floating point instructions to emulate.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128589 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 74467fe6f301d25e21f5c6bcec4c9ad7d4c1f8b7 |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in code for EmulateSTRDImm and EmulateSTRDReg, to emulate the
STRD (immediate) and STRD (register) instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128570 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 24bc5d9bfad2a1c562c27e7cf37e1c56d85c45e7 |
30-Mar-2011 |
Greg Clayton <gclayton@apple.com> |
Many improvements to the Platform base class and subclasses. The base Platform
class now implements the Host functionality for a lot of things that make
sense by default so that subclasses can check:
int
PlatformSubclass::Foo ()
{
if (IsHost())
return Platform::Foo (); // Let the platform base class do the host specific stuff
// Platform subclass specific code...
int result = ...
return result;
}
Added new functions to the platform:
virtual const char *Platform::GetUserName (uint32_t uid);
virtual const char *Platform::GetGroupName (uint32_t gid);
The user and group names are cached locally so that remote platforms can avoid
sending packets multiple times to resolve this information.
Added the parent process ID to the ProcessInfo class.
Added a new ProcessInfoMatch class which helps us to match processes up
and changed the Host layer over to using this new class. The new class allows
us to search for processs:
1 - by name (equal to, starts with, ends with, contains, and regex)
2 - by pid
3 - And further check for parent pid == value, uid == value, gid == value,
euid == value, egid == value, arch == value, parent == value.
This is all hookup up to the "platform process list" command which required
adding dumping routines to dump process information. If the Host class
implements the process lookup routines, you can now lists processes on
your local machine:
machine1.foo.com % lldb
(lldb) platform process list
PID PARENT USER GROUP EFF USER EFF GROUP TRIPLE NAME
====== ====== ========== ========== ========== ========== ======================== ============================
99538 1 username usergroup username usergroup x86_64-apple-darwin FileMerge
94943 1 username usergroup username usergroup x86_64-apple-darwin mdworker
94852 244 username usergroup username usergroup x86_64-apple-darwin Safari
94727 244 username usergroup username usergroup x86_64-apple-darwin Xcode
92742 92710 username usergroup username usergroup i386-apple-darwin debugserver
This of course also works remotely with the lldb-platform:
machine1.foo.com % lldb-platform --listen 1234
machine2.foo.com % lldb
(lldb) platform create remote-macosx
Platform: remote-macosx
Connected: no
(lldb) platform connect connect://localhost:1444
Platform: remote-macosx
Triple: x86_64-apple-darwin
OS Version: 10.6.7 (10J869)
Kernel: Darwin Kernel Version 10.7.0: Sat Jan 29 15:17:16 PST 2011; root:xnu-1504.9.37~1/RELEASE_I386
Hostname: machine1.foo.com
Connected: yes
(lldb) platform process list
PID PARENT USER GROUP EFF USER EFF GROUP TRIPLE NAME
====== ====== ========== ========== ========== ========== ======================== ============================
99556 244 username usergroup username usergroup x86_64-apple-darwin trustevaluation
99548 65539 username usergroup username usergroup x86_64-apple-darwin lldb
99538 1 username usergroup username usergroup x86_64-apple-darwin FileMerge
94943 1 username usergroup username usergroup x86_64-apple-darwin mdworker
94852 244 username usergroup username usergroup x86_64-apple-darwin Safari
The lldb-platform implements everything with the Host:: layer, so this should
"just work" for linux. I will probably be adding more stuff to the Host layer
for launching processes and attaching to processes so that this support should
eventually just work as well.
Modified the target to be able to be created with an architecture that differs
from the main executable. This is needed for iOS debugging since we can have
an "armv6" binary which can run on an "armv7" machine, so we want to be able
to do:
% lldb
(lldb) platform create remote-ios
(lldb) file --arch armv7 a.out
Where "a.out" is an armv6 executable. The platform then can correctly decide
to open all "armv7" images for all dependent shared libraries.
Modified the disassembly to show the current PC value. Example output:
(lldb) disassemble --frame
a.out`main:
0x1eb7: pushl %ebp
0x1eb8: movl %esp, %ebp
0x1eba: pushl %ebx
0x1ebb: subl $20, %esp
0x1ebe: calll 0x1ec3 ; main + 12 at test.c:18
0x1ec3: popl %ebx
-> 0x1ec4: calll 0x1f12 ; getpid
0x1ec9: movl %eax, 4(%esp)
0x1ecd: leal 199(%ebx), %eax
0x1ed3: movl %eax, (%esp)
0x1ed6: calll 0x1f18 ; printf
0x1edb: leal 213(%ebx), %eax
0x1ee1: movl %eax, (%esp)
0x1ee4: calll 0x1f1e ; puts
0x1ee9: calll 0x1f0c ; getchar
0x1eee: movl $20, (%esp)
0x1ef5: calll 0x1e6a ; sleep_loop at test.c:6
0x1efa: movl $12, %eax
0x1eff: addl $20, %esp
0x1f02: popl %ebx
0x1f03: leave
0x1f04: ret
This can be handy when dealing with the new --line options that was recently
added:
(lldb) disassemble --line
a.out`main + 13 at test.c:19
18 {
-> 19 printf("Process: %i\n\n", getpid());
20 puts("Press any key to continue..."); getchar();
-> 0x1ec4: calll 0x1f12 ; getpid
0x1ec9: movl %eax, 4(%esp)
0x1ecd: leal 199(%ebx), %eax
0x1ed3: movl %eax, (%esp)
0x1ed6: calll 0x1f18 ; printf
Modified the ModuleList to have a lookup based solely on a UUID. Since the
UUID is typically the MD5 checksum of a binary image, there is no need
to give the path and architecture when searching for a pre-existing
image in an image list.
Now that we support remote debugging a bit better, our lldb_private::Module
needs to be able to track what the original path for file was as the platform
knows it, as well as where the file is locally. The module has the two
following functions to retrieve both paths:
const FileSpec &Module::GetFileSpec () const;
const FileSpec &Module::GetPlatformFileSpec () const;
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128563 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| eab301f1d38aa05e88ca33e250c3bf78aebd2b87 |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in EmulateLDRDRegister to emulate LDRD (register) instruction.
Remove stubs for functions not-to-be-implemented at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128559 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 1697dd77af1f72a34cd2ce881e865370cf1593c8 |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in EmulateLDRLImmediate to emulate the LDRD (immediate) ARM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128556 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e98b958df160cef9f2e816b4d86342f42a1c4025 |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fix typo in previous check-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128549 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| d42b3cc76caa3d85a0d8dc6c97b89160e95229f9 |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in EmulateSTRImmARM to emulate the STR (immediate,ARM) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128528 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| ef440003bffefbe10c960d5eea92193f5269be9a |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in EmulateSTRBImmARM to emulate the STRB (immediate, ARM) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128527 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 5168b6c7119735b6f087ccfcd9ed58811bbb0e32 |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in EmulateSTREX to emulate the STREX ARM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128525 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 4cccd53eba9c0ab2b3a4cf4aca42a2669d8834f4 |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in code in EmulateSUBReg to emulate the SUB (register) ARM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128508 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| c08ed3840e47b2e26ddffe0154b21840c80c91df |
30-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fill in code in EmulateADDRegShift, to emulate the ADD
(register-shifted register) ARM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128500 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| d05b4903bb95b07e709986961fe387921dd0e029 |
29-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add subtraction context.
Add code to emulate SUB (SP minus register) ARM instruction.
Add stubs for other ARM emulation functions that need to be written.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128491 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 89c6d5830f0584ed2f984e2d557ded17add7f61b |
29-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add missing encodings for EmulateMOVRdImm (MOV register) function.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128479 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| bb48f0bb876db5ef13d6084b28aba1cf21f0bb7c |
28-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fix single quote characters throughout the ARM emulation stuff.
Fix bugs in various ARM istruction emulation functions:
EmulateVPUSH
- Fix context.
- Fix bug calculating register numbers.
EmulateVPOP
- Fix context.
- Fix bug calculating register numbers.
EmulateShiftIMM
- Fix bug in assert statement.
EmulateLDMDA
- Fix context.
EmulateLDMDB
- Fix context.
EmulateLDMIB
- Fix context.
EmulateSTM
- Fix bug calculating lowest_set_bit.
EmulateSTMDA
- Fix context.
- Fix bug calculating lowest_set_bit.
EmulateSTMDB
- Fix context.
- Fix bug calculating lowest_set_bit.
EmulateSTMIB
- FIx context
EmulateLDRSBImmed
- Fix test to match correction in corrected manual
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128409 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 7bc390873f7c1c798c36c8003c4b82597f67c703 |
25-Mar-2011 |
Greg Clayton <gclayton@apple.com> |
Made the lldb_private::Opcode struct into a real boy... I mean class.
Modified the Disassembler::Instruction base class to contain an Opcode
instance so that we can know the bytes for an instruction without needing
to keep the data around.
Modified the DisassemblerLLVM's instruction class to correctly extract the
opcode bytes if all goes well.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128248 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| b344843f75ef893762c93fd0a22d2d45712ce74d |
24-Mar-2011 |
Greg Clayton <gclayton@apple.com> |
Fixed the LLDB build so that we can have private types, private enums and
public types and public enums. This was done to keep the SWIG stuff from
parsing all sorts of enums and types that weren't needed, and allows us to
abstract our API better.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128239 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| baf1f648fd0eb9295d8e61567d49d47fb9c28e19 |
24-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add missing encodings for EmulateLDRRtRnImm (ARM insn emulation funciton).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128229 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e221288aff8b6b97fb39a121f62233eae791295e |
22-Mar-2011 |
Caroline Tice <ctice@apple.com> |
More fixes for ARM instruction emulation code:
- Remove duplicate write from EmulateLDRRtPCRelative.
- Add a missing encoding to EmulateADDSPImm.
- Fix minor problems in Thumb instruction tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@128115 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 4fdf7602bedd8be648f3c549074cf13d90a05f03 |
20-Mar-2011 |
Greg Clayton <gclayton@apple.com> |
Split all of the core of LLDB.framework/lldb.so into a
static archive that can be linked against. LLDB.framework/lldb.so
exports a very controlled API. Splitting the API into a static
library allows other tools (debugserver for now) to use the power
of the LLDB debugger core, yet not export it as its API is not
portable or maintainable. The Host layer and many of the other
internal only APIs can now be statically linked against.
Now LLDB.framework/lldb.so links against "liblldb-core.a" instead
of compiling the .o files only for the shared library. This fix
is only for compiling with Xcode as the Makefile based build already
does this.
The Xcode projecdt compiler has been changed to LLVM. Anyone using
Xcode 3 will need to manually change the compiler back to GCC 4.2,
or update to Xcode 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@127963 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 3e4079716c15760dfd6efc62391d5c1da713cef6 |
18-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fix various small problems with EmulateInstructionARM::EmulateSTRRtSP.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@127898 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 8d681f52cd597b0148c9ae1439d5d5877aa39e4d |
18-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Make all the codee that attempts to read the PC consistently use
ReadCoreReg (which 'does the right thing', adding to pc when needed);
fixed places in code where extra addition was being passed along.
Fix bug in insn tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@127838 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 8ce836dbf416c4dfdbede109be5cc09b95918fd0 |
16-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate STRH (Register) Arm instruction.
Remove inaccurate comments from EmulateInstruction::Context definition.
Fix contexts in a few arm instruction emulation routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@127770 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 2b03ed8c697040c107d9c0c7d810fcb2e5c7fb8d |
16-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fix various small bugs found in the instruction emulation functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@127712 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e4b9c1fb338ee1ada72e6a3c198afb342d68c5c1 |
08-Mar-2011 |
Greg Clayton <gclayton@apple.com> |
LLDB now has "Platform" plug-ins. Platform plug-ins are plug-ins that provide
an interface to a local or remote debugging platform. By default each host OS
that supports LLDB should be registering a "default" platform that will be
used unless a new platform is selected. Platforms are responsible for things
such as:
- getting process information by name or by processs ID
- finding platform files. This is useful for remote debugging where there is
an SDK with files that might already or need to be cached for debug access.
- getting a list of platform supported architectures in the exact order they
should be selected. This helps the native x86 platform on MacOSX select the
correct x86_64/i386 slice from universal binaries.
- Connect to remote platforms for remote debugging
- Resolving an executable including finding an executable inside platform
specific bundles (macosx uses .app bundles that contain files) and also
selecting the appropriate slice of universal files for a given platform.
So by default there is always a local platform, but remote platforms can be
connected to. I will soon be adding a new "platform" command that will support
the following commands:
(lldb) platform connect --name machine1 macosx connect://host:port
Connected to "machine1" platform.
(lldb) platform disconnect macosx
This allows LLDB to be well setup to do remote debugging and also once
connected process listing and finding for things like:
(lldb) process attach --name x<TAB>
The currently selected platform plug-in can now auto complete any available
processes that start with "x". The responsibilities for the platform plug-in
will soon grow and expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@127286 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| b27771da2fe3256f4a64729ecec05946c27c1a0a |
03-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate RFE Arm instruction.
Add new instruction context for RFE instruction.
Add several new helper functions to help emulate RFE instruction
(including CurrentModeIsPrivileged, BadMode, and CPSRWriteByInstr).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126965 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 11555f2f0f21beb0312f8ebe40849487d437f493 |
03-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate UXTH Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126954 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 8ce96d910ba57058e10a563bcaab4448ca9ad571 |
03-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate UXTB Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126953 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 868198b229fcffbda2b24518007179ef1a45ad1d |
03-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate SXTH Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126951 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 6bf65165d269c43dc6cfd227c5f1e287c24b5a41 |
03-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate SXTB Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126949 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 40b1a6cd1190d820b630395f08c06d47e0bf6c7d |
03-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Fix bug where bitwise-AND was being used and it should have been bitwise-OR.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126904 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| dcc11b3b8882b3522244a25d2915c9086b44e596 |
03-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate ADD (immediate, Thumb) Arm instruction.
Add addition context to EmulateInstruction contexts.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126903 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 5c1e2edcc5230fbf0995efcc32e9c0548a97a2d2 |
02-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate MUL Arm instruction.
Add new context type & info structure for mul instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126891 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 291a3e90e7a275f196bc7aeeb2137acd6d60229f |
02-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRSH (register) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126881 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| d2fac095321ccd262699a8cce8b9fc897d6dff0d |
02-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRSH (literal) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126866 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 78fb5638da9c01a39443f3339ede2f02056822cf |
02-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRSH (immediate) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126807 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 672f3110bdd2a088f10ae9f246aaab5daa7b0fa1 |
02-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRSB (register) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126802 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 5f593915eac4dabdb0c38352b2fd551037e5cc20 |
01-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRSB (literal) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126789 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| a5e28af7d3ebf0820c62f08c9d0e194767586808 |
01-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRSB (immediate) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126783 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 0e6bc95dceb0bd29b0029771840e8afc690fe6c1 |
01-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRH (register) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126758 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 952b53892191222c56003cd60d8a4a71c4384aa7 |
01-Mar-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRH (literal) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126709 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 0491b3b75e1b045ab548f77fd1f76035522debde |
28-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRH (immediate, Thumb) arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126692 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 01d61570a57c96b3dbca0d89bf3039fe7fc99870 |
25-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation for Encoding A1 of A8.6.97 MOV (register).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126456 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 696b4effb53cac2ec14b54a65c695450b4d7f456 |
24-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix typos in the opcode entries for branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126442 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 59e6ab70eb0a623fc667f7db9b27007e13b315e2 |
24-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation for BXJ (Branch and Exchange Jazelle), assuming that the attempt to
switch to Jazelle state fails, thus treating BXJ as a BX operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126423 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| b9f02cfcd7d85e74981bf7790dce15d9bd1d4df6 |
24-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for Bitwise Bit Clear (immediate and register) operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126355 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 15a7a6b9b624e5b8a2b058befc4e04aae72ff9c0 |
24-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "SUB (immediate, Thumb)" and "SUB (immediate, ARM)" operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126343 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| a695f958db37c102d480a9c0780abec262ba8332 |
23-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation for "ADR" operations. Add a ThumbImm8Scaled() convenience function
and rename the original ThumbImmScaled() function to ThumbImm7Scaled().
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126335 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| c9e747f4efa320e366498f02bb9dd791cf86623b |
23-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Modify EmulateSUBSPImm() to handle the cases with generic Rd value instead of
Rd == 13. Add opcode entries for the generic "sub (sp minus immediate)" operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126293 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 9b381775c532270fd07a90aa1a98750546a768b7 |
23-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "SBC (immediate)" and "SBC (register)" operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126283 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 940b103224f3062578c7a7e6e76d8bf4a7956f2a |
23-Feb-2011 |
Greg Clayton <gclayton@apple.com> |
Abtracted all mach-o and ELF out of ArchSpec. This patch is a modified form
of Stephen Wilson's idea (thanks for the input Stephen!). What I ended up
doing was:
- Got rid of ArchSpec::CPU (which was a generic CPU enumeration that mimics
the contents of llvm::Triple::ArchType). We now rely upon the llvm::Triple
to give us the machine type from llvm::Triple::ArchType.
- There is a new ArchSpec::Core definition which further qualifies the CPU
core we are dealing with into a single enumeration. If you need support for
a new Core and want to debug it in LLDB, it must be added to this list. In
the future we can allow for dynamic core registration, but for now it is
hard coded.
- The ArchSpec can now be initialized with a llvm::Triple or with a C string
that represents the triple (it can just be an arch still like "i386").
- The ArchSpec can still initialize itself with a architecture type -- mach-o
with cpu type and subtype, or ELF with e_machine + e_flags -- and this will
then get translated into the internal llvm::Triple::ArchSpec + ArchSpec::Core.
The mach-o cpu type and subtype can be accessed using the getter functions:
uint32_t
ArchSpec::GetMachOCPUType () const;
uint32_t
ArchSpec::GetMachOCPUSubType () const;
But these functions are just converting out internal llvm::Triple::ArchSpec
+ ArchSpec::Core back into mach-o. Same goes for ELF.
All code has been updated to deal with the changes.
This should abstract us until later when the llvm::TargetSpec stuff gets
finalized and we can then adopt it.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126278 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 24348847b93337ad548032e046c71f37e647da26 |
23-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Renamed macro definition of CPSR_C to be CPSR_C_POS to avoid confusions and subtle bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126271 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 90e607bfccc74572e8422ea85d20f10db6f936b9 |
23-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "RSC (immediate)" and "RSC (register)" operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126267 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| ed32e7cdec9c0c88ad40c9ed3d05e7604599a563 |
23-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "RSB (immediate)" and "RSB (register)".
Plus add missing break stmts for "case" blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126265 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 3dd06057d611b9d73c9b7ce69011c739dc40c6ee |
22-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add two convenience functions: DecodeImmShiftThumb() and DecodeImmShiftARM() to ARMUtils.h.
Use them within EmulateInstructionARM.cpp to save repetitive typing.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126247 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 078fbc6d0bcce29a296a1afa91dae01bccf3cff5 |
22-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add "cmp<c>.w <Rn>, #<const>" emulation to EmulateCMPImm() method,
and implement EmulateCMNImm() and EMulateCMNReg() methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126236 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 688926f8fb9a56964249ec970b4ae313a5b366d4 |
22-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix the 'variants' field of "CMN (immediate)" Encoding T1 entry, it should be ARMV6T2_ABOVE, not ARMvAll.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126234 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 3847dadf9d633ead9e7697cb636f0e0210576731 |
22-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add ARM encoding entries for "CMN (immediate)" and "CMN (register)" operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126179 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 34075cb14fb56cb350e71cc696179ab0f2744423 |
22-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add ARM encoding entries for "CMP (immediate)" and "CMP (register)" operations.
Add ARM/Thumb encoding entries for "CMN (immediate)" and "CMN (register)" operations,
with the EmulateCMNImm()/Reg() methods not implemented yet for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126178 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| d642a6ad6b8e3822485a8a08fbbfa8b60a4e97f2 |
22-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "MVN (immediate)" and "MVN (register)".
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126172 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 2115b4131b0e427341959fb4007e0173bf71778d |
22-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "EOR (Immediate)", "EOR (register)",
"TEQ (immediate)", and "TEQ (register)" operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126160 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| de3cce3aa8e10c9e328e15b9210069b77f840b70 |
21-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "TST (immediate)" and "TST (register)".
Plus modified EmulateANDImm/Reg to delegate to TSTImm/Reg for Thumb2
32-bit instructions when Rd == '1111' and setflags is true.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126144 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| e39f22d1a369866808b8739c3cec15063d806833 |
19-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Make the helper method ReadCoreReg(uint32_t reg, bool *success) more generic
which now handles R0-R12, SP, LR, as well as PC. And refactored a lot of
calls to ReadRegisterUnsigned() to now funnel through ReadCoreReg(), instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126010 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 30fec12a2c2f0fe75c78e9b9f791bc53cd92cdfd |
19-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRB (register) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125994 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 7c5234db18ead0935e884429b3cace95b3a9dce4 |
19-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "ORR (immediate)" and "ORR (register)".
Add Encoding T3 of "MOV (register)" to EmulateMOVRdRm() method and fixed
some bugs in EmulateMOVRdImm() and EmulateMOVRdRm() methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125992 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| f55261f53d56b4911c4c1ce419d893e5250d7150 |
18-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRB (literal) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125975 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 157b959b101cbdddb81a690d00ff0697540d83e7 |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "ADC (immediate)" and "ADC (register)".
Plus add a helper method ReadCoreReg(uint32_t regnum, bool *success) to simplify
coding a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125961 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 21b604bbe9b0c6e1ebd275c1beff24aa2fa8732c |
18-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDRB (immediate, Thumb) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125959 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e97c0d5ea7b614b1fb257f63591e122e5651227c |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for "AND (immediate)" and "AND (register)".
Plus add macro definitions for APSR_C and APSR_V to simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125947 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| fe4791199f5eb55a1ceecff58364fcbdb2e8cfaa |
18-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDR (register) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125945 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e92b27c9262fd185359e6e2184b20d08953485f4 |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125812 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 8fa2059234b17e9c377eea49b01f0ea084f66843 |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation of Encoding A1 "A8.6.6 ADD (register)" and "A8.6.5 ADD (immediate, ARM)".
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125809 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 4d729c559d039181f250e0e3cd444fa73638f26f |
18-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDR (immediate,ARM) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125808 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 864a8e86b9e89d0f52b5020ace524eefebc9b9af |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Finished renamings to make the emulation method names consistent case-wise.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125801 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 9f687729f0a2fff5dde65ce789c3a02e84c2ffcc |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Some renamings to make the emulation method names consistent case-wise.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125800 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 4e19e62fa6e0ffabf5b5d235b52e8f229faf2bd0 |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Removed redundant entry EmulateTBB() (there's an existing one EmulateTB()) and fixed some typos
in section headings.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125796 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| 104c8b69863f229033d616245f56243ca51f1de9 |
18-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix a bug in EmulateTB() (TBB, TBH) where the branch length should be "twice"
the value of the byte/halfword returned from the table.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125793 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e311f44d0347e955cc2306c08290b1b0f503387c |
18-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add header declarations for the remaining instructions we need to
emulate, to cover those that can change the PC.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125791 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| 10530c2f7bc5030f59563fb877510a218c9cea8f |
17-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Refactoring. Abstracted the set flags operation into its own helper method
WriteFlags() and renamed WriteCoreRegisterWithFlags() to WriteCoreRegOptionalFlags().
Modified the call sites to use the helper methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125788 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| d761dcf991d66ab1d686f874270ba3c8cc9ff28c |
17-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
A8.6.6 ADD (register)
Renamed EmulateAddRdnRm() to EmulateAddReg(), and added Encoding T1 to it.
Where Encoding T2 can potentially modify the PC, causing a brnach.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125782 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 60299ec172c9bbeab4e1bbffad513d75cd1741de |
17-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateTB() method to emulate "Table Branch Byte" and "Table Branch Halfword"
operations for Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125767 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| cc96eb5967d878e8225ce61c645eb47857fbb3f2 |
17-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add stubs for pseudocode functions "MemA[]" amd "MemU[]", corresponding to aligned
and unaligned memory accesses. The new stub functions are MemARead, MemAWrite,
MemURead, and MemUWrite. At the moment these stubs just call ReadMemoryUnsigned or
WriteMemoryUnsigned, but we can fill them out further later if we decide we need
more accurate emulation of the memory system.
Replaced all the direct calls to ReadMemoryUnsigned and WriteMemoryUnsigned in
EmulateInstructionARM.cpp with calls to the appropriate new stub function.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125766 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 7c677acdc74cedd153e6cfcf13d9fab177d7fe3f |
17-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Move Align(val, alignment) utility function to ARMUtils.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125753 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 761d607aa4268797e10310c5806464406e7f9472 |
17-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add comment for the helper method WriteCoreRegisterWithFlags().
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125703 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| ca67d1c9572ad3890aa73863969a4b664f7781bc |
17-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Refactoring. Wrap the following pseudocode from the ARM Architecture Reference Manul:
// if d == 15 then // Can only occur for encoding A1
// ALUWritePC(result); // setflags is always FALSE here
// else
// R[d] = result;
// if setflags then
// APSR.N = result<31>;
// APSR.Z = IsZeroBit(result);
// APSR.C = carry;
// // APSR.V unchanged
into a helper method WriteCoreRegisterWithFlags, and modified the existing methods
to take advantage of it.
Plus add two emulation methods (declaration only for now) for ORR (immediate) and ORR (register).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125701 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| eeab485b0c1197bc4f483a9fdd7d2489703cb5ab |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for ROR (immediate), ROR (register), and RRX.
Turns out that they can be funneled through the helper methods
EmulateShiftImm()/ EmulateShiftReg() as well.
Modify EmulateShiftImm() to handle SRType_ROR and SRType_RRX.
And fix a typo in the impl of utility Shift_C() in ARMUtils.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125689 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 73a29de4b8f59594fd7a559c05fa795afe754551 |
16-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate STRB (Thumb) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125686 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 2ee35bcf1670c112b004736bf8beb672629e3e93 |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add encoding entries for LSL (immediate and register) and LSR (immediate and register) to
ARM and Thumb opcode tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125683 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 225589ecc86ebce5414931e9fbabaafc75da95a8 |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add tagging for EmulateLDRRtRnImm().
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125671 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| 56886d25fb115d3550e3d60ee2e617b4bdb8847c |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Minor comment change.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125634 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| 41a0a15df85a0d4b428c13dff8606a064f5d8dfe |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add emulation methods for LSL (immediate), LSL (register), LSR (immediate), and LSR (register).
Create two helper methods EmulateShiftImm() and EmulateShiftReg() and have ASR, LSL, and LSR
delegate to the helper methods which take an extra ARM_ShifterType parameter.
The opcodes tables have not been updated yet to reflect these new entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125633 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 3fd63e92ed8fda0007ad645ee3bf6b040f41e71e |
16-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add documentation tags for LDM/STM instruction families.
Add code to emulate STR (register) Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125623 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 68cacf7eab5609a773d5090182e827ae9f4e7032 |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Section heading for EmulateB().
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125620 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| a480df95c4f60e73f10b1df3a2579b1248fd7614 |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add section headings corresponding to some of the ARM/Thumb emulation methods for better documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125618 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| e7f8953988d593882971e4134f8423f4af1cffaa |
16-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
A8.6.14 ASR (register)
Add EmulateASRReg() Encodings T1, T2, and A1 to the opcodes tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125614 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 7fac857ec72051dc0a91b027719c275ea672a470 |
15-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add eContextRegisterLoad instruction emulation context.
Add code to emulate STR (Immediate, Thumb) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125610 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 395fc33dc4b06c048ed35047ec461bc092ef2df3 |
15-Feb-2011 |
Greg Clayton <gclayton@apple.com> |
Made lldb_private::ArchSpec contain much more than just an architecture. It
now, in addition to cpu type/subtype and architecture flavor, contains:
- byte order (big endian, little endian)
- address size in bytes
- llvm::Triple for true target triple support and for more powerful plug-in
selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125602 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 668b45124a14cbd03e7b4965b3d86fdbf208d282 |
15-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Remove the "Register ®" parameter from the BXWritePC(), LoadWritePC(), and ALUWritePC()
methods of EmulateInstructionARM class. The context data structure should provide sufficient
information already.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125596 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 4d896db529a5fef200333ef673976528319279bd |
15-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix wrong mask and encoding for T2 of ASR (immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125593 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 82f16aa9f19678ffa20b92a8df926e933940d34d |
15-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
A8.6.14 ASR (immediate)
Add EmulateASRImm() Encodings T1, T2, and A1 to the opcodes tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125592 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| af556564f80fd417a9158754f5e2ee692e183f6d |
15-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate STMIB Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125580 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| b6f8d7ec6f0a91a805d4ffa0f6fe8dcd1ae5c4d3 |
15-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate STMDB Arm instruction.
Add some bit-mask fixes to code for getting register bits for various LDM and STM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125578 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 2fd50341803ce8d15faccb3974782314842ed153 |
15-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Remove the unnecessary assignment of m_inst_cpsr inside EvaluateInstruction(),
because it's already been done within ReadInstruction().
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125569 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 1511f50f447c36af933d10910bc3d6cd1f41bfd3 |
15-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate the STMDA Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125542 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 9798cfcb34cd66965fb3ff58e60a14309534b29e |
15-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add missing logic (if BadReg(d) then UNPREDICTABLE;) for Encoding T2 of EmulateMovRdImm().
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125533 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| e524a35d2c5914e219e6b8356270efb69c400ca8 |
15-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix build warning (unused variable).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125531 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 9bfe7f219fb47d93c2b866ad5a6342a827d0dbd6 |
15-Feb-2011 |
Caroline Tice <ctice@apple.com> |
- Rearrange instruction emulation contexts to use a union for the
various types and numbers of arguments rather than trying to keep a
constant number of arguments for all the types.
- Also create a Register type within the instructions, to hold
register type and number.
- Modify EmulateInstructionArm.cpp to use the new register and context
types in all the instruction emulation functions.
- Add code to emulate the STM Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125528 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 357c30f55eeeca5df8434831c8963ef8fc109227 |
14-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add entries for EmulateMovRdImm() -- "MOV (immediate)" -- Encodings T1 & T2 into g_thumb_opcodes
table. Modify EmulateInstructionARM::EvaluateInstruction() so that if the cpsr has changed
during evaluate instruction, we flush out the change into m_inst_cpsr in preparation for the next
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125524 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 33bf6ab6b5771f1bae225edcc2115772d9d041ac |
14-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add impl for EmulateMvnRdImm() -- "MVN (immediate)". Plus zero out the arg0 field of
the context of eContextImmediate type, since the immediate value is known from the
argument value to WriteRegisterUnsigned() callback already.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125518 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 28070c30cc87cc9679bb35bc11c42d0cc6ed4b0e |
12-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add entries for Encodings T1 and A1 of "MVN (immediate)" to g_arm_opcodes and g_thumb_opcodes
tables. The corresponding EmulateMvnRdImm() method impl is empty for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125425 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 098ae2d54f9b1613e85ecb5f3d0808f102a97859 |
12-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add helper methods InITBlock() and LastInITBlock() to EmulateInstructionARM class
instead of calling out to m_it_session.InITBlock()/LastInITBlock(), which simplifies
the coding a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125421 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| ab3b3514b639d2cab1cd6c71c317e12059717a17 |
12-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateBXRm() ("Branch and Exchange") to both g_arm_opcodes and g_thumb_opcodes table.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125418 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| fa17220ce8b3db56b05317fd5e69c450127f8538 |
11-Feb-2011 |
Caroline Tice <ctice@apple.com> |
- Add three more instruction contexts to EmulateInstruction:
eContextAdjustBaseRegister, eContextRegisterStore and
eContextWriteMemoryRandomBits.
- Implement a version of WriteBits32UnknownToMemory for writing to memory.
- Modify EmulateLDM, EmulateLDMDA, EmulateLDMDB and EmulateLDMIB to use the
eContextAdjustBaseRegister context when appropriate.
- Add code to emulate the STM/STMIA/STMEA Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125414 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| e4a4d301f3a06539098608749c55afaec063fca9 |
11-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateCmpRnRm() for Encodings T1 & T2 to the g_thumb_opcodes table to emulate
CMP (register) operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125413 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 383d629938986b4ae4867f08505be8a9147c1308 |
11-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Rearraned some emulate instruction entries under the appropriate category.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125405 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 44c10f05a667cd279c6baea7b80b40b49c02f20c |
11-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Handle the case of interworking branch for EmulateLDMDA.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125392 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| c9de910d61f0471d18fced716fc10681ef432010 |
11-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add Thumb2 LDR (literal) instruction into the g_thumb_opcodes table.
Change the method name from *LDRRdPCRelative to *LDRRtPCRelative to be compliant
with the ARM Arch Manual which uses Rt for the destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125390 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 62ff6f5a8c243ea8fb08039c71830a8138990945 |
11-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix build.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125379 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 713c2665a27096b68f3f8956222375354f1292f8 |
11-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add new instruction context, eContextWriteRegisterRandomBits.
Add new utility function, WriteBits32Unknown
Modify the LDM* instruction emulation functions to call WriteBits32Unknown.
Add missing overview comments to the LDM* instruction emulation functions.
Add code to emulate LDMDA Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125377 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| d4dc4444e124b290cbe30cdaade7e97161fa47c8 |
11-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add an entry for CMP (immediate) (Encoding T1) to the g_thumb_opcodes table.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125333 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| bf6ad173895183797cbd0ebd18710b2364a2c4c8 |
11-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add a helper method AddWithCarry() to the EmulateInstructionARM class.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125329 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| bd599907c7c6203e02123d825d1df017ce58f653 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Namings are important. Renamed Bits32(const uint32_t val, uint32_t bit) to Bit32(val, bit) and
SetBits32(uint32_t &bits, uint32_t bit, uint32_t val) to SetBit32(bits, bit, val).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125312 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 1928020d3e75310c2e15b94b9480b5699285d735 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Some refactorings to use the convenience function: Bits32(const uint32_t value, const uint32_t bit).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125303 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 0e00af21580d7ee85e14abd518d4aa54157dcbf5 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add some comment markers.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125302 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 338bf54a49633d90f3c5e808847470901f25dee9 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add a generic EmulateMovRdRm() method and modify/add entries to the g_thumb_opcodes
table. Also add some more defines and convenience functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125300 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| e7cf4206fd3fa57067a9612118250bbfb88a4e68 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Rearrange the order of g_thumb_opcodes entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125295 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| ef21b59059720fb14bf169f08c3cc3ffc2c598c8 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateLDRRtRnImm() for EncodingT1 of LDR (immediate, Thumb) to the g_thumb_opcodes table,
and a helper method UnalignedSupport().
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125258 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 558133bb1d2d89dd4618259ce27b5c06f3970b48 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add a new member variable m_new_inst_cpsr to catch the to-be-updated state
of the CPSR during the course of executing an opcode, and modified SelectInstrSet()
to update this variable instead of the original m_inst_cpsr, which should be
the cached copy of the CPSR at the beginning of executing the opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125244 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 26863dc1d68712415ed56c9953f6fed79b38e131 |
10-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateAddRdnRm() for EncodingT2 of ADD(register) to the g_thumb_opcodes table,
and a helper method ALUWritePC(Context&, uint32_t).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125241 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| e62b50d64e9cdf806a36cefd4cbf96250679669d |
09-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Modified existing Emulate* methods to call LoadWritePC(context, data) where appropriate to
effect an interworking branch if the ArchVersion() is ARMv5T and above.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125227 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| f3eaacfc02d0a98d3bac1eaef74ad5c1c66ccfdc |
09-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Modified EmulatePop impl to use the helper method LoadWritePC(context, data) since if PC
is in the list of registers to be load and we're in ARMv5T and above, this is an interworking branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125212 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 0f309db3ba3f297599809bac0bbbb13719f1c860 |
09-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
If the CPSR is changed due to switching between ARM and Thumb ISETSTATE,
we want to record it and issue a WriteRegister callback so the clients
can track the mode changes accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125209 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| f29a08f9176c1a443942c08a999763e79b911f62 |
09-Feb-2011 |
Greg Clayton <gclayton@apple.com> |
Patch from Kirk Beitz to make things compile on MinGW minus the putenv part.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125199 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| ee9b1f7a1b52427f8ac3ae43d8064f10add803b1 |
09-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add some helper methods to the EmulateInstructionARM class as a first step in the
refactorings of EmulateInstructionARM.cpp file, which will be modified later to
take advantage of these helper methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125148 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 85aab33e2d866be406aa0ecc96cd37aa7a46a35c |
09-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate the LDMIB Arm instruction.
Modify code for LDM and LDMDB instructions to only
create one context and to reuse it, rather than
creating multiple contexts.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125139 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 7c1bf922ae84a214225869dbe6a1847e891815d0 |
09-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125138 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 53ebab7a7bed312c496a49d52b225a01a1a02e89 |
09-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateCB() entry to the g_thumb_opcodes table to represent "Compare and Branch
on NonZero and Compare and Branch on Zero" operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125134 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 0b29e24ecd86048ac5d722dc964e55bab49f72aa |
09-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate LDMDB Arm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125133 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| b9f76c33ab97dcef2e9c1dbc471097edd6b98a86 |
08-Feb-2011 |
Caroline Tice <ctice@apple.com> |
Add code to emulate the LDM ARM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125118 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| d6c13f00a467e7c9357c9fbb4375a0b77d20c6a9 |
08-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add missing implementation for "BL, BLX (immediate)" Encoding T1 and an entry for "bl <label>"
into g_thumb_opcodes table.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125112 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| c47d0caf319bef8b7263b60366ad62606a2ccb20 |
08-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add missing implementation for "BL, BLX (immediate)" Encoding A1.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125103 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 9ee056bb17843e8c757461dbf56c49e8de99a65e |
08-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add implementation for EmulateInstructionARM::EmulateB() and fixed two typos in g_thumb_opcodes
as pointed out By Caroline. Refactored a little bit by adding two new helper methods to the
EmulateInstructionARM class:
o BranchWritePC()
o BXWritePC()
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125059 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 3b620b38cd170c20ea607585021ab2ab50286943 |
07-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateInstructionARM::EmulateB entries to the g_arm_opcodes and g_thumb_opcodes
tables. EmulateB() has empty impl. and needs to be filled in later.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125048 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 17f5afe9ed10bda3efbce0f26cf0c030331f8b15 |
05-Feb-2011 |
Greg Clayton <gclayton@apple.com> |
Header patch, virtual dtor patch and missed UUID patch from Kirk Beitz.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124931 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.h
|
| 8f128ebc0eca6f388a14a042e8b2b99cf172cf37 |
05-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Handle the thumb branch instructions which have their cond bits embedded in the instruction stream.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124925 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| c315f860b343cf4a143f43c7d570d151989abb46 |
05-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateInstructionARM::EmulateIT() to the g_thumb_opcodes table,
to represent the the 'If Then' instruction which makes up to four following
instructions (the IT block)conditional.
Hook up ITSession utility class as a member variable of EmulateInstructionARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124915 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 930704795c783e5bf1768a43da6f957108b40873 |
05-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add a utility class ITSession to maintain the ITState for the Thumb ISA.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124906 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| b77be414a1a4b74827f30e5944a58d4af0445ff4 |
04-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateInstructionARM::EmulateSVC() to the g_arm_opcodes and g_thumb_opcodes tables,
to represent the supervisor call instruction (previosuly software interrupt).
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124840 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 9b8d783409b5b80af2cf129c45cbc39c9544ccca |
02-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateBLXImmediate() and EmulateBLXRm() to the g_arm_opcodes and g_thumb_opcodes tables,
which represent "bl <label>", "blx <label>", and "blx <Rm>" instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124710 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| c28a76dfb091742a508c568d77fc52975afb5e3f |
01-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Remove the 'lldb_private::' namespace resolution operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124671 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
|
| 587a0a4e5341bac8a8936b84fc73d6a7e8ada46f |
01-Feb-2011 |
Johnny Chen <johnny.chen@apple.com> |
Add EmulateVPOP() to the g_arm_opcodes and g_thumb_opcodes tables, which represents
an operation to load multiple extension registers from the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124670 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 2b8e8b0d1ea00d0076ac20568c2ce2a2a1fe0240 |
01-Feb-2011 |
Greg Clayton <gclayton@apple.com> |
Cleaned up the EmulateInstructionARM to have the evaluate instruction
callbacks use member functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124636 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|
| 8482dedc1d0fb4669d1ec63ec259d1cb8eaeb20f |
01-Feb-2011 |
Greg Clayton <gclayton@apple.com> |
Made the EmulateInstruction class into a plug-in interface and moved the
source files around into the places they need to go.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124631 91177308-0d34-0410-b5e6-96231b3b80d8
RM/EmulateInstructionARM.cpp
RM/EmulateInstructionARM.h
|