Cross Reference: /art/compiler/dex/quick/x86/codegen

Lines Matching refs:opcode
134   const char* GetTargetInstFmt(int opcode) OVERRIDE;
135   const char* GetTargetInstName(int opcode) OVERRIDE;
138   uint64_t GetTargetInstFlags(int opcode) OVERRIDE;
151   void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
153   void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
155   void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
157   void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
170   void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
172   void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
174   void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
178   void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest,
205    * @param op The DEX opcode for the operation.
215    * @param op The DEX opcode for the operation.
223    * @param op The DEX opcode for the operation.
302    * @param opcode Operation to perform.
307   void GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_lhs,
485   void MaskVectorRegister(X86OpCode opcode, RegStorage rs_src1, uint32_t m1, uint32_t m2, uint32_t m3, uint32_t m4);
486   void AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir);
488   static bool ProvidesFullMemoryBarrier(X86OpCode opcode);
540    * @param mir The MIR whose opcode is kMirConstVector
549    * @param mir The MIR whose opcode is kMirConstVector.
559    * @param mir The MIR whose opcode is kMirConstVector.
569    * @param mir The MIR whose opcode is kMirConstVector.
579    * @param mir The MIR whose opcode is kMirConstVector.
589    * @param mir The MIR whose opcode is kMirConstVector.
599    * @param mir The MIR whose opcode is kMirConstVector.
609    * @param mir The MIR whose opcode is kMirConstVector.
627    * @param mir The MIR whose opcode is kMirConstVector.
637    * @param mir The MIR whose opcode is kMirConstVector.
647    * @param mir The MIR whose opcode is kMirConstVector.
658    * @param mir The MIR whose opcode is kMirConstVector.
669    * @param mir The MIR whose opcode is kMirConstVector.
677    * @brief Generate code for a vector opcode.
679    * @param mir The MIR whose opcode is a non-standard opcode.
684    * @brief Return the correct x86 opcode for the Dex operation
685    * @param op Dex opcode for the operation
689    * @returns the correct x86 opcode to perform the operation
694    * @brief Return the correct x86 opcode for the Dex operation
695    * @param op Dex opcode for the operation
699    * @returns the correct x86 opcode to perform the operation
706    * @brief Is this operation a no-op for this opcode and value
707    * @param op Dex opcode for the operation
744    * @param opcode The DEX opcode to specify the shift type.
750   RegLocation GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
819   void GenMulLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
863    * @param opcode MIR instruction opcode.
867   void AnalyzeExtendedMIR(int opcode, BasicBlock * bb, MIR *mir);
871    * @param opcode MIR instruction opcode.
875   virtual void AnalyzeMIR(int opcode, BasicBlock * bb, MIR *mir);
879    * @param opcode MIR instruction opcode.
883   void AnalyzeFPInstruction(int opcode, BasicBlock * bb, MIR *mir);
893    * @param opcode MIR instruction opcode.
897   void AnalyzeInvokeStatic(int opcode, BasicBlock * bb, MIR *mir);