Lines Matching refs:dd

379 bool Thumb2Assembler::vmovd(DRegister dd, double d_imm, Condition cond) {
387 dd, D0, D0);
399 void Thumb2Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) {
400 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm);
410 void Thumb2Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm,
412 EmitVFPddd(cond, B21 | B20, dd, dn, dm);
422 void Thumb2Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm,
424 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm);
434 void Thumb2Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm,
436 EmitVFPddd(cond, B21, dd, dn, dm);
446 void Thumb2Assembler::vmlad(DRegister dd, DRegister dn, DRegister dm,
448 EmitVFPddd(cond, 0, dd, dn, dm);
458 void Thumb2Assembler::vmlsd(DRegister dd, DRegister dn, DRegister dm,
460 EmitVFPddd(cond, B6, dd, dn, dm);
470 void Thumb2Assembler::vdivd(DRegister dd, DRegister dn, DRegister dm,
472 EmitVFPddd(cond, B23, dd, dn, dm);
481 void Thumb2Assembler::vabsd(DRegister dd, DRegister dm, Condition cond) {
482 EmitVFPddd(cond, B23 | B21 | B20 | B7 | B6, dd, D0, dm);
491 void Thumb2Assembler::vnegd(DRegister dd, DRegister dm, Condition cond) {
492 EmitVFPddd(cond, B23 | B21 | B20 | B16 | B6, dd, D0, dm);
500 void Thumb2Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) {
501 EmitVFPddd(cond, B23 | B21 | B20 | B16 | B7 | B6, dd, D0, dm);
510 void Thumb2Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) {
511 EmitVFPds(cond, B23 | B21 | B20 | B18 | B17 | B16 | B7 | B6, dd, sm);
530 void Thumb2Assembler::vcvtdi(DRegister dd, SRegister sm, Condition cond) {
531 EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B7 | B6, dd, sm);
550 void Thumb2Assembler::vcvtdu(DRegister dd, SRegister sm, Condition cond) {
551 EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B6, dd, sm);
560 void Thumb2Assembler::vcmpd(DRegister dd, DRegister dm, Condition cond) {
561 EmitVFPddd(cond, B23 | B21 | B20 | B18 | B6, dd, D0, dm);
570 void Thumb2Assembler::vcmpdz(DRegister dd, Condition cond) {
571 EmitVFPddd(cond, B23 | B21 | B20 | B18 | B16 | B6, dd, D0, D0);
1788 void Thumb2Assembler::vldrd(DRegister dd, const Address& ad, Condition cond) {
1790 CHECK_NE(dd, kNoDRegister);
1794 ((static_cast<int32_t>(dd) >> 4)*B22) |
1795 ((static_cast<int32_t>(dd) & 0xf)*B12) |
1801 void Thumb2Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) {
1804 CHECK_NE(dd, kNoDRegister);
1808 ((static_cast<int32_t>(dd) >> 4)*B22) |
1809 ((static_cast<int32_t>(dd) & 0xf)*B12) |
1880 DRegister dd, DRegister dn, DRegister dm) {
1881 CHECK_NE(dd, kNoDRegister);
1887 ((static_cast<int32_t>(dd) >> 4)*B22) |
1889 ((static_cast<int32_t>(dd) & 0xf)*B12) |
1913 DRegister dd, SRegister sm) {
1914 CHECK_NE(dd, kNoDRegister);
1919 ((static_cast<int32_t>(dd) >> 4)*B22) |
1920 ((static_cast<int32_t>(dd) & 0xf)*B12) |