Lines Matching refs:base
19 #include "base/casts.h"
477 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base,
481 Lb(reg, base, offset);
484 Lbu(reg, base, offset);
487 Lh(reg, base, offset);
490 Lhu(reg, base, offset);
493 Lw(reg, base, offset);
503 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) {
504 Lwc1(reg, base, offset);
507 void MipsAssembler::LoadDFromOffset(DRegister reg, Register base, int32_t offset) {
508 Ldc1(reg, base, offset);
511 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base,
515 Sb(reg, base, offset);
518 Sh(reg, base, offset);
521 Sw(reg, base, offset);
531 void MipsAssembler::StoreFToOffset(FRegister reg, Register base, int32_t offset) {
532 Swc1(reg, base, offset);
535 void MipsAssembler::StoreDToOffset(DRegister reg, Register base, int32_t offset) {
536 Sdc1(reg, base, offset);
683 void MipsAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base,
688 base.AsMips().AsCoreRegister(), offs.Int32Value());
694 void MipsAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base,
699 base.AsMips().AsCoreRegister(), offs.Int32Value());
906 MipsManagedRegister base = mbase.AsMips();
908 CHECK(base.IsCoreRegister()) << base;
911 base.AsCoreRegister(), offset.Int32Value());
916 void MipsAssembler::Call(FrameOffset base, Offset offset, ManagedRegister mscratch) {
919 // Call *(*(SP + base) + offset)
921 SP, base.Int32Value());