Cross Reference: /art/compiler/utils/mips/assembler

Lines Matching refs:scratch
632   MipsManagedRegister scratch = mscratch.AsMips();
633   CHECK(scratch.IsCoreRegister()) << scratch;
634   LoadImmediate(scratch.AsCoreRegister(), imm);
635   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
640   MipsManagedRegister scratch = mscratch.AsMips();
641   CHECK(scratch.IsCoreRegister()) << scratch;
642   LoadImmediate(scratch.AsCoreRegister(), imm);
643   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), S1, dest.Int32Value());
649   MipsManagedRegister scratch = mscratch.AsMips();
650   CHECK(scratch.IsCoreRegister()) << scratch;
651   AddConstant(scratch.AsCoreRegister(), SP, fr_offs.Int32Value());
652   StoreToOffset(kStoreWord, scratch.AsCoreRegister(),
663   MipsManagedRegister scratch = mscratch.AsMips();
665   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, in_off.Int32Value());
666   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value() + 4);
747   MipsManagedRegister scratch = mscratch.AsMips();
748   CHECK(scratch.IsCoreRegister()) << scratch;
749   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, src.Int32Value());
750   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
756   MipsManagedRegister scratch = mscratch.AsMips();
757   CHECK(scratch.IsCoreRegister()) << scratch;
758   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(),
760   StoreToOffset(kStoreWord, scratch.AsCoreRegister(),
767   MipsManagedRegister scratch = mscratch.AsMips();
768   CHECK(scratch.IsCoreRegister()) << scratch;
769   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(),
771   StoreToOffset(kStoreWord, scratch.AsCoreRegister(),
777   MipsManagedRegister scratch = mscratch.AsMips();
778   CHECK(scratch.IsCoreRegister()) << scratch;
781     LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, src.Int32Value());
782     StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
784     LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, src.Int32Value());
785     StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
786     LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, src.Int32Value() + 4);
787     StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value() + 4);
793   Register scratch = mscratch.AsMips().AsCoreRegister();
795   LoadFromOffset(kLoadWord, scratch, src_base.AsMips().AsCoreRegister(), src_offset.Int32Value());
796   StoreToOffset(kStoreWord, scratch, SP, dest.Int32Value());
801   Register scratch = mscratch.AsMips().AsCoreRegister();
803   LoadFromOffset(kLoadWord, scratch, SP, src.Int32Value());
804   StoreToOffset(kStoreWord, scratch, dest_base.AsMips().AsCoreRegister(), dest_offset.Int32Value());
816   Register scratch = mscratch.AsMips().AsCoreRegister();
817   LoadFromOffset(kLoadWord, scratch, src.AsMips().AsCoreRegister(), src_offset.Int32Value());
818   StoreToOffset(kStoreWord, scratch, dest.AsMips().AsCoreRegister(), dest_offset.Int32Value());
862   MipsManagedRegister scratch = mscratch.AsMips();
863   CHECK(scratch.IsCoreRegister()) << scratch;
866     LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP,
870     // e.g. scratch = (scratch == 0) ? 0 : (SP+handle_scope_offset)
871     EmitBranch(scratch.AsCoreRegister(), ZERO, &null_arg, true);
872     AddConstant(scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
875     AddConstant(scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
877   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, out_off.Int32Value());
907   MipsManagedRegister scratch = mscratch.AsMips();
909   CHECK(scratch.IsCoreRegister()) << scratch;
910   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(),
912   Jalr(scratch.AsCoreRegister());
917   MipsManagedRegister scratch = mscratch.AsMips();
918   CHECK(scratch.IsCoreRegister()) << scratch;
920   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(),
922   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(),
923                  scratch.AsCoreRegister(), offset.Int32Value());
924   Jalr(scratch.AsCoreRegister());
942   MipsManagedRegister scratch = mscratch.AsMips();
943   MipsExceptionSlowPath* slow = new MipsExceptionSlowPath(scratch, stack_adjust);
945   LoadFromOffset(kLoadWord, scratch.AsCoreRegister(),
947   EmitBranch(scratch.AsCoreRegister(), ZERO, slow->Entry(), false);