Lines Matching refs:rn
1087 const Register& rn,
1092 const Register& rn,
1096 void cmn(const Register& rn, const Operand& operand);
1100 const Register& rn,
1105 const Register& rn,
1109 void cmp(const Register& rn, const Operand& operand);
1121 const Register& rn,
1126 const Register& rn,
1131 const Register& rn,
1136 const Register& rn,
1150 const Register& rn,
1155 const Register& rn,
1159 void tst(const Register& rn, const Operand& operand);
1163 const Register& rn,
1168 const Register& rn,
1172 void orr(const Register& rd, const Register& rn, const Operand& operand);
1175 void orn(const Register& rd, const Register& rn, const Operand& operand);
1178 void eor(const Register& rd, const Register& rn, const Operand& operand);
1181 void eon(const Register& rd, const Register& rn, const Operand& operand);
1184 void lslv(const Register& rd, const Register& rn, const Register& rm);
1187 void lsrv(const Register& rd, const Register& rn, const Register& rm);
1190 void asrv(const Register& rd, const Register& rn, const Register& rm);
1193 void rorv(const Register& rd, const Register& rn, const Register& rm);
1198 const Register& rn,
1204 const Register& rn,
1210 const Register& rn,
1217 const Register& rn,
1221 DCHECK(lsb + width <= rn.SizeInBits());
1222 bfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1);
1227 const Register& rn,
1231 DCHECK(lsb + width <= rn.SizeInBits());
1232 bfm(rd, rn, lsb, lsb + width - 1);
1237 void asr(const Register& rd, const Register& rn, unsigned shift) {
1239 sbfm(rd, rn, shift, rd.SizeInBits() - 1);
1244 const Register& rn,
1248 DCHECK(lsb + width <= rn.SizeInBits());
1249 sbfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1);
1254 const Register& rn,
1258 DCHECK(lsb + width <= rn.SizeInBits());
1259 sbfm(rd, rn, lsb, lsb + width - 1);
1263 void sxtb(const Register& rd, const Register& rn) {
1264 sbfm(rd, rn, 0, 7);
1268 void sxth(const Register& rd, const Register& rn) {
1269 sbfm(rd, rn, 0, 15);
1273 void sxtw(const Register& rd, const Register& rn) {
1274 sbfm(rd, rn, 0, 31);
1279 void lsl(const Register& rd, const Register& rn, unsigned shift) {
1282 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
1286 void lsr(const Register& rd, const Register& rn, unsigned shift) {
1288 ubfm(rd, rn, shift, rd.SizeInBits() - 1);
1293 const Register& rn,
1297 DCHECK(lsb + width <= rn.SizeInBits());
1298 ubfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1);
1303 const Register& rn,
1307 DCHECK(lsb + width <= rn.SizeInBits());
1308 ubfm(rd, rn, lsb, lsb + width - 1);
1312 void uxtb(const Register& rd, const Register& rn) {
1313 ubfm(rd, rn, 0, 7);
1317 void uxth(const Register& rd, const Register& rn) {
1318 ubfm(rd, rn, 0, 15);
1322 void uxtw(const Register& rd, const Register& rn) {
1323 ubfm(rd, rn, 0, 31);
1328 const Register& rn,
1332 // Conditional select: rd = cond ? rn : rm.
1334 const Register& rn,
1338 // Conditional select increment: rd = cond ? rn : rm + 1.
1340 const Register& rn,
1344 // Conditional select inversion: rd = cond ? rn : ~rm.
1346 const Register& rn,
1350 // Conditional select negation: rd = cond ? rn : -rm.
1352 const Register& rn,
1362 // Conditional increment: rd = cond ? rn + 1 : rn.
1363 void cinc(const Register& rd, const Register& rn, Condition cond);
1365 // Conditional invert: rd = cond ? ~rn : rn.
1366 void cinv(const Register& rd, const Register& rn, Condition cond);
1368 // Conditional negate: rd = cond ? -rn : rn.
1369 void cneg(const Register& rd, const Register& rn, Condition cond);
1378 void ccmn(const Register& rn,
1384 void ccmp(const Register& rn,
1391 void mul(const Register& rd, const Register& rn, const Register& rm);
1395 const Register& rn,
1400 void mneg(const Register& rd, const Register& rn, const Register& rm);
1404 const Register& rn,
1409 void smull(const Register& rd, const Register& rn, const Register& rm);
1412 void smulh(const Register& rd, const Register& rn, const Register& rm);
1416 const Register& rn,
1422 const Register& rn,
1428 const Register& rn,
1434 const Register& rn,
1439 void sdiv(const Register& rd, const Register& rn, const Register& rm);
1442 void udiv(const Register& rd, const Register& rn, const Register& rm);
1445 void rbit(const Register& rd, const Register& rn);
1446 void rev16(const Register& rd, const Register& rn);
1447 void rev32(const Register& rd, const Register& rn);
1448 void rev(const Register& rd, const Register& rn);
1449 void clz(const Register& rd, const Register& rn);
1450 void cls(const Register& rd, const Register& rn);
1539 void mov(const Register& rd, const Register& rn);
1590 void fmov(FPRegister fd, Register rn);
1715 void scvtf(const FPRegister& fd, const Register& rn, unsigned fbits = 0);
1718 void ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits = 0);
1767 static Instr Rn(CPURegister rn) {
1768 DCHECK(rn.code() != kSPRegInternalCode);
1769 return rn.code() << Rn_offset;
1799 static Instr RnSP(Register rn) {
1800 DCHECK(!rn.IsZero());
1801 return (rn.code() & kRegCodeMask) << Rn_offset;
1945 const Register& rn,
1949 const Register& rn,
1955 void ConditionalCompare(const Register& rn,
1963 const Register& rn,
1971 const Register& rn,
1975 const Register& rn,
1980 const Register& rn,
2017 const Register& rn,
2022 const Register& rn,
2031 const Register& rn,
2036 const Register& rn,
2039 const Register& rn,