Lines Matching defs:Load

355       // Load one integer register's worth from the stack slot.
356 SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr,
360 Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, Ptr,
377 // Load from the stack slot.
378 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
382 Stores.push_back(DAG.getTruncStore(Load.getValue(1), dl, Load, Ptr,
473 // Load one integer register's worth from the original location.
474 SDValue Load = DAG.getLoad(RegVT, dl, Chain, Ptr,
481 Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, StackPtr,
493 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr,
502 Stores.push_back(DAG.getTruncStore(Load.getValue(1), dl, Load, StackPtr,
510 Load = DAG.getExtLoad(LD->getExtensionType(), dl, VT, TF, StackBase,
514 ValResult = Load;
536 // Load the value in two parts
615 // Load the updated vector.
928 assert(RVal.getNode() != Node && "Load must be completely replaced");
993 "Load size not an integral number of bytes!");
1001 // Load the bottom RoundWidth bits.
1007 // Load the remaining ExtraWidth bits.
1031 // Load the top RoundWidth bits.
1036 // Load the remaining ExtraWidth bits.
1099 SDValue Load = DAG.getLoad(SrcVT, dl, Chain, Ptr,
1111 Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
1112 Chain = Load.getValue(1);
1148 assert(Value.getNode() != Node && "Load must be completely replaced");
1568 // Load out a legal integer with the same sign bit as the float.
1579 // Load a legal integer containing the sign bit.
2437 SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot,
2445 SDValue Sub = DAG.getNode(ISD::FSUB, dl, MVT::f64, Load, Bias);
2580 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT,
2584 HandleSDNode Handle(Load);
2585 LegalizeOp(Load.getNode());
3269 // Load the actual argument out of the pointer VAList