Lines Matching refs:Out
52 const MCInstrInfo &MII, MCStreamer &Out) override {
53 InstrumentMOV(Inst, Operands, Ctx, MII, Out);
59 MCStreamer &Out) = 0;
62 MCStreamer &Out) = 0;
65 bool IsWrite, MCContext &Ctx, MCStreamer &Out);
67 MCContext &Ctx, const MCInstrInfo &MII, MCStreamer &Out);
68 void EmitInstruction(MCStreamer &Out, const MCInst &Inst) {
69 Out.EmitInstruction(Inst, STI);
72 void EmitLabel(MCStreamer &Out, MCSymbol *Label) { Out.EmitLabel(Label); }
80 MCStreamer &Out) {
92 InstrumentMemOperandSmallImpl(MemOp, AccessSize, IsWrite, Ctx, Out);
94 InstrumentMemOperandLargeImpl(MemOp, AccessSize, IsWrite, Ctx, Out);
99 const MCInstrInfo &MII, MCStreamer &Out) {
139 InstrumentMemOperand(Op, AccessSize, IsWrite, Ctx, Out);
153 MCStreamer &Out) override;
156 MCStreamer &Out) override;
159 void EmitCallAsanReport(MCContext &Ctx, MCStreamer &Out, unsigned AccessSize,
161 EmitInstruction(Out, MCInstBuilder(X86::CLD));
162 EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS));
164 EmitInstruction(Out, MCInstBuilder(X86::AND64ri8).addReg(X86::ESP)
166 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(AddressReg));
173 EmitInstruction(Out, MCInstBuilder(X86::CALLpcrel32).addExpr(FnExpr));
179 MCStreamer &Out) {
180 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(X86::EAX));
181 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(X86::ECX));
182 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(X86::EDX));
183 EmitInstruction(Out, MCInstBuilder(X86::PUSHF32));
190 EmitInstruction(Out, Inst);
194 Out, MCInstBuilder(X86::MOV32rr).addReg(X86::ECX).addReg(X86::EAX));
195 EmitInstruction(Out, MCInstBuilder(X86::SHR32ri).addReg(X86::ECX)
206 EmitInstruction(Out, Inst);
209 EmitInstruction(Out,
213 EmitInstruction(Out, MCInstBuilder(X86::JE_4).addExpr(DoneExpr));
216 Out, MCInstBuilder(X86::MOV32rr).addReg(X86::EDX).addReg(X86::EAX));
217 EmitInstruction(Out, MCInstBuilder(X86::AND32ri).addReg(X86::EDX)
232 EmitInstruction(Out, Inst);
236 EmitInstruction(Out, MCInstBuilder(X86::ADD32ri8).addReg(X86::EDX)
245 Out, MCInstBuilder(X86::MOVSX32rr8).addReg(X86::ECX).addReg(X86::CL));
247 Out, MCInstBuilder(X86::CMP32rr).addReg(X86::EDX).addReg(X86::ECX));
248 EmitInstruction(Out, MCInstBuilder(X86::JL_4).addExpr(DoneExpr));
250 EmitCallAsanReport(Ctx, Out, AccessSize, IsWrite, X86::EAX);
251 EmitLabel(Out, DoneSym);
253 EmitInstruction(Out, MCInstBuilder(X86::POPF32));
254 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::EDX));
255 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::ECX));
256 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::EAX));
261 MCStreamer &Out) {
262 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(X86::EAX));
263 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(X86::ECX));
264 EmitInstruction(Out, MCInstBuilder(X86::PUSHF32));
271 EmitInstruction(Out, Inst);
274 Out, MCInstBuilder(X86::MOV32rr).addReg(X86::ECX).addReg(X86::EAX));
275 EmitInstruction(Out, MCInstBuilder(X86::SHR32ri).addReg(X86::ECX)
295 EmitInstruction(Out, Inst);
299 EmitInstruction(Out, MCInstBuilder(X86::JE_4).addExpr(DoneExpr));
301 EmitCallAsanReport(Ctx, Out, AccessSize, IsWrite, X86::EAX);
302 EmitLabel(Out, DoneSym);
304 EmitInstruction(Out, MCInstBuilder(X86::POPF32));
305 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::ECX));
306 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::EAX));
319 MCStreamer &Out) override;
322 MCStreamer &Out) override;
325 void EmitAdjustRSP(MCContext &Ctx, MCStreamer &Out, long Offset) {
334 EmitInstruction(Out, Inst);
337 void EmitCallAsanReport(MCContext &Ctx, MCStreamer &Out, unsigned AccessSize,
339 EmitInstruction(Out, MCInstBuilder(X86::CLD));
340 EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS));
342 EmitInstruction(Out, MCInstBuilder(X86::AND64ri8).addReg(X86::RSP)
349 EmitInstruction(Out, MCInstBuilder(X86::CALL64pcrel32).addExpr(FnExpr));
355 MCStreamer &Out) {
356 EmitAdjustRSP(Ctx, Out, -128);
357 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(X86::RAX));
358 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(X86::RCX));
359 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(X86::RDI));
360 EmitInstruction(Out, MCInstBuilder(X86::PUSHF64));
366 EmitInstruction(Out, Inst);
369 Out, MCInstBuilder(X86::MOV64rr).addReg(X86::RAX).addReg(X86::RDI));
370 EmitInstruction(Out, MCInstBuilder(X86::SHR64ri).addReg(X86::RAX)
380 EmitInstruction(Out, Inst);
383 EmitInstruction(Out,
387 EmitInstruction(Out, MCInstBuilder(X86::JE_4).addExpr(DoneExpr));
390 Out, MCInstBuilder(X86::MOV32rr).addReg(X86::ECX).addReg(X86::EDI));
391 EmitInstruction(Out, MCInstBuilder(X86::AND32ri).addReg(X86::ECX)
406 EmitInstruction(Out, Inst);
410 EmitInstruction(Out, MCInstBuilder(X86::ADD32ri8).addReg(X86::ECX)
419 Out, MCInstBuilder(X86::MOVSX32rr8).addReg(X86::EAX).addReg(X86::AL));
421 Out, MCInstBuilder(X86::CMP32rr).addReg(X86::ECX).addReg(X86::EAX));
422 EmitInstruction(Out, MCInstBuilder(X86::JL_4).addExpr(DoneExpr));
424 EmitCallAsanReport(Ctx, Out, AccessSize, IsWrite);
425 EmitLabel(Out, DoneSym);
427 EmitInstruction(Out, MCInstBuilder(X86::POPF64));
428 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(X86::RDI));
429 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(X86::RCX));
430 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(X86::RAX));
431 EmitAdjustRSP(Ctx, Out, 128);
436 MCStreamer &Out) {
437 EmitAdjustRSP(Ctx, Out, -128);
438 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(X86::RAX));
439 EmitInstruction(Out, MCInstBuilder(X86::PUSHF64));
446 EmitInstruction(Out, Inst);
448 EmitInstruction(Out, MCInstBuilder(X86::SHR64ri).addReg(X86::RAX)
468 EmitInstruction(Out, Inst);
473 EmitInstruction(Out, MCInstBuilder(X86::JE_4).addExpr(DoneExpr));
475 EmitCallAsanReport(Ctx, Out, AccessSize, IsWrite);
476 EmitLabel(Out, DoneSym);
478 EmitInstruction(Out, MCInstBuilder(X86::POPF64));
479 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(X86::RAX));
480 EmitAdjustRSP(Ctx, Out, 128);
490 const MCInstrInfo &MII, MCStreamer &Out) {}