Lines Matching refs:vpc
65 temp(struct nvfx_vpc *vpc)
67 int idx = ffs(~vpc->r_temps) - 1;
75 vpc->r_temps |= (1 << idx);
76 vpc->r_temps_discard |= (1 << idx);
81 release_temps(struct nvfx_vpc *vpc)
83 vpc->r_temps &= ~vpc->r_temps_discard;
84 vpc->r_temps_discard = 0;
88 constant(struct nvfx_vpc *vpc, int pipe, float x, float y, float z, float w)
90 struct nv30_vertprog *vp = vpc->vp;
117 emit_src(struct nv30_context *nv30, struct nvfx_vpc *vpc, uint32_t *hw,
120 struct nv30_vertprog *vp = vpc->vp;
201 emit_dst(struct nv30_context *nv30, struct nvfx_vpc *vpc, uint32_t *hw,
204 struct nv30_vertprog *vp = vpc->vp;
291 nvfx_vp_emit(struct nvfx_vpc *vpc, struct nvfx_insn insn)
293 struct nv30_context *nv30 = vpc->nv30;
294 struct nv30_vertprog *vp = vpc->vp;
299 vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi));
300 vpc->vpi = &vp->insns[vp->nr_insns - 1];
301 memset(vpc->vpi, 0, sizeof(*vpc->vpi));
303 hw = vpc->vpi->data;
354 emit_dst(nv30, vpc, hw, slot, insn.dst);
355 emit_src(nv30, vpc, hw, 0, insn.src[0]);
356 emit_src(nv30, vpc, hw, 1, insn.src[1]);
357 emit_src(nv30, vpc, hw, 2, insn.src[2]);
364 tgsi_src(struct nvfx_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
373 src.reg = vpc->r_const[0];
376 src.reg = vpc->r_const[fsrc->Register.Index];
380 src.reg = vpc->imm[fsrc->Register.Index];
383 src.reg = vpc->r_temp[fsrc->Register.Index];
419 tgsi_dst(struct nvfx_vpc *vpc, const struct tgsi_full_dst_register *fdst) {
427 dst = vpc->r_result[fdst->Register.Index];
430 dst = vpc->r_temp[fdst->Register.Index];
433 dst = vpc->r_address[fdst->Register.Index];
458 nvfx_vertprog_parse_instruction(struct nv30_context *nv30, struct nvfx_vpc *vpc,
479 src[i] = tgsi_src(vpc, fsrc);
492 src[i] = tgsi_src(vpc, fsrc);
494 src[i] = nvfx_src(temp(vpc));
495 nvfx_vp_emit(vpc, arith(0, VEC, MOV, src[i].reg, NVFX_VP_MASK_ALL,
496 tgsi_src(vpc, fsrc), none, none));
503 src[i] = tgsi_src(vpc, fsrc);
505 src[i] = nvfx_src(temp(vpc));
506 nvfx_vp_emit(vpc, arith(0, VEC, MOV, src[i].reg, NVFX_VP_MASK_ALL,
507 tgsi_src(vpc, fsrc), none, none));
514 src[i] = tgsi_src(vpc, fsrc);
516 src[i] = nvfx_src(temp(vpc));
517 nvfx_vp_emit(vpc, arith(0, VEC, MOV, src[i].reg, NVFX_VP_MASK_ALL,
518 tgsi_src(vpc, fsrc), none, none));
539 final_dst = dst = tgsi_dst(vpc, &finst->Dst[0]);
547 dst = temp(vpc);
552 nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, abs(src[0]), none, none));
555 nvfx_vp_emit(vpc, arith(sat, VEC, ADD, dst, mask, src[0], none, src[1]));
558 nvfx_vp_emit(vpc, arith(0, VEC, ARL, dst, mask, src[0], none, none));
561 tmp = nvfx_src(temp(vpc));
562 nvfx_vp_emit(vpc, arith(0, VEC, FLR, tmp.reg, mask, neg(src[0]), none, none));
563 nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, neg(tmp), none, none));
568 nvfx_vp_emit(vpc, insn);
572 nvfx_vp_emit(vpc, insn);
576 nvfx_vp_emit(vpc, insn);
579 nvfx_vp_emit(vpc, arith(sat, SCA, COS, dst, mask, none, none, src[0]));
582 tmp = nvfx_src(temp(vpc));
583 nvfx_vp_emit(vpc, arith(0, VEC, MUL, tmp.reg, NVFX_VP_MASK_X | NVFX_VP_MASK_Y, src[0], src[1], none));
584 nvfx_vp_emit(vpc, arith(sat, VEC, ADD, dst, mask, swz(tmp, X, X, X, X), none, swz(tmp, Y, Y, Y, Y)));
587 nvfx_vp_emit(vpc, arith(sat, VEC, DP3, dst, mask, src[0], src[1], none));
590 nvfx_vp_emit(vpc, arith(sat, VEC, DP4, dst, mask, src[0], src[1], none));
593 nvfx_vp_emit(vpc, arith(sat, VEC, DPH, dst, mask, src[0], src[1], none));
596 nvfx_vp_emit(vpc, arith(sat, VEC, DST, dst, mask, src[0], src[1], none));
599 nvfx_vp_emit(vpc, arith(sat, SCA, EX2, dst, mask, none, none, src[0]));
602 nvfx_vp_emit(vpc, arith(sat, SCA, EXP, dst, mask, none, none, src[0]));
605 nvfx_vp_emit(vpc, arith(sat, VEC, FLR, dst, mask, src[0], none, none));
608 nvfx_vp_emit(vpc, arith(sat, VEC, FRC, dst, mask, src[0], none, none));
611 nvfx_vp_emit(vpc, arith(sat, SCA, LG2, dst, mask, none, none, src[0]));
614 nvfx_vp_emit(vpc, arith(sat, SCA, LIT, dst, mask, none, none, src[0]));
617 nvfx_vp_emit(vpc, arith(sat, SCA, LOG, dst, mask, none, none, src[0]));
620 tmp = nvfx_src(temp(vpc));
621 nvfx_vp_emit(vpc, arith(0, VEC, MAD, tmp.reg, mask, neg(src[0]), src[2], src[2]));
622 nvfx_vp_emit(vpc, arith(sat, VEC, MAD, dst, mask, src[0], src[1], tmp));
625 nvfx_vp_emit(vpc, arith(sat, VEC, MAD, dst, mask, src[0], src[1], src[2]));
628 nvfx_vp_emit(vpc, arith(sat, VEC, MAX, dst, mask, src[0], src[1], none));
631 nvfx_vp_emit(vpc, arith(sat, VEC, MIN, dst, mask, src[0], src[1], none));
634 nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, src[0], none, none));
637 nvfx_vp_emit(vpc, arith(sat, VEC, MUL, dst, mask, src[0], src[1], none));
642 tmp = nvfx_src(temp(vpc));
643 nvfx_vp_emit(vpc, arith(0, SCA, LG2, tmp.reg, NVFX_VP_MASK_X, none, none, swz(src[0], X, X, X, X)));
644 nvfx_vp_emit(vpc, arith(0, VEC, MUL, tmp.reg, NVFX_VP_MASK_X, swz(tmp, X, X, X, X), swz(src[1], X, X, X, X), none));
645 nvfx_vp_emit(vpc, arith(sat, SCA, EX2, dst, mask, none, none, swz(tmp, X, X, X, X)));
648 nvfx_vp_emit(vpc, arith(sat, SCA, RCP, dst, mask, none, none, src[0]));
651 nvfx_vp_emit(vpc, arith(sat, SCA, RSQ, dst, mask, none, none, abs(src[0])));
654 nvfx_vp_emit(vpc, arith(sat, VEC, SEQ, dst, mask, src[0], src[1], none));
657 nvfx_vp_emit(vpc, arith(sat, VEC, SFL, dst, mask, src[0], src[1], none));
660 nvfx_vp_emit(vpc, arith(sat, VEC, SGE, dst, mask, src[0], src[1], none));
663 nvfx_vp_emit(vpc, arith(sat, VEC, SGT, dst, mask, src[0], src[1], none));
666 nvfx_vp_emit(vpc, arith(sat, SCA, SIN, dst, mask, none, none, src[0]));
669 nvfx_vp_emit(vpc, arith(sat, VEC, SLE, dst, mask, src[0], src[1], none));
672 nvfx_vp_emit(vpc, arith(sat, VEC, SLT, dst, mask, src[0], src[1], none));
675 nvfx_vp_emit(vpc, arith(sat, VEC, SNE, dst, mask, src[0], src[1], none));
678 nvfx_vp_emit(vpc, arith(sat, VEC, SSG, dst, mask, src[0], none, none));
681 nvfx_vp_emit(vpc, arith(sat, VEC, STR, dst, mask, src[0], src[1], none));
684 nvfx_vp_emit(vpc, arith(sat, VEC, ADD, dst, mask, src[0], none, neg(src[1])));
687 tmp = nvfx_src(temp(vpc));
690 nvfx_vp_emit(vpc, insn);
692 nvfx_vp_emit(vpc, arith(0, VEC, FLR, tmp.reg, mask, abs(src[0]), none, none));
693 nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, tmp, none, none));
697 nvfx_vp_emit(vpc, insn);
700 tmp = nvfx_src(temp(vpc));
701 nvfx_vp_emit(vpc, arith(0, VEC, MUL, tmp.reg, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none));
702 nvfx_vp_emit(vpc, arith(sat, VEC, MAD, dst, (mask & ~NVFX_VP_MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)));
707 nvfx_vp_emit(vpc, insn);
709 reloc.location = vpc->vp->nr_insns;
711 util_dynarray_append(&vpc->label_relocs, struct nvfx_relocation, reloc);
716 nvfx_vp_emit(vpc, insn);
721 reloc.location = vpc->vp->nr_insns;
723 util_dynarray_append(&vpc->label_relocs, struct nvfx_relocation, reloc);
729 nvfx_vp_emit(vpc, insn);
732 if(sub_depth || !vpc->vp->enabled_ucps) {
735 nvfx_vp_emit(vpc, arith(0, SCA, RET, none.reg, 0, none, none, tmp));
737 reloc.location = vpc->vp->nr_insns;
738 reloc.target = vpc->info->num_instructions;
739 util_dynarray_append(&vpc->label_relocs, struct nvfx_relocation, reloc);
740 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
755 util_dynarray_append(&vpc->loop_stack, struct nvfx_loop_entry, loop);
758 loop = util_dynarray_pop(&vpc->loop_stack, struct nvfx_loop_entry);
760 reloc.location = vpc->vp->nr_insns;
762 util_dynarray_append(&vpc->label_relocs, struct nvfx_relocation, reloc);
764 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
767 loop = util_dynarray_top(&vpc->loop_stack, struct nvfx_loop_entry);
769 reloc.location = vpc->vp->nr_insns;
771 util_dynarray_append(&vpc->label_relocs, struct nvfx_relocation, reloc);
773 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
776 loop = util_dynarray_top(&vpc->loop_stack, struct nvfx_loop_entry);
778 reloc.location = vpc->vp->nr_insns;
780 util_dynarray_append(&vpc->label_relocs, struct nvfx_relocation, reloc);
782 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
786 if(vpc->vp->enabled_ucps) {
787 if(idx != (vpc->info->num_instructions - 1)) {
788 reloc.location = vpc->vp->nr_insns;
789 reloc.target = vpc->info->num_instructions;
790 util_dynarray_append(&vpc->label_relocs, struct nvfx_relocation, reloc);
791 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
794 if(vpc->vp->nr_insns)
795 vpc->vp->insns[vpc->vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST;
796 nvfx_vp_emit(vpc, arith(0, VEC, NOP, none.reg, 0, none, none, none));
797 vpc->vp->insns[vpc->vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST;
806 if (!vpc->r_0_1.type)
807 vpc->r_0_1 = constant(vpc, -1, 0, 1, 0, 0);
808 nvfx_vp_emit(vpc, arith(0, VEC, MAX, dst, mask, nvfx_src(dst), swz(nvfx_src(vpc->r_0_1), X, X, X, X), none));
809 nvfx_vp_emit(vpc, arith(0, VEC, MIN, final_dst, mask, nvfx_src(dst), swz(nvfx_src(vpc->r_0_1), Y, Y, Y, Y), none));
812 release_temps(vpc);
817 nvfx_vertprog_parse_decl_output(struct nv30_context *nv30, struct nvfx_vpc *vpc,
827 vpc->hpos_idx = idx;
830 vpc->r_result[idx] = temp(vpc);
831 vpc->r_temps_discard = 0;
832 vpc->cvtx_idx = idx;
864 if (vpc->vp->texcoord[i] == fdec->Semantic.Index) {
871 vpc->r_result[idx] = nvfx_reg(NVFXSR_NONE, 0);
884 vpc->r_result[idx] = nvfx_reg(NVFXSR_OUTPUT, hw);
889 nvfx_vertprog_prepare(struct nv30_context *nv30, struct nvfx_vpc *vpc)
894 tgsi_parse_init(&p, vpc->pipe.tokens);
928 if (!nvfx_vertprog_parse_decl_output(nv30, vpc, fdec))
943 vpc->imm = CALLOC(nr_imm, sizeof(struct nvfx_reg));
944 assert(vpc->imm);
948 vpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_reg));
950 vpc->r_temp[i] = temp(vpc);
954 vpc->r_address = CALLOC(high_addr, sizeof(struct nvfx_reg));
956 vpc->r_address[i] = nvfx_reg(NVFXSR_TEMP, i);
960 vpc->r_const = CALLOC(high_const, sizeof(struct nvfx_reg));
962 vpc->r_const[i] = constant(vpc, i, 0, 0, 0, 0);
965 vpc->r_temps_discard = 0;
975 struct nvfx_vpc *vpc = NULL;
984 vpc = CALLOC_STRUCT(nvfx_vpc);
985 if (!vpc)
987 vpc->nv30 = nv30;
988 vpc->vp = vp;
989 vpc->pipe = vp->pipe;
990 vpc->info = &vp->info;
991 vpc->cvtx_idx = -1;
993 if (!nvfx_vertprog_prepare(nv30, vpc)) {
994 FREE(vpc);
1002 if (vp->enabled_ucps && vpc->cvtx_idx < 0) {
1003 vpc->r_result[vpc->hpos_idx] = temp(vpc);
1004 vpc->r_temps_discard = 0;
1005 vpc->cvtx_idx = vpc->hpos_idx;
1022 vpc->imm[vpc->nr_imm++] =
1023 constant(vpc, -1,
1036 if (!nvfx_vertprog_parse_instruction(nv30, vpc, idx, finst))
1047 for(unsigned i = 0; i < vpc->label_relocs.size; i += sizeof(struct nvfx_relocation))
1049 struct nvfx_relocation* label_reloc = (struct nvfx_relocation*)((char*)vpc->label_relocs.data + i);
1065 if (vpc->r_result[vpc->hpos_idx].type != NVFXSR_OUTPUT) {
1068 struct nvfx_src htmp = nvfx_src(vpc->r_result[vpc->hpos_idx]);
1070 nvfx_vp_emit(vpc, arith(0, VEC, MOV, hpos, NVFX_VP_MASK_ALL, htmp, none, none));
1079 struct nvfx_src htmp = nvfx_src(vpc->r_result[vpc->cvtx_idx]);
1096 nvfx_vp_emit(vpc, arith(0, VEC, DP4, cdst, mask, htmp, ceqn, none));
1099 if (vpc->vp->nr_insns)
1100 vpc->vp->insns[vpc->vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST;
1105 tgsi_dump(vpc->pipe.tokens, 0);
1117 if(vpc) {
1118 util_dynarray_fini(&vpc->label_relocs);
1119 util_dynarray_fini(&vpc->loop_stack);
1120 FREE(vpc->r_temp);
1121 FREE(vpc->r_address);
1122 FREE(vpc->r_const);
1123 FREE(vpc->imm);
1124 FREE(vpc);