Cross Reference: /external/vixl/src/a64/macro-assembler-a64.cc

Lines Matching defs:immediate
127     int64_t immediate = operand.immediate();
129     VIXL_ASSERT(rd.Is64Bits() || is_uint32(immediate));
131     // If the operation is NOT, invert the operation and immediate.
134       immediate = ~immediate;
136         immediate &= kWRegMask;
141     if (immediate == 0) {
156     } else if ((rd.Is64Bits() && (immediate == -1)) ||
157                (rd.Is32Bits() && (immediate == 0xffffffff))) {
163           Mov(rd, immediate);
177     if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
181       // Immediate can't be encoded: synthesize using move immediate.
183       Mov(temp, immediate);
220     Mov(rd, operand.immediate());
253     Mvn(rd, operand.immediate());
283   //  4. 32-bit orr immediate.
284   //  5. 64-bit orr immediate.
306     // Generic immediate case. Imm will be represented by
391   if (operand.IsImmediate() && (operand.immediate() < 0)) {
392     ConditionalCompareMacro(rn, -operand.immediate(), nzcv, cond, CCMN);
404   if (operand.IsImmediate() && (operand.immediate() < 0)) {
405     ConditionalCompareMacro(rn, -operand.immediate(), nzcv, cond, CCMP);
419       (operand.IsImmediate() && IsImmConditionalCompare(operand.immediate()))) {
420     // The immediate can be encoded in the instruction, or the operand is an
445     int64_t imm = operand.immediate();
456       Mov(temp, operand.immediate());
476   if (operand.IsImmediate() && (operand.immediate() < 0)) {
477     AddSubMacro(rd, rn, -operand.immediate(), LeaveFlags, SUB);
488   if (operand.IsImmediate() && (operand.immediate() < 0)) {
489     AddSubMacro(rd, rn, -operand.immediate(), SetFlags, SUB);
500   if (operand.IsImmediate() && (operand.immediate() < 0)) {
501     AddSubMacro(rd, rn, -operand.immediate(), LeaveFlags, ADD);
512   if (operand.IsImmediate() && (operand.immediate() < 0)) {
513     AddSubMacro(rd, rn, -operand.immediate(), SetFlags, ADD);
586     Mov(rd, -operand.immediate());
611   if ((operand.IsImmediate() && !IsImmAddSub(operand.immediate())) ||
682     // Add/sub with carry (immediate or ROR shifted register.)
729   // Check if an immediate offset fits in the immediate field of the
960     VIXL_ASSERT(offset.immediate() >= 0);
970     VIXL_ASSERT(offset.immediate() >= 0);
985     VIXL_ASSERT(size.immediate() > 0);
987       VIXL_ASSERT((size.immediate() % 16) == 0);
1007     VIXL_ASSERT(size.immediate() > 0);
1009       VIXL_ASSERT((size.immediate() % 16) == 0);
1065   // the assembler directly here. However, this means that large immediate